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4fc044df14
Synchronize the ath11k backports with the current ath-next tree. This replaces the 160MHz with the upstreamed one, fixes 6GHz only WIPHY registration, allows SAR usage on WCN6750 and plenty of REO fixes. Signed-off-by: Robert Marko <robimarko@gmail.com>
50 lines
1.8 KiB
Diff
50 lines
1.8 KiB
Diff
From 2f0c9ac8362da09c80f1cd422ef7fd6fa9b252b9 Mon Sep 17 00:00:00 2001
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From: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
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Date: Mon, 17 Apr 2023 13:35:02 +0300
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Subject: [PATCH] wifi: ath11k: Fix incorrect update of radiotap fields
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Fix incorrect update of ppdu stats causing incorrect radiotap
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fields.
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Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
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Signed-off-by: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com>
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Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
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Link: https://lore.kernel.org/r/20230403195738.25367-3-quic_pradeepc@quicinc.com
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---
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drivers/net/wireless/ath/ath11k/hal_rx.c | 4 ++--
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drivers/net/wireless/ath/ath11k/hal_rx.h | 2 +-
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2 files changed, 3 insertions(+), 3 deletions(-)
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--- a/drivers/net/wireless/ath/ath11k/hal_rx.c
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+++ b/drivers/net/wireless/ath/ath11k/hal_rx.c
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@@ -1029,7 +1029,7 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
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info1 = __le32_to_cpu(vht_sig->info1);
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ppdu_info->ldpc = FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_SU_MU_CODING,
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- info0);
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+ info1);
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ppdu_info->mcs = FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_MCS,
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info1);
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gi_setting = FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_GI_SETTING,
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@@ -1452,7 +1452,7 @@ ath11k_hal_rx_parse_mon_status_tlv(struc
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* PHYRX_OTHER_RECEIVE_INFO TLV.
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*/
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ppdu_info->rssi_comb =
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- FIELD_GET(HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO1_RSSI_COMB,
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+ FIELD_GET(HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO0_RSSI_COMB,
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__le32_to_cpu(rssi->info0));
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if (db2dbm) {
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--- a/drivers/net/wireless/ath/ath11k/hal_rx.h
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+++ b/drivers/net/wireless/ath/ath11k/hal_rx.h
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@@ -385,7 +385,7 @@ struct hal_rx_he_sig_b2_ofdma_info {
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__le32 info0;
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} __packed;
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-#define HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO1_RSSI_COMB GENMASK(15, 8)
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+#define HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO0_RSSI_COMB GENMASK(15, 8)
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#define HAL_RX_PHYRX_RSSI_PREAMBLE_PRI20 GENMASK(7, 0)
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