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97 lines
3.6 KiB
Diff
97 lines
3.6 KiB
Diff
From 6f1ae821a6c4aa9d5b8f437b27ec86fb569219fd Mon Sep 17 00:00:00 2001
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From: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
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Date: Sun, 12 Jun 2022 16:53:45 +0100
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Subject: [PATCH] media: hantro: Add support for RK356x encoder
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The RK3566 and RK3568 SoCs come with a small Hantro instance which is
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solely dedicated to encoding. This patch adds the necessary structs to
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the Hantro driver to allow the JPEG encoder of it to function.
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Through some sleuthing through the vendor's MPP source code and after
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closer inspection of the TRM, it was determined that the hardware likely
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supports VP8 and H.264 as well.
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Tested with the following GStreamer command:
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gst-launch-1.0 videotestsrc ! v4l2jpegenc ! matroskamux ! \
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filesink location=foo.mkv
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Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
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Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
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Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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---
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drivers/staging/media/hantro/hantro_drv.c | 1 +
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drivers/staging/media/hantro/hantro_hw.h | 1 +
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.../staging/media/hantro/rockchip_vpu_hw.c | 25 +++++++++++++++++++
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3 files changed, 27 insertions(+)
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--- a/drivers/staging/media/hantro/hantro_drv.c
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+++ b/drivers/staging/media/hantro/hantro_drv.c
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@@ -588,6 +588,7 @@ static const struct of_device_id of_hant
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{ .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
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{ .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
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{ .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
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+ { .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, },
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{ .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
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#endif
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#ifdef CONFIG_VIDEO_HANTRO_IMX8M
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--- a/drivers/staging/media/hantro/hantro_hw.h
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+++ b/drivers/staging/media/hantro/hantro_hw.h
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@@ -215,6 +215,7 @@ extern const struct hantro_variant rk306
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extern const struct hantro_variant rk3288_vpu_variant;
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extern const struct hantro_variant rk3328_vpu_variant;
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extern const struct hantro_variant rk3399_vpu_variant;
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+extern const struct hantro_variant rk3568_vepu_variant;
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extern const struct hantro_variant rk3568_vpu_variant;
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extern const struct hantro_variant sama5d4_vdec_variant;
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--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
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+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
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@@ -423,6 +423,14 @@ static const struct hantro_codec_ops rk3
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},
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};
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+static const struct hantro_codec_ops rk3568_vepu_codec_ops[] = {
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+ [HANTRO_MODE_JPEG_ENC] = {
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+ .run = rockchip_vpu2_jpeg_enc_run,
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+ .reset = rockchip_vpu2_enc_reset,
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+ .done = rockchip_vpu2_jpeg_enc_done,
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+ },
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+};
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+
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/*
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* VPU variant.
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*/
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@@ -445,6 +453,10 @@ static const struct hantro_irq rockchip_
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{ "vdpu", rockchip_vpu2_vdpu_irq },
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};
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+static const struct hantro_irq rk3568_vepu_irqs[] = {
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+ { "vepu", rockchip_vpu2_vepu_irq },
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+};
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+
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static const char * const rk3066_vpu_clk_names[] = {
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"aclk_vdpu", "hclk_vdpu",
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"aclk_vepu", "hclk_vepu"
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@@ -549,6 +561,19 @@ const struct hantro_variant rk3399_vpu_v
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.init = rockchip_vpu_hw_init,
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.clk_names = rockchip_vpu_clk_names,
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.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
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+};
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+
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+const struct hantro_variant rk3568_vepu_variant = {
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+ .enc_offset = 0x0,
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+ .enc_fmts = rockchip_vpu_enc_fmts,
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+ .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts),
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+ .codec = HANTRO_JPEG_ENCODER,
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+ .codec_ops = rk3568_vepu_codec_ops,
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+ .irqs = rk3568_vepu_irqs,
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+ .num_irqs = ARRAY_SIZE(rk3568_vepu_irqs),
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+ .init = rockchip_vpu_hw_init,
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+ .clk_names = rockchip_vpu_clk_names,
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+ .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
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};
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const struct hantro_variant rk3568_vpu_variant = {
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