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b5fa901e0b
* rockchip: refresh NanoPi R2S patches Update the patches for the NanoPi R2S to the v3 sent (and accepted) upstream. Signed-off-by: David Bauer <mail@david-bauer.net> * rockchip: rk3328: add compatible to NanoPi R2S ethernet PHY This adds the compatible property to the NanoPi R2S ethernet PHY node. Otherwise, the PHY might not be probed, as the PHY ID reads all 0xff when it is still in reset. Signed-off-by: David Bauer <mail@david-bauer.net> * uboot-rockchip: update NanoPi R2S patches Update the patches required for the NanoPi R2S to match the DTS accepted for upstream Linux. The U-Boot patch meanwhile is still pending upstream. Signed-off-by: David Bauer <mail@david-bauer.net> * rockchip: refresh target patches Signed-off-by: CN_SZTL <cnsztl@project-openwrt.eu.org> Co-authored-by: CN_SZTL <cnsztl@project-openwrt.eu.org> Co-authored-by: wevsty <ty@wevs.org> * rockchip: fix NanoPi R2S PHY ID Fix the PHY ID for the NanoPi R2S PHY compatible to match the used PHY. The ID was wrong as I've accidentally picked the wrong upstream patch. Signed-off-by: David Bauer <mail@david-bauer.net> Co-authored-by: David Bauer <mail@david-bauer.net> Co-authored-by: wevsty <ty@wevs.org>
75 lines
2.2 KiB
Diff
75 lines
2.2 KiB
Diff
From 4f279f9fbca54464173240f7e73b145a136dfa1e Mon Sep 17 00:00:00 2001
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From: Robin Murphy <robin.murphy@arm.com>
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Date: Sun, 29 Dec 2019 20:16:17 +0000
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Subject: arm64: dts: rockchip: Add RK3328 idle state
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Downstream RK3328 DTBs describe a CPU idle state matching that present
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on other SoCs like RK3399. This works with upstream Trusted Firmware-A
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too, so let's add it here.
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Signed-off-by: Robin Murphy <robin.murphy@arm.com>
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Link: https://lore.kernel.org/r/a8c83e705d387446ea8121516d410e38b2d9c57b.1577640736.git.robin.murphy@arm.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3328.dtsi | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
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index 91306ebed4da2..c9ff1188bd7b1 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
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@@ -41,6 +41,7 @@
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reg = <0x0 0x0>;
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clocks = <&cru ARMCLK>;
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#cooling-cells = <2>;
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+ cpu-idle-states = <&CPU_SLEEP>;
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dynamic-power-coefficient = <120>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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@@ -53,6 +54,7 @@
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reg = <0x0 0x1>;
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clocks = <&cru ARMCLK>;
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#cooling-cells = <2>;
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+ cpu-idle-states = <&CPU_SLEEP>;
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dynamic-power-coefficient = <120>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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@@ -65,6 +67,7 @@
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reg = <0x0 0x2>;
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clocks = <&cru ARMCLK>;
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#cooling-cells = <2>;
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+ cpu-idle-states = <&CPU_SLEEP>;
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dynamic-power-coefficient = <120>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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@@ -77,12 +80,26 @@
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reg = <0x0 0x3>;
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clocks = <&cru ARMCLK>;
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#cooling-cells = <2>;
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+ cpu-idle-states = <&CPU_SLEEP>;
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dynamic-power-coefficient = <120>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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operating-points-v2 = <&cpu0_opp_table>;
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};
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+ idle-states {
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+ entry-method = "psci";
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+
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+ CPU_SLEEP: cpu-sleep {
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+ compatible = "arm,idle-state";
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+ local-timer-stop;
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+ arm,psci-suspend-param = <0x0010000>;
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+ entry-latency-us = <120>;
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+ exit-latency-us = <250>;
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+ min-residency-us = <900>;
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+ };
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+ };
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+
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l2: l2-cache0 {
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compatible = "cache";
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};
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--
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cgit 1.2.3-1.el7
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