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* rockchip: refresh NanoPi R2S patches Update the patches for the NanoPi R2S to the v3 sent (and accepted) upstream. Signed-off-by: David Bauer <mail@david-bauer.net> * rockchip: rk3328: add compatible to NanoPi R2S ethernet PHY This adds the compatible property to the NanoPi R2S ethernet PHY node. Otherwise, the PHY might not be probed, as the PHY ID reads all 0xff when it is still in reset. Signed-off-by: David Bauer <mail@david-bauer.net> * uboot-rockchip: update NanoPi R2S patches Update the patches required for the NanoPi R2S to match the DTS accepted for upstream Linux. The U-Boot patch meanwhile is still pending upstream. Signed-off-by: David Bauer <mail@david-bauer.net> * rockchip: refresh target patches Signed-off-by: CN_SZTL <cnsztl@project-openwrt.eu.org> Co-authored-by: CN_SZTL <cnsztl@project-openwrt.eu.org> Co-authored-by: wevsty <ty@wevs.org> * rockchip: fix NanoPi R2S PHY ID Fix the PHY ID for the NanoPi R2S PHY compatible to match the used PHY. The ID was wrong as I've accidentally picked the wrong upstream patch. Signed-off-by: David Bauer <mail@david-bauer.net> Co-authored-by: David Bauer <mail@david-bauer.net> Co-authored-by: wevsty <ty@wevs.org>
405 lines
8.8 KiB
Diff
405 lines
8.8 KiB
Diff
From 0720be5371c806c1b89936984a321248fa739bea Mon Sep 17 00:00:00 2001
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From: David Bauer <mail@david-bauer.net>
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Date: Fri, 10 Jul 2020 15:57:46 +0200
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Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
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This adds support for the NanoPi R2S from FriendlyARM.
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Rockchip RK3328 SoC
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1GB DDR4 RAM
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Gigabit Ethernet (WAN)
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Gigabit Ethernet (USB3) (LAN)
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USB 2.0 Host Port
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MicroSD slot
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Reset button
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WAN - LAN - SYS LED
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Signed-off-by: David Bauer <mail@david-bauer.net>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 368 ++++++++++++++++++
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2 files changed, 369 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -1,6 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
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@@ -0,0 +1,368 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/gpio/gpio.h>
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+#include "rk3328.dtsi"
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+
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+/ {
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+ model = "FriendlyElec NanoPi R2S";
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+ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ gmac_clk: gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "gmac_clk";
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+ #clock-cells = <0>;
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+ };
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+
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+ keys {
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+ compatible = "gpio-keys";
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+ pinctrl-0 = <&reset_button_pin>;
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+ pinctrl-names = "default";
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+
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+ reset {
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+ label = "reset";
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+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
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+ linux,code = <KEY_RESTART>;
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+ debounce-interval = <50>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
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+ pinctrl-names = "default";
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+
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+ lan_led: led-0 {
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+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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+ label = "nanopi-r2s:green:lan";
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+ };
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+
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+ sys_led: led-1 {
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+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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+ label = "nanopi-r2s:red:sys";
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+ };
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+
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+ wan_led: led-2 {
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+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
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+ label = "nanopi-r2s:green:wan";
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+ };
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+ };
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+
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+ vcc_io_sdio: sdmmcio-regulator {
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+ compatible = "regulator-gpio";
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+ enable-active-high;
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+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ pinctrl-0 = <&sdio_vcc_pin>;
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+ pinctrl-names = "default";
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+ regulator-name = "vcc_io_sdio";
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+ regulator-always-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-settling-time-us = <5000>;
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+ regulator-type = "voltage";
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+ startup-delay-us = <2000>;
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+ states = <1800000 0x1
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+ 3300000 0x0>;
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+ vin-supply = <&vcc_io_33>;
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+ };
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+
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+ vcc_sd: sdmmc-regulator {
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+ compatible = "regulator-fixed";
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+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
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+ pinctrl-0 = <&sdmmc0m1_gpio>;
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+ pinctrl-names = "default";
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+ regulator-name = "vcc_sd";
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_io_33>;
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+ };
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+
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+ vdd_5v: vdd-5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vdd_5v";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&gmac2io {
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+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
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+ clock_in_out = "input";
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+ phy-handle = <&rtl8211e>;
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+ phy-mode = "rgmii";
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+ phy-supply = <&vcc_io_33>;
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+ pinctrl-0 = <&rgmiim1_pins>;
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+ pinctrl-names = "default";
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+ rx_delay = <0x18>;
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+ snps,aal;
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+ tx_delay = <0x24>;
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+ status = "okay";
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+
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+ mdio {
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+ compatible = "snps,dwmac-mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ rtl8211e: ethernet-phy@1 {
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+ reg = <1>;
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+ pinctrl-0 = <ð_phy_reset_pin>;
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+ pinctrl-names = "default";
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <50000>;
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+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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+
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+&i2c1 {
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+ status = "okay";
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+
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+ rk805: pmic@18 {
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+ compatible = "rockchip,rk805";
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+ reg = <0x18>;
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ clock-output-names = "xin32k", "rk805-clkout2";
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ pinctrl-0 = <&pmic_int_l>;
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+ pinctrl-names = "default";
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vdd_5v>;
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+ vcc2-supply = <&vdd_5v>;
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+ vcc3-supply = <&vdd_5v>;
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+ vcc4-supply = <&vdd_5v>;
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+ vcc5-supply = <&vcc_io_33>;
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+ vcc6-supply = <&vdd_5v>;
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+
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+ regulators {
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+ vdd_log: DCDC_REG1 {
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+ regulator-name = "vdd_log";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1450000>;
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+ regulator-ramp-delay = <12500>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+
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+ vdd_arm: DCDC_REG2 {
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+ regulator-name = "vdd_arm";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1450000>;
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+ regulator-ramp-delay = <12500>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <950000>;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vcc_io_33: DCDC_REG4 {
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+ regulator-name = "vcc_io_33";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_18: LDO_REG1 {
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+ regulator-name = "vcc_18";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vcc18_emmc: LDO_REG2 {
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+ regulator-name = "vcc18_emmc";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vdd_10: LDO_REG3 {
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+ regulator-name = "vdd_10";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1000000>;
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+ regulator-max-microvolt = <1000000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+ };
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+ };
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+};
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+
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+&io_domains {
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+ pmuio-supply = <&vcc_io_33>;
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+ vccio1-supply = <&vcc_io_33>;
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+ vccio2-supply = <&vcc18_emmc>;
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+ vccio3-supply = <&vcc_io_sdio>;
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+ vccio4-supply = <&vcc_18>;
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+ vccio5-supply = <&vcc_io_33>;
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+ vccio6-supply = <&vcc_io_33>;
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+ status = "okay";
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+};
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+
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+&pinctrl {
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+ button {
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+ reset_button_pin: reset-button-pin {
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+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ ethernet-phy {
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+ eth_phy_reset_pin: eth-phy-reset-pin {
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+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
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+ };
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+ };
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+
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+ leds {
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+ lan_led_pin: lan-led-pin {
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+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ sys_led_pin: sys-led-pin {
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+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ wan_led_pin: wan-led-pin {
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+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ pmic {
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+ pmic_int_l: pmic-int-l {
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+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+
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+ sd {
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+ sdio_vcc_pin: sdio-vcc-pin {
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+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+};
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+
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+&pwm2 {
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+ status = "okay";
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+};
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+
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+&sdmmc {
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+ bus-width = <4>;
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+ cap-sd-highspeed;
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+ disable-wp;
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+ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
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+ pinctrl-names = "default";
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+ sd-uhs-sdr12;
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+ sd-uhs-sdr25;
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+ sd-uhs-sdr50;
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+ sd-uhs-sdr104;
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+ vmmc-supply = <&vcc_sd>;
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+ vqmmc-supply = <&vcc_io_sdio>;
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+ status = "okay";
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+};
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+
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+&tsadc {
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+ rockchip,hw-tshut-mode = <0>;
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+ rockchip,hw-tshut-polarity = <0>;
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+ status = "okay";
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+};
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+
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+&u2phy {
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+ status = "okay";
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+};
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+
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+&u2phy_host {
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+ status = "okay";
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+};
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+
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+&u2phy_otg {
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+ status = "okay";
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+};
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+
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+&uart2 {
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+ status = "okay";
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+};
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+
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+&usb20_otg {
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+ status = "okay";
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+ dr_mode = "host";
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+};
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+
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+&usb_host0_ehci {
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+ status = "okay";
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+};
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+
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+&usb_host0_ohci {
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+ status = "okay";
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+};
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