lede/toolchain/gcc/patches/11.2.0/110-Fix-MIPS-PR-84790.patch
Beginner 5a001287e5
toolchain/gcc: bump gcc 11 to 11.2 (#7579)
Patches automatically refreshed.

Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>

Co-authored-by: Rui Salvaterra <rsalvaterra@gmail.com>
2021-08-09 22:35:53 +08:00

21 lines
684 B
Diff

Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
MIPS16 functions have a static assembler prologue which clobbers
registers v0 and v1. Add these register clobbers to function call
instructions.
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -3132,6 +3132,12 @@ mips_emit_call_insn (rtx pattern, rtx or
emit_insn (gen_update_got_version ());
}
+ if (TARGET_MIPS16 && TARGET_USE_GOT)
+ {
+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
+ }
+
if (TARGET_MIPS16
&& TARGET_EXPLICIT_RELOCS
&& TARGET_CALL_CLOBBERED_GP)