mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-04-16 14:23:38 +00:00
212 lines
4.5 KiB
Diff
212 lines
4.5 KiB
Diff
--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
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@@ -4,6 +4,7 @@
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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#include "rk3568.dtsi"
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/ {
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@@ -20,6 +21,24 @@
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stdout-path = "serial2:1500000n8";
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};
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+ gmac1_clkin: external-gmac1-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "gmac1_clkin";
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+ #clock-cells = <0>;
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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leds {
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compatible = "gpio-leds";
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@@ -94,7 +113,8 @@
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regulator-name = "vcc5v0_usb_host";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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- vin-supply = <&vcc5v0_usb>;
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+ regulator-always-on;
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+ regulator-boot-on;
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};
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vcc5v0_usb_hub: vcc5v0-usb-hub-regulator {
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@@ -117,7 +137,41 @@
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regulator-name = "vcc5v0_usb_otg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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- vin-supply = <&vcc5v0_usb>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ pcie30_avdd0v9: pcie30-avdd0v9 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ pcie30_avdd1v8: pcie30-avdd1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ pcie30_3v3: gpio-regulator {
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+ compatible = "regulator-gpio";
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+ regulator-name = "pcie30_3v3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <100000>;
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+ regulator-max-microvolt = <3300000>;
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+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ gpios-states = <0x1>;
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+ states = <100000 0x0
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+ 3300000 0x1>;
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};
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};
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@@ -145,19 +199,33 @@
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cpu-supply = <&vdd_cpu>;
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};
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+&combphy2 {
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+ status = "okay";
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+};
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+
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&gmac1 {
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+ snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ /* Reset time is 20ms, 100ms for rtl8211f */
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+ snps,reset-delays-us = <0 20000 100000>;
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+
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
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- assigned-clock-rates = <0>, <125000000>;
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- clock_in_out = "output";
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+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
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+ clock_in_out = "input";
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phy-handle = <&rgmii_phy1>;
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- phy-mode = "rgmii-id";
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+ phy-mode = "rgmii";
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+
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_tx_bus2
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&gmac1m1_rx_bus2
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&gmac1m1_rgmii_clk
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- &gmac1m1_rgmii_bus>;
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+ &gmac1m1_rgmii_bus
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+ &gmac1m1_clkinout>;
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+
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+ tx_delay = <0x4f>;
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+ rx_delay = <0x26>;
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+
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status = "okay";
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};
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@@ -166,6 +234,24 @@
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status = "okay";
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};
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+&hdmi {
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+ avdd-0v9-supply = <&vdda0v9_image>;
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+ avdd-1v8-supply = <&vcca1v8_image>;
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+ status = "okay";
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+};
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+
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+&hdmi_in {
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+ hdmi_in_vp0: endpoint {
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+ remote-endpoint = <&vp0_out_hdmi>;
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+ };
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+};
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+
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+&hdmi_out {
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+ hdmi_out_con: endpoint {
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+ remote-endpoint = <&hdmi_con_in>;
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+ };
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+};
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+
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&i2c0 {
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status = "okay";
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@@ -415,11 +501,6 @@
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rgmii_phy1: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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- pinctrl-names = "default";
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- pinctrl-0 = <ð_phy_rst>;
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- reset-assert-us = <20000>;
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- reset-deassert-us = <100000>;
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- reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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};
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};
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@@ -498,6 +579,17 @@
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status = "okay";
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};
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+&sfc {
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+ status = "okay";
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+ flash@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <108000000>;
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+ spi-rx-bus-width = <2>;
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+ spi-tx-bus-width = <2>;
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+ };
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+};
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+
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&tsadc {
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rockchip,hw-tshut-mode = <1>;
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rockchip,hw-tshut-polarity = <0>;
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@@ -560,3 +652,28 @@
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phy-supply = <&vcc5v0_usb_host>;
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status = "okay";
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};
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+
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+&pcie2x1 {
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+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&pcie30_3v3>;
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+ pinctrl-0 = <&pcie20m1_pins>;
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+ bus-scan-delay-ms = <1000>;
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+ status = "okay";
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+};
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+
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+&vop {
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+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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+ status = "okay";
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+};
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+
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+&vop_mmu {
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+ status = "okay";
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+};
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+
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+&vp0 {
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+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
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+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
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+ remote-endpoint = <&hdmi_in_vp0>;
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+ };
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+};
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