mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-04-16 04:13:31 +00:00
76 lines
1.6 KiB
Diff
76 lines
1.6 KiB
Diff
Subject: [PATCH] arm64: dts: rockchip: Enable PCIe controller on quartz64-a
|
|
Add the nodes to enable the PCIe controller on the Quartz64 Model A
|
|
board.
|
|
|
|
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
|
|
---
|
|
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 34 +++++++++++++++++++
|
|
1 file changed, 34 insertions(+)
|
|
|
|
|
|
|
|
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
|
|
@@ -125,6 +125,18 @@
|
|
vin-supply = <&vcc12v_dcin>;
|
|
};
|
|
|
|
+ vcc3v3_pcie_p: vcc3v3_pcie_p {
|
|
+ compatible = "regulator-fixed";
|
|
+ enable-active-high;
|
|
+ gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie_enable_h>;
|
|
+ regulator-name = "vcc3v3_pcie_p";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ vin-supply = <&vcc_3v3>;
|
|
+ };
|
|
+
|
|
vcc5v0_usb: vcc5v0_usb {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc5v0_usb";
|
|
@@ -201,6 +213,10 @@
|
|
status = "okay";
|
|
};
|
|
|
|
+&combphy2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&cpu0 {
|
|
cpu-supply = <&vdd_cpu>;
|
|
};
|
|
@@ -509,6 +525,14 @@
|
|
};
|
|
};
|
|
|
|
+&pcie2x1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie_reset_h>;
|
|
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
|
+ vpcie3v3-supply = <&vcc3v3_pcie_p>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&pinctrl {
|
|
bt {
|
|
bt_enable_h: bt-enable-h {
|
|
@@ -534,6 +558,16 @@
|
|
};
|
|
};
|
|
|
|
+ pcie {
|
|
+ pcie_enable_h: pcie-enable-h {
|
|
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ pcie_reset_h: pcie-reset-h {
|
|
+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
pmic {
|
|
pmic_int_l: pmic-int-l {
|
|
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|