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79 lines
2.6 KiB
Diff
79 lines
2.6 KiB
Diff
From 16c0f95d9ed14f033b5f1bd37e96d257b60c198c Mon Sep 17 00:00:00 2001
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From: Frank Wunderlich <frank-w@public-files.de>
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Date: Fri, 11 Mar 2022 22:03:57 +0100
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Subject: arm64: dts: rockchip: Add sata nodes to rk356x
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RK356x supports up to 3 sata controllers which were compatible with the
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existing snps,dwc-ahci binding.
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Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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Link: https://lore.kernel.org/r/20220311210357.222830-7-linux@fw-web.de
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++++++++++++++
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arch/arm64/boot/dts/rockchip/rk356x.dtsi | 28 ++++++++++++++++++++++++++++
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2 files changed, 42 insertions(+)
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(limited to 'arch/arm64/boot/dts/rockchip')
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--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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@@ -8,6 +8,20 @@
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/ {
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compatible = "rockchip,rk3568";
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+ sata0: sata@fc000000 {
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+ compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
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+ reg = <0 0xfc000000 0 0x1000>;
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+ clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
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+ <&cru CLK_SATA0_RXOOB>;
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+ clock-names = "sata", "pmalive", "rxoob";
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+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
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+ phys = <&combphy0 PHY_TYPE_SATA>;
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+ phy-names = "sata-phy";
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+ ports-implemented = <0x1>;
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+ power-domains = <&power RK3568_PD_PIPE>;
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+ status = "disabled";
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+ };
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+
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pipe_phy_grf0: syscon@fdc70000 {
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compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
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reg = <0x0 0xfdc70000 0x0 0x1000>;
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--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -230,6 +230,34 @@
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};
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};
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+ sata1: sata@fc400000 {
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+ compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
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+ reg = <0 0xfc400000 0 0x1000>;
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+ clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
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+ <&cru CLK_SATA1_RXOOB>;
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+ clock-names = "sata", "pmalive", "rxoob";
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+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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+ phys = <&combphy1 PHY_TYPE_SATA>;
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+ phy-names = "sata-phy";
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+ ports-implemented = <0x1>;
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+ power-domains = <&power RK3568_PD_PIPE>;
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+ status = "disabled";
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+ };
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+
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+ sata2: sata@fc800000 {
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+ compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
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+ reg = <0 0xfc800000 0 0x1000>;
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+ clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
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+ <&cru CLK_SATA2_RXOOB>;
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+ clock-names = "sata", "pmalive", "rxoob";
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+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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+ phys = <&combphy2 PHY_TYPE_SATA>;
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+ phy-names = "sata-phy";
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+ ports-implemented = <0x1>;
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+ power-domains = <&power RK3568_PD_PIPE>;
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+ status = "disabled";
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+ };
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+
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gic: interrupt-controller@fd400000 {
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compatible = "arm,gic-v3";
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reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
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