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117 lines
2.0 KiB
Plaintext
117 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7981b-cmcc-xr30.dtsi"
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/ {
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model = "CMCC XR30 NAND (U-Boot mod)";
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compatible = "cmcc,xr30-nand", "mediatek,mt7981";
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aliases {
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label-mac-device = &gmac1;
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};
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_2a>;
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nvmem-cell-names = "mac-address";
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};
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&gmac1 {
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nvmem-cells = <&macaddr_factory_24>;
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nvmem-cell-names = "mac-address";
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bl2";
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reg = <0x00000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x100000 0x80000>;
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};
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factory: partition@180000 {
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label = "factory";
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reg = <0x180000 0x200000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_24: macaddr@24 {
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reg = <0x24 0x6>;
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};
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macaddr_factory_2a: macaddr@2a {
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reg = <0x2a 0x6>;
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};
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};
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};
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partition@380000 {
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label = "fip";
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reg = <0x380000 0x200000>;
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read-only;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x7200000>;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>; /* bias-disable */
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>; /* bias-disable */
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};
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};
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};
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&wifi {
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mediatek,mtd-eeprom = <&factory 0x0>;
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};
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