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144 lines
4.9 KiB
Diff
144 lines
4.9 KiB
Diff
From 3d7de6e870ece5a32153382df9df6fb87613335e Mon Sep 17 00:00:00 2001
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From: William Wu <william.wu@rock-chips.com>
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Date: Wed, 16 Oct 2024 15:37:13 +0800
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Subject: [PATCH] phy: rockchip: inno-usb2: Add usb2 phys support for rk3576
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The RK3576 SoC has two independent USB2.0 PHYs, and each PHY has
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one port. This adds device specific data for it.
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Signed-off-by: William Wu <william.wu@rock-chips.com>
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Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
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Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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Link: https://lore.kernel.org/r/20241016073713.14133-4-frawang.cn@gmail.com
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Signed-off-by: Vinod Koul <vkoul@kernel.org>
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---
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drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 103 ++++++++++++++++++
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1 file changed, 103 insertions(+)
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--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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@@ -1523,6 +1523,30 @@ static int rk3128_usb2phy_tuning(struct
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BIT(2) << BIT_WRITEABLE_SHIFT | 0);
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}
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+static int rk3576_usb2phy_tuning(struct rockchip_usb2phy *rphy)
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+{
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+ int ret;
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+ u32 reg = rphy->phy_cfg->reg;
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+
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+ /* Deassert SIDDQ to power on analog block */
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+ ret = regmap_write(rphy->grf, reg + 0x0010, GENMASK(29, 29) | 0x0000);
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+ if (ret)
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+ return ret;
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+
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+ /* Do reset after exit IDDQ mode */
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+ ret = rockchip_usb2phy_reset(rphy);
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+ if (ret)
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+ return ret;
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+
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+ /* HS DC Voltage Level Adjustment 4'b1001 : +5.89% */
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+ ret |= regmap_write(rphy->grf, reg + 0x000c, GENMASK(27, 24) | 0x0900);
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+
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+ /* HS Transmitter Pre-Emphasis Current Control 2'b10 : 2x */
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+ ret |= regmap_write(rphy->grf, reg + 0x0010, GENMASK(20, 19) | 0x0010);
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+
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+ return ret;
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+}
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+
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static int rk3588_usb2phy_tuning(struct rockchip_usb2phy *rphy)
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{
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int ret;
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@@ -1951,6 +1975,84 @@ static const struct rockchip_usb2phy_cfg
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{ /* sentinel */ }
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};
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+static const struct rockchip_usb2phy_cfg rk3576_phy_cfgs[] = {
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+ {
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+ .reg = 0x0,
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+ .num_ports = 1,
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+ .phy_tuning = rk3576_usb2phy_tuning,
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+ .clkout_ctl = { 0x0008, 0, 0, 1, 0 },
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+ .port_cfgs = {
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+ [USB2PHY_PORT_OTG] = {
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+ .phy_sus = { 0x0000, 8, 0, 0, 0x1d1 },
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+ .bvalid_det_en = { 0x00c0, 1, 1, 0, 1 },
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+ .bvalid_det_st = { 0x00c4, 1, 1, 0, 1 },
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+ .bvalid_det_clr = { 0x00c8, 1, 1, 0, 1 },
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+ .ls_det_en = { 0x00c0, 0, 0, 0, 1 },
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+ .ls_det_st = { 0x00c4, 0, 0, 0, 1 },
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+ .ls_det_clr = { 0x00c8, 0, 0, 0, 1 },
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+ .disfall_en = { 0x00c0, 6, 6, 0, 1 },
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+ .disfall_st = { 0x00c4, 6, 6, 0, 1 },
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+ .disfall_clr = { 0x00c8, 6, 6, 0, 1 },
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+ .disrise_en = { 0x00c0, 5, 5, 0, 1 },
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+ .disrise_st = { 0x00c4, 5, 5, 0, 1 },
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+ .disrise_clr = { 0x00c8, 5, 5, 0, 1 },
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+ .utmi_avalid = { 0x0080, 1, 1, 0, 1 },
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+ .utmi_bvalid = { 0x0080, 0, 0, 0, 1 },
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+ .utmi_ls = { 0x0080, 5, 4, 0, 1 },
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+ }
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+ },
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+ .chg_det = {
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+ .cp_det = { 0x0080, 8, 8, 0, 1 },
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+ .dcp_det = { 0x0080, 8, 8, 0, 1 },
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+ .dp_det = { 0x0080, 9, 9, 1, 0 },
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+ .idm_sink_en = { 0x0010, 5, 5, 1, 0 },
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+ .idp_sink_en = { 0x0010, 5, 5, 0, 1 },
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+ .idp_src_en = { 0x0010, 14, 14, 0, 1 },
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+ .rdm_pdwn_en = { 0x0010, 14, 14, 0, 1 },
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+ .vdm_src_en = { 0x0010, 7, 6, 0, 3 },
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+ .vdp_src_en = { 0x0010, 7, 6, 0, 3 },
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+ },
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+ },
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+ {
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+ .reg = 0x2000,
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+ .num_ports = 1,
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+ .phy_tuning = rk3576_usb2phy_tuning,
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+ .clkout_ctl = { 0x2008, 0, 0, 1, 0 },
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+ .port_cfgs = {
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+ [USB2PHY_PORT_OTG] = {
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+ .phy_sus = { 0x2000, 8, 0, 0, 0x1d1 },
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+ .bvalid_det_en = { 0x20c0, 1, 1, 0, 1 },
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+ .bvalid_det_st = { 0x20c4, 1, 1, 0, 1 },
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+ .bvalid_det_clr = { 0x20c8, 1, 1, 0, 1 },
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+ .ls_det_en = { 0x20c0, 0, 0, 0, 1 },
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+ .ls_det_st = { 0x20c4, 0, 0, 0, 1 },
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+ .ls_det_clr = { 0x20c8, 0, 0, 0, 1 },
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+ .disfall_en = { 0x20c0, 6, 6, 0, 1 },
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+ .disfall_st = { 0x20c4, 6, 6, 0, 1 },
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+ .disfall_clr = { 0x20c8, 6, 6, 0, 1 },
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+ .disrise_en = { 0x20c0, 5, 5, 0, 1 },
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+ .disrise_st = { 0x20c4, 5, 5, 0, 1 },
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+ .disrise_clr = { 0x20c8, 5, 5, 0, 1 },
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+ .utmi_avalid = { 0x2080, 1, 1, 0, 1 },
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+ .utmi_bvalid = { 0x2080, 0, 0, 0, 1 },
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+ .utmi_ls = { 0x2080, 5, 4, 0, 1 },
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+ }
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+ },
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+ .chg_det = {
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+ .cp_det = { 0x2080, 8, 8, 0, 1 },
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+ .dcp_det = { 0x2080, 8, 8, 0, 1 },
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+ .dp_det = { 0x2080, 9, 9, 1, 0 },
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+ .idm_sink_en = { 0x2010, 5, 5, 1, 0 },
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+ .idp_sink_en = { 0x2010, 5, 5, 0, 1 },
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+ .idp_src_en = { 0x2010, 14, 14, 0, 1 },
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+ .rdm_pdwn_en = { 0x2010, 14, 14, 0, 1 },
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+ .vdm_src_en = { 0x2010, 7, 6, 0, 3 },
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+ .vdp_src_en = { 0x2010, 7, 6, 0, 3 },
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+ },
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+ },
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+ { /* sentinel */ }
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+};
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+
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static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
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{
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.reg = 0x0000,
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@@ -2122,6 +2224,7 @@ static const struct of_device_id rockchi
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{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
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{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
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{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
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+ { .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
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{ .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
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{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
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{}
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