mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-07-23 17:47:28 +08:00
d81c03f05e
These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.12.y With the following command: git format-patch -N v6.12.27..HEAD (HEAD -> 8d3206ee456a5ecdf9ddbfd8e5e231e4f0cd716e) Exceptions: - (def)configs patches - github workflows patches - applied & reverted patches - readme patches - wireless patches Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
221 lines
6.1 KiB
Diff
221 lines
6.1 KiB
Diff
From 72d63bf99ada8a78fe7fa7c92434212ebeef6d78 Mon Sep 17 00:00:00 2001
|
|
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
|
|
Date: Thu, 6 Feb 2025 11:36:32 +0000
|
|
Subject: [PATCH] arm64: dts: Drop downstream PCIe nodes that are about to be
|
|
superceded
|
|
|
|
About to add the upstream PCIe nodes, so remove the downstream ones
|
|
to avoid duplicated nodes and build breakage.
|
|
|
|
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
|
|
---
|
|
arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi | 190 -------------------
|
|
1 file changed, 190 deletions(-)
|
|
|
|
--- a/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-ds.dtsi
|
|
@@ -350,190 +350,6 @@
|
|
brcm,dma-channel-mask = <0x0fc0>;
|
|
};
|
|
|
|
- // Single-lane Gen3 PCIe
|
|
- // Outbound window at 0x14_000000-0x17_ffffff
|
|
- pcie0: pcie@100000 {
|
|
- compatible = "brcm,bcm2712-pcie";
|
|
- reg = <0x10 0x00100000 0x0 0x9310>;
|
|
- device_type = "pci";
|
|
- max-link-speed = <2>;
|
|
- #address-cells = <3>;
|
|
- #interrupt-cells = <1>;
|
|
- #size-cells = <2>;
|
|
- /*
|
|
- * Unused interrupts:
|
|
- * 208: AER
|
|
- * 215: NMI
|
|
- * 216: PME
|
|
- */
|
|
- interrupt-parent = <&gicv2>;
|
|
- interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
|
- <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
|
- interrupt-names = "pcie", "msi";
|
|
- interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
|
- interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 209
|
|
- IRQ_TYPE_LEVEL_HIGH>,
|
|
- <0 0 0 2 &gicv2 GIC_SPI 210
|
|
- IRQ_TYPE_LEVEL_HIGH>,
|
|
- <0 0 0 3 &gicv2 GIC_SPI 211
|
|
- IRQ_TYPE_LEVEL_HIGH>,
|
|
- <0 0 0 4 &gicv2 GIC_SPI 212
|
|
- IRQ_TYPE_LEVEL_HIGH>;
|
|
- resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>;
|
|
- reset-names = "swinit", "bridge", "rescal";
|
|
- msi-controller;
|
|
- msi-parent = <&pcie0>;
|
|
-
|
|
- ranges = <0x02000000 0x00 0x00000000
|
|
- 0x17 0x00000000
|
|
- 0x0 0xfffffffc>,
|
|
- <0x43000000 0x04 0x00000000
|
|
- 0x14 0x00000000
|
|
- 0x3 0x00000000>;
|
|
-
|
|
- dma-ranges = <0x43000000 0x10 0x00000000
|
|
- 0x00 0x00000000
|
|
- 0x10 0x00000000>;
|
|
-
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- // Single-lane Gen3 PCIe
|
|
- // Outbound window at 0x18_000000-0x1b_ffffff
|
|
- pcie1: pcie@110000 {
|
|
- compatible = "brcm,bcm2712-pcie";
|
|
- reg = <0x10 0x00110000 0x0 0x9310>;
|
|
- device_type = "pci";
|
|
- max-link-speed = <2>;
|
|
- #address-cells = <3>;
|
|
- #interrupt-cells = <1>;
|
|
- #size-cells = <2>;
|
|
- /*
|
|
- * Unused interrupts:
|
|
- * 218: AER
|
|
- * 225: NMI
|
|
- * 226: PME
|
|
- */
|
|
- interrupt-parent = <&gicv2>;
|
|
- interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
|
|
- <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
|
|
- interrupt-names = "pcie", "msi";
|
|
- interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
|
- interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 219
|
|
- IRQ_TYPE_LEVEL_HIGH>,
|
|
- <0 0 0 2 &gicv2 GIC_SPI 220
|
|
- IRQ_TYPE_LEVEL_HIGH>,
|
|
- <0 0 0 3 &gicv2 GIC_SPI 221
|
|
- IRQ_TYPE_LEVEL_HIGH>,
|
|
- <0 0 0 4 &gicv2 GIC_SPI 222
|
|
- IRQ_TYPE_LEVEL_HIGH>;
|
|
- resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>;
|
|
- reset-names = "swinit", "bridge", "rescal";
|
|
- msi-controller;
|
|
- msi-parent = <&mip1>;
|
|
-
|
|
- // 2GB, 32-bit, non-prefetchable at PCIe 00_80000000
|
|
- ranges = <0x02000000 0x00 0x80000000
|
|
- 0x1b 0x80000000
|
|
- 0x00 0x80000000>,
|
|
- // 14GB, 64-bit, prefetchable at PCIe 04_00000000
|
|
- <0x43000000 0x04 0x00000000
|
|
- 0x18 0x00000000
|
|
- 0x03 0x80000000>;
|
|
-
|
|
- dma-ranges = <0x03000000 0x10 0x00000000
|
|
- 0x00 0x00000000
|
|
- 0x10 0x00000000>;
|
|
-
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- pcie_rescal: reset-controller@119500 {
|
|
- compatible = "brcm,bcm7216-pcie-sata-rescal";
|
|
- reg = <0x10 0x00119500 0x0 0x10>;
|
|
- #reset-cells = <0>;
|
|
- };
|
|
-
|
|
- // Quad-lane Gen3 PCIe
|
|
- // Outbound window at 0x1c_000000-0x1f_ffffff
|
|
- pcie2: pcie@120000 {
|
|
- compatible = "brcm,bcm2712-pcie";
|
|
- reg = <0x10 0x00120000 0x0 0x9310>;
|
|
- device_type = "pci";
|
|
- max-link-speed = <2>;
|
|
- #address-cells = <3>;
|
|
- #interrupt-cells = <1>;
|
|
- #size-cells = <2>;
|
|
- /*
|
|
- * Unused interrupts:
|
|
- * 228: AER
|
|
- * 235: NMI
|
|
- * 236: PME
|
|
- */
|
|
- interrupt-parent = <&gicv2>;
|
|
- interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>,
|
|
- <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
|
|
- interrupt-names = "pcie", "msi";
|
|
- interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
|
- interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 229
|
|
- IRQ_TYPE_LEVEL_HIGH>,
|
|
- <0 0 0 2 &gicv2 GIC_SPI 230
|
|
- IRQ_TYPE_LEVEL_HIGH>,
|
|
- <0 0 0 3 &gicv2 GIC_SPI 231
|
|
- IRQ_TYPE_LEVEL_HIGH>,
|
|
- <0 0 0 4 &gicv2 GIC_SPI 232
|
|
- IRQ_TYPE_LEVEL_HIGH>;
|
|
- resets = <&bcm_reset 32>, <&bcm_reset 44>, <&pcie_rescal>;
|
|
- reset-names = "swinit", "bridge", "rescal";
|
|
- msi-controller;
|
|
- msi-parent = <&mip0>;
|
|
-
|
|
- // ~4GB, 32-bit, not-prefetchable at PCIe 00_00000000
|
|
- ranges = <0x02000000 0x00 0x00000000
|
|
- 0x1f 0x00000000
|
|
- 0x0 0xfffffffc>,
|
|
- // 12GB, 64-bit, prefetchable at PCIe 04_00000000
|
|
- <0x43000000 0x04 0x00000000
|
|
- 0x1c 0x00000000
|
|
- 0x03 0x00000000>;
|
|
-
|
|
- // 64GB system RAM space at PCIe 10_00000000
|
|
- dma-ranges = <0x02000000 0x00 0x00000000
|
|
- 0x1f 0x00000000
|
|
- 0x00 0x00400000>,
|
|
- <0x43000000 0x10 0x00000000
|
|
- 0x00 0x00000000
|
|
- 0x10 0x00000000>;
|
|
-
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- mip0: msi-controller@130000 {
|
|
- compatible = "brcm,bcm2712-mip-intc";
|
|
- reg = <0x10 0x00130000 0x0 0xc0>;
|
|
- msi-controller;
|
|
- interrupt-controller;
|
|
- #interrupt-cells = <2>;
|
|
- brcm,msi-base-spi = <128>;
|
|
- brcm,msi-num-spis = <64>;
|
|
- brcm,msi-offset = <0>;
|
|
- brcm,msi-pci-addr = <0xff 0xfffff000>;
|
|
- };
|
|
-
|
|
- mip1: msi-controller@131000 {
|
|
- compatible = "brcm,bcm2712-mip-intc";
|
|
- reg = <0x10 0x00131000 0x0 0xc0>;
|
|
- msi-controller;
|
|
- interrupt-controller;
|
|
- #interrupt-cells = <2>;
|
|
- brcm,msi-base-spi = <247>;
|
|
- /* Actually 20 total, but the others are
|
|
- * both sparse and non-consecutive */
|
|
- brcm,msi-num-spis = <8>;
|
|
- brcm,msi-offset = <8>;
|
|
- brcm,msi-pci-addr = <0xff 0xffffe000>;
|
|
- };
|
|
-
|
|
syscon_piarbctl: syscon@400018 {
|
|
compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd";
|
|
reg = <0x10 0x00400018 0x0 0x18>;
|
|
@@ -590,12 +406,6 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
- bcm_reset: reset-controller@1504318 {
|
|
- compatible = "brcm,brcmstb-reset";
|
|
- reg = <0x10 0x01504318 0x0 0x30>;
|
|
- #reset-cells = <1>;
|
|
- };
|
|
-
|
|
v3d: v3d@2000000 {
|
|
compatible = "brcm,2712-v3d";
|
|
reg = <0x10 0x02000000 0x0 0x4000>,
|