lede/target/linux/bcm27xx/patches-6.12/950-0488-dt-bindings-clk-rp1-Add-clocks-representing-MIPI-DSI.patch
=?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= d81c03f05e bcm27xx: add 6.12 patches from RPi repo
These patches were generated from:
https://github.com/raspberrypi/linux/commits/rpi-6.12.y
With the following command:
git format-patch -N v6.12.27..HEAD
(HEAD -> 8d3206ee456a5ecdf9ddbfd8e5e231e4f0cd716e)

Exceptions:
- (def)configs patches
- github workflows patches
- applied & reverted patches
- readme patches
- wireless patches

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2025-06-20 17:01:06 +08:00

26 lines
936 B
Diff

From b53ff041ec3364c8b1a6c38b2e9029447747ba26 Mon Sep 17 00:00:00 2001
From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Date: Fri, 10 May 2024 15:18:44 +0100
Subject: [PATCH] dt-bindings: clk: rp1: Add clocks representing MIPI DSI
byteclock
Define two new RP1 clocks, representing the MIPI DSI byteclock
sources for the dividers used to generate MIPI[01] DPI pixel clocks.
(Previously they were represented by "fake" fixed clocks sources).
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
---
include/dt-bindings/clock/rp1.h | 4 ++++
1 file changed, 4 insertions(+)
--- a/include/dt-bindings/clock/rp1.h
+++ b/include/dt-bindings/clock/rp1.h
@@ -54,3 +54,7 @@
/* Extra PLL output channels - RP1B0 only */
#define RP1_PLL_VIDEO_PRI_PH 43
#define RP1_PLL_AUDIO_TERN 44
+
+/* MIPI clocks managed by the DSI driver */
+#define RP1_CLK_MIPI0_DSI_BYTECLOCK 45
+#define RP1_CLK_MIPI1_DSI_BYTECLOCK 46