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54 lines
1.5 KiB
Diff
54 lines
1.5 KiB
Diff
From 8ddd2743d7bd30165b0c5e1abb6990da15c181d4 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Fri, 31 Dec 2021 20:38:06 +0100
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Subject: [PATCH 127/137] arm64: dts: ipq8074: add cooling cells to CPU nodes
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Since there is CPU Freq support as well as thermal sensor support
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now for the IPQ8074, add cooling cells to CPU nodes so that they can
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be used as cooling devices using CPU Freq.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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index bcf2163f527f..8094bef3f28f 100644
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -41,6 +41,7 @@ CPU0: cpu@0 {
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enable-method = "psci";
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clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
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clock-names = "cpu";
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+ #cooling-cells = <2>;
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};
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CPU1: cpu@1 {
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@@ -51,6 +52,7 @@ CPU1: cpu@1 {
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next-level-cache = <&L2_0>;
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clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
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clock-names = "cpu";
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+ #cooling-cells = <2>;
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};
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CPU2: cpu@2 {
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@@ -61,6 +63,7 @@ CPU2: cpu@2 {
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next-level-cache = <&L2_0>;
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clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
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clock-names = "cpu";
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+ #cooling-cells = <2>;
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};
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CPU3: cpu@3 {
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@@ -71,6 +74,7 @@ CPU3: cpu@3 {
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next-level-cache = <&L2_0>;
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clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
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clock-names = "cpu";
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+ #cooling-cells = <2>;
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};
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L2_0: l2-cache {
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--
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2.37.2
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