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51 lines
1.7 KiB
Diff
51 lines
1.7 KiB
Diff
From f086c5659cd54946b618ae4c695a8c05096f267a Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Mon, 20 Dec 2021 15:01:36 +0100
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Subject: [PATCH 111/137] PCI: qcom: add IPQ8074 Gen3 support
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IPQ8074 has one Gen2 and one Gen3 port, Gen3 port is the same one as
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in IPQ6018, so reuse the support but just add the missing clocks.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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drivers/pci/controller/dwc/pcie-qcom.c | 9 ++++++---
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1 file changed, 6 insertions(+), 3 deletions(-)
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diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
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index f50de3408add..5aec3510b5c9 100644
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--- a/drivers/pci/controller/dwc/pcie-qcom.c
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+++ b/drivers/pci/controller/dwc/pcie-qcom.c
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@@ -184,7 +184,7 @@ struct qcom_pcie_resources_2_7_0 {
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};
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struct qcom_pcie_resources_2_9_0 {
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- struct clk_bulk_data clks[5];
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+ struct clk_bulk_data clks[7];
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struct reset_control *rst;
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};
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@@ -1296,8 +1296,10 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie)
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res->clks[0].id = "iface";
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res->clks[1].id = "axi_m";
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res->clks[2].id = "axi_s";
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- res->clks[3].id = "axi_bridge";
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- res->clks[4].id = "rchng";
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+ res->clks[3].id = "ahb";
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+ res->clks[4].id = "aux";
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+ res->clks[5].id = "axi_bridge";
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+ res->clks[6].id = "rchng";
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ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
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if (ret < 0)
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@@ -1700,6 +1702,7 @@ static const struct of_device_id qcom_pcie_match[] = {
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{ .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 },
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{ .compatible = "qcom,pcie-sm8250", .data = &ops_1_9_0 },
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{ .compatible = "qcom,pcie-ipq6018", .data = &ops_2_9_0 },
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+ { .compatible = "qcom,pcie-ipq8074-gen3", .data = &ops_2_9_0 },
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{ }
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};
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--
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2.37.2
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