mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-04-16 04:13:31 +00:00
51 lines
1.7 KiB
Diff
51 lines
1.7 KiB
Diff
From 4e93203281f4b0c82bf36afd5f316e37991d6456 Mon Sep 17 00:00:00 2001
|
|
From: Robert Marko <robimarko@gmail.com>
|
|
Date: Mon, 20 Dec 2021 15:01:36 +0100
|
|
Subject: [PATCH] PCI: qcom: add IPQ8074 Gen3 support
|
|
|
|
IPQ8074 has one Gen2 and one Gen3 port, Gen3 port is the same one as
|
|
in IPQ6018, so reuse the support but just add the missing clocks.
|
|
|
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
|
---
|
|
drivers/pci/controller/dwc/pcie-qcom.c | 9 ++++++---
|
|
1 file changed, 6 insertions(+), 3 deletions(-)
|
|
|
|
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
|
|
index 05359cfc0e34..5556859eed18 100644
|
|
--- a/drivers/pci/controller/dwc/pcie-qcom.c
|
|
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
|
|
@@ -184,7 +184,7 @@ struct qcom_pcie_resources_2_7_0 {
|
|
};
|
|
|
|
struct qcom_pcie_resources_2_9_0 {
|
|
- struct clk_bulk_data clks[5];
|
|
+ struct clk_bulk_data clks[7];
|
|
struct reset_control *rst;
|
|
};
|
|
|
|
@@ -1297,8 +1297,10 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie)
|
|
res->clks[0].id = "iface";
|
|
res->clks[1].id = "axi_m";
|
|
res->clks[2].id = "axi_s";
|
|
- res->clks[3].id = "axi_bridge";
|
|
- res->clks[4].id = "rchng";
|
|
+ res->clks[3].id = "ahb";
|
|
+ res->clks[4].id = "aux";
|
|
+ res->clks[5].id = "axi_bridge";
|
|
+ res->clks[6].id = "rchng";
|
|
|
|
ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
|
|
if (ret < 0)
|
|
@@ -1701,6 +1703,7 @@ static const struct of_device_id qcom_pcie_match[] = {
|
|
{ .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 },
|
|
{ .compatible = "qcom,pcie-sm8250", .data = &ops_1_9_0 },
|
|
{ .compatible = "qcom,pcie-ipq6018", .data = &ops_2_9_0 },
|
|
+ { .compatible = "qcom,pcie-ipq8074-gen3", .data = &ops_2_9_0 },
|
|
{ }
|
|
};
|
|
|
|
--
|
|
2.35.1
|
|
|