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138 lines
5.5 KiB
Diff
138 lines
5.5 KiB
Diff
From 081e2d6476e30399433b509684d5da4d1844e430 Mon Sep 17 00:00:00 2001
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From: Seevalamuthu Mariappan <quic_seevalam@quicinc.com>
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Date: Wed, 17 Nov 2021 09:39:41 +0200
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Subject: [PATCH 103/120] ath11k: add hw_param for wakeup_mhi
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Wakeup mhi is needed before pci_read/write only for QCA6390 and WCN6855. Since
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wakeup & release mhi is enabled for all hardwares, below mhi assert is seen in
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QCN9074 when doing 'rmmod ath11k_pci':
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Kernel panic - not syncing: dev_wake != 0
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CPU: 2 PID: 13535 Comm: procd Not tainted 4.4.60 #1
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Hardware name: Generic DT based system
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[<80316dac>] (unwind_backtrace) from [<80313700>] (show_stack+0x10/0x14)
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[<80313700>] (show_stack) from [<805135dc>] (dump_stack+0x7c/0x9c)
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[<805135dc>] (dump_stack) from [<8032136c>] (panic+0x84/0x1f8)
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[<8032136c>] (panic) from [<80549b24>] (mhi_pm_disable_transition+0x3b8/0x5b8)
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[<80549b24>] (mhi_pm_disable_transition) from [<80549ddc>] (mhi_power_down+0xb8/0x100)
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[<80549ddc>] (mhi_power_down) from [<7f5242b0>] (ath11k_mhi_op_status_cb+0x284/0x3ac [ath11k_pci])
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[E][__mhi_device_get_sync] Did not enter M0 state, cur_state:RESET pm_state:SHUTDOWN Process
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[E][__mhi_device_get_sync] Did not enter M0 state, cur_state:RESET pm_state:SHUTDOWN Process
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[E][__mhi_device_get_sync] Did not enter M0 state, cur_state:RESET pm_state:SHUTDOWN Process
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[<7f5242b0>] (ath11k_mhi_op_status_cb [ath11k_pci]) from [<7f524878>] (ath11k_mhi_stop+0x10/0x20 [ath11k_pci])
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[<7f524878>] (ath11k_mhi_stop [ath11k_pci]) from [<7f525b94>] (ath11k_pci_power_down+0x54/0x90 [ath11k_pci])
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[<7f525b94>] (ath11k_pci_power_down [ath11k_pci]) from [<8056b2a8>] (pci_device_shutdown+0x30/0x44)
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[<8056b2a8>] (pci_device_shutdown) from [<805cfa0c>] (device_shutdown+0x124/0x174)
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[<805cfa0c>] (device_shutdown) from [<8033aaa4>] (kernel_restart+0xc/0x50)
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[<8033aaa4>] (kernel_restart) from [<8033ada8>] (SyS_reboot+0x178/0x1ec)
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[<8033ada8>] (SyS_reboot) from [<80301b80>] (ret_fast_syscall+0x0/0x34)
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Hence, disable wakeup/release mhi using hw_param for other hardwares.
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Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01060-QCAHKSWPL_SILICONZ-1
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Fixes: a05bd8513335 ("ath11k: read and write registers below unwindowed address")
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Signed-off-by: Seevalamuthu Mariappan <quic_seevalam@quicinc.com>
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Link: https://lore.kernel.org/r/1636702019-26142-1-git-send-email-quic_seevalam@quicinc.com
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---
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drivers/net/wireless/ath/ath11k/core.c | 5 +++++
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drivers/net/wireless/ath/ath11k/hw.h | 1 +
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drivers/net/wireless/ath/ath11k/pci.c | 12 ++++++++----
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3 files changed, 14 insertions(+), 4 deletions(-)
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--- a/drivers/net/wireless/ath/ath11k/core.c
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+++ b/drivers/net/wireless/ath/ath11k/core.c
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@@ -86,6 +86,7 @@ static const struct ath11k_hw_params ath
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.hal_params = &ath11k_hw_hal_params_ipq8074,
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.supports_dynamic_smps_6ghz = false,
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.alloc_cacheable_memory = true,
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+ .wakeup_mhi = false,
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},
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{
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.hw_rev = ATH11K_HW_IPQ6018_HW10,
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@@ -139,6 +140,7 @@ static const struct ath11k_hw_params ath
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.hal_params = &ath11k_hw_hal_params_ipq8074,
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.supports_dynamic_smps_6ghz = false,
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.alloc_cacheable_memory = true,
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+ .wakeup_mhi = false,
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},
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{
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.name = "qca6390 hw2.0",
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@@ -191,6 +193,7 @@ static const struct ath11k_hw_params ath
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.hal_params = &ath11k_hw_hal_params_qca6390,
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.supports_dynamic_smps_6ghz = false,
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.alloc_cacheable_memory = false,
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+ .wakeup_mhi = true,
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},
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{
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.name = "qcn9074 hw1.0",
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@@ -243,6 +246,7 @@ static const struct ath11k_hw_params ath
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.hal_params = &ath11k_hw_hal_params_ipq8074,
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.supports_dynamic_smps_6ghz = true,
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.alloc_cacheable_memory = true,
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+ .wakeup_mhi = false,
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},
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{
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.name = "wcn6855 hw2.0",
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@@ -295,6 +299,7 @@ static const struct ath11k_hw_params ath
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.hal_params = &ath11k_hw_hal_params_qca6390,
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.supports_dynamic_smps_6ghz = false,
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.alloc_cacheable_memory = false,
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+ .wakeup_mhi = true,
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},
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};
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--- a/drivers/net/wireless/ath/ath11k/hw.h
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+++ b/drivers/net/wireless/ath/ath11k/hw.h
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@@ -180,6 +180,7 @@ struct ath11k_hw_params {
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const struct ath11k_hw_hal_params *hal_params;
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bool supports_dynamic_smps_6ghz;
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bool alloc_cacheable_memory;
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+ bool wakeup_mhi;
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};
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struct ath11k_hw_ops {
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--- a/drivers/net/wireless/ath/ath11k/pci.c
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+++ b/drivers/net/wireless/ath/ath11k/pci.c
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@@ -182,7 +182,8 @@ void ath11k_pci_write32(struct ath11k_ba
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/* for offset beyond BAR + 4K - 32, may
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* need to wakeup MHI to access.
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*/
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- if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
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+ if (ab->hw_params.wakeup_mhi &&
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+ test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
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offset >= ACCESS_ALWAYS_OFF)
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mhi_device_get_sync(ab_pci->mhi_ctrl->mhi_dev);
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@@ -206,7 +207,8 @@ void ath11k_pci_write32(struct ath11k_ba
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}
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}
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- if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
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+ if (ab->hw_params.wakeup_mhi &&
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+ test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
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offset >= ACCESS_ALWAYS_OFF)
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mhi_device_put(ab_pci->mhi_ctrl->mhi_dev);
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}
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@@ -219,7 +221,8 @@ u32 ath11k_pci_read32(struct ath11k_base
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/* for offset beyond BAR + 4K - 32, may
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* need to wakeup MHI to access.
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*/
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- if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
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+ if (ab->hw_params.wakeup_mhi &&
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+ test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
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offset >= ACCESS_ALWAYS_OFF)
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mhi_device_get_sync(ab_pci->mhi_ctrl->mhi_dev);
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@@ -243,7 +246,8 @@ u32 ath11k_pci_read32(struct ath11k_base
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}
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}
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- if (test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
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+ if (ab->hw_params.wakeup_mhi &&
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+ test_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags) &&
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offset >= ACCESS_ALWAYS_OFF)
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mhi_device_put(ab_pci->mhi_ctrl->mhi_dev);
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