lede/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts
2018-04-11 13:25:53 +08:00

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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019-ap.dk04.1.dtsi"
#include "qcom-ipq4019-bus.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "ASUS RT-ACRH17";
compatible = "asus,rt-acrh17", "qcom,ipq4019";
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
reserved-memory {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
rsvd1@87E00000 {
reg = <0x87e00000 0x200000>;
no-map;
};
};
soc {
spi_0: spi@78b5000 {
status = "disabled";
};
pcie0: qcom,pcie@80000 {
compatible = "qcom,msm_pcie";
cell-index = <0>;
qcom,ctrl-amt = <1>;
reg = <0x80000 0x2000>,
<0x99000 0x800>,
<0x40000000 0xf1d>,
<0x40000f20 0xa8>,
<0x40100000 0x1000>,
<0x40200000 0x100000>,
<0x40300000 0xd00000>;
reg-names = "parf", "phy", "dm_core", "elbi",
"conf", "io", "bars";
#address-cells = <0>;
interrupt-parent = <&pcie0>;
interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 141 0
1 &intc 0 142 0
2 &intc 0 143 0
3 &intc 0 144 0
4 &intc 0 145 0
5 &intc 0 146 0
6 &intc 0 147 0
7 &intc 0 148 0
8 &intc 0 149 0
9 &intc 0 150 0
10 &intc 0 151 0
11 &intc 0 152 0 >;
interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d",
"int_pls_pme", "int_pme_legacy", "int_pls_err",
"int_aer_legacy", "int_pls_link_up",
"int_pls_link_down", "int_bridge_flush_n","int_wake";
qcom,ep-latency = <10>;
clocks = <&gcc GCC_PCIE_AHB_CLK>,
<&gcc GCC_PCIE_AXI_M_CLK>,
<&gcc GCC_PCIE_AXI_S_CLK>;
clock-names = "pcie_0_cfg_ahb_clk",
"pcie_0_mstr_axi_clk",
"pcie_0_slv_axi_clk";
max-clock-frequency-hz = <0>, <0>, <0>;
resets = <&gcc PCIE_AXI_M_ARES>,
<&gcc PCIE_AXI_S_ARES>,
<&gcc PCIE_PIPE_ARES>,
<&gcc PCIE_AXI_M_VMIDMT_ARES>,
<&gcc PCIE_AXI_S_XPU_ARES>,
<&gcc PCIE_PARF_XPU_ARES>,
<&gcc PCIE_PHY_ARES>,
<&gcc PCIE_AXI_M_STICKY_ARES>,
<&gcc PCIE_PIPE_STICKY_ARES>,
<&gcc PCIE_PWR_ARES>,
<&gcc PCIE_AHB_ARES>,
<&gcc PCIE_PHY_AHB_ARES>;
reset-names = "pcie_rst_axi_m_ares",
"pcie_rst_axi_s_ares",
"pcie_rst_pipe_ares",
"pcie_rst_axi_m_vmidmt_ares",
"pcie_rst_axi_s_xpu_ares",
"pcie_rst_parf_xpu_ares",
"pcie_rst_phy_ares",
"pcie_rst_axi_m_sticky_ares",
"pcie_rst_pipe_sticky_ares",
"pcie_rst_pwr_ares",
"pcie_rst_ahb_res",
"pcie_rst_phy_ahb_ares";
status = "ok";
perst-gpio = <&tlmm 38 0>;
wake-gpio = <&tlmm 50 0>;
clkreq-gpio = <&tlmm 39 0>;
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "ok";
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
mdio@90000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
wifi0: wifi@a000000 {
status = "ok";
core-id = <0x0>;
qca,msi_addr = <0x0b006040>;
qca,msi_base = <0x40>;
wifi_led_num = <2>; /* Wifi 2G */
wifi_led_source = <0>; /* source id 0 */
qcom,mtd-name = "0:ART";
qcom,cal-offset = <0x1000>;
qcom,cal-len = <12064>;
};
wifi1: wifi@a800000 {
status = "disabled";
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
gpio-leds {
compatible = "gpio-leds";
power: status {
label = "rt-acrh17:blue:status";
gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "rt-acrh17:blue:lan1";
gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "rt-acrh17:blue:lan2";
gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "rt-acrh17:blue:lan3";
gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "rt-acrh17:blue:lan4";
gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
};
wan_blue {
label = "rt-acrh17:blue:wan";
gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>;
};
wan_red {
label = "rt-acrh17:red:wan";
gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>;
};
wlan2g {
label = "rt-acrh17:blue:wlan2g";
gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
};
wlan5g {
label = "rt-acrh17:blue:wlan5g";
gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
};
};
};
&nand_pins {
pullups {
pins = "gpio53", "gpio58",
"gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio55", "gpio56",
"gpio57", "gpio60",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio69";
function = "qpic";
bias-pull-down;
};
};
&i2c_0_pins {
pinmux {
function = "blsp_i2c0";
pins = "gpio10";
};
pinconf {
pins = "gpio10";
drive-strength = <16>;
bias-disable;
};
};