mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-04-16 04:13:31 +00:00
2b9548669a
* Rockchip:Fix dtsi of doornet2 phy: Modify phy timing;The manufacturer's board requires two timing modes: 125m and 25m ---stmmac_mdio.c stmmac_main.c Among them, stmmac_main.c is added with 1.5 reset, and the compilation of other devices is not affected emmc: In emmc hs400 mode, the performance test effect is the same as hs200, so it is safer to reduce hs200 * Rockchip:Add doornet2 to overclock to 2.2GHz/1.8GHz * Create 105-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch Modify the startup method: SD starts first, which is convenient for saving bricks. If there is no system in SD, it will automatically jump to the next emmc boot * Update with kernel 5.4 * Update 992-rockchip-rk3399-overclock-to-2.2-1.8-GHz-for-NanoPi4.patch
984 lines
20 KiB
Diff
984 lines
20 KiB
Diff
--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -121,6 +121,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \
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rk3368-px5-evb.dtb \
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dtb-$(CONFIG_ROCKCHIP_RK3399) += \
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+ rk3399-doornet2.dtb \
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rk3399-evb.dtb \
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rk3399-ficus.dtb \
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rk3399-firefly.dtb \
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--- /dev/null
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+++ b/arch/arm/dts/rk3399-doornet2-u-boot.dtsi
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@@ -0,0 +1,25 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
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+ */
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+
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+#include "rk3399-u-boot.dtsi"
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+#include "rk3399-sdram-lpddr4-100.dtsi"
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+#include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi"
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+#include "rk3399-sdram-ddr3-1866.dtsi"
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+
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+/{
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+ aliases {
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+ mmc0 = &sdmmc;
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+ mmc1 = &sdhci;
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+ };
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+
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+ chosen {
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+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
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+ };
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+};
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+
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+&sdmmc {
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+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
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+};
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+
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--- /dev/null
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+++ b/arch/arm/dts/rk3399-doornet2.dts
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@@ -0,0 +1,122 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+/dts-v1/;
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+#include "rk3399-doornet2.dtsi"
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+
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+/ {
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+ model = "EmbedFire DoorNet2";
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+ compatible = "embedfire,doornet2", "rockchip,rk3399";
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+
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+ /delete-node/ display-subsystem;
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+
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+ gpio-leds {
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+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
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+
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+ /delete-node/ status;
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+
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+ lan_led: led-lan {
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+ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
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+ label = "green:lan";
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+ };
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+
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+ sys_led: led-sys {
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+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
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+ label = "red:sys";
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+ default-state = "on";
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+ };
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+
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+ wan_led: led-wan {
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+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
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+ label = "green:wan";
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+ };
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+ };
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+
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+ gpio-keys {
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+ pinctrl-0 = <&reset_button_pin>;
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+
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+ /delete-node/ power;
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+
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+ reset {
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+ debounce-interval = <50>;
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+ gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
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+ label = "reset";
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+ linux,code = <KEY_RESTART>;
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+ };
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+ };
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+
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+ vdd_5v: vdd-5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vdd_5v";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+};
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+
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+&emmc_phy {
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+ status = "okay";
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+};
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+
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+&i2c4 {
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+ status = "disabled";
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+};
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+
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+&pcie0 {
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+ max-link-speed = <1>;
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+ num-lanes = <1>;
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+ vpcie3v3-supply = <&vcc3v3_sys>;
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+};
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+
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+&pinctrl {
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+ gpio-leds {
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+ /delete-node/ leds-gpio;
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+
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+ lan_led_pin: lan-led-pin {
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+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ sys_led_pin: sys-led-pin {
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+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ wan_led_pin: wan-led-pin {
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+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ rockchip-key {
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+ /delete-node/ power-key;
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+
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+ reset_button_pin: reset-button-pin {
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+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+};
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+
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+&sdhci {
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+ status = "okay";
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+};
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+
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+&sdio0 {
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+ status = "disabled";
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+};
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+
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+&u2phy0_host {
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+ phy-supply = <&vdd_5v>;
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+};
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+
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+&u2phy1_host {
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+ status = "disabled";
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+};
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+
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+&uart0 {
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+ status = "disabled";
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+};
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+
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+&usbdrd_dwc3_0 {
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+ dr_mode = "host";
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+};
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+
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+&vcc3v3_sys {
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+ vin-supply = <&vcc5v0_sys>;
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+};
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+
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--- /dev/null
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+++ b/arch/arm/dts/rk3399-doornet2.dtsi
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@@ -0,0 +1,750 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+
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+/dts-v1/;
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include "rk3399.dtsi"
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+#include "rk3399-opp.dtsi"
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+
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+/ {
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ clkin_gmac: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "clkin_gmac";
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+ #clock-cells = <0>;
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc3v3_sys";
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-name = "vcc5v0_sys";
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+ vin-supply = <&vdd_5v>;
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+ };
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+
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+ /* switched by pmic_sleep */
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+ vcc1v8_s3: vcc1v8-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-name = "vcc1v8_s3";
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+ vin-supply = <&vcc_1v8>;
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+ };
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+
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+ vcc3v0_sd: vcc3v0-sd {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc0_pwr_h>;
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+ regulator-always-on;
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+ regulator-min-microvolt = <3000000>;
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+ regulator-max-microvolt = <3000000>;
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+ regulator-name = "vcc3v0_sd";
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ /*
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+ * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
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+ * drives the enable pin, but we can't quite model that.
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+ */
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+ vcca0v9_s3: vcca0v9-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+ regulator-name = "vcca0v9_s3";
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+ vin-supply = <&vcc1v8_s3>;
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+ };
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+
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+ /* As above, actually supplied by vcc3v3_sys */
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+ vcca1v8_s3: vcca1v8-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-name = "vcca1v8_s3";
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+ vin-supply = <&vcc1v8_s3>;
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+ };
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+
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+ vbus_typec: vbus-typec {
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+ compatible = "regulator-fixed";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-name = "vbus_typec";
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+ };
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+ autorepeat;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&power_key>;
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+
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+ power {
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+ debounce-interval = <100>;
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+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
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+ label = "GPIO Key Power";
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+ linux,code = <KEY_POWER>;
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+ wakeup-source;
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+ };
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+ };
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+
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+ leds: gpio-leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&leds_gpio>;
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+
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+ status {
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+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
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+ label = "status_led";
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk808 1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_reg_on_h>;
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+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
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+ };
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+};
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+
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+&cpu_b0 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&cpu_b1 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&cpu_l0 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l1 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l2 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l3 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&emmc_phy {
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+ status = "okay";
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+};
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+
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+&gmac {
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+ assigned-clock-parents = <&clkin_gmac>;
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+ assigned-clocks = <&cru SCLK_RMII_SRC>;
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+ clock_in_out = "input";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
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+ phy-handle = <&rtl8211f>;
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+ phy-mode = "rgmii";
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+ phy-supply = <&vcc3v3_s3>;
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+ tx_delay = <0x28>;
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+ rx_delay = <0x11>;
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+ status = "okay";
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+
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+ mdio {
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+ compatible = "snps,dwmac-mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ rtl8211f: ethernet-phy@1 {
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+ compatible = "ethernet-phy-id001c.c916",
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+ "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ interrupt-parent = <&gpio3>;
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+ interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <30000>;
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+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ ddc-i2c-bus = <&i2c7>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hdmi_cec>;
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+ status = "okay";
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+};
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+
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+&hdmi_sound {
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ clock-frequency = <400000>;
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+ i2c-scl-rising-time-ns = <160>;
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+ i2c-scl-falling-time-ns = <30>;
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+ status = "okay";
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+
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+ vdd_cpu_b: regulator@40 {
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+ compatible = "silergy,syr827";
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+ reg = <0x40>;
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+ fcs,suspend-voltage-selector = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&cpu_b_sleep>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1500000>;
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+ regulator-name = "vdd_cpu_b";
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+ regulator-ramp-delay = <1000>;
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+ vin-supply = <&vcc3v3_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_gpu: regulator@41 {
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+ compatible = "silergy,syr828";
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+ reg = <0x41>;
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+ fcs,suspend-voltage-selector = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gpu_sleep>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1500000>;
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+ regulator-name = "vdd_gpu";
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+ regulator-ramp-delay = <1000>;
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+ vin-supply = <&vcc3v3_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ rk808: pmic@1b {
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+ compatible = "rockchip,rk808";
|
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+ reg = <0x1b>;
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+ clock-output-names = "xin32k", "rtc_clko_wifi";
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+ #clock-cells = <1>;
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int_l>;
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vcc3v3_sys>;
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+ vcc2-supply = <&vcc3v3_sys>;
|
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+ vcc3-supply = <&vcc3v3_sys>;
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+ vcc4-supply = <&vcc3v3_sys>;
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+ vcc6-supply = <&vcc3v3_sys>;
|
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+ vcc7-supply = <&vcc3v3_sys>;
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+ vcc8-supply = <&vcc3v3_sys>;
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+ vcc9-supply = <&vcc3v3_sys>;
|
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+ vcc10-supply = <&vcc3v3_sys>;
|
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+ vcc11-supply = <&vcc3v3_sys>;
|
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+ vcc12-supply = <&vcc3v3_sys>;
|
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+ vddio-supply = <&vcc_3v0>;
|
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+
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+ regulators {
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+ vdd_center: DCDC_REG1 {
|
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+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-name = "vdd_center";
|
|
+ regulator-ramp-delay = <6001>;
|
|
+
|
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+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_cpu_l: DCDC_REG2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-name = "vdd_cpu_l";
|
|
+ regulator-ramp-delay = <6001>;
|
|
+
|
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+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_ddr: DCDC_REG3 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-name = "vcc_ddr";
|
|
+
|
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+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8: DCDC_REG4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-name = "vcc_1v8";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc1v8_cam: LDO_REG1 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-name = "vcc1v8_cam";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v0_touch: LDO_REG2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-name = "vcc3v0_touch";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc1v8_pmupll: LDO_REG3 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-name = "vcc1v8_pmupll";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_sdio: LDO_REG4 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-init-microvolt = <3000000>;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-name = "vcc_sdio";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca3v0_codec: LDO_REG5 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-name = "vcca3v0_codec";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v5: LDO_REG6 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1500000>;
|
|
+ regulator-max-microvolt = <1500000>;
|
|
+ regulator-name = "vcc_1v5";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1500000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_codec: LDO_REG7 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-name = "vcca1v8_codec";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v0: LDO_REG8 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-name = "vcc_3v0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_s3: SWITCH_REG1 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-name = "vcc3v3_s3";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_s0: SWITCH_REG2 {
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-name = "vcc3v3_s0";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ clock-frequency = <200000>;
|
|
+ i2c-scl-rising-time-ns = <150>;
|
|
+ i2c-scl-falling-time-ns = <30>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c4 {
|
|
+ clock-frequency = <400000>;
|
|
+ i2c-scl-rising-time-ns = <160>;
|
|
+ i2c-scl-falling-time-ns = <30>;
|
|
+ status = "okay";
|
|
+
|
|
+ fusb0: typec-portc@22 {
|
|
+ compatible = "fcs,fusb302";
|
|
+ reg = <0x22>;
|
|
+ interrupt-parent = <&gpio1>;
|
|
+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&fusb0_int>;
|
|
+ vbus-supply = <&vbus_typec>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c7 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2s2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&io_domains {
|
|
+ bt656-supply = <&vcc_1v8>;
|
|
+ audio-supply = <&vcca1v8_codec>;
|
|
+ sdmmc-supply = <&vcc_sdio>;
|
|
+ gpio1830-supply = <&vcc_3v0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie_phy {
|
|
+ assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
|
|
+ assigned-clock-rates = <100000000>;
|
|
+ assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie0 {
|
|
+ ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
|
|
+ max-link-speed = <2>;
|
|
+ num-lanes = <2>;
|
|
+ vpcie0v9-supply = <&vcca0v9_s3>;
|
|
+ vpcie1v8-supply = <&vcca1v8_s3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ fusb30x {
|
|
+ fusb0_int: fusb0-int {
|
|
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ leds_gpio: leds-gpio {
|
|
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ phy {
|
|
+ phy_intb: phy-intb {
|
|
+ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ phy_rstb: phy-rstb {
|
|
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmic {
|
|
+ cpu_b_sleep: cpu-b-sleep {
|
|
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+
|
|
+ gpu_sleep: gpu-sleep {
|
|
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+
|
|
+ pmic_int_l: pmic-int-l {
|
|
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rockchip-key {
|
|
+ power_key: power-key {
|
|
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdio {
|
|
+ bt_host_wake_l: bt-host-wake-l {
|
|
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ bt_reg_on_h: bt-reg-on-h {
|
|
+ /* external pullup to VCC1V8_PMUPLL */
|
|
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ bt_wake_l: bt-wake-l {
|
|
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ wifi_reg_on_h: wifi-reg_on-h {
|
|
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdmmc {
|
|
+ sdmmc0_det_l: sdmmc0-det-l {
|
|
+ rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ sdmmc0_pwr_h: sdmmc0-pwr-h {
|
|
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pmu_io_domains {
|
|
+ pmu1830-supply = <&vcc_3v0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm2 {
|
|
+ pinctrl-names = "active";
|
|
+ pinctrl-0 = <&pwm2_pin_pull_down>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&saradc {
|
|
+ vref-supply = <&vcca1v8_s3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ bus-width = <8>;
|
|
+ mmc-hs200-1_8v;
|
|
+ non-removable;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdio0 {
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ cap-sdio-irq;
|
|
+ keep-power-in-suspend;
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
|
+ sd-uhs-sdr104;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc {
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ cap-mmc-highspeed;
|
|
+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
|
|
+ disable-wp;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc3v0_sd>;
|
|
+ vqmmc-supply = <&vcc_sdio>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tcphy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tcphy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ /* tshut mode 0:CRU 1:GPIO */
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
+ /* tshut polarity 0:LOW 1:HIGH */
|
|
+ rockchip,hw-tshut-polarity = <1>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy0_host {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy0_otg {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy1_host {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy1_otg {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
|
|
+ status = "okay";
|
|
+
|
|
+ bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ clocks = <&rk808 1>;
|
|
+ clock-names = "lpo";
|
|
+ device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
|
|
+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
|
|
+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
|
|
+ max-speed = <4000000>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
|
|
+ vbat-supply = <&vcc3v3_sys>;
|
|
+ vddio-supply = <&vcc_1v8>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd3_0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd3_1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd_dwc3_0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd_dwc3_1 {
|
|
+ dr_mode = "host";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopb {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopb_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopl {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopl_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
--- /dev/null
|
|
+++ b/configs/doornet2-rk3399_defconfig
|
|
@@ -0,0 +1,64 @@
|
|
+CONFIG_ARM=y
|
|
+CONFIG_ARCH_ROCKCHIP=y
|
|
+CONFIG_SYS_TEXT_BASE=0x00200000
|
|
+CONFIG_NR_DRAM_BANKS=1
|
|
+CONFIG_ENV_OFFSET=0x3F8000
|
|
+CONFIG_ROCKCHIP_RK3399=y
|
|
+CONFIG_TARGET_EVB_RK3399=y
|
|
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
|
|
+CONFIG_DEBUG_UART_CLOCK=24000000
|
|
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-doornet2"
|
|
+CONFIG_DEBUG_UART=y
|
|
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-doornet2.dtb"
|
|
+CONFIG_MISC_INIT_R=y
|
|
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
+CONFIG_SPL_STACK_R=y
|
|
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
|
|
+CONFIG_TPL=y
|
|
+CONFIG_CMD_BOOTZ=y
|
|
+CONFIG_CMD_GPT=y
|
|
+CONFIG_CMD_MMC=y
|
|
+CONFIG_CMD_USB=y
|
|
+# CONFIG_CMD_SETEXPR is not set
|
|
+CONFIG_CMD_TIME=y
|
|
+CONFIG_SPL_OF_CONTROL=y
|
|
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
+CONFIG_ENV_IS_IN_MMC=y
|
|
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
+CONFIG_SYS_MMC_ENV_DEV=1
|
|
+CONFIG_ROCKCHIP_GPIO=y
|
|
+CONFIG_SYS_I2C_ROCKCHIP=y
|
|
+CONFIG_MMC_DW=y
|
|
+CONFIG_MMC_DW_ROCKCHIP=y
|
|
+CONFIG_MMC_SDHCI=y
|
|
+CONFIG_MMC_SDHCI_ROCKCHIP=y
|
|
+CONFIG_DM_ETH=y
|
|
+CONFIG_ETH_DESIGNWARE=y
|
|
+CONFIG_GMAC_ROCKCHIP=y
|
|
+CONFIG_PMIC_RK8XX=y
|
|
+CONFIG_REGULATOR_PWM=y
|
|
+CONFIG_REGULATOR_RK8XX=y
|
|
+CONFIG_PWM_ROCKCHIP=y
|
|
+CONFIG_RAM_RK3399_LPDDR4=y
|
|
+CONFIG_BAUDRATE=1500000
|
|
+CONFIG_DEBUG_UART_SHIFT=2
|
|
+CONFIG_SYSRESET=y
|
|
+CONFIG_USB=y
|
|
+CONFIG_USB_XHCI_HCD=y
|
|
+CONFIG_USB_XHCI_DWC3=y
|
|
+CONFIG_USB_EHCI_HCD=y
|
|
+CONFIG_USB_EHCI_GENERIC=y
|
|
+CONFIG_USB_KEYBOARD=y
|
|
+CONFIG_USB_HOST_ETHER=y
|
|
+CONFIG_USB_ETHER_ASIX=y
|
|
+CONFIG_USB_ETHER_ASIX88179=y
|
|
+CONFIG_USB_ETHER_MCS7830=y
|
|
+CONFIG_USB_ETHER_RTL8152=y
|
|
+CONFIG_USB_ETHER_SMSC95XX=y
|
|
+CONFIG_DM_VIDEO=y
|
|
+CONFIG_DISPLAY=y
|
|
+CONFIG_VIDEO_ROCKCHIP=y
|
|
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
|
|
+CONFIG_SPL_TINY_MEMSET=y
|
|
+CONFIG_ERRNO_STR=y
|
|
+
|