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60 lines
2.2 KiB
Diff
60 lines
2.2 KiB
Diff
From 366d78e84d2a737d75d72b2fb201aacac3a86696 Mon Sep 17 00:00:00 2001
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From: Devi Priya <quic_devipriy@quicinc.com>
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Date: Thu, 15 Jun 2023 14:18:41 +0530
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Subject: [PATCH 28/41] arm64: dts: qcom: ipq9574: Use assigned-clock-rates for
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QUP I2C core clks
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Use assigned-clock-rates property for configuring the QUP I2C core clocks
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to operate at nominal frequency.
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Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
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Link: https://lore.kernel.org/r/20230615084841.12375-1-quic_devipriy@quicinc.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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arch/arm64/boot/dts/qcom/ipq9574.dtsi | 8 ++++++++
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1 file changed, 8 insertions(+)
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diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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index 30430133e39a..ced7779f87ac 100644
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--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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@@ -358,6 +358,8 @@ blsp1_i2c1: i2c@78b6000 {
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clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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clock-names = "core", "iface";
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+ assigned-clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
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+ assigned-clock-rates = <50000000>;
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dmas = <&blsp_dma 14>, <&blsp_dma 15>;
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dma-names = "tx", "rx";
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status = "disabled";
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@@ -386,6 +388,8 @@ blsp1_i2c2: i2c@78b7000 {
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clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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clock-names = "core", "iface";
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+ assigned-clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
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+ assigned-clock-rates = <50000000>;
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dmas = <&blsp_dma 16>, <&blsp_dma 17>;
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dma-names = "tx", "rx";
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status = "disabled";
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@@ -414,6 +418,8 @@ blsp1_i2c3: i2c@78b8000 {
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clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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clock-names = "core", "iface";
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+ assigned-clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
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+ assigned-clock-rates = <50000000>;
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dmas = <&blsp_dma 18>, <&blsp_dma 19>;
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dma-names = "tx", "rx";
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status = "disabled";
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@@ -443,6 +449,8 @@ blsp1_i2c4: i2c@78b9000 {
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clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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clock-names = "core", "iface";
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+ assigned-clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
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+ assigned-clock-rates = <50000000>;
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dmas = <&blsp_dma 20>, <&blsp_dma 21>;
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dma-names = "tx", "rx";
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status = "disabled";
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--
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2.34.1
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