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2b67b80839
Signed-off-by: aakkll <94471752+aakkll@users.noreply.github.com> Signed-off-by: aakkll <94471752+aakkll@users.noreply.github.com>
81 lines
1.9 KiB
Diff
81 lines
1.9 KiB
Diff
From 5b1b78762d3fb4cf20aec4b22fbfab33960a6fdc Mon Sep 17 00:00:00 2001
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From: Peter Geis <pgwipeout@gmail.com>
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Date: Fri, 29 Apr 2022 08:38:31 -0400
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Subject: [PATCH 05/51] arm64: dts: rockchip: Enable PCIe controller on
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quartz64-a
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Add the nodes to enable the PCIe controller on the Quartz64 Model A
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board.
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Signed-off-by: Peter Geis <pgwipeout@gmail.com>
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Link: https://lore.kernel.org/r/20220429123832.2376381-6-pgwipeout@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3566-quartz64-a.dts | 34 +++++++++++++++++++
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1 file changed, 34 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
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@@ -127,6 +127,18 @@
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vin-supply = <&vcc12v_dcin>;
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};
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+ vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_enable_h>;
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+ regulator-name = "vcc3v3_pcie_p";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_3v3>;
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+ };
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+
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vcc5v0_usb: vcc5v0_usb {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb";
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@@ -202,6 +214,10 @@
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status = "okay";
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};
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+&combphy2 {
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+ status = "okay";
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+};
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+
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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@@ -510,6 +526,14 @@
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};
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};
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+&pcie2x1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_reset_h>;
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+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&vcc3v3_pcie_p>;
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+ status = "okay";
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+};
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+
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&pinctrl {
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bt {
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bt_enable_h: bt-enable-h {
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@@ -541,6 +565,16 @@
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};
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};
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+ pcie {
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+ pcie_enable_h: pcie-enable-h {
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+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ pcie_reset_h: pcie-reset-h {
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+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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pmic {
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pmic_int_l: pmic-int-l {
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rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
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