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67 lines
2.0 KiB
Diff
67 lines
2.0 KiB
Diff
From a427dd16e61f3d145bc24f0ed09692fc25931250 Mon Sep 17 00:00:00 2001
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From: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
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Date: Wed, 25 Oct 2023 22:12:12 +0530
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Subject: [PATCH] arm64: dts: qcom: ipq5018: add few more reserved memory
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regions
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Like all other IPQ SoCs, bootloader will collect the system RAM contents
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upon crash for the post morterm analysis. If we don't reserve the memory
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region used by bootloader, obviously linux will consume it and upon next
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boot on crash, bootloader will be loaded in the same region, which will
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lead to loose some of the data, sometimes we may miss out critical
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information. So lets reserve the region used by the bootloader.
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Similarly SBL copies some data into the reserved region and it will be
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used in the crash scenario. So reserve 1MB for SBL as well.
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While at it, enable the SMEM support along with TCSR mutex.
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Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Link: https://lore.kernel.org/r/20231025-ipq5018-misc-v1-1-7d14fde97fe7@quicinc.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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arch/arm64/boot/dts/qcom/ipq5018.dtsi | 24 ++++++++++++++++++++++++
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1 file changed, 24 insertions(+)
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--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
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@@ -106,6 +106,24 @@
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#size-cells = <2>;
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ranges;
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+ bootloader@4a800000 {
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+ reg = <0x0 0x4a800000 0x0 0x200000>;
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+ no-map;
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+ };
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+
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+ sbl@4aa00000 {
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+ reg = <0x0 0x4aa00000 0x0 0x100000>;
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+ no-map;
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+ };
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+
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+ smem@4ab00000 {
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+ compatible = "qcom,smem";
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+ reg = <0x0 0x4ab00000 0x0 0x100000>;
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+ no-map;
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+
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+ hwlocks = <&tcsr_mutex 3>;
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+ };
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+
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tz_region: tz@4ac00000 {
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reg = <0x0 0x4ac00000 0x0 0x200000>;
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no-map;
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@@ -166,6 +184,12 @@
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#power-domain-cells = <1>;
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};
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+ tcsr_mutex: hwlock@1905000 {
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+ compatible = "qcom,tcsr-mutex";
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+ reg = <0x01905000 0x20000>;
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+ #hwlock-cells = <1>;
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+ };
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+
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sdhc_1: mmc@7804000 {
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compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
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reg = <0x7804000 0x1000>;
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