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119 lines
3.6 KiB
Diff
119 lines
3.6 KiB
Diff
From b16dcc5f735739444da66149b473bb88fb44d4d9 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Fri, 3 Jun 2022 16:49:09 +0100
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Subject: [PATCH] drm: vc4: 0 is a valid value for pixel_order_hvs5, so
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fix conditionals
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vc4_plane_mode_set for HVS5 was using pixel_order unless pixel_order_hvs5
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was non-zero, except 0 is a valid value for the pixel_order.
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Specify pixel_order_hvs5 for all formats and remove the conditional.
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Reported-by: vrazzer <teamvraz@pipmail.net>
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_plane.c | 20 ++++++++++++++------
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1 file changed, 14 insertions(+), 6 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -65,11 +65,13 @@ static const struct hvs_format {
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.drm = DRM_FORMAT_RGB565,
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.hvs = HVS_PIXEL_FORMAT_RGB565,
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.pixel_order = HVS_PIXEL_ORDER_XRGB,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XRGB,
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},
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{
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.drm = DRM_FORMAT_BGR565,
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.hvs = HVS_PIXEL_FORMAT_RGB565,
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.pixel_order = HVS_PIXEL_ORDER_XBGR,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XBGR,
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},
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{
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.drm = DRM_FORMAT_ARGB1555,
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@@ -87,56 +89,67 @@ static const struct hvs_format {
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.drm = DRM_FORMAT_RGB888,
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.hvs = HVS_PIXEL_FORMAT_RGB888,
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.pixel_order = HVS_PIXEL_ORDER_XRGB,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XRGB,
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},
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{
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.drm = DRM_FORMAT_BGR888,
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.hvs = HVS_PIXEL_FORMAT_RGB888,
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.pixel_order = HVS_PIXEL_ORDER_XBGR,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XBGR,
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},
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{
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.drm = DRM_FORMAT_YUV422,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
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.pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
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},
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{
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.drm = DRM_FORMAT_YVU422,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
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.pixel_order = HVS_PIXEL_ORDER_XYCRCB,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
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},
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{
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.drm = DRM_FORMAT_YUV420,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
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.pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
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},
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{
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.drm = DRM_FORMAT_YVU420,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
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.pixel_order = HVS_PIXEL_ORDER_XYCRCB,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
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},
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{
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.drm = DRM_FORMAT_NV12,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
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.pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
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},
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{
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.drm = DRM_FORMAT_NV21,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
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.pixel_order = HVS_PIXEL_ORDER_XYCRCB,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
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},
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{
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.drm = DRM_FORMAT_NV16,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
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.pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
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},
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{
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.drm = DRM_FORMAT_NV61,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
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.pixel_order = HVS_PIXEL_ORDER_XYCRCB,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
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},
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{
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.drm = DRM_FORMAT_P030,
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.hvs = HVS_PIXEL_FORMAT_YCBCR_10BIT,
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.pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
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.hvs5_only = true,
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},
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{
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@@ -1087,15 +1100,10 @@ static int vc4_plane_mode_set(struct drm
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vc4_dlist_write(vc4_state, 0xc0c0c0c0);
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} else {
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- u32 hvs_pixel_order = format->pixel_order;
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-
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- if (format->pixel_order_hvs5)
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- hvs_pixel_order = format->pixel_order_hvs5;
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-
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/* Control word */
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vc4_dlist_write(vc4_state,
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SCALER_CTL0_VALID |
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- (hvs_pixel_order << SCALER_CTL0_ORDER_SHIFT) |
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+ (format->pixel_order_hvs5 << SCALER_CTL0_ORDER_SHIFT) |
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(hvs_format << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
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VC4_SET_FIELD(tiling, SCALER_CTL0_TILING) |
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(vc4_state->is_unity ?
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