mirror of
https://github.com/coolsnowwolf/lede.git
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212 lines
4.9 KiB
Diff
212 lines
4.9 KiB
Diff
From 18b08ab3fd6216d62a96cc8033ad5bb915fd5fcf Mon Sep 17 00:00:00 2001
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From: Marty Jones <mj8263788@gmail.com>
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Date: Mon, 11 Jul 2022 08:51:36 -0400
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Subject: [PATCH 51/51] rockchip: add pci3 for rock3 a
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Signed-off-by: Marty Jones <mj8263788@gmail.com>
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---
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.../boot/dts/rockchip/rk3568-rock-3a.dts | 93 ++++++++++++++++---
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1 file changed, 78 insertions(+), 15 deletions(-)
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--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
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@@ -87,7 +87,40 @@
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vin-supply = <&vcc12v_dcin>;
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};
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- vcc5v0_usb: vcc5v0-usb {
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+ pcie30_avdd0v9: pcie30-avdd0v9 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ pcie30_avdd1v8: pcie30-avdd1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ pcie30_3v3: gpio-regulator {
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+ compatible = "regulator-gpio";
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+ regulator-name = "pcie30_3v3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <100000>;
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+ regulator-max-microvolt = <3300000>;
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+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ gpios-states = <0x1>;
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+ states = <100000 0x0
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+ 3300000 0x1>;
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+ };
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+
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+ vcc5v0_usb: vcc5v0_usb {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb";
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regulator-always-on;
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@@ -109,7 +142,7 @@
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vin-supply = <&vcc5v0_usb>;
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};
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- vcc5v0_usb_hub: vcc5v0-usb-hub-regulator {
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+ vcc5v0_usb_hub: vcc5v0-usb-hub {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
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@@ -120,7 +153,7 @@
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vin-supply = <&vcc5v0_usb>;
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};
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- vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
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+ vcc5v0_usb_otg: vcc5v0-usb-otg {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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@@ -141,6 +174,10 @@
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status = "okay";
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};
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+&combphy2 {
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+ status = "okay";
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+};
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+
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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@@ -159,17 +196,25 @@
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&gmac1 {
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
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- assigned-clock-rates = <0>, <125000000>;
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+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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clock_in_out = "output";
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phy-handle = <&rgmii_phy1>;
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- phy-mode = "rgmii-id";
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+ phy-mode = "rgmii";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_tx_bus2
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&gmac1m1_rx_bus2
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&gmac1m1_rgmii_clk
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&gmac1m1_rgmii_bus>;
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+
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+ snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ /* Reset time is 20ms, 100ms for rtl8211f */
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+ snps,reset-delays-us = <0 20000 100000>;
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+
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+ tx_delay = <0x3c>;
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+ rx_delay = <0x2f>;
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+
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status = "okay";
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};
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@@ -317,6 +362,7 @@
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vdda0v9_image: LDO_REG1 {
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regulator-name = "vdda0v9_image";
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+ regulator-always-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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@@ -353,6 +399,7 @@
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vccio_acodec: LDO_REG4 {
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regulator-name = "vccio_acodec";
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regulator-always-on;
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+ regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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@@ -411,6 +458,7 @@
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vcca1v8_image: LDO_REG9 {
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regulator-name = "vcca1v8_image";
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+ regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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@@ -431,6 +479,7 @@
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vcc3v3_sd: SWITCH_REG2 {
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regulator-name = "vcc3v3_sd";
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+ regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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@@ -461,14 +510,30 @@
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rgmii_phy1: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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- pinctrl-names = "default";
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- pinctrl-0 = <ð_phy_rst>;
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- reset-assert-us = <20000>;
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- reset-deassert-us = <100000>;
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- reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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};
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};
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+&pcie30phy {
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+ status = "okay";
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+};
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+
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+&pcie3x2 {
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+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&pcie30_3v3>;
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+ //num-lanes = <2>;
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+ pinctrl-0 = <&pcie30x2m1_pins>;
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+ bus-scan-delay-ms = <1000>;
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+ status = "okay";
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+};
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+
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+&pcie2x1 {
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+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&pcie30_3v3>;
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+ pinctrl-0 = <&pcie20m1_pins>;
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+ bus-scan-delay-ms = <1000>;
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+ status = "okay";
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+};
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+
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&pinctrl {
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ethernet {
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eth_phy_rst: eth_phy_rst {
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@@ -563,7 +628,7 @@
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};
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&usb_host0_xhci {
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- extcon = <&usb2phy0>;
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+ dr_mode = "host";
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status = "okay";
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};
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@@ -589,7 +654,7 @@
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};
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&usb2phy0_otg {
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- vbus-supply = <&vcc5v0_usb_otg>;
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+ phy-supply = <&vcc5v0_usb_otg>;
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status = "okay";
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};
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@@ -598,12 +663,10 @@
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};
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&usb2phy1_host {
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- phy-supply = <&vcc5v0_usb_host>;
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status = "okay";
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};
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&usb2phy1_otg {
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- phy-supply = <&vcc5v0_usb_host>;
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status = "okay";
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};
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