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Import pending patches adding Ethernet support for MT7988 which are already present in pending-5.15 also to pending-6.1. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
198 lines
7.0 KiB
Diff
198 lines
7.0 KiB
Diff
From 45b575fd9e6a455090820248bf1b98b1f2c7b6c8 Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Tue, 7 Mar 2023 15:56:00 +0000
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Subject: [PATCH 5/7] net: ethernet: mtk_eth_soc: convert caps in mtk_soc_data
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struct to u64
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This is a preliminary patch to introduce support for MT7988 SoC.
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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---
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drivers/net/ethernet/mediatek/mtk_eth_path.c | 22 +++----
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drivers/net/ethernet/mediatek/mtk_eth_soc.h | 62 ++++++++++----------
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2 files changed, 42 insertions(+), 42 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_path.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c
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@@ -15,10 +15,10 @@
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struct mtk_eth_muxc {
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const char *name;
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int cap_bit;
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- int (*set_path)(struct mtk_eth *eth, int path);
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+ int (*set_path)(struct mtk_eth *eth, u64 path);
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};
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-static const char *mtk_eth_path_name(int path)
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+static const char *mtk_eth_path_name(u64 path)
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{
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switch (path) {
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case MTK_ETH_PATH_GMAC1_RGMII:
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@@ -40,7 +40,7 @@ static const char *mtk_eth_path_name(int
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}
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}
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-static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, int path)
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+static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, u64 path)
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{
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bool updated = true;
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u32 val, mask, set;
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@@ -71,7 +71,7 @@ static int set_mux_gdm1_to_gmac1_esw(str
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return 0;
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}
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-static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, int path)
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+static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, u64 path)
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{
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unsigned int val = 0;
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bool updated = true;
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@@ -94,7 +94,7 @@ static int set_mux_gmac2_gmac0_to_gephy(
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return 0;
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}
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-static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, int path)
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+static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, u64 path)
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{
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unsigned int val = 0, mask = 0, reg = 0;
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bool updated = true;
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@@ -125,7 +125,7 @@ static int set_mux_u3_gmac2_to_qphy(stru
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return 0;
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}
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-static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, int path)
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+static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path)
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{
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unsigned int val = 0;
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bool updated = true;
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@@ -163,7 +163,7 @@ static int set_mux_gmac1_gmac2_to_sgmii_
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return 0;
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}
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-static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, int path)
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+static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, u64 path)
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{
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unsigned int val = 0;
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bool updated = true;
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@@ -218,7 +218,7 @@ static const struct mtk_eth_muxc mtk_eth
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},
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};
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-static int mtk_eth_mux_setup(struct mtk_eth *eth, int path)
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+static int mtk_eth_mux_setup(struct mtk_eth *eth, u64 path)
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{
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int i, err = 0;
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@@ -249,7 +249,7 @@ out:
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int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id)
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{
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- int path;
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+ u64 path;
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path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_SGMII :
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MTK_ETH_PATH_GMAC2_SGMII;
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@@ -260,7 +260,7 @@ int mtk_gmac_sgmii_path_setup(struct mtk
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int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id)
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{
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- int path = 0;
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+ u64 path = 0;
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if (mac_id == 1)
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path = MTK_ETH_PATH_GMAC2_GEPHY;
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@@ -274,7 +274,7 @@ int mtk_gmac_gephy_path_setup(struct mtk
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int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id)
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{
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- int path;
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+ u64 path;
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path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_RGMII :
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MTK_ETH_PATH_GMAC2_RGMII;
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -881,44 +881,44 @@ enum mkt_eth_capabilities {
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};
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/* Supported hardware group on SoCs */
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-#define MTK_RGMII BIT(MTK_RGMII_BIT)
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-#define MTK_TRGMII BIT(MTK_TRGMII_BIT)
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-#define MTK_SGMII BIT(MTK_SGMII_BIT)
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-#define MTK_ESW BIT(MTK_ESW_BIT)
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-#define MTK_GEPHY BIT(MTK_GEPHY_BIT)
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-#define MTK_MUX BIT(MTK_MUX_BIT)
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-#define MTK_INFRA BIT(MTK_INFRA_BIT)
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-#define MTK_SHARED_SGMII BIT(MTK_SHARED_SGMII_BIT)
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-#define MTK_HWLRO BIT(MTK_HWLRO_BIT)
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-#define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT)
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-#define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT)
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-#define MTK_QDMA BIT(MTK_QDMA_BIT)
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-#define MTK_NETSYS_V1 BIT(MTK_NETSYS_V1_BIT)
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-#define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT)
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-#define MTK_NETSYS_V3 BIT(MTK_NETSYS_V3_BIT)
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-#define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT)
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-#define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT)
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-#define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT)
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+#define MTK_RGMII BIT_ULL(MTK_RGMII_BIT)
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+#define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT)
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+#define MTK_SGMII BIT_ULL(MTK_SGMII_BIT)
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+#define MTK_ESW BIT_ULL(MTK_ESW_BIT)
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+#define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT)
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+#define MTK_MUX BIT_ULL(MTK_MUX_BIT)
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+#define MTK_INFRA BIT_ULL(MTK_INFRA_BIT)
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+#define MTK_SHARED_SGMII BIT_ULL(MTK_SHARED_SGMII_BIT)
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+#define MTK_HWLRO BIT_ULL(MTK_HWLRO_BIT)
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+#define MTK_SHARED_INT BIT_ULL(MTK_SHARED_INT_BIT)
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+#define MTK_TRGMII_MT7621_CLK BIT_ULL(MTK_TRGMII_MT7621_CLK_BIT)
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+#define MTK_QDMA BIT_ULL(MTK_QDMA_BIT)
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+#define MTK_NETSYS_V1 BIT_ULL(MTK_NETSYS_V1_BIT)
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+#define MTK_NETSYS_V2 BIT_ULL(MTK_NETSYS_V2_BIT)
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+#define MTK_NETSYS_V3 BIT_ULL(MTK_NETSYS_V3_BIT)
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+#define MTK_SOC_MT7628 BIT_ULL(MTK_SOC_MT7628_BIT)
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+#define MTK_RSTCTRL_PPE1 BIT_ULL(MTK_RSTCTRL_PPE1_BIT)
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+#define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT)
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#define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \
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- BIT(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT)
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+ BIT_ULL(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT)
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#define MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY \
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- BIT(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)
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+ BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)
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#define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \
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- BIT(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)
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+ BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)
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#define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \
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- BIT(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)
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+ BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)
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#define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \
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- BIT(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT)
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+ BIT_ULL(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT)
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/* Supported path present on SoCs */
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-#define MTK_ETH_PATH_GMAC1_RGMII BIT(MTK_ETH_PATH_GMAC1_RGMII_BIT)
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-#define MTK_ETH_PATH_GMAC1_TRGMII BIT(MTK_ETH_PATH_GMAC1_TRGMII_BIT)
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-#define MTK_ETH_PATH_GMAC1_SGMII BIT(MTK_ETH_PATH_GMAC1_SGMII_BIT)
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-#define MTK_ETH_PATH_GMAC2_RGMII BIT(MTK_ETH_PATH_GMAC2_RGMII_BIT)
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-#define MTK_ETH_PATH_GMAC2_SGMII BIT(MTK_ETH_PATH_GMAC2_SGMII_BIT)
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-#define MTK_ETH_PATH_GMAC2_GEPHY BIT(MTK_ETH_PATH_GMAC2_GEPHY_BIT)
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-#define MTK_ETH_PATH_GDM1_ESW BIT(MTK_ETH_PATH_GDM1_ESW_BIT)
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+#define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT)
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+#define MTK_ETH_PATH_GMAC1_TRGMII BIT_ULL(MTK_ETH_PATH_GMAC1_TRGMII_BIT)
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+#define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT)
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+#define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT)
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+#define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT)
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+#define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT)
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+#define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT)
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#define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII)
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#define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII)
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@@ -1074,7 +1074,7 @@ struct mtk_reg_map {
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struct mtk_soc_data {
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const struct mtk_reg_map *reg_map;
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u32 ana_rgc3;
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- u32 caps;
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+ u64 caps;
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u32 required_clks;
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bool required_pctl;
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u8 offload_version;
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