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https://github.com/coolsnowwolf/lede.git
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86bc29e4a8
[mac80211] ca5ee6e mac80211: Fix potential endless loop 2c14710 mac80211: add more AQL fixes/improvements 91fb3ce mac80211: remove an obsolete patch that is no longer doing anything useful acf1733 mac80211: add preliminary support for enabling 802.11ax in config d717343 mac80211: update encap offload patches to the latest version 673062f mac80211: allow bigger A-MSDU sizes in VHT, even if HT is limited caf7277 mac80211: do not allow bigger VHT MPDUs than the hardware supports cd36c0d mac80211: select the first available channel for 5GHz interfaces 1c6d456 mac80211: fix regression in station connection monitor optimization 4bd7689 mac80211: update sta connection monitor regression fix [target] Sync: at91, ath25, ath79, lantiq, mediatek, mvebu.
94 lines
1.5 KiB
Plaintext
94 lines
1.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/clock/ath79-clk.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpuintc: interrupt-controller {
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compatible = "qca,ar7100-cpu-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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ahb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&cpuintc>;
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apb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&miscintc>;
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miscintc: interrupt-controller@18060010 {
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compatible = "qca,ar7240-misc-intc";
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reg = <0x18060010 0x4>;
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interrupt-parent = <&cpuintc>;
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interrupts = <6>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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eth0: eth@19000000 {
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status = "disabled";
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compatible = "qca,ath79-eth", "syscon";
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reg = <0x19000000 0x200>;
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interrupts = <4>;
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phy-mode = "mii";
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mdio0: mdio {
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status = "disabled";
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compatible = "qca,ath79-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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regmap = <ð0>;
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clocks = <&pll ATH79_CLK_MDIO>;
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clock-names = "ref";
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};
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};
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eth1: eth@1a000000 {
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status = "disabled";
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compatible = "qca,ath79-eth", "syscon";
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reg = <0x1a000000 0x200>;
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interrupts = <5>;
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phy-mode = "mii";
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mdio1: mdio {
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status = "disabled";
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compatible = "qca,ath79-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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regmap = <ð1>;
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clocks = <&pll ATH79_CLK_MDIO>;
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clock-names = "ref";
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};
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};
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};
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};
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