// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;
#include "mt7981b-cmcc-rax3000m.dts"

/ {
	model = "CMCC RAX3000M (NAND version)";
	compatible = "cmcc,rax3000m-nand", "mediatek,mt7981";

	aliases {
		label-mac-device = &gmac1;
	};
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_flash_pins>;
	status = "okay";

	spi_nand: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-nand";
		reg = <0>;

		spi-max-frequency = <52000000>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;
		mediatek,nmbm;
		mediatek,bmt-max-ratio = <1>;
		mediatek,bmt-max-reserved-blocks = <64>;

		partitions {
					compatible = "fixed-partitions";
					#address-cells = <1>;
					#size-cells = <1>;

					partition@0 {
						label = "bl2";
						reg = <0x00000 0x0100000>;
						read-only;
					};

					partition@100000 {
						label = "u-boot-env";
						reg = <0x100000 0x80000>;
					};

					factory: partition@180000 {
						label = "factory";
						reg = <0x180000 0x200000>;
						read-only;
					};

					partition@380000 {
						label = "fip";
						reg = <0x380000 0x200000>;
						read-only;
					};

					partition@580000 {
						label = "ubi";
						reg = <0x580000 0x7200000>;
					};
		};
	};
};

&pio {
	spi0_flash_pins: spi0-pins {
				mux {
					function = "spi";
					groups = "spi0", "spi0_wp_hold";
				};

				conf-pu {
					pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
					drive-strength = <8>;
					mediatek,pull-up-adv = <0>; /* bias-disable */
				};

				conf-pd {
					pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
					drive-strength = <8>;
					mediatek,pull-up-adv = <0>; /* bias-disable */
				};
	};
};

&wifi {
	mediatek,mtd-eeprom = <&factory 0x0>;
};