diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.c b/drivers/net/ethernet/qualcomm/essedma/edma.c
index fc274c8..e9d12a4 100644
--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
@@ -2075,15 +2075,13 @@ int edma_poll(struct napi_struct *napi, int budget)
 	int i, work_done = 0;
 	u16 rx_pending_fill;
 
-	/* Store the Rx/Tx status by ANDing it with
-	 * appropriate CPU RX?TX mask
+	/* Store the Tx status by ANDing it with
+	 * appropriate CPU TX mask
 	 */
-	edma_read_reg(EDMA_REG_RX_ISR, &reg_data);
-	edma_percpu_info->rx_status |= reg_data & edma_percpu_info->rx_mask;
-	shadow_rx_status = edma_percpu_info->rx_status;
 	edma_read_reg(EDMA_REG_TX_ISR, &reg_data);
 	edma_percpu_info->tx_status |= reg_data & edma_percpu_info->tx_mask;
 	shadow_tx_status = edma_percpu_info->tx_status;
+	edma_write_reg(EDMA_REG_TX_ISR, shadow_tx_status);
 
 	/* Every core will have a start, which will be computed
 	 * in probe and stored in edma_percpu_info->tx_start variable.
@@ -2098,6 +2096,14 @@ int edma_poll(struct napi_struct *napi, int budget)
 		edma_percpu_info->tx_status &= ~(1 << queue_id);
 	}
 
+	/* Store the Rx status by ANDing it with
+	 * appropriate CPU RX mask
+	 */
+	edma_read_reg(EDMA_REG_RX_ISR, &reg_data);
+	edma_percpu_info->rx_status |= reg_data & edma_percpu_info->rx_mask;
+	shadow_rx_status = edma_percpu_info->rx_status;
+	edma_write_reg(EDMA_REG_RX_ISR, shadow_rx_status);
+
 	/* Every core will have a start, which will be computed
 	 * in probe and stored in edma_percpu_info->tx_start variable.
 	 * We will shift the status bit by tx_start to obtain
@@ -2122,15 +2128,6 @@ int edma_poll(struct napi_struct *napi, int budget)
 		}
 	}
 
-	/* Clear the status register, to avoid the interrupts to
-	 * reoccur.This clearing of interrupt status register is
-	 * done here as writing to status register only takes place
-	 * once the  producer/consumer index has been updated to
-	 * reflect that the packet transmission/reception went fine.
-	 */
-	edma_write_reg(EDMA_REG_RX_ISR, shadow_rx_status);
-	edma_write_reg(EDMA_REG_TX_ISR, shadow_tx_status);
-
 	/* If budget not fully consumed, exit the polling mode */
 	if (likely(work_done < budget)) {
 		napi_complete(napi);