This adds a small hack similar to the one used for ar8xxx switches to
read a reg:value map for configuring the LED configuration registers.
This allows OpenWrt to write device-specific LED action as well as blink
configurations. It is unlikely to be accepted upstream, as upstream
plans on integrating their own framework for handling these LEDs.
Signed-off-by: David Bauer <mail@david-bauer.net>
The MT753x switches provide a switch-internal MDIO bus for the embedded
PHYs.
Register a OF sub-node on the switch OF-node for this internal MDIO bus.
This allows to configure the embedded PHYs using device-tree.
Signed-off-by: David Bauer <mail@david-bauer.net>
All other patches automatically rebased.
Build system: x86/64
Build-tested: x86/64/AMD Cezanne
Run-tested: x86/64/AMD Cezanne
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: John Audia <therealgraysky@proton.me>
These patches were earlier mislabled as v6.1 and
therefore dropped. They are in fact from v6.2.
Fixes boot failure on ASUS TUF-AX4200
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Disable new ksym globally as OpenWrt does not have any targets that
use A520 cores.
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: John Audia <therealgraysky@proton.me>
RTL8221B PHYs will select the different speeds for 3 LEDs to 10M/100M/1G
respectively by default. Some devices like TP-LINK TL-XDR6088/TL-XDR6086
have only one LED connects to the PHY chip LED0. If we didn't change the
default settings, the LED will only blink at 10M speed.
This patch allows configuring LED link select bitmask from DT. And it
has been tested with TP-Link XDR6088 with different DT configurations.
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Early versions (?) of the RTL8221B PHY cannot be identified in a regular
Clause-45 bus scan as the PHY doesn't report the implemented MMDs
correctly but returns 0 instead.
Implement custom identify function using the PKGID instead of iterating
over the implemented MMDs to work-around this problem.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The previous attempt to replace an open coded paged read in the RealTek
Ethernet PHY driver was too naive and resulted in breaking the r8169
PCIe Ethernet driver which also makes use of the RealTek Ethernet PHY
driver.
Fix this by instead of using the (not yet populated) paged operations
rather use rtl821x_write_page and protect the whole paged read operation
using the MDIO bus mutex.
Fixes: 998b973157 ("kernel: net: phy: realtek: improve RealTek 2.5G PHY driver")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* use interface mode switching only when operating in C45 mode
Linux prevents switching the interface mode when using C22 MDIO,
hence use rate-adapter mode in case the PHY controlled via C22.
* use phy_read_paged where appropriate
* use existing generic inline functions to handle 10GbE advertisements
instead of redundantly defining register macros in realtek.c which
are not actually vendor-specific.
* make sure 10GbE advertisement is valid, preventing false-positive
warning "Downshift occurred from negotiated speed 2.5Gbps to actual
speed 1Gbps, check cabling!" with some link-partners using 1G mode.
* Support Link Down Power Saving Mode (ALDPS)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
MAC drivers don't use SGMII in-band autonegotiation unless told to do so
in device tree using 'managed = "in-band-status"'. When using MDIO to
access a PHY, in-band-status is unneeded as we have link-status via
MDIO. Switch off SGMII in-band autonegotiation using magic values.
Reported-by: Chen Minqiang <ptpt52@gmail.com>
Reported-by: Yevhen Kolomeiko <jarvis2709@gmail.com>
Tested-by: Yevhen Kolomeiko <jarvis2709@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Some vendor bootloaders do weird things with those PHYs which result in
link modes being reported wrongly. Start from a clean sheet by resetting
the PHY.
Reported-by: Yevhen Kolomeiko <jarvis2709@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import patch to prevent crashes in case WO firmware is missing on devices
with only a single frontend (eg. MT7981+MT7976).
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The MT7531 switch IC comes with SerDes ports with PCS identical to
what is also used in MediaTek's SoCs. Make use of the shared driver
to ease maintainance and reduce code duplication.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
