Some vendor bootloaders do weird things with those PHYs which result in
link modes being reported wrongly. Start from a clean sheet by resetting
the PHY.
Reported-by: Yevhen Kolomeiko <jarvis2709@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import patch to prevent crashes in case WO firmware is missing on devices
with only a single frontend (eg. MT7981+MT7976).
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Now that new pinconf features have been backported sync pinctrl-mt7981
and pinctrl-m7986 with bleeding-edge upstream versions.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport new features for MediaTek pinctrl/pinconf drivers from upstream.
This will serve as the base to improve pinconf bias/pull-up/pull-down on
MT7981 and MT7986, and also prepare for upcoming support for MT7988.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The filogic subtarget now also supports MT7981 and will in future
also support MT7988. Reflect that in the target description.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Newer MediaTek's SoCs need SPI calibration routines for SPI to work
reliably. Import patches for that from MediaTek's SDK.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add patch to support PWM on the MT7981 SoC.
This patch will also be submitted to upstream Linux soon.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add patch to support I2C on the MT7981 SoC.
This change will also be submitted to upstream Linux soon.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The mxl-gpy driver apparently was built in the assumption that SGMII
auto-negotiation is always switched on at the MAC. This may be true for
few rather recent drivers (why?), but certainly isn't for most drivers
unless 'managed = "in-band-status"' is set in device tree. Add patch to
the mediatek target which reduces mxl-gpy to behave more like an
ordinary PHY driver using out-of-band status.
This allows to use these PHYs without rate-adaptation which seems to be
at least partially broken/racy in some revisions of the PHY and/or
internal PHY firmware.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The MT7531 switch IC comes with SerDes ports with PCS identical to
what is also used in MediaTek's SoCs. Make use of the shared driver
to ease maintainance and reduce code duplication.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Using 2500Base-T SFP modules e.g. on the BananaPi R3 requires manually
disabling auto-negotiation, e.g. using ethtool. While a proper fix
using SFP quirks is being discussed upstream, bring a work-around to
restore user experience to what it was before the switch to the
dedicated SGMII PCS driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport patch allowing to set the MDIO bus clock frequency.
By default the MDIO bus clock runs on 2.5 MHz, allow increasing it
up to 25 MHz.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
MT7981 and the upcoming MT7988 have built-in Gigabit Ethernet PHYs.
While they share some design properties with the PHYs present in
MT753x, they do need calibration data from the SoC's efuse.
Add driver to support them. Upstreaming it is planned, but there are
still some ongoing discussions with MediaTek.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport the pinctrl driver for the MT7981 SoC. The driver has also
been submitted upstream and is part of Linux 6.3.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport driver for common clocks in MT7981 SoC. The driver has also
been submitted upstream and became part of Linux 6.3.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Replace patches for MediaTek Ethernet driver SGMII/SerDes unit with
their corresponding upstream patches. Not all of the patches in our
tree went upstream as-is, some are slightly different implementations,
and they require the phylink_pcs helpers now made available.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
It isn't feasible to literally backport all upstream phylink_pcs changes
down to Linux 5.15: It's just too many patches, and many downstream
drivers and hacks are likely to break. We are too close to branching off
to risk this, and it's also just too much work.
Instead just add helper functions used by modern PCS drivers while keeping
the original functions instact as well. While this may add a kilobyte or
two of extra kernel size, it has the advantage that we get the best of both
worlds: None of the existing codepaths are touched, but yet we have the
option to backport singular improvements to Ethernet drivers where needed.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
If intel ibt enable. It will cause kernel panic
when load "compat.ko" kernel module(a part of cfg80211)
Signed-off-by: Jax Jiang <jax.jiang.007@gmail.com>
Major changes between OpenSSL 1.1.1t and OpenSSL 1.1.1u [30 May 2023]
o Mitigate for very slow `OBJ_obj2txt()` performance with gigantic
OBJECT IDENTIFIER sub-identities. (CVE-2023-2650)
o Fixed documentation of X509_VERIFY_PARAM_add0_policy() (CVE-2023-0466)
o Fixed handling of invalid certificate policies in leaf certificates
(CVE-2023-0465)
o Limited the number of nodes created in a policy tree ([CVE-2023-0464])
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RISC-V is a new CPU architecture aimed to be fully free and open. This
target will add support for it, based on 5.15.
Supports running on:
- HiFive Unleashed - FU540, first generation
- HiFive Unmatched - FU740, current latest generation, PCIe
SD-card images are generated, where the partitions are required to have
specific type codes. As it is commonplace nowadays, OpenSBI is used as the
first stage, with U-boot following as the proper bootloader.
Specifications:
HiFive Unleashed:
- CPU: SiFive FU540 quad-core RISC-V (U54, RV64IMAFDC or RV64GC)
- Memory: 8Gb
- Ethernet: 1x 10/100/1000
- Console: via microUSB
HiFive Unmatched:
- CPU: SiFive FU740 quad-core RISC-V (U74, RV64IMAFDCB or RV64GCB)
- Memory: 16Gb
- Ethernet: 1x 10/100/1000
- USB: 4x USB 3.2
- PCIe: - 1x PCIe Gen3 x8
- 1x M.2 key M (PCIe x4)
- 1x M.2 Key E (PCIe x1 / USB2.0)
- Console: via microUSB
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Add new package for building bootloader for the SiFive U-series boards. Supported
boards at this stage are the HiFive Unleashed and HiFive Unmatched.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Add patch until it gets accepted in firmware-utils upstream.
The SiFive RISC-V SoCs use two special partition types in the boot process.
As a first step, the ZSBL (zero-stage bootloader) in the CPU looks for a
partition with a GUID of 5B193300-FC78-40CD-8002-E86C45580B47 to load the
first-stage bootloader - which in OpenWrt's case is an SPL image. The FSBL
(SPL) then looks for a partition with a GUID of
2E54B353-1271-4842-806F-E436D6AF6985 to load the SSBL which is usually an
u-boot.
With ptgen already supporting GPT partition creation, add the required GUID
types and name them accordingly to be invoked with the '-T <GPT partition
type>' parameter.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
OpenSBI is a form of a first-stage bootloader, which initializes
certain parts of an SoC and then passes on control to the second
stage bootloader i.e. an u-boot image.
We're introducing the package with release v1.2, which provides
SBI v0.3 and the SBI SRST extensions which helps to gracefully
reboot/shutdown various HiFive-U SoCs.
Tested on SiFive Unleashed and Unmatched boards.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Some U-Boot checks for a specified uImage time and refuses to boot if
mismatched. This patch fixes it by recognizing UIMAGE_TIME parameter.
Signed-off-by: David Yang <mmyangfl@gmail.com>
