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update kernel 4.9 to 4.9.63

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This commit is contained in:
coolsnowwolf 2017-11-26 14:09:36 +08:00
parent e04efc21ac
commit f9c0dcfaad
196 changed files with 18501 additions and 5032 deletions
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4
include/kernel-version.mk
View File

@ -4,11 +4,11 @@ LINUX_RELEASE?=1
LINUX_VERSION-3.18 = .71
LINUX_VERSION-4.4 = .93
LINUX_VERSION-4.9 = .61
LINUX_VERSION-4.9 = .63
LINUX_KERNEL_HASH-3.18.71 = 5abc9778ad44ce02ed6c8ab52ece8a21c6d20d21f6ed8a19287b4a38a50c1240
LINUX_KERNEL_HASH-4.4.93 = ed349314f16e78a6571b5f8884f6452782aef6c26b81bcc7ccdac44ecd917c36
LINUX_KERNEL_HASH-4.9.61 = e0239675728ef0c3697d4b651a1d1a1dd7b2920ed2c5f05a23a23d4aa726d19e
LINUX_KERNEL_HASH-4.9.63 = 21c9386f33fd3453ca67f7478b4c1ba34067645ef6d391871029cbd7f5df2ea3
ifdef KERNEL_PATCHVER
LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))

1
target/linux/ar7/config-3.18
View File

@ -1,6 +1,5 @@
CONFIG_ADM6996_PHY=y
CONFIG_AR7=y
CONFIG_AR7_GPIO=y
CONFIG_AR7_TI=y
# CONFIG_AR7_TYPE_AC49X is not set
CONFIG_AR7_TYPE_TI=y

44
target/linux/ar7/config-4.1 → target/linux/ar7/config-4.9
View File

@ -1,22 +1,21 @@
CONFIG_ADM6996_PHY=y
CONFIG_AR7=y
CONFIG_AR7_GPIO=y
CONFIG_AR7_TI=y
# CONFIG_AR7_TYPE_AC49X is not set
CONFIG_AR7_TYPE_TI=y
CONFIG_AR7_WDT=y
CONFIG_ARCH_BINFMT_ELF_STATE=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
# CONFIG_ARCH_HAS_SG_CHAIN is not set
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_BOOT_ELF32=y
CONFIG_CEVT_R4K=y
@ -37,6 +36,8 @@ CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_R4K_FPU=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
@ -46,12 +47,14 @@ CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
@ -63,7 +66,7 @@ CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_BPF_JIT=y
CONFIG_HAVE_CBPF_JIT=y
CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CONTEXT_TRACKING=y
@ -71,7 +74,6 @@ CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
@ -79,36 +81,36 @@ CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZ4=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HW_RANDOM=y
CONFIG_HZ_PERIODIC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IP17XX_PHY=y
CONFIG_IRQ_CPU=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_KALLSYMS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
# CONFIG_LZ4_COMPRESS is not set
# CONFIG_LZ4_DECOMPRESS is not set
CONFIG_MDIO_BOARDINFO=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
@ -120,18 +122,21 @@ CONFIG_MVSWITCH_PHY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
# CONFIG_NO_IOPORT_MAP is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_OF is not set
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
# CONFIG_RCU_EXPEDITE_BOOT is not set
# CONFIG_RCU_STALL_COMMON is not set
CONFIG_SCHED_HRTICK=y
# CONFIG_SCHED_INFO is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250_FSL is not set
CONFIG_SRCU=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SWCONFIG=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
@ -144,4 +149,3 @@ CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_VLYNQ=y
# CONFIG_VLYNQ_DEBUG is not set
CONFIG_ZONE_DMA_FLAG=0

158
target/linux/ar7/files/drivers/char/ar7_gpio.c
View File

@ -1,158 +0,0 @@
/*
* Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/types.h>
#include <linux/cdev.h>
#include <gpio.h>
#define DRVNAME "ar7_gpio"
#define LONGNAME "TI AR7 GPIOs Driver"
MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
MODULE_DESCRIPTION(LONGNAME);
MODULE_LICENSE("GPL");
static int ar7_gpio_major;
static ssize_t ar7_gpio_write(struct file *file, const char __user *buf,
size_t len, loff_t *ppos)
{
int pin = iminor(file->f_path.dentry->d_inode);
size_t i;
for (i = 0; i < len; ++i) {
char c;
if (get_user(c, buf + i))
return -EFAULT;
switch (c) {
case '0':
gpio_set_value(pin, 0);
break;
case '1':
gpio_set_value(pin, 1);
break;
case 'd':
case 'D':
ar7_gpio_disable(pin);
break;
case 'e':
case 'E':
ar7_gpio_enable(pin);
break;
case 'i':
case 'I':
case '<':
gpio_direction_input(pin);
break;
case 'o':
case 'O':
case '>':
gpio_direction_output(pin, 0);
break;
default:
return -EINVAL;
}
}
return len;
}
static ssize_t ar7_gpio_read(struct file *file, char __user *buf,
size_t len, loff_t *ppos)
{
int pin = iminor(file->f_path.dentry->d_inode);
int value;
value = gpio_get_value(pin);
if (put_user(value ? '1' : '0', buf))
return -EFAULT;
return 1;
}
static int ar7_gpio_open(struct inode *inode, struct file *file)
{
int m = iminor(inode);
if (m >= (ar7_is_titan() ? TITAN_GPIO_MAX : AR7_GPIO_MAX))
return -EINVAL;
return nonseekable_open(inode, file);
}
static int ar7_gpio_release(struct inode *inode, struct file *file)
{
return 0;
}
static const struct file_operations ar7_gpio_fops = {
.owner = THIS_MODULE,
.write = ar7_gpio_write,
.read = ar7_gpio_read,
.open = ar7_gpio_open,
.release = ar7_gpio_release,
.llseek = no_llseek,
};
static struct platform_device *ar7_gpio_device;
static int __init ar7_gpio_char_init(void)
{
int rc;
ar7_gpio_device = platform_device_alloc(DRVNAME, -1);
if (!ar7_gpio_device)
return -ENOMEM;
rc = platform_device_add(ar7_gpio_device);
if (rc < 0)
goto out_put;
rc = register_chrdev(ar7_gpio_major, DRVNAME, &ar7_gpio_fops);
if (rc < 0)
goto out_put;
ar7_gpio_major = rc;
rc = 0;
goto out;
out_put:
platform_device_put(ar7_gpio_device);
out:
return rc;
}
static void __exit ar7_gpio_char_exit(void)
{
unregister_chrdev(ar7_gpio_major, DRVNAME);
platform_device_unregister(ar7_gpio_device);
}
module_init(ar7_gpio_char_init);
module_exit(ar7_gpio_char_exit);

48
target/linux/ar7/patches-3.18/002-MIPS-AR7-ensure-the-port-type-s-FCR-value-is-used.patch Normal file
View File

@ -0,0 +1,48 @@
From ee6c9d41de084b2cefd90e5e0c9f30a35f6d3967 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 29 Oct 2017 15:50:42 +0100
Subject: [PATCH RFC 3/3] MIPS: AR7: ensure the port type's FCR value is used
Since commit aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt
trigger I/F of FIFO buffers"), the port's default FCR value isn't used
in serial8250_do_set_termios anymore, but copied over once in
serial8250_config_port and then modified as needed.
Unfortunately, serial8250_config_port will never be called if the port
is shared between kernel and userspace, and the port's flag doesn't have
UPF_BOOT_AUTOCONF, which would trigger a serial8250_config_port as well.
This causes garbled output from userspace:
[ 5.220000] random: procd urandom read with 49 bits of entropy available
ers
[kee
Fix this by forcing it to be configured on boot, resulting in the
expected output:
[ 5.250000] random: procd urandom read with 50 bits of entropy available
Press the [f] key and hit [enter] to enter failsafe mode
Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
Fixes: aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt trigger I/F of FIFO buffers")
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
I'm not sure if this is just AR7's issue, or if this points to a general
issue for UARTs used as kernel console and login console with the "fixed"
commit.
arch/mips/ar7/platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -581,7 +581,7 @@ static int __init ar7_register_uarts(voi
uart_port.type = PORT_AR7;
uart_port.uartclk = clk_get_rate(bus_clk) / 2;
uart_port.iotype = UPIO_MEM32;
- uart_port.flags = UPF_FIXED_TYPE;
+ uart_port.flags = UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF;
uart_port.regshift = 2;
uart_port.line = 0;

28
target/linux/ar7/patches-3.18/120-gpio_chrdev.patch
View File

@ -1,28 +0,0 @@
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -452,6 +452,15 @@ config MWAVE
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_HW_RANDOM) += hw_random/
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o

28
target/linux/ar7/patches-3.18/500-serial_kludge.patch
View File

@ -1,28 +0,0 @@
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -329,6 +329,13 @@ static const struct serial8250_config ua
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
+ [PORT_AR7] = {
+ .name = "TI-AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
/* Uart divisor latch read */
@@ -3168,7 +3175,11 @@ static void serial8250_console_putchar(s
{
struct uart_8250_port *up = up_to_u8250p(port);
+#ifdef CONFIG_AR7
+ wait_for_xmitr(up, BOTH_EMPTY);
+#else
wait_for_xmitr(up, UART_LSR_THRE);
+#endif
serial_port_out(port, UART_TX, ch);
}

10
target/linux/ar7/patches-3.18/950-cpmac_titan.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/ti/cpmac.c
+++ b/drivers/net/ethernet/ti/cpmac.c
@@ -1146,6 +1146,8 @@ static int cpmac_probe(struct platform_d
@@ -1147,6 +1147,8 @@ static int cpmac_probe(struct platform_d
goto out;
}
@ -9,7 +9,7 @@
dev->irq = platform_get_irq_byname(pdev, "irq");
dev->netdev_ops = &cpmac_netdev_ops;
@@ -1227,7 +1229,7 @@ int cpmac_init(void)
@@ -1228,7 +1230,7 @@ int cpmac_init(void)
cpmac_mii->reset = cpmac_mdio_reset;
cpmac_mii->irq = mii_irqs;
@ -18,8 +18,8 @@
if (!cpmac_mii->priv) {
pr_err("Can't ioremap mdio registers\n");
@@ -1238,10 +1240,16 @@ int cpmac_init(void)
#warning FIXME: unhardcode gpio&reset bits
@@ -1239,10 +1241,16 @@ int cpmac_init(void)
/* FIXME: unhardcode gpio&reset bits */
ar7_gpio_disable(26);
ar7_gpio_disable(27);
- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
@ -37,7 +37,7 @@
cpmac_mii->reset(cpmac_mii);
for (i = 0; i < 300; i++) {
@@ -1258,7 +1266,11 @@ int cpmac_init(void)
@@ -1259,7 +1267,11 @@ int cpmac_init(void)
mask = 0;
}

23
target/linux/ar7/patches-4.1/001-mips-ar7-fix-serial.patch
View File

@ -1,23 +0,0 @@
From 443ab715a40881d6c9ba11b027ba154bac904cb0 Mon Sep 17 00:00:00 2001
From: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
Date: Sat, 10 May 2014 23:19:08 +0200
Subject: [PATCH] MIPS/AR7: ensure that serial ports are properly set up
without UPF_FIXED_TYPE, the data from the PORT_AR7 uart_config entry is
never copied, resulting in a dead port.
Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
---
arch/mips/ar7/platform.c | 1 +
1 file changed, 1 insertion(+)
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -577,6 +577,7 @@ static int __init ar7_register_uarts(voi
uart_port.type = PORT_AR7;
uart_port.uartclk = clk_get_rate(bus_clk) / 2;
uart_port.iotype = UPIO_MEM32;
+ uart_port.flags = UPF_FIXED_TYPE;
uart_port.regshift = 2;
uart_port.line = 0;

28
target/linux/ar7/patches-4.1/120-gpio_chrdev.patch
View File

@ -1,28 +0,0 @@
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -461,6 +461,15 @@ config MWAVE
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_HW_RANDOM) += hw_random/
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o

28
target/linux/ar7/patches-4.1/500-serial_kludge.patch
View File

@ -1,28 +0,0 @@
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -347,6 +347,13 @@ configured less than Maximum supported f
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO,
},
+ [PORT_AR7] = {
+ .name = "TI-AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
/* Uart divisor latch read */
@@ -3342,7 +3349,11 @@ static void serial8250_console_putchar(s
{
struct uart_8250_port *up = up_to_u8250p(port);
+#ifdef CONFIG_AR7
+ wait_for_xmitr(up, BOTH_EMPTY);
+#else
wait_for_xmitr(up, UART_LSR_THRE);
+#endif
serial_port_out(port, UART_TX, ch);
}

48
target/linux/ar7/patches-4.9/002-MIPS-AR7-ensure-the-port-type-s-FCR-value-is-used.patch Normal file
View File

@ -0,0 +1,48 @@
From ee6c9d41de084b2cefd90e5e0c9f30a35f6d3967 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Sun, 29 Oct 2017 15:50:42 +0100
Subject: [PATCH RFC 3/3] MIPS: AR7: ensure the port type's FCR value is used
Since commit aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt
trigger I/F of FIFO buffers"), the port's default FCR value isn't used
in serial8250_do_set_termios anymore, but copied over once in
serial8250_config_port and then modified as needed.
Unfortunately, serial8250_config_port will never be called if the port
is shared between kernel and userspace, and the port's flag doesn't have
UPF_BOOT_AUTOCONF, which would trigger a serial8250_config_port as well.
This causes garbled output from userspace:
[ 5.220000] random: procd urandom read with 49 bits of entropy available
ers
[kee
Fix this by forcing it to be configured on boot, resulting in the
expected output:
[ 5.250000] random: procd urandom read with 50 bits of entropy available
Press the [f] key and hit [enter] to enter failsafe mode
Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
Fixes: aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt trigger I/F of FIFO buffers")
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
I'm not sure if this is just AR7's issue, or if this points to a general
issue for UARTs used as kernel console and login console with the "fixed"
commit.
arch/mips/ar7/platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -576,7 +576,7 @@ static int __init ar7_register_uarts(voi
uart_port.type = PORT_AR7;
uart_port.uartclk = clk_get_rate(bus_clk) / 2;
uart_port.iotype = UPIO_MEM32;
- uart_port.flags = UPF_FIXED_TYPE;
+ uart_port.flags = UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF;
uart_port.regshift = 2;
uart_port.line = 0;

0
target/linux/ar7/patches-4.1/100-fix-highmem-offset.patch → target/linux/ar7/patches-4.9/100-fix-highmem-offset.patch
View File

0
target/linux/ar7/patches-4.1/101-MIPS-AR7-allow-NULL-clock-for-clk_get_rate.patch → target/linux/ar7/patches-4.9/101-MIPS-AR7-allow-NULL-clock-for-clk_get_rate.patch
View File

2
target/linux/ar7/patches-4.1/110-flash.patch → target/linux/ar7/patches-4.9/110-flash.patch
View File

@ -11,7 +11,7 @@
obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -199,7 +199,7 @@ static struct resource physmap_flash_res
@@ -198,7 +198,7 @@ static struct resource physmap_flash_res
.name = "mem",
.flags = IORESOURCE_MEM,
.start = 0x10000000,

0
target/linux/ar7/patches-4.1/160-vlynq_try_remote_first.patch → target/linux/ar7/patches-4.9/160-vlynq_try_remote_first.patch
View File

0
target/linux/ar7/patches-4.1/200-free-mem-below-kernel-offset.patch → target/linux/ar7/patches-4.9/200-free-mem-below-kernel-offset.patch
View File

6
target/linux/ar7/patches-4.1/300-add-ac49x-platform.patch → target/linux/ar7/patches-4.9/300-add-ac49x-platform.patch
View File

@ -13,7 +13,7 @@
+load-$(CONFIG_AR7_AC49X) += 0xffffffff945ca000
--- a/arch/mips/ar7/setup.c
+++ b/arch/mips/ar7/setup.c
@@ -69,6 +69,10 @@ const char *get_system_type(void)
@@ -68,6 +68,10 @@ const char *get_system_type(void)
return "TI AR7 (TNETV1056)";
case TITAN_CHIP_1060:
return "TI AR7 (TNETV1060)";
@ -37,7 +37,7 @@
#define AR7_IRQ_UART0 15
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -99,7 +99,7 @@ config AR7
@@ -160,7 +160,7 @@ config AR7
select HAVE_CLK
help
Support for the Texas Instruments AR7 System-on-a-Chip
@ -46,7 +46,7 @@
config ATH25
bool "Atheros AR231x/AR531x SoC support"
@@ -925,6 +925,7 @@ config MIPS_PARAVIRT
@@ -1002,6 +1002,7 @@ config MIPS_PARAVIRT
endchoice
source "arch/mips/alchemy/Kconfig"

0
target/linux/ar7/patches-4.1/310-ac49x-prom-support.patch → target/linux/ar7/patches-4.9/310-ac49x-prom-support.patch
View File

4
target/linux/ar7/patches-4.1/320-ac49x-mtd-partitions.patch → target/linux/ar7/patches-4.9/320-ac49x-mtd-partitions.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -159,6 +159,11 @@ config MTD_OF_PARTS
@@ -154,6 +154,11 @@ config MTD_OF_PARTS
the partition map from the children of the flash node,
as described in Documentation/devicetree/bindings/mtd/partition.txt.
@ -24,7 +24,7 @@
obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -202,7 +202,7 @@ static struct resource physmap_flash_res
@@ -201,7 +201,7 @@ static struct resource physmap_flash_res
.end = 0x11ffffff,
};

10
target/linux/ar7/patches-4.1/920-ar7part.patch → target/linux/ar7/patches-4.9/920-ar7part.patch
View File

@ -20,11 +20,11 @@
};
+int create_titan_partitions(struct mtd_info *master,
+ struct mtd_partition **pparts,
+ const struct mtd_partition **pparts,
+ struct mtd_part_parser_data *data);
+
static int create_mtd_partitions(struct mtd_info *master,
struct mtd_partition **pparts,
const struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
{
struct ar7_bin_rec header;
@ -107,11 +107,13 @@
root_offset += master->erasesize - 1;
--- a/drivers/mtd/titanpart.c
+++ b/drivers/mtd/titanpart.c
@@ -149,7 +149,7 @@ static void titan_add_partition(char * e
@@ -148,8 +148,8 @@ static void titan_add_partition(char * e
}
int create_titan_partitions(struct mtd_info *master,
struct mtd_partition **pparts,
- struct mtd_partition **pparts,
- unsigned long origin)
+ const struct mtd_partition **pparts,
+ struct mtd_part_parser_data *data)
{
struct nsp_img_hdr_head hdr;

6
target/linux/ar7/patches-4.1/925-actiontec_leds.patch → target/linux/ar7/patches-4.9/925-actiontec_leds.patch
View File

@ -1,6 +1,6 @@
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -461,31 +461,22 @@ static struct gpio_led fb_fon_leds[] = {
@@ -460,31 +460,22 @@ static struct gpio_led fb_fon_leds[] = {
},
};
@ -35,7 +35,7 @@
.default_trigger = "default-on",
},
{
@@ -493,6 +484,44 @@ static struct gpio_led gt701_leds[] = {
@@ -492,6 +483,44 @@ static struct gpio_led gt701_leds[] = {
.gpio = 10,
.active_low = 1,
},
@ -80,7 +80,7 @@
};
static struct gpio_led_platform_data ar7_led_data;
@@ -536,9 +565,9 @@ static void __init detect_leds(void)
@@ -535,9 +564,9 @@ static void __init detect_leds(void)
} else if (strstr(prid, "CYWM") || strstr(prid, "CYWL")) {
ar7_led_data.num_leds = ARRAY_SIZE(titan_leds);
ar7_led_data.leds = titan_leds;

14
target/linux/ar7/patches-4.1/950-cpmac_titan.patch → target/linux/ar7/patches-4.9/950-cpmac_titan.patch
View File

@ -1,7 +1,7 @@
--- a/drivers/net/ethernet/ti/cpmac.c
+++ b/drivers/net/ethernet/ti/cpmac.c
@@ -1146,6 +1146,8 @@ static int cpmac_probe(struct platform_d
goto out;
@@ -1124,6 +1124,8 @@ static int cpmac_probe(struct platform_d
goto fail;
}
+ ar7_device_reset(pdata->reset_bit);
@ -9,17 +9,17 @@
dev->irq = platform_get_irq_byname(pdev, "irq");
dev->netdev_ops = &cpmac_netdev_ops;
@@ -1227,7 +1229,7 @@ int cpmac_init(void)
@@ -1203,7 +1205,7 @@ int cpmac_init(void)
cpmac_mii->write = cpmac_mdio_write;
cpmac_mii->reset = cpmac_mdio_reset;
cpmac_mii->irq = mii_irqs;
- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
+ cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
if (!cpmac_mii->priv) {
pr_err("Can't ioremap mdio registers\n");
@@ -1238,10 +1240,16 @@ int cpmac_init(void)
#warning FIXME: unhardcode gpio&reset bits
@@ -1214,10 +1216,16 @@ int cpmac_init(void)
/* FIXME: unhardcode gpio&reset bits */
ar7_gpio_disable(26);
ar7_gpio_disable(27);
- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
@ -37,7 +37,7 @@
cpmac_mii->reset(cpmac_mii);
for (i = 0; i < 300; i++) {
@@ -1258,7 +1266,11 @@ int cpmac_init(void)
@@ -1234,7 +1242,11 @@ int cpmac_init(void)
mask = 0;
}

2
target/linux/ar71xx/patches-4.9/450-gpio-nxp-74hc153-gpio-chip-driver.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1211,4 +1211,12 @@ config GPIO_VIPERBOARD
@@ -1213,4 +1213,12 @@ config GPIO_VIPERBOARD
endmenu

2
target/linux/ar71xx/patches-4.9/452-gpio-add-gpio-latch-driver.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1218,4 +1218,9 @@ config GPIO_NXP_74HC153
@@ -1220,4 +1220,9 @@ config GPIO_NXP_74HC153
Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This
provides a GPIO interface supporting input mode only.

2
target/linux/brcm2708/patches-4.9/950-0031-Add-dwc_otg-driver.patch
View File

@ -696,7 +696,7 @@ Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
}
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -5042,7 +5042,7 @@ static void port_event(struct usb_hub *h
@@ -5045,7 +5045,7 @@ static void port_event(struct usb_hub *h
if (portchange & USB_PORT_STAT_C_OVERCURRENT) {
u16 status = 0, unused;

2
target/linux/generic/backport-4.9/024-3-tcp-tsq-add-shortcut-in-tcp_tasklet_func.patch
View File

@ -60,7 +60,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
nval = cmpxchg(&tp->tsq_flags, oval, nval);
if (nval != oval)
continue;
@@ -2182,6 +2182,8 @@ static bool tcp_write_xmit(struct sock *
@@ -2183,6 +2183,8 @@ static bool tcp_write_xmit(struct sock *
unlikely(tso_fragment(sk, skb, limit, mss_now, gfp)))
break;

2
target/linux/generic/backport-4.9/024-5-tcp-tsq-add-a-shortcut-in-tcp_small_queue_check.patch
View File

@ -19,7 +19,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -2087,6 +2087,15 @@ static bool tcp_small_queue_check(struct
@@ -2088,6 +2088,15 @@ static bool tcp_small_queue_check(struct
limit <<= factor;
if (atomic_read(&sk->sk_wmem_alloc) > limit) {

6
target/linux/generic/backport-4.9/024-8-tcp-tsq-move-tsq_flags-close-to-sk_wmem_alloc.patch
View File

@ -114,7 +114,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
if (nval != oval)
continue;
@@ -2096,7 +2096,7 @@ static bool tcp_small_queue_check(struct
@@ -2097,7 +2097,7 @@ static bool tcp_small_queue_check(struct
skb->prev == sk->sk_write_queue.next)
return false;
@ -123,7 +123,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
/* It is possible TX completion already happened
* before we set TSQ_THROTTLED, so we must
* test again the condition.
@@ -2194,8 +2194,8 @@ static bool tcp_write_xmit(struct sock *
@@ -2195,8 +2195,8 @@ static bool tcp_write_xmit(struct sock *
unlikely(tso_fragment(sk, skb, limit, mss_now, gfp)))
break;
@ -134,7 +134,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
if (tcp_small_queue_check(sk, skb, 0))
break;
@@ -3508,8 +3508,6 @@ void tcp_send_ack(struct sock *sk)
@@ -3509,8 +3509,6 @@ void tcp_send_ack(struct sock *sk)
/* We do not want pure acks influencing TCP Small Queues or fq/pacing
* too much.
* SKB_TRUESIZE(max(1 .. 66, MAX_TCP_HEADER)) is unfortunately ~784

85
target/linux/generic/backport-4.9/025-tcp-allow-drivers-to-tweak-TSQ-logic.patch Normal file
View File

@ -0,0 +1,85 @@
From: Eric Dumazet <edumazet@google.com>
Date: Sat, 11 Nov 2017 15:54:12 -0800
Subject: [PATCH] tcp: allow drivers to tweak TSQ logic
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
I had many reports that TSQ logic breaks wifi aggregation.
Current logic is to allow up to 1 ms of bytes to be queued into qdisc
and drivers queues.
But Wifi aggregation needs a bigger budget to allow bigger rates to
be discovered by various TCP Congestion Controls algorithms.
This patch adds an extra socket field, allowing wifi drivers to select
another log scale to derive TCP Small Queue credit from current pacing
rate.
Initial value is 10, meaning that this patch does not change current
behavior.
We expect wifi drivers to set this field to smaller values (tests have
been done with values from 6 to 9)
They would have to use following template :
if (skb->sk && skb->sk->sk_pacing_shift != MY_PACING_SHIFT)
skb->sk->sk_pacing_shift = MY_PACING_SHIFT;
Ref: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1670041
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Johannes Berg <johannes.berg@intel.com>
Cc: Toke Høiland-Jørgensen <toke@toke.dk>
Cc: Kir Kolyshkin <kir@openvz.org>
---
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -260,6 +260,7 @@ struct sock_common {
* @sk_gso_type: GSO type (e.g. %SKB_GSO_TCPV4)
* @sk_gso_max_size: Maximum GSO segment size to build
* @sk_gso_max_segs: Maximum number of GSO segments
+ * @sk_pacing_shift: scaling factor for TCP Small Queues
* @sk_lingertime: %SO_LINGER l_linger setting
* @sk_backlog: always used with the per-socket spinlock held
* @sk_callback_lock: used with the callbacks in the end of this struct
@@ -421,6 +422,8 @@ struct sock {
kmemcheck_bitfield_end(flags);
u16 sk_gso_max_segs;
+#define sk_pacing_shift sk_pacing_shift /* for backport checks */
+ u8 sk_pacing_shift;
unsigned long sk_lingertime;
struct proto *sk_prot_creator;
rwlock_t sk_callback_lock;
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -2475,6 +2475,7 @@ void sock_init_data(struct socket *sock,
sk->sk_max_pacing_rate = ~0U;
sk->sk_pacing_rate = ~0U;
+ sk->sk_pacing_shift = 10;
sk->sk_incoming_cpu = -1;
/*
* Before updating sk_refcnt, we must commit prior changes to memory
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -1581,7 +1581,7 @@ u32 tcp_tso_autosize(const struct sock *
{
u32 bytes, segs;
- bytes = min(sk->sk_pacing_rate >> 10,
+ bytes = min(sk->sk_pacing_rate >> sk->sk_pacing_shift,
sk->sk_gso_max_size - 1 - MAX_TCP_HEADER);
/* Goal is to send at least one packet per ms,
@@ -2084,7 +2084,7 @@ static bool tcp_small_queue_check(struct
{
unsigned int limit;
- limit = max(2 * skb->truesize, sk->sk_pacing_rate >> 10);
+ limit = max(2 * skb->truesize, sk->sk_pacing_rate >> sk->sk_pacing_shift);
limit = min_t(u32, limit, sysctl_tcp_limit_output_bytes);
limit <<= factor;

6
target/linux/generic/backport-4.9/090-net-generalize-napi_complete_done.patch
View File

@ -399,7 +399,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
/* bnx2x_has_rx_work() reads the status block,
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
@@ -1768,7 +1768,7 @@ static int bnxt_poll_nitroa0(struct napi
@@ -1774,7 +1774,7 @@ static int bnxt_poll_nitroa0(struct napi
}
if (!bnxt_has_work(bp, cpr) && rx_pkts < budget) {
@ -803,7 +803,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -2696,11 +2696,9 @@ static int mvneta_poll(struct napi_struc
@@ -2697,11 +2697,9 @@ static int mvneta_poll(struct napi_struc
rx_done = mvneta_rx_swbm(pp, budget, &pp->rxqs[rx_queue]);
}
@ -1346,7 +1346,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -2800,7 +2800,7 @@ static int ath10k_pci_napi_poll(struct n
@@ -2804,7 +2804,7 @@ static int ath10k_pci_napi_poll(struct n
done = ath10k_htt_txrx_compl_task(ar, budget);
if (done < budget) {

2
target/linux/generic/hack-4.9/214-spidev_h_portability.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/uapi/linux/spi/spidev.h
+++ b/include/uapi/linux/spi/spidev.h
@@ -111,7 +111,7 @@ struct spi_ioc_transfer {
@@ -112,7 +112,7 @@ struct spi_ioc_transfer {
/* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */
#define SPI_MSGSIZE(N) \

2
target/linux/generic/hack-4.9/661-use_fq_codel_by_default.patch
View File

@ -44,7 +44,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
device, it has to decide which ones to send first, which ones to
--- a/net/sched/sch_api.c
+++ b/net/sched/sch_api.c
@@ -1976,7 +1976,7 @@ static int __init pktsched_init(void)
@@ -1978,7 +1978,7 @@ static int __init pktsched_init(void)
return err;
}

2
target/linux/generic/hack-4.9/702-phy_add_aneg_done_function.patch
View File

@ -1,6 +1,6 @@
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -499,6 +499,12 @@ struct phy_driver {
@@ -495,6 +495,12 @@ struct phy_driver {
/* Determines the negotiated speed and duplex */
int (*read_status)(struct phy_device *phydev);

2
target/linux/generic/hack-4.9/710-phy-add-mdio_register_board_info.patch
View File

@ -50,7 +50,7 @@
phy_device_free(phydev);
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -863,6 +863,23 @@ void mdio_bus_exit(void);
@@ -859,6 +859,23 @@ void mdio_bus_exit(void);
extern struct bus_type mdio_bus_type;

56
target/linux/generic/pending-4.9/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch Normal file
View File

@ -0,0 +1,56 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Sat, 4 Nov 2017 07:40:23 +0100
Subject: [PATCH] mtd: spi-nor: support limiting 4K sectors support based on
flash size
Some devices need 4K sectors to be able to deal with small flash chips.
For instance, w25x05 is 64 KiB in size, and without 4K sectors, the
entire chip is just one erase block.
On bigger flash chip sizes, using 4K sectors can significantly slow down
many operations, including using a writable filesystem. There are several
platforms where it makes sense to use a single kernel on both kinds of
devices.
To support this properly, allow configuring an upper flash chip size
limit for 4K sectors support.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -29,6 +29,17 @@ config MTD_SPI_NOR_USE_4K_SECTORS
Please note that some tools/drivers/filesystems may not work with
4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
+config MTD_SPI_NOR_USE_4K_SECTORS_LIMIT
+ int "Maximum flash chip size to use 4K sectors on (in KiB)"
+ depends on MTD_SPI_NOR_USE_4K_SECTORS
+ default "4096"
+ help
+ There are many flash chips that support 4K sectors, but are so large
+ that using them significantly slows down writing large amounts of
+ data or using a writable filesystem.
+ Any flash chip larger than the size specified in this option will
+ not use 4K sectors.
+
config SPI_ATMEL_QUADSPI
tristate "Atmel Quad SPI Controller"
depends on ARCH_AT91 || (ARM && COMPILE_TEST)
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1640,10 +1640,12 @@ int spi_nor_scan(struct spi_nor *nor, co
#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
/* prefer "small sector" erase if possible */
- if (info->flags & SECT_4K) {
+ if ((info->flags & SECT_4K) && (mtd->size <=
+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
nor->erase_opcode = SPINOR_OP_BE_4K;
mtd->erasesize = 4096;
- } else if (info->flags & SECT_4K_PMC) {
+ } else if ((info->flags & SECT_4K_PMC) && (mtd->size <=
+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
nor->erase_opcode = SPINOR_OP_BE_4K_PMC;
mtd->erasesize = 4096;
} else

2
target/linux/generic/pending-4.9/616-net_optimize_xfrm_calls.patch
View File

@ -8,7 +8,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_nat_core.c
+++ b/net/netfilter/nf_nat_core.c
@@ -95,6 +95,9 @@ int nf_xfrm_me_harder(struct net *net, s
@@ -93,6 +93,9 @@ int nf_xfrm_me_harder(struct net *net, s
struct dst_entry *dst;
int err;

16
target/linux/generic/pending-4.9/630-packet_socket_type.patch
View File

@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#define PACKET_FANOUT_LB 1
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -1778,6 +1778,7 @@ static int packet_rcv_spkt(struct sk_buf
@@ -1780,6 +1780,7 @@ static int packet_rcv_spkt(struct sk_buf
{
struct sock *sk;
struct sockaddr_pkt *spkt;
@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/*
* When we registered the protocol we saved the socket in the data
@@ -1785,6 +1786,7 @@ static int packet_rcv_spkt(struct sk_buf
@@ -1787,6 +1788,7 @@ static int packet_rcv_spkt(struct sk_buf
*/
sk = pt->af_packet_priv;
@ -46,7 +46,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/*
* Yank back the headers [hope the device set this
@@ -1797,7 +1799,7 @@ static int packet_rcv_spkt(struct sk_buf
@@ -1799,7 +1801,7 @@ static int packet_rcv_spkt(struct sk_buf
* so that this procedure is noop.
*/
@ -55,7 +55,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
goto out;
if (!net_eq(dev_net(dev), sock_net(sk)))
@@ -2035,12 +2037,12 @@ static int packet_rcv(struct sk_buff *sk
@@ -2037,12 +2039,12 @@ static int packet_rcv(struct sk_buff *sk
unsigned int snaplen, res;
bool is_drop_n_account = false;
@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!net_eq(dev_net(dev), sock_net(sk)))
goto drop;
@@ -2166,12 +2168,12 @@ static int tpacket_rcv(struct sk_buff *s
@@ -2168,12 +2170,12 @@ static int tpacket_rcv(struct sk_buff *s
BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!net_eq(dev_net(dev), sock_net(sk)))
goto drop;
@@ -3250,6 +3252,7 @@ static int packet_create(struct net *net
@@ -3252,6 +3254,7 @@ static int packet_create(struct net *net
mutex_init(&po->pg_vec_lock);
po->rollover = NULL;
po->prot_hook.func = packet_rcv;
@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (sock->type == SOCK_PACKET)
po->prot_hook.func = packet_rcv_spkt;
@@ -3836,6 +3839,16 @@ packet_setsockopt(struct socket *sock, i
@@ -3838,6 +3841,16 @@ packet_setsockopt(struct socket *sock, i
po->xmit = val ? packet_direct_xmit : dev_queue_xmit;
return 0;
}
@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
default:
return -ENOPROTOOPT;
}
@@ -3888,6 +3901,13 @@ static int packet_getsockopt(struct sock
@@ -3891,6 +3904,13 @@ static int packet_getsockopt(struct sock
case PACKET_VNET_HDR:
val = po->has_vnet_hdr;
break;

2
target/linux/generic/pending-4.9/701-phy_extension.patch
View File

@ -62,7 +62,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
* @phydev: the phy_device struct
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -820,6 +820,7 @@ int phy_ethtool_ksettings_get(struct phy
@@ -816,6 +816,7 @@ int phy_ethtool_ksettings_get(struct phy
struct ethtool_link_ksettings *cmd);
int phy_ethtool_ksettings_set(struct phy_device *phydev,
const struct ethtool_link_ksettings *cmd);

2
target/linux/generic/pending-4.9/703-phy-add-detach-callback-to-struct-phy_driver.patch
View File

@ -23,7 +23,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
phy_suspend(phydev);
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -511,6 +511,12 @@ struct phy_driver {
@@ -507,6 +507,12 @@ struct phy_driver {
*/
int (*did_interrupt)(struct phy_device *phydev);

6
target/linux/ipq806x/patches-4.9/0017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch
View File

@ -45,7 +45,7 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
};
cpu@3 {
@@ -81,6 +76,33 @@
@@ -81,6 +76,29 @@
reg = <0x3>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
@ -71,10 +71,6 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
+ };
+ opp@666000000 {
+ opp-hz = /bits/ 64 <666000000>;
+ clock-latency-ns = <256000>;
+ };
+ opp@717000000 {
+ opp-hz = /bits/ 64 <717000000>;
+ clock-latency-ns = <256000>;
};
};

2
target/linux/ipq806x/patches-4.9/0018-qcom-ipq4019-turn-on-DMA-for-i2c.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -183,6 +183,8 @@
@@ -179,6 +179,8 @@
clock-names = "iface", "core";
#address-cells = <1>;
#size-cells = <0>;

2
target/linux/ipq806x/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch
View File

@ -17,7 +17,7 @@ Signed-off-by: Matthew McClintock <mmcclint@qca.qualcomm.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -179,7 +179,7 @@
@@ -175,7 +175,7 @@
reg = <0x78b7000 0x6000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,

2
target/linux/ipq806x/patches-4.9/0020-qcom-ipq4019-enable-DMA-for-spi.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -171,6 +171,8 @@
@@ -167,6 +167,8 @@
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;

2
target/linux/ipq806x/patches-4.9/0022-dts-ipq4019-support-ARMv7-PMU.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Matthew McClintock <mmcclint@qca.qualcomm.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -112,6 +112,12 @@
@@ -108,6 +108,12 @@
IRQ_TYPE_LEVEL_HIGH)>;
};

2
target/linux/ipq806x/patches-4.9/0065-arm-override-compiler-flags.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
# testing for a specific architecture or later rather impossible.
arch-$(CONFIG_CPU_32v7M) =-D__LINUX_ARM_ARCH__=7 -march=armv7-m -Wa,-march=armv7-m
-arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a)
+arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 -mcpu=cortex-a15 -mtune=cortex-a15
+arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 -mcpu=cortex-a15
arch-$(CONFIG_CPU_32v6) =-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6)
# Only override the compiler option if ARMv6. The ARMv6K extensions are
# always available in ARMv7

7
target/linux/ipq806x/patches-4.9/0069-arm-boot-add-dts-files.patch
View File

@ -5,19 +5,18 @@ Subject: [PATCH 69/69] arm: boot: add dts files
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/arm/boot/dts/Makefile | 9 ++++++++
1 file changed, 9 insertions(+)
arch/arm/boot/dts/Makefile | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -618,7 +618,19 @@ dtb-$(CONFIG_ARCH_QCOM) += \
@@ -618,7 +618,18 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8084-mtp.dtb \
qcom-ipq4019-ap.dk01.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c1.dtb \
+ qcom-ipq4019-fritz4040.dtb \
+ qcom-ipq4019-nbg6617.dtb \
+ qcom-ipq4019-rt-ac58u.dtb \
+ qcom-ipq4019-rt-acrh17.dtb \
qcom-ipq8064-ap148.dtb \
+ qcom-ipq8064-c2600.dtb \
+ qcom-ipq8064-d7800.dtb \

516
target/linux/ipq806x/patches-4.9/131-pinctrl-qcom-ipq4019-add-remaining-pin-definitions.patch
View File

@ -1,516 +0,0 @@
From 941e3869bdeddb2bebcc52ebfd57efe014887bc6 Mon Sep 17 00:00:00 2001
Message-Id: <941e3869bdeddb2bebcc52ebfd57efe014887bc6.1500038134.git.chunkeey@googlemail.com>
In-Reply-To: <d45ae31e888ad858d9f4396cabb4dc32a3f0365e.1500038134.git.chunkeey@googlemail.com>
References: <d45ae31e888ad858d9f4396cabb4dc32a3f0365e.1500038134.git.chunkeey@googlemail.com>
From: Ram Chandra Jangir <rjangir@codeaurora.org>
Date: Wed, 10 May 2017 12:51:51 +0200
Subject: [PATCH v3 2/3] pinctrl: qcom: ipq4019: add most remaining pin
definitions
To: linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org
Cc: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
This patch adds multiple pinctrl functions and mappings
for SDIO, NAND, I2S, WIFI, PCIE, LEDs, etc... that have
been missing from the current minimal version.
This patch has been updated from the original version
that was posted by Ram Chandra Jangir on the LEDE-DEV ML:
<https://patchwork.ozlabs.org/patch/752962/>. A short
summary of the changes are documented in the device-tree
patch of this series:
"dt-bindings: pinctrl: add most other IPQ4019 pin functions and groups"
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
drivers/pinctrl/qcom/pinctrl-ipq4019.c | 431 ++++++++++++++++++++++++++-------
1 file changed, 346 insertions(+), 85 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 743d1f458205..9e7f23d29cda 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -277,12 +277,49 @@ DECLARE_QCA_GPIO_PINS(99);
enum ipq4019_functions {
qca_mux_gpio,
- qca_mux_blsp_uart1,
+ qca_mux_aud_pin,
+ qca_mux_audio_pwm,
qca_mux_blsp_i2c0,
qca_mux_blsp_i2c1,
- qca_mux_blsp_uart0,
- qca_mux_blsp_spi1,
qca_mux_blsp_spi0,
+ qca_mux_blsp_spi1,
+ qca_mux_blsp_uart0,
+ qca_mux_blsp_uart1,
+ qca_mux_chip_rst,
+ qca_mux_i2s_rx,
+ qca_mux_i2s_spdif_in,
+ qca_mux_i2s_spdif_out,
+ qca_mux_i2s_td,
+ qca_mux_i2s_tx,
+ qca_mux_jtag,
+ qca_mux_led0,
+ qca_mux_led1,
+ qca_mux_led2,
+ qca_mux_led3,
+ qca_mux_led4,
+ qca_mux_led5,
+ qca_mux_led6,
+ qca_mux_led7,
+ qca_mux_led8,
+ qca_mux_led9,
+ qca_mux_led10,
+ qca_mux_led11,
+ qca_mux_mdc,
+ qca_mux_mdio,
+ qca_mux_pcie,
+ qca_mux_pmu,
+ qca_mux_prng_rosc,
+ qca_mux_qpic,
+ qca_mux_rgmii,
+ qca_mux_rmii,
+ qca_mux_sdio,
+ qca_mux_smart0,
+ qca_mux_smart1,
+ qca_mux_smart2,
+ qca_mux_smart3,
+ qca_mux_tm,
+ qca_mux_wifi0,
+ qca_mux_wifi1,
qca_mux_NA,
};
@@ -303,108 +340,331 @@ static const char * const gpio_groups[] = {
"gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
"gpio99",
};
-
-static const char * const blsp_uart1_groups[] = {
- "gpio8", "gpio9", "gpio10", "gpio11",
+static const char * const aud_pin_groups[] = {
+ "gpio48", "gpio49", "gpio50", "gpio51",
+};
+static const char * const audio_pwm_groups[] = {
+ "gpio30", "gpio31", "gpio32", "gpio33", "gpio64", "gpio65", "gpio66",
+ "gpio67",
};
static const char * const blsp_i2c0_groups[] = {
"gpio10", "gpio11", "gpio20", "gpio21", "gpio58", "gpio59",
};
-static const char * const blsp_spi0_groups[] = {
- "gpio12", "gpio13", "gpio14", "gpio15", "gpio45",
- "gpio54", "gpio55", "gpio56", "gpio57",
-};
static const char * const blsp_i2c1_groups[] = {
"gpio12", "gpio13", "gpio34", "gpio35",
};
-static const char * const blsp_uart0_groups[] = {
- "gpio16", "gpio17", "gpio60", "gpio61",
+static const char * const blsp_spi0_groups[] = {
+ "gpio12", "gpio13", "gpio14", "gpio15", "gpio45", "gpio54", "gpio55",
+ "gpio56", "gpio57",
};
static const char * const blsp_spi1_groups[] = {
"gpio44", "gpio45", "gpio46", "gpio47",
};
+static const char * const blsp_uart0_groups[] = {
+ "gpio16", "gpio17", "gpio60", "gpio61",
+};
+static const char * const blsp_uart1_groups[] = {
+ "gpio8", "gpio9", "gpio10", "gpio11",
+};
+static const char * const chip_rst_groups[] = {
+ "gpio62",
+};
+static const char * const i2s_rx_groups[] = {
+ "gpio0", "gpio1", "gpio2", "gpio20", "gpio21", "gpio22", "gpio23",
+ "gpio58", "gpio60", "gpio61", "gpio63",
+};
+static const char * const i2s_spdif_in_groups[] = {
+ "gpio34", "gpio59", "gpio63",
+};
+static const char * const i2s_spdif_out_groups[] = {
+ "gpio35", "gpio62", "gpio63",
+};
+static const char * const i2s_td_groups[] = {
+ "gpio27", "gpio28", "gpio29", "gpio54", "gpio55", "gpio56", "gpio63",
+};
+static const char * const i2s_tx_groups[] = {
+ "gpio24", "gpio25", "gpio26", "gpio52", "gpio53", "gpio57", "gpio60",
+ "gpio61",
+};
+static const char * const jtag_groups[] = {
+ "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5",
+};
+static const char * const led0_groups[] = {
+ "gpio16", "gpio36", "gpio60",
+};
+static const char * const led1_groups[] = {
+ "gpio17", "gpio37", "gpio61",
+};
+static const char * const led2_groups[] = {
+ "gpio36", "gpio38", "gpio58",
+};
+static const char * const led3_groups[] = {
+ "gpio39",
+};
+static const char * const led4_groups[] = {
+ "gpio40",
+};
+static const char * const led5_groups[] = {
+ "gpio44",
+};
+static const char * const led6_groups[] = {
+ "gpio45",
+};
+static const char * const led7_groups[] = {
+ "gpio46",
+};
+static const char * const led8_groups[] = {
+ "gpio47",
+};
+static const char * const led9_groups[] = {
+ "gpio48",
+};
+static const char * const led10_groups[] = {
+ "gpio49",
+};
+static const char * const led11_groups[] = {
+ "gpio50",
+};
+static const char * const mdc_groups[] = {
+ "gpio7", "gpio52",
+};
+static const char * const mdio_groups[] = {
+ "gpio6", "gpio53",
+};
+static const char * const pcie_groups[] = {
+ "gpio39", "gpio52",
+};
+static const char * const pmu_groups[] = {
+ "gpio54", "gpio55",
+};
+static const char * const prng_rosc_groups[] = {
+ "gpio53",
+};
+static const char * const qpic_groups[] = {
+ "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58",
+ "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65",
+ "gpio66", "gpio67", "gpio68", "gpio69",
+};
+static const char * const rgmii_groups[] = {
+ "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
+ "gpio29", "gpio30", "gpio31", "gpio32", "gpio33",
+};
+static const char * const rmii_groups[] = {
+ "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
+ "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
+ "gpio50", "gpio51",
+};
+static const char * const sdio_groups[] = {
+ "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
+ "gpio30", "gpio31", "gpio32",
+};
+static const char * const smart0_groups[] = {
+ "gpio0", "gpio1", "gpio2", "gpio5", "gpio44", "gpio45", "gpio46",
+ "gpio47",
+};
+static const char * const smart1_groups[] = {
+ "gpio8", "gpio9", "gpio16", "gpio17", "gpio58", "gpio59", "gpio60",
+ "gpio61",
+};
+static const char * const smart2_groups[] = {
+ "gpio40", "gpio41", "gpio48", "gpio49",
+};
+static const char * const smart3_groups[] = {
+ "gpio58", "gpio59", "gpio60", "gpio61",
+};
+static const char * const tm_groups[] = {
+ "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58",
+ "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
+};
+static const char * const wifi0_groups[] = {
+ "gpio37", "gpio40", "gpio41", "gpio42", "gpio50", "gpio51", "gpio52",
+ "gpio53", "gpio56", "gpio57", "gpio58", "gpio98",
+};
+static const char * const wifi1_groups[] = {
+ "gpio37", "gpio40", "gpio41", "gpio43", "gpio50", "gpio51", "gpio52",
+ "gpio53", "gpio56", "gpio57", "gpio58", "gpio98",
+};
static const struct msm_function ipq4019_functions[] = {
- FUNCTION(gpio),
- FUNCTION(blsp_uart1),
+ FUNCTION(aud_pin),
+ FUNCTION(audio_pwm),
FUNCTION(blsp_i2c0),
FUNCTION(blsp_i2c1),
- FUNCTION(blsp_uart0),
- FUNCTION(blsp_spi1),
FUNCTION(blsp_spi0),
+ FUNCTION(blsp_spi1),
+ FUNCTION(blsp_uart0),
+ FUNCTION(blsp_uart1),
+ FUNCTION(chip_rst),
+ FUNCTION(gpio),
+ FUNCTION(i2s_rx),
+ FUNCTION(i2s_spdif_in),
+ FUNCTION(i2s_spdif_out),
+ FUNCTION(i2s_td),
+ FUNCTION(i2s_tx),
+ FUNCTION(jtag),
+ FUNCTION(led0),
+ FUNCTION(led1),
+ FUNCTION(led2),
+ FUNCTION(led3),
+ FUNCTION(led4),
+ FUNCTION(led5),
+ FUNCTION(led6),
+ FUNCTION(led7),
+ FUNCTION(led8),
+ FUNCTION(led9),
+ FUNCTION(led10),
+ FUNCTION(led11),
+ FUNCTION(mdc),
+ FUNCTION(mdio),
+ FUNCTION(pcie),
+ FUNCTION(pmu),
+ FUNCTION(prng_rosc),
+ FUNCTION(qpic),
+ FUNCTION(rgmii),
+ FUNCTION(rmii),
+ FUNCTION(sdio),
+ FUNCTION(smart0),
+ FUNCTION(smart1),
+ FUNCTION(smart2),
+ FUNCTION(smart3),
+ FUNCTION(tm),
+ FUNCTION(wifi0),
+ FUNCTION(wifi1),
};
static const struct msm_pingroup ipq4019_groups[] = {
- PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(5, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(6, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(7, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(8, blsp_uart1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(9, blsp_uart1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(16, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(17, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(1, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(2, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(3, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(4, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(5, jtag, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(7, mdc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(8, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(9, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(16, blsp_uart0, led0, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(17, blsp_uart0, led1, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(20, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(21, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(22, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(23, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(24, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(25, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(27, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(28, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(29, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(30, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(31, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(32, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(33, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(34, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(35, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(37, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(38, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(41, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(42, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(44, NA, blsp_spi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(45, NA, blsp_spi1, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(46, NA, blsp_spi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(47, NA, blsp_spi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(48, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(49, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(50, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(51, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(52, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(53, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(54, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(55, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(56, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(57, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(58, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(59, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(60, NA, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(61, NA, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(62, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(63, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(65, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(67, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(68, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(69, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(20, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(21, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(22, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(23, sdio, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(24, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(25, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(26, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(27, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(28, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(29, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(30, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(31, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(32, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(33, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(45, rmii, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, NA, NA,
+ NA, NA, NA, NA, NA),
+ PINGROUP(46, rmii, blsp_spi1, smart0, led7, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(47, rmii, blsp_spi1, smart0, led8, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(48, rmii, aud_pin, smart2, led9, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(49, rmii, aud_pin, smart2, led10, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(50, rmii, aud_pin, wifi0, wifi1, led11, NA, NA, NA, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(51, rmii, aud_pin, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA,
+ NA, NA, NA),
+ PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA,
+ NA, NA, NA, NA, NA),
+ PINGROUP(54, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
+ NA, NA, NA),
+ PINGROUP(55, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
+ NA, NA, NA),
+ PINGROUP(56, qpic, blsp_spi0, i2s_td, NA, NA, tm, wifi0, wifi1, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(57, qpic, blsp_spi0, i2s_tx, NA, NA, tm, wifi0, wifi1, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(58, qpic, led2, blsp_i2c0, smart3, smart1, i2s_rx, NA, NA, tm,
+ wifi0, wifi1, NA, NA, NA),
+ PINGROUP(59, qpic, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, NA, NA,
+ NA, NA, tm, NA, NA, NA),
+ PINGROUP(60, qpic, blsp_uart0, smart1, smart3, led0, i2s_tx, i2s_rx,
+ NA, NA, NA, NA, NA, tm, NA),
+ PINGROUP(61, qpic, blsp_uart0, smart1, smart3, led1, i2s_tx, i2s_rx,
+ NA, NA, NA, NA, NA, tm, NA),
+ PINGROUP(62, qpic, chip_rst, NA, NA, i2s_spdif_out, NA, NA, NA, NA, NA,
+ tm, NA, NA, NA),
+ PINGROUP(63, qpic, NA, NA, NA, i2s_td, i2s_rx, i2s_spdif_out,
+ i2s_spdif_in, NA, NA, NA, NA, tm, NA),
+ PINGROUP(64, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(65, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(66, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(67, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(68, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(69, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
@@ -433,7 +693,8 @@ static const struct msm_pingroup ipq4019_groups[] = {
PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(98, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(98, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
};
--
2.13.2

149
target/linux/ipq806x/patches-4.9/132-pinctrl-qcom-add-support-to-configure-ipq40xx-GPIO_P.patch
View File

@ -1,149 +0,0 @@
From 895bbe5061fe2a6825503f57263a4eff9bb78a3c Mon Sep 17 00:00:00 2001
Message-Id: <895bbe5061fe2a6825503f57263a4eff9bb78a3c.1500038134.git.chunkeey@googlemail.com>
In-Reply-To: <941e3869bdeddb2bebcc52ebfd57efe014887bc6.1500038134.git.chunkeey@googlemail.com>
References: <d45ae31e888ad858d9f4396cabb4dc32a3f0365e.1500038134.git.chunkeey@googlemail.com>
<941e3869bdeddb2bebcc52ebfd57efe014887bc6.1500038134.git.chunkeey@googlemail.com>
From: Ram Chandra Jangir <rjangir@codeaurora.org>
Date: Sun, 4 Jun 2017 21:38:21 +0200
Subject: [PATCH v3 3/3] pinctrl: msm: add support to configure ipq40xx
GPIO_PULL bits
To: linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org
Cc: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
GPIO_PULL bits configurations in TLMM_GPIO_CFG register
differs for IPQ40xx from rest of the other qcom SoCs.
As it does not support the keeper state and therefore can't
support bias-bus-hold property.
This patch adds a pull_no_keeper setting which configures the
msm_gpio_pull bits for ipq40xx. This is required to fix the
proper configurations of gpio-pull bits for nand pins mux.
IPQ40xx SoC:
2'b10: Internal pull up enable.
2'b11: Unsupport
For other SoC's:
2'b10: Keeper
2'b11: Pull-Up
Note: Due to pull_no_keeper length, all kerneldoc entries
in the msm_pinctrl_soc_data struct had to be realigned.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
drivers/pinctrl/qcom/pinctrl-ipq4019.c | 1 +
drivers/pinctrl/qcom/pinctrl-msm.c | 25 +++++++++++++++++++------
drivers/pinctrl/qcom/pinctrl-msm.h | 16 +++++++++-------
3 files changed, 29 insertions(+), 13 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 9e7f23d29cda..1979b14b6fc3 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -706,6 +706,7 @@ static const struct msm_pinctrl_soc_data ipq4019_pinctrl = {
.groups = ipq4019_groups,
.ngroups = ARRAY_SIZE(ipq4019_groups),
.ngpios = 100,
+ .pull_no_keeper = true,
};
static int ipq4019_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 273badd92561..e5e27d79f5ef 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -202,10 +202,11 @@ static int msm_config_reg(struct msm_pinctrl *pctrl,
return 0;
}
-#define MSM_NO_PULL 0
-#define MSM_PULL_DOWN 1
-#define MSM_KEEPER 2
-#define MSM_PULL_UP 3
+#define MSM_NO_PULL 0
+#define MSM_PULL_DOWN 1
+#define MSM_KEEPER 2
+#define MSM_PULL_UP_NO_KEEPER 2
+#define MSM_PULL_UP 3
static unsigned msm_regval_to_drive(u32 val)
{
@@ -243,10 +244,16 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev,
arg = arg == MSM_PULL_DOWN;
break;
case PIN_CONFIG_BIAS_BUS_HOLD:
+ if (pctrl->soc->pull_no_keeper)
+ return -ENOTSUPP;
+
arg = arg == MSM_KEEPER;
break;
case PIN_CONFIG_BIAS_PULL_UP:
- arg = arg == MSM_PULL_UP;
+ if (pctrl->soc->pull_no_keeper)
+ arg = arg == MSM_PULL_UP_NO_KEEPER;
+ else
+ arg = arg == MSM_PULL_UP;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
arg = msm_regval_to_drive(arg);
@@ -309,10 +316,16 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
arg = MSM_PULL_DOWN;
break;
case PIN_CONFIG_BIAS_BUS_HOLD:
+ if (pctrl->soc->pull_no_keeper)
+ return -ENOTSUPP;
+
arg = MSM_KEEPER;
break;
case PIN_CONFIG_BIAS_PULL_UP:
- arg = MSM_PULL_UP;
+ if (pctrl->soc->pull_no_keeper)
+ arg = MSM_PULL_UP_NO_KEEPER;
+ else
+ arg = MSM_PULL_UP;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
/* Check for invalid values */
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h
index 54fdd04ce9d5..9b9feea540ff 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.h
+++ b/drivers/pinctrl/qcom/pinctrl-msm.h
@@ -99,13 +99,14 @@ struct msm_pingroup {
/**
* struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration
- * @pins: An array describing all pins the pin controller affects.
- * @npins: The number of entries in @pins.
- * @functions: An array describing all mux functions the SoC supports.
- * @nfunctions: The number of entries in @functions.
- * @groups: An array describing all pin groups the pin SoC supports.
- * @ngroups: The numbmer of entries in @groups.
- * @ngpio: The number of pingroups the driver should expose as GPIOs.
+ * @pins: An array describing all pins the pin controller affects.
+ * @npins: The number of entries in @pins.
+ * @functions: An array describing all mux functions the SoC supports.
+ * @nfunctions: The number of entries in @functions.
+ * @groups: An array describing all pin groups the pin SoC supports.
+ * @ngroups: The numbmer of entries in @groups.
+ * @ngpio: The number of pingroups the driver should expose as GPIOs.
+ * @pull_no_keeper: The SoC does not support keeper bias.
*/
struct msm_pinctrl_soc_data {
const struct pinctrl_pin_desc *pins;
@@ -115,6 +116,7 @@ struct msm_pinctrl_soc_data {
const struct msm_pingroup *groups;
unsigned ngroups;
unsigned ngpios;
+ bool pull_no_keeper;
};
int msm_pinctrl_probe(struct platform_device *pdev,
--
2.13.2

28
target/linux/ipq806x/patches-4.9/140-qcom-ipq4019-fix-i2c_0-node.patch
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@ -1,28 +0,0 @@
From 830a63791185f4daaecb8d1102c4ee3c9210c03c Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@googlemail.com>
Date: Mon, 1 May 2017 13:42:41 +0200
Subject: [PATCH 1/2] qcom: ipq4019: fix i2c_0 node
This patch fixes two typos in the i2c_0 node for the ipq4019.
The register size is just 0x600. The core clock is
GCC_BLSP1_QUP1_I2C_APPS_CLK. GCC_BLSP1_QUP2_I2C_APPS_CLK is
used by the second i2c.
Fixes: e76b4284b520ba3 ("qcom: ipq4019: add i2c node to ipq4019 SoC and DK01 device tree")
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -184,7 +184,7 @@
i2c_0: i2c@78b7000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78b7000 0x6000>;
+ reg = <0x78b7000 0x600>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;

46
target/linux/ipq806x/patches-4.9/141-qcom-ipq4019-add-second-i2c.patch
View File

@ -1,46 +0,0 @@
From 5110346bcc17b037edd5b0193f31ad046e6242db Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@googlemail.com>
Date: Mon, 1 May 2017 13:53:07 +0200
Subject: [PATCH 2/2] qcom: ipq4019: add second i2c
This patch adds the second i2c block to the IPQ4019 platform.
The second i2c has been successfully tested on the
Cisco Meraki MR33.
Cc: Chris Blake <chrisrblake93@gmail.com>
Cc: Matthew McClintock <msm-oss@mcclintock.net>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -26,6 +26,7 @@
aliases {
spi0 = &spi_0;
i2c0 = &i2c_0;
+ i2c1 = &i2c_1;
};
cpus {
@@ -196,6 +197,19 @@
status = "disabled";
};
+ i2c_1: i2c@78b8000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x78b8000 0x600>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ dmas = <&blsp_dma 11>, <&blsp_dma 10>;
+ dma-names = "rx", "tx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
cryptobam: dma@8e04000 {
compatible = "qcom,bam-v1.7.0";

10
target/linux/ipq806x/patches-4.9/305-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch
View File

@ -17,7 +17,7 @@ Changes:
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -35,19 +35,27 @@
@@ -34,19 +34,27 @@
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
@ -47,7 +47,7 @@ Changes:
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
reg = <0x1>;
@@ -59,7 +67,8 @@
@@ -58,7 +66,8 @@
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
@ -57,7 +57,7 @@ Changes:
qcom,acc = <&acc2>;
qcom,saw = <&saw2>;
reg = <0x2>;
@@ -71,7 +80,8 @@
@@ -70,7 +79,8 @@
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a7";
@ -67,7 +67,7 @@ Changes:
qcom,acc = <&acc3>;
qcom,saw = <&saw3>;
reg = <0x3>;
@@ -236,22 +246,22 @@
@@ -218,22 +228,22 @@
};
acc0: clock-controller@b088000 {
@ -94,7 +94,7 @@ Changes:
reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
};
@@ -279,6 +289,12 @@
@@ -261,6 +271,12 @@
regulator;
};

2
target/linux/ipq806x/patches-4.9/306-qcom-ipq4019-add-USB-nodes-to-ipq4019-SoC-device-tre.patch
View File

@ -51,7 +51,7 @@ Changes:
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -331,5 +331,76 @@
@@ -313,5 +313,76 @@
compatible = "qcom,pshold";
reg = <0x4ab000 0x4>;
};

170
target/linux/ipq806x/patches-4.9/308-dts-ipq4019-add-both-IPQ4019-wifi-block-definitions.patch
View File

@ -1,100 +1,57 @@
From 45e183ad169db4e233ce8337cf8b735545151f0e Mon Sep 17 00:00:00 2001
From 6091a49b0b06bf838fed80498c4f5f40d0fbd447 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sat, 19 Nov 2016 01:22:46 +0100
Subject: [PATCH] arm: dts: qcom: add both IPQ4019 wifi blocks
Subject: [PATCH] dts: ipq4019: add both IPQ4019 wifi block definitions
This patch adds and enables the device-tree definitions for
both qcom,ipq4019-wifi blocks for the IPQ4019.
The IPQ4019 has two ath10k blocks on the AHB. Both wifi's
are already supported by ath10k.
Support for these have been added into the ath10k driver since:
280e762e9c72 ("ath10k: enable ipq4019 device probe in ahb module")
The binding documentation was added in commit:
a47aaa69de88 ("dt: bindings: add new dt entry for pre calibration in qcom, ath10k.txt")
This has been tested on an ASUS RT-AC58U (IPQ4019),
an AVM Fritz!Box 4040 (IPQ4018), a Compex WPJ428(IPQ4028)
and a Meraki MR33 (IPQ4029).
| a000000.wifi: qca4019 hw1.0 target 0x01000000 chip_id 0x003b00ff [...]
| a000000.wifi: kconfig debug 0 debugfs 1 tracing 0 dfs 1 testmode 1
| a000000.wifi: firmware ver 10.4-3.4-00082 api 5 features no-p2p,mfp,[...]
| a000000.wifi: board_file api 2 bmi_id 0:16 crc32 5773b188
| a000000.wifi: htt-ver 2.2 wmi-op 6 htt-op 4 cal pre-cal-file [...]
...
| a800000.wifi: qca4019 hw1.0 target 0x01000000 chip_id 0x003b00ff sub 0000:0000
| a800000.wifi: kconfig debug 0 debugfs 1 tracing 0 dfs 1 testmode 1
| a800000.wifi: firmware ver 10.4-3.4-00082 api 5 features no-p2p, [...]
| a800000.wifi: board_file api 2 bmi_id 0:17 crc32 5773b188
| a800000.wifi: htt-ver 2.2 wmi-op 6 htt-op 4 cal pre-cal-file [...]
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 8 +++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 84 +++++++++++++++++++++++++++
2 files changed, 92 insertions(+)
arch/arm/boot/dts/qcom-ipq4019.dtsi | 84 +++++++++++++++++++++++++++++++++++++
1 file changed, 84 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index c25d8f5c669d..cfa0c9970d5b 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -112,5 +112,13 @@
watchdog@b017000 {
status = "ok";
};
+
+ wifi@a000000 {
+ status = "ok";
+ };
+
+ wifi@a800000 {
+ status = "ok";
+ };
};
};
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index d1a56331ce96..1ddcc96b510c 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -291,5 +291,89 @@
compatible = "qcom,pshold";
reg = <0x4ab000 0x4>;
@@ -384,5 +384,89 @@
dr_mode = "host";
};
};
+
+ wifi0: wifi@a000000 {
+ compatible = "qcom,ipq4019-wifi";
+ reg = <0xa000000 0x200000>;
+ resets = <&gcc WIFI0_CPU_INIT_RESET>,
+ <&gcc WIFI0_RADIO_SRIF_RESET>,
+ <&gcc WIFI0_RADIO_WARM_RESET>,
+ <&gcc WIFI0_RADIO_COLD_RESET>,
+ <&gcc WIFI0_CORE_WARM_RESET>,
+ <&gcc WIFI0_CORE_COLD_RESET>;
+ resets = <&gcc WIFI0_CPU_INIT_RESET
+ &gcc WIFI0_RADIO_SRIF_RESET
+ &gcc WIFI0_RADIO_WARM_RESET
+ &gcc WIFI0_RADIO_COLD_RESET
+ &gcc WIFI0_CORE_WARM_RESET
+ &gcc WIFI0_CORE_COLD_RESET>;
+ reset-names = "wifi_cpu_init", "wifi_radio_srif",
+ "wifi_radio_warm", "wifi_radio_cold",
+ "wifi_core_warm", "wifi_core_cold";
+ clocks = <&gcc GCC_WCSS2G_CLK>,
+ <&gcc GCC_WCSS2G_REF_CLK>,
+ <&gcc GCC_WCSS2G_RTC_CLK>;
+ clocks = <&gcc GCC_WCSS2G_CLK
+ &gcc GCC_WCSS2G_REF_CLK
+ &gcc GCC_WCSS2G_RTC_CLK>;
+ clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
+ "wifi_wcss_rtc";
+ interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 168 IRQ_TYPE_NONE>;
+ interrupts = <0 32 IRQ_TYPE_EDGE_RISING
+ 0 33 IRQ_TYPE_EDGE_RISING
+ 0 34 IRQ_TYPE_EDGE_RISING
+ 0 35 IRQ_TYPE_EDGE_RISING
+ 0 36 IRQ_TYPE_EDGE_RISING
+ 0 37 IRQ_TYPE_EDGE_RISING
+ 0 38 IRQ_TYPE_EDGE_RISING
+ 0 39 IRQ_TYPE_EDGE_RISING
+ 0 40 IRQ_TYPE_EDGE_RISING
+ 0 41 IRQ_TYPE_EDGE_RISING
+ 0 42 IRQ_TYPE_EDGE_RISING
+ 0 43 IRQ_TYPE_EDGE_RISING
+ 0 44 IRQ_TYPE_EDGE_RISING
+ 0 45 IRQ_TYPE_EDGE_RISING
+ 0 46 IRQ_TYPE_EDGE_RISING
+ 0 47 IRQ_TYPE_EDGE_RISING
+ 0 168 IRQ_TYPE_NONE>;
+ interrupt-names = "msi0", "msi1", "msi2", "msi3",
+ "msi4", "msi5", "msi6", "msi7",
+ "msi8", "msi9", "msi10", "msi11",
@ -106,37 +63,37 @@ index d1a56331ce96..1ddcc96b510c 100644
+ wifi1: wifi@a800000 {
+ compatible = "qcom,ipq4019-wifi";
+ reg = <0xa800000 0x200000>;
+ resets = <&gcc WIFI1_CPU_INIT_RESET>,
+ <&gcc WIFI1_RADIO_SRIF_RESET>,
+ <&gcc WIFI1_RADIO_WARM_RESET>,
+ <&gcc WIFI1_RADIO_COLD_RESET>,
+ <&gcc WIFI1_CORE_WARM_RESET>,
+ <&gcc WIFI1_CORE_COLD_RESET>;
+ resets = <&gcc WIFI1_CPU_INIT_RESET
+ &gcc WIFI1_RADIO_SRIF_RESET
+ &gcc WIFI1_RADIO_WARM_RESET
+ &gcc WIFI1_RADIO_COLD_RESET
+ &gcc WIFI1_CORE_WARM_RESET
+ &gcc WIFI1_CORE_COLD_RESET>;
+ reset-names = "wifi_cpu_init", "wifi_radio_srif",
+ "wifi_radio_warm", "wifi_radio_cold",
+ "wifi_core_warm", "wifi_core_cold";
+ clocks = <&gcc GCC_WCSS5G_CLK>,
+ <&gcc GCC_WCSS5G_REF_CLK>,
+ <&gcc GCC_WCSS5G_RTC_CLK>;
+ clocks = <&gcc GCC_WCSS5G_CLK
+ &gcc GCC_WCSS5G_REF_CLK
+ &gcc GCC_WCSS5G_RTC_CLK>;
+ clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
+ "wifi_wcss_rtc";
+ interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 53 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 54 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 56 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 58 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 60 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 61 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 62 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 63 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 169 IRQ_TYPE_NONE>;
+ interrupts = <0 48 IRQ_TYPE_EDGE_RISING
+ 0 49 IRQ_TYPE_EDGE_RISING
+ 0 50 IRQ_TYPE_EDGE_RISING
+ 0 51 IRQ_TYPE_EDGE_RISING
+ 0 52 IRQ_TYPE_EDGE_RISING
+ 0 53 IRQ_TYPE_EDGE_RISING
+ 0 54 IRQ_TYPE_EDGE_RISING
+ 0 55 IRQ_TYPE_EDGE_RISING
+ 0 56 IRQ_TYPE_EDGE_RISING
+ 0 57 IRQ_TYPE_EDGE_RISING
+ 0 58 IRQ_TYPE_EDGE_RISING
+ 0 59 IRQ_TYPE_EDGE_RISING
+ 0 60 IRQ_TYPE_EDGE_RISING
+ 0 61 IRQ_TYPE_EDGE_RISING
+ 0 62 IRQ_TYPE_EDGE_RISING
+ 0 63 IRQ_TYPE_EDGE_RISING
+ 0 169 IRQ_TYPE_NONE>;
+ interrupt-names = "msi0", "msi1", "msi2", "msi3",
+ "msi4", "msi5", "msi6", "msi7",
+ "msi8", "msi9", "msi10", "msi11",
@ -146,6 +103,3 @@ index d1a56331ce96..1ddcc96b510c 100644
+ };
};
};
--
2.13.3

2
target/linux/ipq806x/patches-4.9/309-dts-ipq4019-add-pseudo-random-number-generator.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -295,6 +295,13 @@
@@ -277,6 +277,13 @@
regulator;
};

25
target/linux/ipq806x/patches-4.9/311-dts-ARM-qcom-ipq4019-add-scm-node.patch
View File

@ -1,25 +0,0 @@
From: Christian Lamparter <chunkeey@googlemail.com>
Date: Mon, 20 Mar 2017 18:08:03 +0100
Subject: [PATCH] dts: ARM: qcom-ipq4019: add scm node
This patch adds the device-tree node necessary for communicating
with Qualcomm's TrustZone/Secure Execution Environment
implementation.
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -137,6 +137,12 @@
};
};
+ firmware {
+ scm {
+ compatible = "qcom,scm-ipq4019", "qcom,scm-ipq40xx";
+ };
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;

98
target/linux/ipq806x/patches-4.9/312-firmware-qcom-scm-fuse-access.patch
View File

@ -1,98 +0,0 @@
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-32.c
@@ -578,3 +578,33 @@ int __qcom_scm_pinmux_write(u32 svc_id,
return ret;
}
+
+int __qcom_scm_fuse(struct device *dev, u32 address, u32 *val)
+{
+ __le32 *otp_value;
+ dma_addr_t in;
+ int ret;
+
+ otp_value = kzalloc(PAGE_ALIGN(sizeof(*otp_value)), GFP_KERNEL);
+ if (!otp_value)
+ return -ENOMEM;
+
+ in = dma_map_single(dev, otp_value, sizeof(in), DMA_FROM_DEVICE);
+
+ ret = dma_mapping_error(dev, in);
+ if (ret != 0) {
+ kfree(otp_value);
+ pr_err("DMA Mapping Error %d\n", ret);
+ return ret;
+ }
+
+ ret = qcom_scm_call(dev, QCOM_SCM_SVC_FUSE, address,
+ &in, sizeof(in), NULL, 0);
+
+ dma_unmap_single(dev, in, sizeof(in), DMA_FROM_DEVICE);
+
+ *val = le32_to_cpu(*otp_value);
+ kfree(otp_value);
+
+ return ret;
+}
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -165,6 +165,25 @@ int qcom_scm_hdcp_req(struct qcom_scm_hd
EXPORT_SYMBOL(qcom_scm_hdcp_req);
/**
+ * qcom_scm_fuse() - Reads a value from the OTP
+ * @address: address
+ *
+ * Returns the value of the OTP at the specified address.
+ */
+int qcom_scm_fuse(u32 address, u32 *val)
+{
+ int ret = qcom_scm_clk_enable();
+
+ if (ret)
+ return ret;
+
+ ret = __qcom_scm_fuse(__scm->dev, address, val);
+ qcom_scm_clk_disable();
+ return ret;
+}
+EXPORT_SYMBOL(qcom_scm_fuse);
+
+/**
* qcom_scm_pas_supported() - Check if the peripheral authentication service is
* available for the given peripherial
* @peripheral: peripheral id
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -63,6 +63,9 @@ extern int __qcom_scm_pas_mss_reset(str
s32 __qcom_scm_pinmux_read(u32 svc_id, u32 cmd_id, u32 arg1);
s32 __qcom_scm_pinmux_write(u32 svc_id, u32 cmd_id, u32 arg1, u32 arg2);
+#define QCOM_SCM_SVC_FUSE 0x8
+extern int __qcom_scm_fuse(struct device *dev, u32 address, u32 *val);
+
/* common error codes */
#define QCOM_SCM_V2_EBUSY -12
#define QCOM_SCM_ENOMEM -5
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -48,4 +48,7 @@ extern u32 qcom_scm_get_version(void);
extern s32 qcom_scm_pinmux_read(u32 arg1);
extern s32 qcom_scm_pinmux_write(u32 arg1, u32 arg2);
+
+extern int qcom_scm_fuse(u32 address, u32 *val);
+
#endif
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -374,3 +374,9 @@ int __qcom_scm_pinmux_write(u32 svc_id,
{
return -ENOTSUPP;
}
+
+int __qcom_scm_fuse(struct device *dev, u32 address, u32 *val)
+{
+ *val = -1;
+ return -ENOTSUPP;
+}

2
target/linux/ipq806x/patches-4.9/701-dts-ipq4019-add-mdio-node.patch
View File

@ -15,7 +15,7 @@ so the info might change.
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -345,6 +345,34 @@
@@ -321,6 +321,34 @@
reg = <0x4ab000 0x4>;
};

2
target/linux/ipq806x/patches-4.9/702-dts-ipq4019-add-PHY-switch-nodes.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -373,6 +373,29 @@
@@ -349,6 +349,29 @@
};
};

6
target/linux/ipq806x/patches-4.9/711-dts-ipq4019-add-ethernet-essedma-node.patch
View File

@ -16,16 +16,16 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -27,6 +27,8 @@
@@ -26,6 +26,8 @@
aliases {
spi0 = &spi_0;
i2c0 = &i2c_0;
i2c1 = &i2c_1;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
};
cpus {
@@ -396,6 +398,64 @@
@@ -372,6 +374,64 @@
status = "disabled";
};

69
target/linux/ipq806x/patches-4.9/712-net-essedma-disable-default-vlan.patch
View File

@ -1,69 +0,0 @@
From: Christian Lamparter <chunkeey@googlemail.com>
Subject: [PATCH] net: essedma: disable default vlan tagging
Date: Tue, 21 Mar 13:59:02 CET 2017 +0100
The essedma driver has its own unique take on VLAN management
and its configuration. In the original SDK, each VLAN is
assigned one virtual ethernet netdev.
However, this is non-standard. So, this patch does away
with the default_vlan_tag property the driver is using
and therefore forces the user to use the kernel's vlan
feature.
This patch also removes the "qcom,poll_required = <1>;" from
the essedma node.
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
@@ -715,13 +715,11 @@ static void edma_rx_complete(struct edma
edma_receive_checksum(rd, skb);
/* Process VLAN HW acceleration indication provided by HW */
- if (unlikely(adapter->default_vlan_tag != rd->rrd4)) {
- vlan = rd->rrd4;
- if (likely(rd->rrd7 & EDMA_RRD_CVLAN))
- __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
- else if (rd->rrd1 & EDMA_RRD_SVLAN)
- __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan);
- }
+ vlan = rd->rrd4;
+ if (likely(rd->rrd7 & EDMA_RRD_CVLAN))
+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
+ else if (rd->rrd1 & EDMA_RRD_SVLAN)
+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan);
/* Update rx statistics */
adapter->stats.rx_packets++;
@@ -1390,8 +1388,6 @@ netdev_tx_t edma_xmit(struct sk_buff *sk
/* Check and mark VLAN tag offload */
if (skb_vlan_tag_present(skb))
flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_FLAG;
- else if (adapter->default_vlan_tag)
- flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG;
/* Check and mark checksum offload */
if (likely(skb->ip_summed == CHECKSUM_PARTIAL))
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -404,8 +404,7 @@
qcom,page-mode = <0>;
qcom,rx_head_buf_size = <1540>;
qcom,mdio_supported;
- qcom,poll_required = <1>;
- qcom,num_gmac = <2>;
+ qcom,num_gmac = <1>;
interrupts = <0 65 IRQ_TYPE_EDGE_RISING
0 66 IRQ_TYPE_EDGE_RISING
0 67 IRQ_TYPE_EDGE_RISING
@@ -443,7 +442,7 @@
gmac0: gmac0 {
local-mac-address = [00 00 00 00 00 00];
- vlan_tag = <1 0x1f>;
+ vlan_tag = <1 0x3f>;
};
gmac1: gmac1 {

71
target/linux/ipq806x/patches-4.9/820-qcom-ipq4019-Add-IPQ4019-USB-HS-SS-PHY-drivers.patch
View File

@ -291,7 +291,7 @@ Changed:
+MODULE_DESCRIPTION("USB3 QCA BALDUR HSPHY driver");
--- /dev/null
+++ b/drivers/usb/phy/phy-qca-uniphy.c
@@ -0,0 +1,202 @@
@@ -0,0 +1,135 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
@ -318,18 +318,6 @@ Changed:
+#include <linux/usb/phy.h>
+#include <linux/reset.h>
+#include <linux/of_device.h>
+#include <linux/qcom_scm.h>
+
+#define USB_CALIBRATION_CMD 0x10
+#define USB3PHY_SPARE_1 0x7FC
+#define RX_LOS_1 0x7C8
+#define MISC_SOURCE_REG 0x21c
+#define CDR_CONTROL_REG_1 0x80
+#define PCS_INTERNAL_CONTROL14 0x364
+#define MMD1_REG_REG_MASK (0x7F << 8)
+#define OTP_MASK (0x7F << 5)
+#define MMD1_REG_AUTOLOAD_MASK (0x1 << 7)
+#define SPARE_1_BIT14_MASK (0x1 << 14)
+
+struct qca_uni_ss_phy {
+ struct usb_phy phy;
@ -350,60 +338,6 @@ Changed:
+ reset_control_assert(phy->por_rst);
+}
+
+int qca_uni_ss_phy_usb_los_calibration(void __iomem *base)
+{
+ int err;
+ uint32_t data, otp_val = 0;
+
+ /* Get OTP value */
+ err = qcom_scm_fuse(USB_CALIBRATION_CMD, &otp_val);
+ if (err < 0 || !(otp_val & OTP_MASK)) {
+ pr_err("USB Calibration Failed with error %d %d\n", err, otp_val);
+ return 0;
+ }
+
+ pr_info("Raw USB3 Calibration value %x\n", otp_val);
+
+ /*
+ * Read the USB3PHY_SPARE_1 register and
+ * set bit 14 to 0
+ */
+ data = readl_relaxed(base + USB3PHY_SPARE_1);
+ data = data & (~SPARE_1_BIT14_MASK);
+ writel(data, base + USB3PHY_SPARE_1);
+ udelay(100);
+
+ /*
+ * Get bit 11:5 value, add with 0x14 and set to the
+ * register USB3PHY_RX_LOS_1 bit MMD1_REG_REG
+ */
+ data = readl_relaxed(base + RX_LOS_1);
+ otp_val = ((otp_val & OTP_MASK) >> 5) + 0x14;
+ otp_val = otp_val << 8;
+ data = data & (~MMD1_REG_REG_MASK);
+ data = data | otp_val;
+ writel(data, base + RX_LOS_1);
+ udelay(100);
+
+ /*
+ * Set bit MMD1_REG_AUTOLOAD_SEL_RX_LOS_THRES in
+ * USB3PHY_RX_LOS_1 to 1
+ */
+ data = readl_relaxed(base + RX_LOS_1);
+ data = data | MMD1_REG_AUTOLOAD_MASK;
+ writel(data, base + RX_LOS_1);
+ udelay(100);
+
+ writel(0x4000, base + PCS_INTERNAL_CONTROL14);
+ udelay(100);
+ writel(0xaa0a, base + MISC_SOURCE_REG);
+ udelay(100);
+ writel(0x0202, base + CDR_CONTROL_REG_1);
+ udelay(100);
+
+ return 0;
+}
+
+static int qca_uni_ss_phy_init(struct usb_phy *x)
+{
+ struct qca_uni_ss_phy *phy = phy_to_dw_phy(x);
@ -416,8 +350,7 @@ Changed:
+ /* deassert SS PHY POR reset */
+ reset_control_deassert(phy->por_rst);
+
+ /* USB LOS Calibration */
+ return qca_uni_ss_phy_usb_los_calibration(phy->base);
+ return 0;
+}
+
+static int qca_uni_ss_get_resources(struct platform_device *pdev,

1328
target/linux/ipq806x/patches-4.9/852-ipq4019-pinctrl-Updated-various-Pin-definitions.patch Normal file
View File

File diff suppressed because it is too large Load Diff

236
target/linux/ipq806x/patches-4.9/859-msm-pinctrl-Add-support-to-configure-ipq40xx-GPIO_PU.patch Normal file
View File

@ -0,0 +1,236 @@
From e77af7de404eb464f7da9e0daeb8b362cc66a7ba Mon Sep 17 00:00:00 2001
From: Ram Chandra Jangir <rjangir@codeaurora.org>
Date: Tue, 9 May 2017 11:45:00 +0530
Subject: [PATCH] msm: pinctrl: Add support to configure ipq40xx GPIO_PULL bits
GPIO_PULL bits configurations in TLMM_GPIO_CFG register
differs for IPQ40xx from rest of the other qcom SoC's.
This change add support to configure the msm_gpio_pull
bits for ipq40xx, It is required to fix the proper
configurations of gpio-pull bits for nand pins mux.
IPQ40xx SoC:
2'b10: Internal pull up enable.
2'b11: Unsupport
For other SoC's:
2'b10: Keeper
2'b11: Pull-Up
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
---
drivers/pinctrl/qcom/pinctrl-apq8064.c | 1 +
drivers/pinctrl/qcom/pinctrl-apq8084.c | 1 +
drivers/pinctrl/qcom/pinctrl-ipq4019.c | 8 ++++++++
drivers/pinctrl/qcom/pinctrl-ipq8064.c | 1 +
drivers/pinctrl/qcom/pinctrl-mdm9615.c | 1 +
drivers/pinctrl/qcom/pinctrl-msm.c | 21 ++++++++-------------
drivers/pinctrl/qcom/pinctrl-msm.h | 19 +++++++++++++++++++
drivers/pinctrl/qcom/pinctrl-msm8660.c | 1 +
drivers/pinctrl/qcom/pinctrl-msm8916.c | 1 +
drivers/pinctrl/qcom/pinctrl-msm8960.c | 1 +
drivers/pinctrl/qcom/pinctrl-msm8x74.c | 1 +
11 files changed, 43 insertions(+), 13 deletions(-)
--- a/drivers/pinctrl/qcom/pinctrl-apq8064.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8064.c
@@ -597,6 +597,7 @@ static const struct msm_pinctrl_soc_data
.groups = apq8064_groups,
.ngroups = ARRAY_SIZE(apq8064_groups),
.ngpios = NUM_GPIO_PINGROUPS,
+ .gpio_pull = &msm_gpio_pull,
};
static int apq8064_pinctrl_probe(struct platform_device *pdev)
--- a/drivers/pinctrl/qcom/pinctrl-apq8084.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8084.c
@@ -1206,6 +1206,7 @@ static const struct msm_pinctrl_soc_data
.groups = apq8084_groups,
.ngroups = ARRAY_SIZE(apq8084_groups),
.ngpios = NUM_GPIO_PINGROUPS,
+ .gpio_pull = &msm_gpio_pull,
};
static int apq8084_pinctrl_probe(struct platform_device *pdev)
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -1531,6 +1531,13 @@ static const struct msm_pingroup ipq4019
PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
};
+static const struct msm_pinctrl_gpio_pull ipq4019_gpio_pull = {
+ .no_pull = 0,
+ .pull_down = 1,
+ .keeper = 0,
+ .pull_up = 2,
+};
+
static const struct msm_pinctrl_soc_data ipq4019_pinctrl = {
.pins = ipq4019_pins,
.npins = ARRAY_SIZE(ipq4019_pins),
@@ -1539,6 +1546,7 @@ static const struct msm_pinctrl_soc_data
.groups = ipq4019_groups,
.ngroups = ARRAY_SIZE(ipq4019_groups),
.ngpios = 100,
+ .gpio_pull = &ipq4019_gpio_pull,
};
static int ipq4019_pinctrl_probe(struct platform_device *pdev)
--- a/drivers/pinctrl/qcom/pinctrl-ipq8064.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq8064.c
@@ -630,6 +630,7 @@ static const struct msm_pinctrl_soc_data
.groups = ipq8064_groups,
.ngroups = ARRAY_SIZE(ipq8064_groups),
.ngpios = NUM_GPIO_PINGROUPS,
+ .gpio_pull = &msm_gpio_pull,
};
static int ipq8064_pinctrl_probe(struct platform_device *pdev)
--- a/drivers/pinctrl/qcom/pinctrl-mdm9615.c
+++ b/drivers/pinctrl/qcom/pinctrl-mdm9615.c
@@ -444,6 +444,7 @@ static const struct msm_pinctrl_soc_data
.groups = mdm9615_groups,
.ngroups = ARRAY_SIZE(mdm9615_groups),
.ngpios = NUM_GPIO_PINGROUPS,
+ .gpio_pull = &msm_gpio_pull,
};
static int mdm9615_pinctrl_probe(struct platform_device *pdev)
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -203,11 +203,6 @@ static int msm_config_reg(struct msm_pin
return 0;
}
-#define MSM_NO_PULL 0
-#define MSM_PULL_DOWN 1
-#define MSM_KEEPER 2
-#define MSM_PULL_UP 3
-
static unsigned msm_regval_to_drive(u32 val)
{
return (val + 1) * 2;
@@ -238,16 +233,16 @@ static int msm_config_group_get(struct p
/* Convert register value to pinconf value */
switch (param) {
case PIN_CONFIG_BIAS_DISABLE:
- arg = arg == MSM_NO_PULL;
+ arg = arg == pctrl->soc->gpio_pull->no_pull;
break;
case PIN_CONFIG_BIAS_PULL_DOWN:
- arg = arg == MSM_PULL_DOWN;
+ arg = arg == pctrl->soc->gpio_pull->pull_down;
break;
case PIN_CONFIG_BIAS_BUS_HOLD:
- arg = arg == MSM_KEEPER;
+ arg = arg == pctrl->soc->gpio_pull->keeper;
break;
case PIN_CONFIG_BIAS_PULL_UP:
- arg = arg == MSM_PULL_UP;
+ arg = arg == pctrl->soc->gpio_pull->pull_up;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
arg = msm_regval_to_drive(arg);
@@ -304,16 +299,16 @@ static int msm_config_group_set(struct p
/* Convert pinconf values to register values */
switch (param) {
case PIN_CONFIG_BIAS_DISABLE:
- arg = MSM_NO_PULL;
+ arg = pctrl->soc->gpio_pull->no_pull;
break;
case PIN_CONFIG_BIAS_PULL_DOWN:
- arg = MSM_PULL_DOWN;
+ arg = pctrl->soc->gpio_pull->pull_down;
break;
case PIN_CONFIG_BIAS_BUS_HOLD:
- arg = MSM_KEEPER;
+ arg = pctrl->soc->gpio_pull->keeper;
break;
case PIN_CONFIG_BIAS_PULL_UP:
- arg = MSM_PULL_UP;
+ arg = pctrl->soc->gpio_pull->pull_up;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
/* Check for invalid values */
--- a/drivers/pinctrl/qcom/pinctrl-msm.h
+++ b/drivers/pinctrl/qcom/pinctrl-msm.h
@@ -98,6 +98,16 @@ struct msm_pingroup {
};
/**
+ * struct msm_pinctrl_gpio_pull - pinctrl pull value bit field descriptor
+ */
+struct msm_pinctrl_gpio_pull {
+ unsigned no_pull;
+ unsigned pull_down;
+ unsigned keeper;
+ unsigned pull_up;
+};
+
+/**
* struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration
* @pins: An array describing all pins the pin controller affects.
* @npins: The number of entries in @pins.
@@ -106,6 +116,7 @@ struct msm_pingroup {
* @groups: An array describing all pin groups the pin SoC supports.
* @ngroups: The numbmer of entries in @groups.
* @ngpio: The number of pingroups the driver should expose as GPIOs.
+ * @gpio_pull_val: The pull value bit field descriptor.
*/
struct msm_pinctrl_soc_data {
const struct pinctrl_pin_desc *pins;
@@ -115,6 +126,14 @@ struct msm_pinctrl_soc_data {
const struct msm_pingroup *groups;
unsigned ngroups;
unsigned ngpios;
+ const struct msm_pinctrl_gpio_pull *gpio_pull;
+};
+
+static const struct msm_pinctrl_gpio_pull msm_gpio_pull = {
+ .no_pull = 0,
+ .pull_down = 1,
+ .keeper = 2,
+ .pull_up = 3,
};
int msm_pinctrl_probe(struct platform_device *pdev,
--- a/drivers/pinctrl/qcom/pinctrl-msm8660.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8660.c
@@ -979,6 +979,7 @@ static const struct msm_pinctrl_soc_data
.groups = msm8660_groups,
.ngroups = ARRAY_SIZE(msm8660_groups),
.ngpios = NUM_GPIO_PINGROUPS,
+ .gpio_pull = &msm_gpio_pull,
};
static int msm8660_pinctrl_probe(struct platform_device *pdev)
--- a/drivers/pinctrl/qcom/pinctrl-msm8916.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8916.c
@@ -967,6 +967,7 @@ static const struct msm_pinctrl_soc_data
.groups = msm8916_groups,
.ngroups = ARRAY_SIZE(msm8916_groups),
.ngpios = NUM_GPIO_PINGROUPS,
+ .gpio_pull = &msm_gpio_pull,
};
static int msm8916_pinctrl_probe(struct platform_device *pdev)
--- a/drivers/pinctrl/qcom/pinctrl-msm8960.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8960.c
@@ -1244,6 +1244,7 @@ static const struct msm_pinctrl_soc_data
.groups = msm8960_groups,
.ngroups = ARRAY_SIZE(msm8960_groups),
.ngpios = NUM_GPIO_PINGROUPS,
+ .gpio_pull = &msm_gpio_pull,
};
static int msm8960_pinctrl_probe(struct platform_device *pdev)
--- a/drivers/pinctrl/qcom/pinctrl-msm8x74.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8x74.c
@@ -1069,6 +1069,7 @@ static const struct msm_pinctrl_soc_data
.groups = msm8x74_groups,
.ngroups = ARRAY_SIZE(msm8x74_groups),
.ngpios = NUM_GPIO_PINGROUPS,
+ .gpio_pull = &msm_gpio_pull,
};
static int msm8x74_pinctrl_probe(struct platform_device *pdev)

70
target/linux/ipq806x/patches-4.9/863-dts-ipq4019-add-nand-and-qpic-bam-dma-node.patch
View File

@ -15,17 +15,78 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -88,6 +88,26 @@
@@ -88,6 +88,86 @@
bias-disable;
};
};
+
+ nand_pins: nand_pins {
+
+ mux_1 {
+ pins = "gpio52", "gpio53", "gpio54",
+ "gpio55", "gpio56", "gpio61",
+ "gpio62", "gpio63", "gpio69";
+ function = "qpic_pad";
+ bias-disable;
+ };
+
+ mux_2 {
+ pins = "gpio67";
+ function = "qpic_pad0";
+ bias-disable;
+ };
+
+ mux_3 {
+ pins = "gpio64";
+ function = "qpic_pad1";
+ bias-disable;
+ };
+
+ mux_4 {
+ pins = "gpio65";
+ function = "qpic_pad2";
+ bias-disable;
+ };
+
+ mux_5 {
+ pins = "gpio66";
+ function = "qpic_pad3";
+ bias-disable;
+ };
+
+ mux_6 {
+ pins = "gpio57";
+ function = "qpic_pad4";
+ bias-disable;
+ };
+
+ mux_7 {
+ pins = "gpio58";
+ function = "qpic_pad5";
+ bias-disable;
+ };
+
+ mux_8 {
+ pins = "gpio59";
+ function = "qpic_pad6";
+ bias-disable;
+ };
+
+ mux_9 {
+ pins = "gpio60";
+ function = "qpic_pad7";
+ bias-disable;
+ };
+
+ mux_10 {
+ pins = "gpio68";
+ function = "qpic_pad8";
+ bias-disable;
+ };
+
+ pullups {
+ pins = "gpio52", "gpio53", "gpio58",
+ "gpio59";
+ function = "qpic";
+ bias-pull-up;
+ };
+
@ -35,14 +96,13 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
+ "gpio62", "gpio63", "gpio64",
+ "gpio65", "gpio66", "gpio67",
+ "gpio68", "gpio69";
+ function = "qpic";
+ bias-pull-down;
+ };
+ };
};
blsp_dma: dma@7884000 {
@@ -159,5 +179,15 @@
@@ -159,5 +239,15 @@
watchdog@b017000 {
status = "ok";
};
@ -60,7 +120,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -609,5 +609,43 @@
@@ -586,5 +586,43 @@
"legacy";
status = "disabled";
};

44
target/linux/ipq806x/patches-4.9/864-00-v3-1-2-dts-ipq4019-Fix-pinctrl-node-name.patch Normal file
View File

@ -0,0 +1,44 @@
From patchwork Mon Jul 3 07:47:12 2017
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [v3,1/2] dts: ipq4019: Fix pinctrl node name
From: Varadarajan Narayanan <varada@codeaurora.org>
X-Patchwork-Id: 9822099
Message-Id: <1499068033-24000-2-git-send-email-varada@codeaurora.org>
To: andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org,
mark.rutland@arm.com, linux@armlinux.org.uk,
linux-arm-msm@vger.kernel.org,
linux-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Varadarajan Narayanan <varada@codeaurora.org>
Date: Mon, 3 Jul 2017 13:17:12 +0530
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 2 +-
arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -40,7 +40,7 @@
clock-frequency = <48000000>;
};
- pinctrl@0x01000000 {
+ pinctrl@1000000 {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -155,7 +155,7 @@
reg = <0x1800000 0x60000>;
};
- tlmm: pinctrl@0x01000000 {
+ tlmm: pinctrl@1000000 {
compatible = "qcom,ipq4019-pinctrl";
reg = <0x01000000 0x300000>;
gpio-controller;

78
target/linux/ipq806x/patches-4.9/864-00-v3-2-2-dts-ipq4019-Move-xo-and-timer-nodes-to-SoC-dtsi.patch Normal file
View File

@ -0,0 +1,78 @@
From patchwork Mon Jul 3 07:47:13 2017
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [v3,2/2] dts: ipq4019: Move xo and timer nodes to SoC dtsi
From: Varadarajan Narayanan <varada@codeaurora.org>
X-Patchwork-Id: 9822107
Message-Id: <1499068033-24000-3-git-send-email-varada@codeaurora.org>
To: andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org,
mark.rutland@arm.com, linux@armlinux.org.uk,
linux-arm-msm@vger.kernel.org,
linux-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Varadarajan Narayanan <varada@codeaurora.org>
Date: Mon, 3 Jul 2017 13:17:13 +0530
The node for xo and timer belong to the SoC DTS file.
Else, new board DT files may not inherit these nodes.
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 19 -------------------
arch/arm/boot/dts/qcom-ipq4019.dtsi | 15 +++++++++++++++
2 files changed, 15 insertions(+), 19 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -20,26 +20,7 @@
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
compatible = "qcom,ipq4019";
- clocks {
- xo: xo {
- compatible = "fixed-clock";
- clock-frequency = <48000000>;
- #clock-cells = <0>;
- };
- };
-
soc {
-
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <1 2 0xf08>,
- <1 3 0xf08>,
- <1 4 0xf08>,
- <1 1 0xf08>;
- clock-frequency = <48000000>;
- };
-
pinctrl@1000000 {
serial_pins: serial_pinmux {
mux {
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -132,6 +132,21 @@
clock-frequency = <32768>;
#clock-cells = <0>;
};
+
+ xo: xo {
+ compatible = "fixed-clock";
+ clock-frequency = <48000000>;
+ #clock-cells = <0>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <1 2 0xf08>,
+ <1 3 0xf08>,
+ <1 4 0xf08>,
+ <1 1 0xf08>;
+ clock-frequency = <48000000>;
};
soc {

11
target/linux/ipq806x/patches-4.9/864-01-dts-ipq4019-ap-dk04-fix-pinctrl-node-name.patch Normal file
View File

@ -0,0 +1,11 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -38,7 +38,7 @@
clock-frequency = <48000000>;
};
- pinctrl@0x01000000 {
+ pinctrl@1000000 {
serial_0_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";

27
target/linux/ipq806x/patches-4.9/864-02-dts-ipq4019-ap-dk04-remove-xo-and-timer-nodes.patch Normal file
View File

@ -0,0 +1,27 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -20,24 +20,7 @@
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
compatible = "qcom,ipq4019";
- clocks {
- xo: xo {
- compatible = "fixed-clock";
- clock-frequency = <48000000>;
- #clock-cells = <0>;
- };
- };
-
soc {
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <1 2 0xf08>,
- <1 3 0xf08>,
- <1 4 0xf08>,
- <1 1 0xf08>;
- clock-frequency = <48000000>;
- };
-
pinctrl@1000000 {
serial_0_pins: serial_pinmux {
mux {

42
target/linux/ipq806x/patches-4.9/864-03-dts-ipq4019-ap-dk01-add-tcsr-config-to-dtsi.patch Normal file
View File

@ -0,0 +1,42 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -15,12 +15,39 @@
*/
#include "qcom-ipq4019.dtsi"
+#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
compatible = "qcom,ipq4019";
soc {
+ tcsr@194b000 {
+ /* select hostmode */
+ compatible = "qcom,tcsr";
+ reg = <0x194b000 0x100>;
+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+ status = "ok";
+ };
+
+ ess_tcsr@1953000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1953000 0x1000>;
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+ };
+
+ tcsr@1949000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1949000 0x100>;
+ qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+ };
+
+ tcsr@1957000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1957000 0x100>;
+ qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+ };
+
pinctrl@1000000 {
serial_pins: serial_pinmux {
mux {

32
target/linux/ipq806x/patches-4.9/864-04-dts-ipq4019-ap-dk01-add-network-nodes-to-dtsi.patch Normal file
View File

@ -0,0 +1,32 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -136,5 +136,29 @@
usb2: usb2@60f8800 {
status = "ok";
};
+
+ mdio@90000 {
+ status = "okay";
+ };
+
+ ess-switch@c000000 {
+ status = "okay";
+ };
+
+ ess-psgmii@98000 {
+ status = "okay";
+ };
+
+ edma@c080000 {
+ status = "okay";
+ };
+
+ wifi@a000000 {
+ status = "okay";
+ };
+
+ wifi@a800000 {
+ status = "okay";
+ };
};
};

17
target/linux/ipq806x/patches-4.9/864-05-dts-ipq4019-ap-dk01-remove-spi-chip-node-from-dtsi.patch Normal file
View File

@ -0,0 +1,17 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -89,14 +89,6 @@
pinctrl-names = "default";
status = "ok";
cs-gpios = <&tlmm 54 0>;
-
- mx25l25635e@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0>;
- compatible = "mx25l25635e";
- spi-max-frequency = <24000000>;
- };
};
serial@78af000 {

13
target/linux/ipq806x/patches-4.9/864-06-dts-ipq4019-fix-max-cpu-speed.patch Normal file
View File

@ -0,0 +1,13 @@
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -108,8 +108,8 @@
opp-hz = /bits/ 64 <500000000>;
clock-latency-ns = <256000>;
};
- opp@666000000 {
- opp-hz = /bits/ 64 <666000000>;
+ opp@716800000 {
+ opp-hz = /bits/ 64 <716800000>;
clock-latency-ns = <256000>;
};
};

115
target/linux/ipq806x/patches-4.9/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch Normal file
View File

@ -0,0 +1,115 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
@@ -19,4 +19,112 @@
/ {
model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ ranges;
+
+ apps_bl@87000000 {
+ reg = <0x87000000 0x400000>;
+ no-map;
+ };
+
+ sbl@87400000 {
+ reg = <0x87400000 0x100000>;
+ no-map;
+ };
+
+ cnss_debug@87500000 {
+ reg = <0x87500000 0x600000>;
+ no-map;
+ };
+
+ cpu_context_dump@87b00000 {
+ reg = <0x87b00000 0x080000>;
+ no-map;
+ };
+
+ tz_apps@87b80000 {
+ reg = <0x87b80000 0x280000>;
+ no-map;
+ };
+
+ smem@87e00000 {
+ reg = <0x87e00000 0x080000>;
+ no-map;
+ };
+
+ tz@87e80000 {
+ reg = <0x87e80000 0x180000>;
+ no-map;
+ };
+ };
+};
+
+&spi_0 {
+ mx25l25635f@0 {
+ compatible = "mx25l25635f", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+
+ SBL1@0 {
+ label = "SBL1";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+ MIBIB@40000 {
+ label = "MIBIB";
+ reg = <0x40000 0x20000>;
+ read-only;
+ };
+ QSEE@60000 {
+ label = "QSEE";
+ reg = <0x60000 0x60000>;
+ read-only;
+ };
+ CDT@c0000 {
+ label = "CDT";
+ reg = <0xc0000 0x10000>;
+ read-only;
+ };
+ DDRPARAMS@d0000 {
+ label = "DDRPARAMS";
+ reg = <0xd0000 0x10000>;
+ read-only;
+ };
+ APPSBLENV@e0000 {
+ label = "APPSBLENV";
+ reg = <0xe0000 0x10000>;
+ read-only;
+ };
+ APPSBL@f0000 {
+ label = "APPSBL";
+ reg = <0xf0000 0x80000>;
+ read-only;
+ };
+ ART@170000 {
+ label = "ART";
+ reg = <0x170000 0x10000>;
+ read-only;
+ };
+ kernel@180000 {
+ label = "kernel";
+ reg = <0x180000 0x400000>;
+ };
+ rootfs@580000 {
+ label = "rootfs";
+ reg = <0x580000 0x1600000>;
+ };
+ firmware@180000 {
+ label = "firmware";
+ reg = <0x180000 0x1a00000>;
+ };
+ };
};

10
target/linux/ipq806x/patches-4.9/864-08-dts-ipq4019-ap-dk01.1-c1-add-compatible-string.patch Normal file
View File

@ -0,0 +1,10 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
@@ -18,6 +18,7 @@
/ {
model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
+ compatible = "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1", "qcom,ipq4019";
memory {
device_type = "memory";

2
target/linux/lantiq/patches-4.9/0026-NET-multi-phy-support.patch
View File

@ -43,7 +43,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
}
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -373,6 +373,7 @@ struct phy_device {
@@ -369,6 +369,7 @@ struct phy_device {
bool is_pseudo_fixed_link;
bool has_fixups;
bool suspended;

151
target/linux/layerscape/README Normal file
View File

@ -0,0 +1,151 @@
Layerscape Quick Start
1. Layerscape target support
----------------------------
* ARMv8 64-bit
LS1012ARDB LS1012AFRDM LS1043ARDB LS1046ARDB LS1088ARDB LS2088ARDB
* ARMv8 32-bit
LS1012ARDB LS1012AFRDM LS1043ARDB LS1046ARDB
2. Build
--------
2.1 make menuconfig
-------------------
* For single device
Target System: "NXP Layerscape".
Subtarget: "ARMv8 64-bit based boards" or "ARMv8 32-bit based boards"
Target Profile: (select device you want to build)
For example, build firmware for 64-bit ls1043ardb.
+---------------------------------------------+
| Target System (NXP Layerscape) ---> |
|---------------------------------------------|
| Subtarget (ARMv8 64-bit based boards) ---> |
|---------------------------------------------|
| Target Profile (ls1043ardb-armv8_64b) ---> |
+---------------------------------------------+
* For multiple devices
Target System: "NXP Layerscape".
Subtarget: "ARMv8 64-bit based boards" or "ARMv8 32-bit based boards"
Target Profile: "Multiple devices"
Target Devices: (select devices you want to build)
For example, build firmware for all 64-bit devices.
Target Devices --->
+-----------------------------------------------------------------+
| [*] Enable all profiles by default |
|-----------------------------------------------------------------|
| [ ] Use a per-device root filesystem that adds profile packages |
|-----------------------------------------------------------------|
| [*] ls1012afrdm-armv8_64b ---- |
|-----------------------------------------------------------------|
| [*] ls1012ardb-armv8_64b ---- |
|-----------------------------------------------------------------|
| [*] ls1043ardb-armv8_64b ---- |
|-----------------------------------------------------------------|
| [*] ls1046ardb-armv8_64b ---- |
|-----------------------------------------------------------------|
| [*] ls1088ardb-armv8_64b ---- |
|-----------------------------------------------------------------|
| [*] ls2088ardb-armv8_64b ---- |
+-----------------------------------------------------------------+
Note: per-device root filesystem hasn't been supported for now.
2.2 make (or make -j<n>)
------------------------
2.3 Final firmware
------------------
Final firmware would be in bin/targets/layerscape/<subtarget>/, and
named as lede-layerscape-<subtarget>-<device>-squashfs-firmware.bin.
3. Program firmware to NOR/QSPI flash
-------------------------------------
* LS1043ARDB (NOR flash)
Start up from bank0, and program firmware to bank4 with below commands.
Switch to bank4 to start up LEDE.
=> tftp a0000000 lede-layerscape-<subtarget>-<device>-squashfs-firmware.bin
=> protect off all
=> erase 64000000 +$filesize
=> cp.b a0000000 64000000 $filesize
=> cpld reset altbank
* LS2088ARDB (NOR flash)
Start up from bank0, and program firmware to bank4 with below commands.
Switch to bank4 to start up LEDE.
=> tftp a0000000 lede-layerscape-<subtarget>-<device>-squashfs-firmware.bin
=> protect off all
=> erase 584000000 +$filesize
=> cp.b a0000000 584000000 $filesize
=> qix altbank
* LS1012ARDB (QSPI flash)
Start up from bank1, and program firmware to bank2 with below commands.
Switch to bank2 to start up LEDE.
=> tftp a0000000 lede-layerscape-<subtarget>-<device>-squashfs-firmware.bin
=> i2c mw 0x24 0x7 0xfc;i2c mw 0x24 0x3 0xf5
=> sf probe 0:0
=> sf erase 0 +$filesize
=> sf write a0000000 0 $filesize
=> reset
* LS1012AFRDM (QSPI flash)
LS1012AFRDM board only has one bank. Start up board, and program firmware
with below commands. Reset to start up LEDE.
=> tftp 96000000 lede-layerscape-<subtarget>-<device>-squashfs-firmware.bin
=> sf probe 0:0
=> sf erase 0 +$filesize
=> sf write 96000000 0 $filesize
=> reset
* LS1046ARDB (QSPI flash)
Start up from bank1, and program firmware to bank2 with below commands.
Switch to bank2 to start up LEDE.
=> tftp a0000000 lede-layerscape-<subtarget>-<device>-squashfs-firmware.bin
=> sf probe 0:1
=> sf erase 0 +$filesize
=> sf write a0000000 0 $filesize
=> cpld reset altbank
* LS1088ARDB (QSPI flash)
Start up from bank0, and program firmware to bank1 with below commands.
Switch to bank1 to start up LEDE.
=> tftp a0000000 lede-layerscape-<subtarget>-<device>-squashfs-firmware.bin
=> sf probe 0:1
=> sf erase 0 +$filesize
=> sf write a0000000 0 $filesize
=> qix altbank
Note: old version u-boot of ls1088ardb may use below commands to switch to
bank1 instead of 'qix altbank'.
=> i2c mw 66 50 20;i2c mw 66 10 20;i2c mw 66 10 21
4. Other references and sources
-------------------------------
- NXP LSDK site: https://lsdk.github.io/
- NXP LSDK github: https://github.com/qoriq-open-source
- LEDE documentation: https://lede-project.org/docs/start

98
target/linux/layerscape/armv8_32b/config-4.9
View File

@ -2,7 +2,6 @@ CONFIG_ABX500_CORE=y
CONFIG_AD525X_DPOT=y
CONFIG_AD525X_DPOT_I2C=y
# CONFIG_AD525X_DPOT_SPI is not set
CONFIG_ADVISE_SYSCALLS=y
CONFIG_AHCI_IMX=y
CONFIG_AHCI_QORIQ=y
CONFIG_AK8975=y
@ -11,6 +10,7 @@ CONFIG_APDS9802ALS=y
CONFIG_AQUANTIA_PHY=y
# CONFIG_ARCH_AXXIA is not set
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HAS_BANDGAP=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
@ -254,7 +254,6 @@ CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
# CONFIG_CRYPTO_AES_ARM_CE is not set
# CONFIG_CRYPTO_ARC4 is not set
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32C=y
@ -304,7 +303,6 @@ CONFIG_DEBUG_RODATA=y
# CONFIG_DEBUG_USER is not set
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_XZ=y
@ -450,6 +448,9 @@ CONFIG_FSL_EDMA=y
CONFIG_FSL_FM_MAX_FRAME_SIZE=1522
CONFIG_FSL_FM_RX_EXTRA_HEADROOM=64
CONFIG_FSL_GUTS=y
CONFIG_FSL_IFC=y
CONFIG_FSL_PPFE=y
CONFIG_FSL_PPFE_UTIL_DISABLED=y
CONFIG_FSL_PQ_MDIO=y
# CONFIG_FSL_QDMA is not set
CONFIG_FSL_QMAN_CI_SCHED_CFG_BMAN_W=2
@ -524,7 +525,6 @@ CONFIG_GPIO_TPS6586X=y
CONFIG_GPIO_TPS65910=y
CONFIG_GPIO_TWL4030=y
CONFIG_GPIO_XILINX=y
CONFIG_GRACE_PERIOD=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
@ -669,11 +669,6 @@ CONFIG_IOMMU_HELPER=y
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IOSCHED_CFQ=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_NAT=y
CONFIG_IP6_NF_TARGET_MASQUERADE=y
# CONFIG_IP6_NF_TARGET_NPT is not set
CONFIG_IPC_NS=y
CONFIG_IPV6=y
CONFIG_IPV6_MULTIPLE_TABLES=y
@ -683,39 +678,10 @@ CONFIG_IPV6_SIT=y
# CONFIG_IPV6_SUBTREES is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_MROUTE is not set
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_RARP=y
CONFIG_IP_VS=y
# CONFIG_IP_VS_DEBUG is not set
# CONFIG_IP_VS_DH is not set
# CONFIG_IP_VS_FO is not set
# CONFIG_IP_VS_IPV6 is not set
# CONFIG_IP_VS_LBLC is not set
# CONFIG_IP_VS_LBLCR is not set
# CONFIG_IP_VS_LC is not set
# CONFIG_IP_VS_NFCT is not set
# CONFIG_IP_VS_NQ is not set
# CONFIG_IP_VS_OVF is not set
# CONFIG_IP_VS_PROTO_AH is not set
# CONFIG_IP_VS_PROTO_AH_ESP is not set
# CONFIG_IP_VS_PROTO_ESP is not set
# CONFIG_IP_VS_PROTO_SCTP is not set
# CONFIG_IP_VS_PROTO_TCP is not set
# CONFIG_IP_VS_PROTO_UDP is not set
# CONFIG_IP_VS_RR is not set
# CONFIG_IP_VS_SED is not set
# CONFIG_IP_VS_SH is not set
CONFIG_IP_VS_SH_TAB_BITS=8
CONFIG_IP_VS_TAB_BITS=12
# CONFIG_IP_VS_WLC is not set
# CONFIG_IP_VS_WRR is not set
CONFIG_IRQCHIP=y
CONFIG_IRQ_CROSSBAR=y
CONFIG_IRQ_DOMAIN=y
@ -726,7 +692,6 @@ CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_ISL29003=y
CONFIG_JBD2=y
# CONFIG_JFFS2_FS is not set
CONFIG_KALLSYMS=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_XZ is not set
@ -759,14 +724,14 @@ CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LIBFDT=y
CONFIG_LOCALVERSION_AUTO=y
CONFIG_LOCKD=y
CONFIG_LOCKUP_DETECTOR=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
CONFIG_LOGO_LINUX_MONO=y
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_LS_SCFG_MSI=y
# CONFIG_LS_SOC_DRIVERS is not set
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MACB=y
@ -878,8 +843,10 @@ CONFIG_MTD_NAND_BRCMNAND=y
CONFIG_MTD_NAND_DENALI=y
CONFIG_MTD_NAND_DENALI_DT=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
CONFIG_MTD_SST25L=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
@ -896,49 +863,11 @@ CONFIG_NAMESPACES=y
CONFIG_NATIONAL_PHY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEON=y
CONFIG_NETFILTER=y
CONFIG_NETFILTER_ADVANCED=y
CONFIG_NETFILTER_INGRESS=y
CONFIG_NETFILTER_XTABLES=y
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_IPVS=y
CONFIG_NETFILTER_XT_NAT=y
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=y
CONFIG_NETLINK_DIAG=y
# CONFIG_NET_CLS_CGROUP is not set
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_IP_TUNNEL=y
CONFIG_NET_KEY=y
CONFIG_NET_NS=y
CONFIG_NET_PACKET_ENGINE=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SWITCHDEV=y
# CONFIG_NET_VENDOR_AURORA is not set
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_FS=y
CONFIG_NFS_USE_KERNEL_DNS=y
# CONFIG_NFS_USE_LEGACY_DNS is not set
CONFIG_NFS_V2=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_IPV4=y
CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_NF_CONNTRACK_MARK=y
# CONFIG_NF_CONNTRACK_RTCACHE is not set
CONFIG_NF_DEFRAG_IPV4=y
CONFIG_NF_DEFRAG_IPV6=y
# CONFIG_NF_LOG_IPV6 is not set
CONFIG_NF_NAT=y
CONFIG_NF_NAT_IPV4=y
CONFIG_NF_NAT_IPV6=y
CONFIG_NF_NAT_MASQUERADE_IPV4=y
CONFIG_NF_NAT_MASQUERADE_IPV6=y
CONFIG_NF_NAT_NEEDED=y
# CONFIG_NF_NAT_REDIRECT is not set
CONFIG_NLS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
@ -964,7 +893,6 @@ CONFIG_OF_NET=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OID_REGISTRY=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
# CONFIG_OMAP2PLUS_MBOX is not set
@ -994,7 +922,6 @@ CONFIG_OUTER_CACHE_SYNC=y
CONFIG_PACKET_DIAG=y
CONFIG_PAGE_COUNTER=y
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PALMAS_GPADC is not set
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
@ -1009,6 +936,7 @@ CONFIG_PCIEASPM_DEFAULT=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_DW=y
CONFIG_PCIE_PME=y
CONFIG_PCI_BUS_ADDR_T_64BIT=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
# CONFIG_PCI_DRA7XX is not set
@ -1094,7 +1022,6 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_RCU_STALL_COMMON=y
CONFIG_RD_BZIP2=y
CONFIG_RD_GZIP=y
CONFIG_RD_LZ4=y
CONFIG_RD_LZMA=y
CONFIG_RD_LZO=y
CONFIG_RD_XZ=y
@ -1147,7 +1074,6 @@ CONFIG_REGULATOR_TWL4030=y
CONFIG_REGULATOR_VEXPRESS=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y
CONFIG_ROOT_NFS=y
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AS3722=y
@ -1245,7 +1171,7 @@ CONFIG_SOC_HAS_REALTIME_COUNTER=y
# CONFIG_SOC_IMX6SX is not set
# CONFIG_SOC_IMX6UL is not set
# CONFIG_SOC_IMX7D is not set
# CONFIG_SOC_LS1021A is not set
CONFIG_SOC_LS1021A=y
CONFIG_SOC_OMAP3430=y
CONFIG_SOC_OMAP5=y
CONFIG_SOC_TI81XX=y
@ -1254,7 +1180,6 @@ CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_CADENCE=y
# CONFIG_SPI_CADENCE_QUADSPI is not set
CONFIG_SPI_FSL_QUADSPI=y
# CONFIG_SPI_IMX is not set
CONFIG_SPI_MASTER=y
@ -1278,8 +1203,6 @@ CONFIG_STMPE_I2C=y
# CONFIG_STMPE_SPI is not set
CONFIG_STMP_DEVICE=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWIOTLB=y
@ -1347,7 +1270,6 @@ CONFIG_USB_DWC3_DUAL_ROLE=y
CONFIG_USB_DWC3_OF_SIMPLE=y
CONFIG_USB_DWC3_OMAP=y
CONFIG_USB_DWC3_PCI=y
# CONFIG_USB_EHCI_FSL is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
# CONFIG_USB_EHCI_MXC is not set

18
target/linux/layerscape/armv8_32b/profiles/00-default.mk
View File

@ -1,18 +0,0 @@
define Profile/Default
NAME:=Default Profile
PRIORITY:=1
endef
define Profile/Default/Description
Default package set compatible with most boards.
endef
DEFAULT_PACKAGES+= \
rcw-layerscape-ls1043ardb uboot-layerscape-$(SUBTARGET)-ls1043ardb \
fman-layerscape-ls1043ardb \
rcw-layerscape-ls1046ardb uboot-layerscape-$(SUBTARGET)-ls1046ardb \
fman-layerscape-ls1046ardb \
rcw-layerscape-ls1012ardb uboot-layerscape-$(SUBTARGET)-ls1012ardb \
kmod-ppfe ppfe-ls1012ardb
$(eval $(call Profile,Default))

88
target/linux/layerscape/armv8_64b/config-4.9
View File

@ -23,7 +23,6 @@ CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y
CONFIG_ACPI_SPCR_TABLE=y
CONFIG_ACPI_TABLE_UPGRADE=y
CONFIG_ACPI_THERMAL=y
CONFIG_ADVISE_SYSCALLS=y
CONFIG_AHCI_CEVA=y
CONFIG_AHCI_QORIQ=y
CONFIG_AHCI_XGENE=y
@ -107,6 +106,7 @@ CONFIG_ARM_SP805_WATCHDOG=y
CONFIG_ARM_TIMER_SP804=y
CONFIG_ASN1=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_ASYNC_CORE=y
CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y
CONFIG_ATA=y
CONFIG_ATA_ACPI=y
@ -145,11 +145,6 @@ CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_BOUNCE=y
CONFIG_BPF_JIT=y
# CONFIG_BPF_SYSCALL is not set
CONFIG_BRIDGE_EBT_DNAT=y
CONFIG_BRIDGE_EBT_SNAT=y
CONFIG_BRIDGE_EBT_T_NAT=y
CONFIG_BRIDGE_NETFILTER=y
CONFIG_BRIDGE_NF_EBTABLES=y
CONFIG_BRIDGE_VLAN_FILTERING=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
@ -259,7 +254,6 @@ CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AKCIPHER=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_ANSI_CPRNG=y
# CONFIG_CRYPTO_ARC4 is not set
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32C=y
@ -274,12 +268,13 @@ CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI=y
# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
CONFIG_CRYPTO_DEV_FSL_CAAM_DMA=y
# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set
CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
# CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM is not set
CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
@ -318,7 +313,6 @@ CONFIG_DEBUG_RODATA=y
CONFIG_DEBUG_SET_MODULE_RONX=y
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_XZ=y
@ -461,6 +455,8 @@ CONFIG_FSL_LS2_CONSOLE=y
CONFIG_FSL_MC_BUS=y
CONFIG_FSL_MC_DPIO=y
CONFIG_FSL_MC_RESTOOL=y
CONFIG_FSL_PPFE=y
CONFIG_FSL_PPFE_UTIL_DISABLED=y
# CONFIG_FSL_QBMAN_DEBUG is not set
# CONFIG_FSL_QDMA is not set
CONFIG_FSL_QMAN_CI_SCHED_CFG_BMAN_W=2
@ -691,11 +687,6 @@ CONFIG_IPV6=y
CONFIG_IPV6_SIT=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_MROUTE is not set
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_DHCP=y
@ -708,7 +699,6 @@ CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_JBD2=y
# CONFIG_JFFS2_FS is not set
CONFIG_JUMP_LABEL=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
@ -748,7 +738,6 @@ CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_LS_SCFG_MSI=y
CONFIG_LS_SOC_DRIVERS=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MACB=y
@ -837,6 +826,7 @@ CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
CONFIG_MTD_SST25L=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_MV_XOR_V2=y
@ -845,76 +835,12 @@ CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_MULTIPLE_NODES=y
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NETFILTER=y
CONFIG_NETFILTER_ADVANCED=y
CONFIG_NETFILTER_INGRESS=y
CONFIG_NETFILTER_NETLINK=y
CONFIG_NETFILTER_XTABLES=y
CONFIG_NETFILTER_XT_CONNMARK=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_NAT=y
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
# CONFIG_NETLABEL is not set
CONFIG_NETLINK_DIAG=y
# CONFIG_NETWORK_FILESYSTEMS is not set
CONFIG_NET_9P=y
# CONFIG_NET_9P_DEBUG is not set
CONFIG_NET_9P_VIRTIO=y
# CONFIG_NET_CLS_CGROUP is not set
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_IP_TUNNEL=y
CONFIG_NET_KEY=y
CONFIG_NET_NS=y
CONFIG_NET_PACKET_ENGINE=y
CONFIG_NET_PTP_CLASSIFY=y
# CONFIG_NET_VENDOR_AURORA is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NFT_CHAIN_NAT_IPV4 is not set
# CONFIG_NFT_CHAIN_ROUTE_IPV4 is not set
CONFIG_NFT_COMPAT=y
# CONFIG_NFT_COUNTER is not set
CONFIG_NFT_CT=y
# CONFIG_NFT_EXTHDR is not set
# CONFIG_NFT_HASH is not set
# CONFIG_NFT_LIMIT is not set
# CONFIG_NFT_LOG is not set
CONFIG_NFT_MASQ=y
# CONFIG_NFT_MASQ_IPV4 is not set
# CONFIG_NFT_META is not set
CONFIG_NFT_NAT=y
# CONFIG_NFT_NUMGEN is not set
# CONFIG_NFT_QUOTA is not set
# CONFIG_NFT_REDIR is not set
# CONFIG_NFT_REJECT is not set
# CONFIG_NFT_REJECT_IPV4 is not set
# CONFIG_NFT_SET_HASH is not set
# CONFIG_NFT_SET_RBTREE is not set
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CONNTRACK_IPV4=y
CONFIG_NF_CONNTRACK_IPV6=y
CONFIG_NF_CONNTRACK_MARK=y
# CONFIG_NF_CONNTRACK_RTCACHE is not set
CONFIG_NF_DEFRAG_IPV4=y
CONFIG_NF_DEFRAG_IPV6=y
# CONFIG_NF_LOG_BRIDGE is not set
CONFIG_NF_LOG_COMMON=y
CONFIG_NF_LOG_IPV6=y
CONFIG_NF_NAT=y
CONFIG_NF_NAT_IPV4=y
CONFIG_NF_NAT_IPV6=y
CONFIG_NF_NAT_MASQUERADE_IPV4=y
CONFIG_NF_NAT_MASQUERADE_IPV6=y
CONFIG_NF_NAT_NEEDED=y
# CONFIG_NF_NAT_REDIRECT is not set
CONFIG_NF_REJECT_IPV6=y
CONFIG_NF_TABLES=y
# CONFIG_NF_TABLES_ARP is not set
CONFIG_NF_TABLES_BRIDGE=y
# CONFIG_NF_TABLES_INET is not set
CONFIG_NF_TABLES_IPV4=y
# CONFIG_NF_TABLES_IPV6 is not set
CONFIG_NLS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
@ -1046,7 +972,6 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_RCU_STALL_COMMON=y
CONFIG_RD_BZIP2=y
CONFIG_RD_GZIP=y
CONFIG_RD_LZ4=y
CONFIG_RD_LZMA=y
CONFIG_RD_LZO=y
CONFIG_RD_XZ=y
@ -1240,7 +1165,6 @@ CONFIG_USB_DWC3_DUAL_ROLE=y
# CONFIG_USB_DWC3_HOST is not set
CONFIG_USB_DWC3_OF_SIMPLE=y
CONFIG_USB_DWC3_PCI=y
# CONFIG_USB_EHCI_FSL is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_EHCI_PCI=y

18
target/linux/layerscape/armv8_64b/profiles/00-default.mk
View File

@ -1,18 +0,0 @@
define Profile/Default
NAME:=Default Profile
PRIORITY:=1
endef
define Profile/Default/Description
Default package set compatible with most boards.
endef
DEFAULT_PACKAGES+= \
rcw-layerscape-ls1043ardb uboot-layerscape-$(SUBTARGET)-ls1043ardb \
fman-layerscape-ls1043ardb \
rcw-layerscape-ls1046ardb uboot-layerscape-$(SUBTARGET)-ls1046ardb \
fman-layerscape-ls1046ardb \
rcw-layerscape-ls1012ardb uboot-layerscape-$(SUBTARGET)-ls1012ardb \
kmod-ppfe ppfe-ls1012ardb
$(eval $(call Profile,Default))

4
target/linux/layerscape/base-files/etc/rc.local
View File

@ -1,4 +0,0 @@
# Put your custom commands here that should be executed once
# the system init finished. By default this file does nothing.
modprobe pfe.ko
exit 0

90
target/linux/layerscape/image/Makefile
View File

@ -16,10 +16,30 @@ define Build/append-ls-uboot
dd if=$(STAGING_DIR_IMAGE)/$(1)-$(SUBTARGET)-uboot.bin >> $@
endef
define Build/append-ls-ppa
dd if=$(STAGING_DIR_IMAGE)/$(1)-ppa.itb >> $@
endef
define Build/append-ls-fman
dd if=$(STAGING_DIR_IMAGE)/$(1)-fman.bin >> $@
endef
define Build/append-ls-mc
dd if=$(STAGING_DIR_IMAGE)/$(1)-mc.itb >> $@
endef
define Build/append-ls-ppfe
dd if=$(STAGING_DIR_IMAGE)/pfe.itb >> $@
endef
define Build/append-ls-dpl
dd if=$(STAGING_DIR_IMAGE)/$(1)-dpl.dtb >> $@
endef
define Build/append-ls-dpc
dd if=$(STAGING_DIR_IMAGE)/$(1)-dpc.dtb >> $@
endef
define Build/append-ls-dtb
$(call Image/BuildDTB,$(DTS_DIR)/$(1).dts,$(DTS_DIR)/$(1).dtb)
dd if=$(DTS_DIR)/$(1).dtb >> $@
@ -51,10 +71,12 @@ endef
define Device/ls1043ardb
DEVICE_TITLE := ls1043ardb-$(SUBTARGET)
DEVICE_PACKAGES += rcw-layerscape-ls1043ardb uboot-layerscape-$(SUBTARGET)-ls1043ardb fman-layerscape-ls1043ardb
DEVICE_PACKAGES += rcw-layerscape-ls1043ardb uboot-layerscape-$(SUBTARGET)-ls1043ardb \
fman-layerscape-ls1043ardb layerscape-ppa-ls1043ardb
DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk
IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \
append-ls-uboot $(1) | pad-to 9M | \
append-ls-uboot $(1) | pad-to 4M | \
append-ls-ppa $(1) | pad-to 9M | \
append-ls-fman $(1) | pad-to 15M | \
append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \
append-kernel | pad-to 32M | \
@ -64,47 +86,83 @@ TARGET_DEVICES += ls1043ardb
define Device/ls1046ardb
DEVICE_TITLE := ls1046ardb-$(SUBTARGET)
DEVICE_PACKAGES += rcw-layerscape-ls1046ardb uboot-layerscape-$(SUBTARGET)-ls1046ardb fman-layerscape-ls1046ardb
DEVICE_PACKAGES += rcw-layerscape-ls1046ardb uboot-layerscape-$(SUBTARGET)-ls1046ardb \
fman-layerscape-ls1046ardb layerscape-ppa-ls1046ardb
DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk
IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \
append-ls-uboot $(1) | pad-to 9M | \
append-ls-uboot $(1) | pad-to 4M | \
append-ls-ppa $(1) | pad-to 9M | \
append-ls-fman $(1) | pad-to 15M | \
append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \
append-kernel | pad-to 32M | \
append-ls-rootfs-ext4 $(1) 22M | check-size 67108865
append-ls-rootfs-ext4 $(1) 30M | check-size 67108865
endef
TARGET_DEVICES += ls1046ardb
define Device/ls1012ardb
DEVICE_TITLE := ls1012ardb-$(SUBTARGET)
DEVICE_PACKAGES += rcw-layerscape-ls1012ardb uboot-layerscape-$(SUBTARGET)-ls1012ardb kmod-ppfe ppfe-ls1012ardb
DEVICE_PACKAGES += rcw-layerscape-ls1012ardb uboot-layerscape-$(SUBTARGET)-ls1012ardb \
kmod-ppfe layerscape-ppfe layerscape-ppa-ls1012ardb
DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls1012a-rdb
IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \
append-ls-uboot $(1) | pad-to 15M | \
append-ls-uboot $(1) | pad-to 4M | \
append-ls-ppa $(1) | pad-to 10M | \
append-ls-ppfe | pad-to 15M | \
append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \
append-kernel | pad-to 32M | \
append-ls-rootfs-ext4 $(1) 23M | check-size 67108865
append-ls-rootfs-ext4 $(1) 30M | check-size 67108865
endef
TARGET_DEVICES += ls1012ardb
define Device/ls1012afrdm
DEVICE_TITLE := ls1012afrdm-$(SUBTARGET)
DEVICE_PACKAGES += rcw-layerscape-ls1012afrdm uboot-layerscape-$(SUBTARGET)-ls1012afrdm \
kmod-ppfe layerscape-ppfe layerscape-ppa-ls1012afrdm
DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls1012a-frdm
IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \
append-ls-uboot $(1) | pad-to 4M | \
append-ls-ppa $(1) | pad-to 10M | \
append-ls-ppfe | pad-to 15M | \
append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \
append-kernel | pad-to 32M | \
append-ls-rootfs-ext4 $(1) 30M | check-size 67108865
endef
TARGET_DEVICES += ls1012afrdm
ifeq ($(SUBTARGET),armv8_64b)
define Device/ls1088ardb
DEVICE_TITLE := ls1088ardb-$(SUBTARGET)
DEVICE_PACKAGES += rcw-layerscape-ls1088ardb uboot-layerscape-$(SUBTARGET)-ls1088ardb mc-binary-ls1088ardb
DEVICE_PACKAGES += rcw-layerscape-ls1088ardb uboot-layerscape-$(SUBTARGET)-ls1088ardb \
layerscape-mc-ls1088ardb layerscape-dpl-ls1088ardb restool \
layerscape-ppa-ls1088ardb
DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls1088a-rdb
IMAGE/firmware.bin = append-ls-dtb $$(DEVICE_DTS) | pad-to 1M | \
append-kernel | pad-to 17M | \
append-ls-rootfs-ext4 $(1) 17M | check-size 51380225
IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \
append-ls-uboot $(1) | pad-to 4M | \
append-ls-ppa $(1) | pad-to 10M | \
append-ls-mc $(1) | pad-to 13M | \
append-ls-dpl $(1) | pad-to 14M | \
append-ls-dpc $(1) | pad-to 15M | \
append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \
append-kernel | pad-to 32M | \
append-ls-rootfs-ext4 $(1) 30M | check-size 67108865
endef
TARGET_DEVICES += ls1088ardb
define Device/ls2088ardb
DEVICE_TITLE := ls2088ardb-$(SUBTARGET)
DEVICE_PACKAGES += rcw-layerscape-ls2088ardb uboot-layerscape-$(SUBTARGET)-ls2088ardb mc-binary-ls2088ardb
DEVICE_PACKAGES += rcw-layerscape-ls2088ardb uboot-layerscape-$(SUBTARGET)-ls2088ardb \
layerscape-mc-ls2088ardb layerscape-dpl-ls2088ardb restool \
layerscape-ppa-ls2088ardb
DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls2088a-rdb
IMAGE/firmware.bin = append-ls-dtb $$(DEVICE_DTS) | pad-to 1M | \
append-kernel | pad-to 17M | \
append-rootfs | pad-rootfs | check-size 51380225
IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \
append-ls-uboot $(1) | pad-to 4M | \
append-ls-ppa $(1) | pad-to 10M | \
append-ls-mc $(1) | pad-to 13M | \
append-ls-dpl $(1) | pad-to 14M | \
append-ls-dpc $(1) | pad-to 15M | \
append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \
append-kernel | pad-to 32M | \
append-rootfs | pad-rootfs | check-size 67108865
endef
TARGET_DEVICES += ls2088ardb
endif

5
target/linux/layerscape/modules.mk
View File

@ -8,9 +8,10 @@
define KernelPackage/ppfe
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Freescale PPFE Driver support
KCONFIG:=CONFIG_FSL_PPFE
DEPENDS:=@TARGET_layerscape
KCONFIG:=CONFIG_FSL_PPFE CONFIG_FSL_PPFE_UTIL_DISABLED
FILES:=$(LINUX_DIR)/drivers/staging/fsl_ppfe/pfe.ko
AUTOLOAD:=$(call AutoLoad,35,ppfe)
AUTOLOAD:=$(call AutoLoad,35,pfe)
endef
define KernelPackage/ppfe/description

15
target/linux/layerscape/patches-4.9/201-config-support-layerscape.patch
View File

@ -1,4 +1,4 @@
From 11edf9c88acea13d1a02901289060263b4027a77 Mon Sep 17 00:00:00 2001
From 7992b4384d94c5e1bad998ca3a9a5781caac8e62 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 25 Sep 2017 09:52:26 +0800
Subject: [PATCH] config: support layerscape
@ -30,11 +30,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
drivers/soc/fsl/layerscape/Kconfig | 10 +++
drivers/soc/fsl/layerscape/Makefile | 1 +
drivers/soc/fsl/rcpm.c | 154 ++++++++++++++++++++++++++++++++
drivers/staging/Kconfig | 4 +
drivers/staging/Makefile | 2 +
drivers/staging/Kconfig | 6 ++
drivers/staging/Makefile | 3 +
drivers/staging/fsl-dpaa2/Kconfig | 41 +++++++++
drivers/staging/fsl-dpaa2/Makefile | 9 ++
18 files changed, 309 insertions(+), 4 deletions(-)
18 files changed, 312 insertions(+), 4 deletions(-)
create mode 100644 drivers/soc/fsl/Kconfig
create mode 100644 drivers/soc/fsl/Kconfig.arm
create mode 100644 drivers/soc/fsl/layerscape/Kconfig
@ -407,16 +407,18 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
source "drivers/staging/wilc1000/Kconfig"
source "drivers/staging/most/Kconfig"
@@ -106,4 +108,6 @@ source "drivers/staging/greybus/Kconfig"
@@ -106,4 +108,8 @@ source "drivers/staging/greybus/Kconfig"
source "drivers/staging/vc04_services/Kconfig"
+source "drivers/staging/fsl_qbman/Kconfig"
+
+source "drivers/staging/fsl_ppfe/Kconfig"
+
endif # STAGING
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -36,9 +36,11 @@ obj-$(CONFIG_UNISYSSPAR) += unisys/
@@ -36,9 +36,12 @@ obj-$(CONFIG_UNISYSSPAR) += unisys/
obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/
obj-$(CONFIG_FB_TFT) += fbtft/
obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
@ -428,6 +430,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
obj-$(CONFIG_GREYBUS) += greybus/
obj-$(CONFIG_BCM2708_VCHIQ) += vc04_services/
+obj-$(CONFIG_FSL_SDK_DPA) += fsl_qbman/
+obj-$(CONFIG_FSL_PPFE) += fsl_ppfe/
--- /dev/null
+++ b/drivers/staging/fsl-dpaa2/Kconfig
@@ -0,0 +1,41 @@

508
target/linux/layerscape/patches-4.9/202-core-linux-support-layerscape.patch Normal file
View File

@ -0,0 +1,508 @@
From c37953457a7ebeb0d97ae8574b3d41274fcd9119 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Wed, 1 Nov 2017 16:22:33 +0800
Subject: [PATCH] core-linux: support layerscape
This is a integrated patch for layerscape core-linux support.
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Jarod Wilson <jarod@redhat.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: stephen hemminger <stephen@networkplumber.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
drivers/base/devres.c | 66 ++++++++++++++++++++++++++++
drivers/base/soc.c | 66 ++++++++++++++++++++++++++++
include/linux/device.h | 19 ++++++++
include/linux/fsl/svr.h | 97 +++++++++++++++++++++++++++++++++++++++++
include/linux/fsl_devices.h | 3 ++
include/linux/netdev_features.h | 2 +
include/linux/netdevice.h | 4 ++
include/linux/skbuff.h | 2 +
include/linux/sys_soc.h | 3 ++
include/uapi/linux/if_ether.h | 1 +
net/core/dev.c | 13 +++++-
net/core/skbuff.c | 29 +++++++++++-
net/sched/sch_generic.c | 7 +++
13 files changed, 309 insertions(+), 3 deletions(-)
create mode 100644 include/linux/fsl/svr.h
--- a/drivers/base/devres.c
+++ b/drivers/base/devres.c
@@ -10,6 +10,7 @@
#include <linux/device.h>
#include <linux/module.h>
#include <linux/slab.h>
+#include <linux/percpu.h>
#include "base.h"
@@ -985,3 +986,68 @@ void devm_free_pages(struct device *dev,
&devres));
}
EXPORT_SYMBOL_GPL(devm_free_pages);
+
+static void devm_percpu_release(struct device *dev, void *pdata)
+{
+ void __percpu *p;
+
+ p = *(void __percpu **)pdata;
+ free_percpu(p);
+}
+
+static int devm_percpu_match(struct device *dev, void *data, void *p)
+{
+ struct devres *devr = container_of(data, struct devres, data);
+
+ return *(void **)devr->data == p;
+}
+
+/**
+ * __devm_alloc_percpu - Resource-managed alloc_percpu
+ * @dev: Device to allocate per-cpu memory for
+ * @size: Size of per-cpu memory to allocate
+ * @align: Alignment of per-cpu memory to allocate
+ *
+ * Managed alloc_percpu. Per-cpu memory allocated with this function is
+ * automatically freed on driver detach.
+ *
+ * RETURNS:
+ * Pointer to allocated memory on success, NULL on failure.
+ */
+void __percpu *__devm_alloc_percpu(struct device *dev, size_t size,
+ size_t align)
+{
+ void *p;
+ void __percpu *pcpu;
+
+ pcpu = __alloc_percpu(size, align);
+ if (!pcpu)
+ return NULL;
+
+ p = devres_alloc(devm_percpu_release, sizeof(void *), GFP_KERNEL);
+ if (!p) {
+ free_percpu(pcpu);
+ return NULL;
+ }
+
+ *(void __percpu **)p = pcpu;
+
+ devres_add(dev, p);
+
+ return pcpu;
+}
+EXPORT_SYMBOL_GPL(__devm_alloc_percpu);
+
+/**
+ * devm_free_percpu - Resource-managed free_percpu
+ * @dev: Device this memory belongs to
+ * @pdata: Per-cpu memory to free
+ *
+ * Free memory allocated with devm_alloc_percpu().
+ */
+void devm_free_percpu(struct device *dev, void __percpu *pdata)
+{
+ WARN_ON(devres_destroy(dev, devm_percpu_release, devm_percpu_match,
+ (void *)pdata));
+}
+EXPORT_SYMBOL_GPL(devm_free_percpu);
--- a/drivers/base/soc.c
+++ b/drivers/base/soc.c
@@ -13,6 +13,7 @@
#include <linux/spinlock.h>
#include <linux/sys_soc.h>
#include <linux/err.h>
+#include <linux/glob.h>
static DEFINE_IDA(soc_ida);
@@ -159,3 +160,68 @@ static int __init soc_bus_register(void)
return bus_register(&soc_bus_type);
}
core_initcall(soc_bus_register);
+
+static int soc_device_match_one(struct device *dev, void *arg)
+{
+ struct soc_device *soc_dev = container_of(dev, struct soc_device, dev);
+ const struct soc_device_attribute *match = arg;
+
+ if (match->machine &&
+ !glob_match(match->machine, soc_dev->attr->machine))
+ return 0;
+
+ if (match->family &&
+ !glob_match(match->family, soc_dev->attr->family))
+ return 0;
+
+ if (match->revision &&
+ !glob_match(match->revision, soc_dev->attr->revision))
+ return 0;
+
+ if (match->soc_id &&
+ !glob_match(match->soc_id, soc_dev->attr->soc_id))
+ return 0;
+
+ return 1;
+}
+
+/*
+ * soc_device_match - identify the SoC in the machine
+ * @matches: zero-terminated array of possible matches
+ *
+ * returns the first matching entry of the argument array, or NULL
+ * if none of them match.
+ *
+ * This function is meant as a helper in place of of_match_node()
+ * in cases where either no device tree is available or the information
+ * in a device node is insufficient to identify a particular variant
+ * by its compatible strings or other properties. For new devices,
+ * the DT binding should always provide unique compatible strings
+ * that allow the use of of_match_node() instead.
+ *
+ * The calling function can use the .data entry of the
+ * soc_device_attribute to pass a structure or function pointer for
+ * each entry.
+ */
+const struct soc_device_attribute *soc_device_match(
+ const struct soc_device_attribute *matches)
+{
+ int ret = 0;
+
+ if (!matches)
+ return NULL;
+
+ while (!ret) {
+ if (!(matches->machine || matches->family ||
+ matches->revision || matches->soc_id))
+ break;
+ ret = bus_for_each_dev(&soc_bus_type, NULL, (void *)matches,
+ soc_device_match_one);
+ if (!ret)
+ matches++;
+ else
+ return matches;
+ }
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(soc_device_match);
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -688,6 +688,25 @@ void __iomem *devm_ioremap_resource(stru
int devm_add_action(struct device *dev, void (*action)(void *), void *data);
void devm_remove_action(struct device *dev, void (*action)(void *), void *data);
+/**
+ * devm_alloc_percpu - Resource-managed alloc_percpu
+ * @dev: Device to allocate per-cpu memory for
+ * @type: Type to allocate per-cpu memory for
+ *
+ * Managed alloc_percpu. Per-cpu memory allocated with this function is
+ * automatically freed on driver detach.
+ *
+ * RETURNS:
+ * Pointer to allocated memory on success, NULL on failure.
+ */
+#define devm_alloc_percpu(dev, type) \
+ ((typeof(type) __percpu *)__devm_alloc_percpu((dev), sizeof(type), \
+ __alignof__(type)))
+
+void __percpu *__devm_alloc_percpu(struct device *dev, size_t size,
+ size_t align);
+void devm_free_percpu(struct device *dev, void __percpu *pdata);
+
static inline int devm_add_action_or_reset(struct device *dev,
void (*action)(void *), void *data)
{
--- /dev/null
+++ b/include/linux/fsl/svr.h
@@ -0,0 +1,97 @@
+/*
+ * MPC85xx cpu type detection
+ *
+ * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef FSL_SVR_H
+#define FSL_SVR_H
+
+#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */
+#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
+#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
+
+/* Some parts define SVR[0:23] as the SOC version */
+#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */
+
+#define SVR_8533 0x803400
+#define SVR_8535 0x803701
+#define SVR_8536 0x803700
+#define SVR_8540 0x803000
+#define SVR_8541 0x807200
+#define SVR_8543 0x803200
+#define SVR_8544 0x803401
+#define SVR_8545 0x803102
+#define SVR_8547 0x803101
+#define SVR_8548 0x803100
+#define SVR_8555 0x807100
+#define SVR_8560 0x807000
+#define SVR_8567 0x807501
+#define SVR_8568 0x807500
+#define SVR_8569 0x808000
+#define SVR_8572 0x80E000
+#define SVR_P1010 0x80F100
+#define SVR_P1011 0x80E500
+#define SVR_P1012 0x80E501
+#define SVR_P1013 0x80E700
+#define SVR_P1014 0x80F101
+#define SVR_P1017 0x80F700
+#define SVR_P1020 0x80E400
+#define SVR_P1021 0x80E401
+#define SVR_P1022 0x80E600
+#define SVR_P1023 0x80F600
+#define SVR_P1024 0x80E402
+#define SVR_P1025 0x80E403
+#define SVR_P2010 0x80E300
+#define SVR_P2020 0x80E200
+#define SVR_P2040 0x821000
+#define SVR_P2041 0x821001
+#define SVR_P3041 0x821103
+#define SVR_P4040 0x820100
+#define SVR_P4080 0x820000
+#define SVR_P5010 0x822100
+#define SVR_P5020 0x822000
+#define SVR_P5021 0X820500
+#define SVR_P5040 0x820400
+#define SVR_T4240 0x824000
+#define SVR_T4120 0x824001
+#define SVR_T4160 0x824100
+#define SVR_T4080 0x824102
+#define SVR_C291 0x850000
+#define SVR_C292 0x850020
+#define SVR_C293 0x850030
+#define SVR_B4860 0X868000
+#define SVR_G4860 0x868001
+#define SVR_G4060 0x868003
+#define SVR_B4440 0x868100
+#define SVR_G4440 0x868101
+#define SVR_B4420 0x868102
+#define SVR_B4220 0x868103
+#define SVR_T1040 0x852000
+#define SVR_T1041 0x852001
+#define SVR_T1042 0x852002
+#define SVR_T1020 0x852100
+#define SVR_T1021 0x852101
+#define SVR_T1022 0x852102
+#define SVR_T1023 0x854100
+#define SVR_T1024 0x854000
+#define SVR_T2080 0x853000
+#define SVR_T2081 0x853100
+
+#define SVR_8610 0x80A000
+#define SVR_8641 0x809000
+#define SVR_8641D 0x809001
+
+#define SVR_9130 0x860001
+#define SVR_9131 0x860000
+#define SVR_9132 0x861000
+#define SVR_9232 0x861400
+
+#define SVR_Unknown 0xFFFFFF
+
+#endif
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -99,7 +99,10 @@ struct fsl_usb2_platform_data {
unsigned suspended:1;
unsigned already_suspended:1;
unsigned has_fsl_erratum_a007792:1;
+ unsigned has_fsl_erratum_14:1;
unsigned has_fsl_erratum_a005275:1;
+ unsigned has_fsl_erratum_a006918:1;
+ unsigned has_fsl_erratum_a005697:1;
unsigned check_phy_clk_valid:1;
/* register save area for suspend/resume */
--- a/include/linux/netdev_features.h
+++ b/include/linux/netdev_features.h
@@ -74,6 +74,7 @@ enum {
NETIF_F_BUSY_POLL_BIT, /* Busy poll */
NETIF_F_HW_TC_BIT, /* Offload TC infrastructure */
+ NETIF_F_HW_ACCEL_MQ_BIT, /* Hardware-accelerated multiqueue */
/*
* Add your fresh new feature above and remember to update
@@ -136,6 +137,7 @@ enum {
#define NETIF_F_HW_L2FW_DOFFLOAD __NETIF_F(HW_L2FW_DOFFLOAD)
#define NETIF_F_BUSY_POLL __NETIF_F(BUSY_POLL)
#define NETIF_F_HW_TC __NETIF_F(HW_TC)
+#define NETIF_F_HW_ACCEL_MQ __NETIF_F(HW_ACCEL_MQ)
#define for_each_netdev_feature(mask_addr, bit) \
for_each_set_bit(bit, (unsigned long *)mask_addr, NETDEV_FEATURE_COUNT)
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1509,6 +1509,8 @@ enum netdev_priv_flags {
* @if_port: Selectable AUI, TP, ...
* @dma: DMA channel
* @mtu: Interface MTU value
+ * @min_mtu: Interface Minimum MTU value
+ * @max_mtu: Interface Maximum MTU value
* @type: Interface hardware type
* @hard_header_len: Maximum hardware header length.
* @min_header_len: Minimum hardware header length
@@ -1735,6 +1737,8 @@ struct net_device {
unsigned char dma;
unsigned int mtu;
+ unsigned int min_mtu;
+ unsigned int max_mtu;
unsigned short type;
unsigned short hard_header_len;
unsigned short min_header_len;
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -903,6 +903,7 @@ void kfree_skb(struct sk_buff *skb);
void kfree_skb_list(struct sk_buff *segs);
void skb_tx_error(struct sk_buff *skb);
void consume_skb(struct sk_buff *skb);
+void skb_recycle(struct sk_buff *skb);
void __kfree_skb(struct sk_buff *skb);
extern struct kmem_cache *skbuff_head_cache;
@@ -3057,6 +3058,7 @@ static inline void skb_free_datagram_loc
}
int skb_kill_datagram(struct sock *sk, struct sk_buff *skb, unsigned int flags);
int skb_copy_bits(const struct sk_buff *skb, int offset, void *to, int len);
+void copy_skb_header(struct sk_buff *new, const struct sk_buff *old);
int skb_store_bits(struct sk_buff *skb, int offset, const void *from, int len);
__wsum skb_copy_and_csum_bits(const struct sk_buff *skb, int offset, u8 *to,
int len, __wsum csum);
--- a/include/linux/sys_soc.h
+++ b/include/linux/sys_soc.h
@@ -13,6 +13,7 @@ struct soc_device_attribute {
const char *family;
const char *revision;
const char *soc_id;
+ const void *data;
};
/**
@@ -34,4 +35,6 @@ void soc_device_unregister(struct soc_de
*/
struct device *soc_device_to_device(struct soc_device *soc);
+const struct soc_device_attribute *soc_device_match(
+ const struct soc_device_attribute *matches);
#endif /* __SOC_BUS_H */
--- a/include/uapi/linux/if_ether.h
+++ b/include/uapi/linux/if_ether.h
@@ -35,6 +35,7 @@
#define ETH_DATA_LEN 1500 /* Max. octets in payload */
#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */
#define ETH_FCS_LEN 4 /* Octets in the FCS */
+#define ETH_MIN_MTU 68 /* Min IPv4 MTU per RFC791 */
/*
* These are the defined Ethernet Protocol ID's.
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -6603,9 +6603,18 @@ int dev_set_mtu(struct net_device *dev,
if (new_mtu == dev->mtu)
return 0;
- /* MTU must be positive. */
- if (new_mtu < 0)
+ /* MTU must be positive, and in range */
+ if (new_mtu < 0 || new_mtu < dev->min_mtu) {
+ net_err_ratelimited("%s: Invalid MTU %d requested, hw min %d\n",
+ dev->name, new_mtu, dev->min_mtu);
return -EINVAL;
+ }
+
+ if (dev->max_mtu > 0 && new_mtu > dev->max_mtu) {
+ net_err_ratelimited("%s: Invalid MTU %d requested, hw max %d\n",
+ dev->name, new_mtu, dev->min_mtu);
+ return -EINVAL;
+ }
if (!netif_device_present(dev))
return -ENODEV;
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -842,6 +842,32 @@ void napi_consume_skb(struct sk_buff *sk
}
EXPORT_SYMBOL(napi_consume_skb);
+/**
+ * skb_recycle - clean up an skb for reuse
+ * @skb: buffer
+ *
+ * Recycles the skb to be reused as a receive buffer. This
+ * function does any necessary reference count dropping, and
+ * cleans up the skbuff as if it just came from __alloc_skb().
+ */
+void skb_recycle(struct sk_buff *skb)
+{
+ struct skb_shared_info *shinfo;
+ u8 head_frag = skb->head_frag;
+
+ skb_release_head_state(skb);
+
+ shinfo = skb_shinfo(skb);
+ memset(shinfo, 0, offsetof(struct skb_shared_info, dataref));
+ atomic_set(&shinfo->dataref, 1);
+
+ memset(skb, 0, offsetof(struct sk_buff, tail));
+ skb->data = skb->head + NET_SKB_PAD;
+ skb->head_frag = head_frag;
+ skb_reset_tail_pointer(skb);
+}
+EXPORT_SYMBOL(skb_recycle);
+
/* Make sure a field is enclosed inside headers_start/headers_end section */
#define CHECK_SKB_FIELD(field) \
BUILD_BUG_ON(offsetof(struct sk_buff, field) < \
@@ -1073,7 +1099,7 @@ static void skb_headers_offset_update(st
skb->inner_mac_header += off;
}
-static void copy_skb_header(struct sk_buff *new, const struct sk_buff *old)
+void copy_skb_header(struct sk_buff *new, const struct sk_buff *old)
{
__copy_skb_header(new, old);
@@ -1081,6 +1107,7 @@ static void copy_skb_header(struct sk_bu
skb_shinfo(new)->gso_segs = skb_shinfo(old)->gso_segs;
skb_shinfo(new)->gso_type = skb_shinfo(old)->gso_type;
}
+EXPORT_SYMBOL(copy_skb_header);
static inline int skb_alloc_rx_flag(const struct sk_buff *skb)
{
--- a/net/sched/sch_generic.c
+++ b/net/sched/sch_generic.c
@@ -309,6 +309,13 @@ static void dev_watchdog(unsigned long a
txq->trans_timeout++;
break;
}
+
+ /* Devices with HW_ACCEL_MQ have multiple txqs
+ * but update only the first one's transmission
+ * timestamp so avoid checking the rest.
+ */
+ if (dev->features & NETIF_F_HW_ACCEL_MQ)
+ break;
}
if (some_queue_timedout) {

10
target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch
View File

@ -1,4 +1,4 @@
From 7edaf7ed8fbd5fb50950a4fc8067a9c14557d010 Mon Sep 17 00:00:00 2001
From 739029f49bd9181b821298f9d27b29ce2d292967 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 25 Sep 2017 10:03:52 +0800
Subject: [PATCH] arch: support layerscape
@ -34,8 +34,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
arch/arm64/include/asm/pgtable-prot.h | 1 +
arch/arm64/include/asm/pgtable.h | 5 +++
arch/arm64/kernel/pci.c | 62 +++++++++++++++++++++++++++++++++++
arch/arm64/mm/dma-mapping.c | 6 ++++
15 files changed, 197 insertions(+), 3 deletions(-)
arch/arm64/mm/dma-mapping.c | 23 ++++++++++---
15 files changed, 209 insertions(+), 8 deletions(-)
--- a/arch/arm/include/asm/delay.h
+++ b/arch/arm/include/asm/delay.h
@ -410,7 +410,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
static int swiotlb __ro_after_init;
@@ -918,6 +919,10 @@ static int __init __iommu_dma_init(void)
@@ -925,6 +926,10 @@ static int __init __iommu_dma_init(void)
if (!ret)
ret = register_iommu_dma_ops_notifier(&pci_bus_type);
#endif
@ -421,7 +421,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
return ret;
}
arch_initcall(__iommu_dma_init);
@@ -971,3 +976,4 @@ void arch_setup_dma_ops(struct device *d
@@ -978,3 +983,4 @@ void arch_setup_dma_ops(struct device *d
dev->archdata.dma_coherent = coherent;
__iommu_setup_dma_ops(dev, dma_base, size, iommu);
}

254
target/linux/layerscape/patches-4.9/302-dts-support-layercape.patch
View File

@ -1,4 +1,4 @@
From 2b2e3b9a0d2abf276b40843f75d97b623e4ee109 Mon Sep 17 00:00:00 2001
From bfa4a794f91162cfeccfa4d59121cde9a84e32a3 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 25 Sep 2017 10:02:10 +0800
Subject: [PATCH] dts: support layercape
@ -45,10 +45,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 16 +
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 134 +++
arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 155 ++++
arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 91 +++
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 517 ++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 177 ++++
arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 198 +++++
arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 134 +++
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 594 ++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 45 +
.../boot/dts/freescale/fsl-ls1043a-qds-sdk.dts | 69 ++
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 171 +++-
@ -65,7 +65,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 793 ++++++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 173 ++++
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 236 ++++++
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 816 ++++++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 818 ++++++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 191 ++---
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 169 ++--
arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 9 +-
@ -76,7 +76,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 195 +++++
arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 198 +++++
arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 161 ++++
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 910 +++++++++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 912 +++++++++++++++++++++
.../boot/dts/freescale/qoriq-bman1-portals.dtsi | 81 ++
arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi | 66 ++
.../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi | 43 +
@ -93,7 +93,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi | 10 +
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 4 +-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 4 +-
66 files changed, 7778 insertions(+), 1021 deletions(-)
66 files changed, 7988 insertions(+), 1021 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
@ -484,7 +484,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
};
+ ftm0: ftm0@29d0000 {
+ compatible = "fsl,ftm-alarm";
+ compatible = "fsl,ls1021a-ftm";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x1ee2140 0x0 0x4>;
+ reg-names = "ftm", "FlexTimer1";
@ -740,7 +740,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
subdir-y := $(dts-dirs)
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
@@ -0,0 +1,134 @@
@@ -0,0 +1,177 @@
+/*
+ * Device Tree file for Freescale LS1012A Freedom Board.
+ *
@ -792,6 +792,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ model = "LS1012A Freedom Board";
+ compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
+
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+
+ sys_mclk: clock-mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
@ -868,6 +873,44 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ };
+};
+
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
+&sai2 {
+ status = "okay";
+};
@ -877,7 +920,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
@@ -0,0 +1,155 @@
@@ -0,0 +1,198 @@
+/*
+ * Device Tree file for Freescale LS1012A QDS Board.
+ *
@ -929,6 +972,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ model = "LS1012A QDS Board";
+ compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
+
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+
+ sys_mclk: clock-mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
@ -1018,6 +1066,44 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ };
+};
+
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x2>;
+ phy-mode = "sgmii-2500";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x3>;
+ phy-mode = "sgmii-2500";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
+
+&sai2 {
+ status = "okay";
+};
@ -1035,7 +1121,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
@@ -0,0 +1,91 @@
@@ -0,0 +1,134 @@
+/*
+ * Device Tree file for Freescale LS1012A RDB Board.
+ *
@ -1086,6 +1172,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+/ {
+ model = "LS1012A RDB Board";
+ compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
+
+ aliases {
+ ethernet0 = &pfe_mac0;
+ ethernet1 = &pfe_mac1;
+ };
+};
+
+&duart0 {
@ -1127,9 +1218,47 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&pfe {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x1>; /* enabled/disabled */
+ };
+ };
+
+ ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */
+ fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "rgmii-txid";
+ fsl,pfe-phy-if-flags = <0x0>;
+
+ mdio@0 {
+ reg = <0x0>; /* enabled/disabled */
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -0,0 +1,517 @@
@@ -0,0 +1,594 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1012A family SoC.
+ *
@ -1322,6 +1451,12 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ caam-dma {
+ compatible = "fsl,sec-v5.4-dma",
+ "fsl,sec-v5.0-dma",
+ "fsl,sec-v4.0-dma";
+ };
+
+ rtic@60000 {
+ compatible = "fsl,sec-v5.4-rtic",
+ "fsl,sec-v5.0-rtic",
@ -1485,8 +1620,14 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ status = "disabled";
+ };
+
+ rcpm: rcpm@1ee2000 {
+ compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
+ reg = <0x0 0x1ee2000 0x0 0x1000>;
+ fsl,#rcpm-wakeup-cells = <1>;
+ };
+
+ ftm0: ftm0@29d0000 {
+ compatible = "fsl,ftm-alarm";
+ compatible = "fsl,ls1012a-ftm";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x1ee2140 0x0 0x4>;
+ reg-names = "ftm", "FlexTimer1";
@ -1645,6 +1786,71 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ dma-coherent;
+ status = "disabled";
+ };
+
+ msi: msi-controller1@1572000 {
+ compatible = "fsl,ls1012a-msi";
+ reg = <0x0 0x1572000 0x0 0x8>;
+ msi-controller;
+ interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pcie@3400000 {
+ compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
+ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
+ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <0 118 0x4>, /* AER interrupt */
+ <0 117 0x4>; /* PME interrupt */
+ interrupt-names = "aer", "pme";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <4>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&msi>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ pfe_reserved: packetbuffer@83400000 {
+ reg = <0 0x83400000 0 0xc00000>;
+ };
+ };
+
+ pfe: pfe@04000000 {
+ compatible = "fsl,pfe";
+ reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
+ <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
+ reg-names = "pfe", "pfe-ddr";
+ fsl,pfe-num-interfaces = <0x2>;
+ interrupts = <0 172 0x4>, /* HIF interrupt */
+ <0 173 0x4>, /*HIF_NOCPY interrupt */
+ <0 174 0x4>; /* WoL interrupt */
+ interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
+ memory-region = <&pfe_reserved>;
+ fsl,pfe-scfg = <&scfg 0>;
+ fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "pfe";
+
+ status = "okay";
+ pfe_mac0: ethernet@0 {
+ };
+
+ pfe_mac1: ethernet@1 {
+ };
+ };
+};
--- /dev/null
@ -2646,7 +2852,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
};
+ ftm0: ftm0@29d0000 {
+ compatible = "fsl,ftm-alarm";
+ compatible = "fsl,ls1043a-ftm";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x1ee2140 0x0 0x4>;
+ reg-names = "ftm", "FlexTimer1";
@ -4326,7 +4532,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ };
+
+ ftm0: ftm0@29d0000 {
+ compatible = "fsl,ftm-alarm";
+ compatible = "fsl,ls1046a-ftm";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x1ee2140 0x0 0x4>;
+ reg-names = "ftm", "FlexTimer1";
@ -4962,7 +5168,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -0,0 +1,816 @@
@@ -0,0 +1,818 @@
+/*
+ * Device Tree Include file for NXP Layerscape-1088A family SoC.
+ *
@ -5475,9 +5681,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ };
+
+ ftm0: ftm0@2800000 {
+ compatible = "fsl,ftm-alarm";
+ reg = <0x0 0x2800000 0x0 0x10000>;
+ compatible = "fsl,ls1088a-ftm";
+ reg = <0x0 0x2800000 0x0 0x10000>,
+ <0x0 0x1e34050 0x0 0x4>;
+ interrupts = <0 44 4>;
+ reg-names = "ftm", "FlexTimer1";
+ };
+
+ i2c0: i2c@2000000 {
@ -8124,7 +8332,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -0,0 +1,910 @@
@@ -0,0 +1,912 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-2080A family SoC.
+ *
@ -9015,9 +9223,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ };
+
+ ftm0: ftm0@2800000 {
+ compatible = "fsl,ftm-alarm";
+ reg = <0x0 0x2800000 0x0 0x10000>;
+ compatible = "fsl,ls208xa-ftm";
+ reg = <0x0 0x2800000 0x0 0x10000>,
+ <0x0 0x1e34050 0x0 0x4>;
+ interrupts = <0 44 4>;
+ reg-names = "ftm", "FlexTimer1";
+ };
+ };
+

23
target/linux/layerscape/patches-4.9/303-arm-imx-select-ARCH_DMA_ADDR_T_64BIT-for-LPAE.patch Normal file
View File

@ -0,0 +1,23 @@
From c079739fa1101dcf7a1e40a195e019065e327d15 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Fri, 20 Oct 2017 16:45:17 +0800
Subject: [PATCH] arm: imx: select ARCH_DMA_ADDR_T_64BIT for LPAE
Selected ARCH_DMA_ADDR_T_64BIT for LPAE since
hardware could support it.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
arch/arm/mach-imx/Kconfig | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,6 +1,7 @@
menuconfig ARCH_MXC
bool "Freescale i.MX family"
depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M
+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_IMX_GPT
select GENERIC_IRQ_CHIP

110
target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch
View File

@ -1,4 +1,4 @@
From 120fa458ffe2250ea58578ccfc85e674005463dc Mon Sep 17 00:00:00 2001
From a3757157751a8a5302ee5e11faf828dc5db02018 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 25 Sep 2017 10:53:50 +0800
Subject: [PATCH] mtd: spi-nor: support layerscape
@ -18,10 +18,10 @@ Signed-off-by: Ash Benz <ash.benz@bk.ru>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
drivers/mtd/mtdchar.c | 2 +-
drivers/mtd/spi-nor/fsl-quadspi.c | 356 +++++++++++++++++++++++++++++++-------
drivers/mtd/spi-nor/spi-nor.c | 136 +++++++++++++--
drivers/mtd/spi-nor/fsl-quadspi.c | 327 +++++++++++++++++++++++++++++++-------
drivers/mtd/spi-nor/spi-nor.c | 136 ++++++++++++++--
include/linux/mtd/spi-nor.h | 14 +-
4 files changed, 432 insertions(+), 76 deletions(-)
4 files changed, 409 insertions(+), 70 deletions(-)
--- a/drivers/mtd/mtdchar.c
+++ b/drivers/mtd/mtdchar.c
@ -209,13 +209,15 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
fsl_qspi_unlock_lut(q);
@@ -382,25 +449,51 @@ static void fsl_qspi_init_lut(struct fsl
@@ -382,24 +449,50 @@ static void fsl_qspi_init_lut(struct fsl
for (i = 0; i < QUADSPI_LUT_NUM; i++)
qspi_writel(q, 0, base + QUADSPI_LUT_BASE + i * 4);
- /* Quad Read */
- lut_base = SEQID_QUAD_READ * 4;
-
+ /* Read */
+ lut_base = SEQID_READ * 4;
- if (q->nor_size <= SZ_16M) {
- cmd = SPINOR_OP_READ_1_1_4;
- addrlen = ADDR24BIT;
@ -226,9 +228,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
- addrlen = ADDR32BIT;
- dummy = 8;
- }
+ /* Read */
+ lut_base = SEQID_READ * 4;
-
- qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
+ if (nor->flash_read == SPI_NOR_FAST) {
+ qspi_writel(q, LUT0(CMD, PAD1, read_op) |
@ -242,10 +242,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ read_op = 0xEC;
+ qspi_writel(q,
+ LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD4, addrlen),
+ base + QUADSPI_LUT(lut_base));
base + QUADSPI_LUT(lut_base));
- qspi_writel(q, LUT0(DUMMY, PAD1, dummy) | LUT1(FSL_READ, PAD4, rxfifo),
+ qspi_writel(q,
+ LUT0(MODE, PAD4, 0xff) | LUT1(DUMMY, PAD4, read_dm),
+ base + QUADSPI_LUT(lut_base + 1));
base + QUADSPI_LUT(lut_base + 1));
+ qspi_writel(q,
+ LUT0(FSL_READ, PAD4, rxfifo),
+ base + QUADSPI_LUT(lut_base + 2));
@ -261,21 +262,19 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ /* read mode : 1-4-4, such as Spansion s25fl128s. */
+ qspi_writel(q, LUT0(CMD, PAD1, read_op)
+ | LUT1(ADDR_DDR, PAD4, addrlen),
base + QUADSPI_LUT(lut_base));
- qspi_writel(q, LUT0(DUMMY, PAD1, dummy) | LUT1(FSL_READ, PAD4, rxfifo),
+ base + QUADSPI_LUT(lut_base));
+
+ qspi_writel(q, LUT0(MODE_DDR, PAD4, 0xff)
+ | LUT1(DUMMY, PAD1, read_dm),
base + QUADSPI_LUT(lut_base + 1));
+ base + QUADSPI_LUT(lut_base + 1));
+
+ qspi_writel(q, LUT0(FSL_READ_DDR, PAD4, rxfifo)
+ | LUT1(JMP_ON_CS, PAD1, 0),
+ base + QUADSPI_LUT(lut_base + 2));
+ }
+
/* Write enable */
lut_base = SEQID_WREN * 4;
qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_WREN),
@@ -409,16 +502,8 @@ static void fsl_qspi_init_lut(struct fsl
/* Page Program */
lut_base = SEQID_PP * 4;
@ -501,50 +500,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
}
/*
@@ -681,19 +860,36 @@ static void fsl_qspi_init_abh_read(struc
{
void __iomem *base = q->iobase;
int seqid;
+ const struct fsl_qspi_devtype_data *devtype_data = q->devtype_data;
/* AHB configuration for access buffer 0/1/2 .*/
qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF0CR);
qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF1CR);
qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF2CR);
+
/*
- * Set ADATSZ with the maximum AHB buffer size to improve the
- * read performance.
+ * Errata: A-009282: QuadSPI data prefetch may result in incorrect data
+ * Workaround: Keep the read data size to 64 bits (8 bytes).
+ * This disables the prefetch on the AHB buffer and
+ * prevents this issue from occurring.
*/
- qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
- ((q->devtype_data->ahb_buf_size / 8)
- << QUADSPI_BUF3CR_ADATSZ_SHIFT),
- base + QUADSPI_BUF3CR);
+ if (devtype_data->devtype == FSL_QUADSPI_LS2080A ||
+ devtype_data->devtype == FSL_QUADSPI_LS1021A) {
+
+ qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
+ (1 << QUADSPI_BUF3CR_ADATSZ_SHIFT),
+ base + QUADSPI_BUF3CR);
+
+ } else {
+ /*
+ * Set ADATSZ with the maximum AHB buffer size to improve the
+ * read performance.
+ */
+ qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
+ ((q->devtype_data->ahb_buf_size / 8)
+ << QUADSPI_BUF3CR_ADATSZ_SHIFT),
+ base + QUADSPI_BUF3CR);
+ }
/* We only use the buffer3 */
qspi_writel(q, 0, base + QUADSPI_BUF0IND);
@@ -704,6 +900,11 @@ static void fsl_qspi_init_abh_read(struc
@@ -704,6 +883,11 @@ static void fsl_qspi_init_abh_read(struc
seqid = fsl_qspi_get_seqid(q, q->nor[0].read_opcode);
qspi_writel(q, seqid << QUADSPI_BFGENCR_SEQID_SHIFT,
q->iobase + QUADSPI_BFGENCR);
@ -556,7 +512,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
}
/* This function was used to prepare and enable QSPI clock */
@@ -822,6 +1023,7 @@ static const struct of_device_id fsl_qsp
@@ -822,6 +1006,7 @@ static const struct of_device_id fsl_qsp
{ .compatible = "fsl,imx7d-qspi", .data = (void *)&imx7d_data, },
{ .compatible = "fsl,imx6ul-qspi", .data = (void *)&imx6ul_data, },
{ .compatible = "fsl,ls1021a-qspi", .data = (void *)&ls1021a_data, },
@ -564,21 +520,21 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, fsl_qspi_dt_ids);
@@ -835,8 +1037,12 @@ static int fsl_qspi_read_reg(struct spi_
@@ -835,8 +1020,12 @@ static int fsl_qspi_read_reg(struct spi_
{
int ret;
struct fsl_qspi *q = nor->priv;
+ u32 to = 0;
+
+ if (opcode == SPINOR_OP_SPANSION_RDAR)
+ u8tou32(&to, nor->cmd_buf, 4);
- ret = fsl_qspi_runcmd(q, opcode, 0, len);
+ if (opcode == SPINOR_OP_SPANSION_RDAR)
+ u8tou32(&to, nor->cmd_buf, 4);
+
+ ret = fsl_qspi_runcmd(q, opcode, to, len);
if (ret)
return ret;
@@ -848,9 +1054,13 @@ static int fsl_qspi_write_reg(struct spi
@@ -848,9 +1037,13 @@ static int fsl_qspi_write_reg(struct spi
{
struct fsl_qspi *q = nor->priv;
int ret;
@ -593,7 +549,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
if (ret)
return ret;
@@ -859,7 +1069,7 @@ static int fsl_qspi_write_reg(struct spi
@@ -859,7 +1052,7 @@ static int fsl_qspi_write_reg(struct spi
} else if (len > 0) {
ret = fsl_qspi_nor_write(q, nor, opcode, 0,
@ -602,7 +558,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
if (ret > 0)
return 0;
} else {
@@ -875,7 +1085,7 @@ static ssize_t fsl_qspi_write(struct spi
@@ -875,7 +1068,7 @@ static ssize_t fsl_qspi_write(struct spi
{
struct fsl_qspi *q = nor->priv;
ssize_t ret = fsl_qspi_nor_write(q, nor, nor->program_opcode, to,
@ -611,7 +567,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
/* invalid the data in the AHB buffer. */
fsl_qspi_invalid(q);
@@ -922,7 +1132,7 @@ static ssize_t fsl_qspi_read(struct spi_
@@ -922,7 +1115,7 @@ static ssize_t fsl_qspi_read(struct spi_
len);
/* Read out the data directly from the AHB buffer.*/
@ -620,7 +576,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
len);
return len;
@@ -980,6 +1190,8 @@ static int fsl_qspi_probe(struct platfor
@@ -980,6 +1173,8 @@ static int fsl_qspi_probe(struct platfor
struct spi_nor *nor;
struct mtd_info *mtd;
int ret, i = 0;
@ -629,7 +585,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL);
if (!q)
@@ -1027,6 +1239,12 @@ static int fsl_qspi_probe(struct platfor
@@ -1027,6 +1222,12 @@ static int fsl_qspi_probe(struct platfor
goto clk_failed;
}
@ -642,7 +598,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
/* find the irq */
ret = platform_get_irq(pdev, 0);
if (ret < 0) {
@@ -1050,6 +1268,7 @@ static int fsl_qspi_probe(struct platfor
@@ -1050,6 +1251,7 @@ static int fsl_qspi_probe(struct platfor
mutex_init(&q->lock);
@ -650,7 +606,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
/* iterate the subnodes. */
for_each_available_child_of_node(dev->of_node, np) {
/* skip the holes */
@@ -1076,18 +1295,25 @@ static int fsl_qspi_probe(struct platfor
@@ -1076,18 +1278,25 @@ static int fsl_qspi_probe(struct platfor
ret = of_property_read_u32(np, "spi-max-frequency",
&q->clk_rate);
if (ret < 0)
@ -680,7 +636,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
/* Set the correct NOR size now. */
if (q->nor_size == 0) {
@@ -1110,8 +1336,12 @@ static int fsl_qspi_probe(struct platfor
@@ -1110,8 +1319,12 @@ static int fsl_qspi_probe(struct platfor
nor->page_size = q->devtype_data->txfifo;
i++;
@ -935,7 +891,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
/* prefer "small sector" erase if possible */
@@ -1676,9 +1783,15 @@ int spi_nor_scan(struct spi_nor *nor, co
@@ -1678,9 +1785,15 @@ int spi_nor_scan(struct spi_nor *nor, co
/* Some devices cannot do fast-read, no matter what DT tells us */
if (info->flags & SPI_NOR_NO_FR)
nor->flash_read = SPI_NOR_NORMAL;
@ -954,7 +910,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
ret = set_quad_mode(nor, info);
if (ret) {
dev_err(dev, "quad mode not supported\n");
@@ -1691,6 +1804,9 @@ int spi_nor_scan(struct spi_nor *nor, co
@@ -1693,6 +1806,9 @@ int spi_nor_scan(struct spi_nor *nor, co
/* Default commands */
switch (nor->flash_read) {

2365
target/linux/layerscape/patches-4.9/601-net-support-layerscape.patch
View File

File diff suppressed because it is too large Load Diff

334
target/linux/layerscape/patches-4.9/701-sdk_dpaa-support-layerscape.patch
View File

@ -1,4 +1,4 @@
From 6fe4518adbbbab0404958db4aa95673d60174881 Mon Sep 17 00:00:00 2001
From 3cd36deb674720ab34eabb9783648ed743e52121 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 25 Sep 2017 11:58:03 +0800
Subject: [PATCH] sdk_dpaa: support layerscape
@ -18,15 +18,15 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
.../net/ethernet/freescale/sdk_dpaa/dpaa_debugfs.c | 180 +
.../net/ethernet/freescale/sdk_dpaa/dpaa_debugfs.h | 43 +
drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.c | 1213 ++++
drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.h | 698 ++
drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.h | 687 ++
.../ethernet/freescale/sdk_dpaa/dpaa_eth_base.c | 205 +
.../ethernet/freescale/sdk_dpaa/dpaa_eth_base.h | 49 +
.../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c | 1992 +++++
.../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.h | 237 +
.../ethernet/freescale/sdk_dpaa/dpaa_eth_common.c | 1811 +++++
.../ethernet/freescale/sdk_dpaa/dpaa_eth_common.c | 1820 +++++
.../ethernet/freescale/sdk_dpaa/dpaa_eth_common.h | 225 +
.../ethernet/freescale/sdk_dpaa/dpaa_eth_proxy.c | 381 +
.../net/ethernet/freescale/sdk_dpaa/dpaa_eth_sg.c | 1179 +++
.../net/ethernet/freescale/sdk_dpaa/dpaa_eth_sg.c | 1168 +++
.../ethernet/freescale/sdk_dpaa/dpaa_eth_sysfs.c | 278 +
.../ethernet/freescale/sdk_dpaa/dpaa_eth_trace.h | 144 +
.../net/ethernet/freescale/sdk_dpaa/dpaa_ethtool.c | 544 ++
@ -41,24 +41,24 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
.../freescale/sdk_fman/Peripherals/FM/HC/Makefile | 15 +
.../freescale/sdk_fman/Peripherals/FM/HC/hc.c | 1232 ++++
.../freescale/sdk_fman/Peripherals/FM/MAC/Makefile | 28 +
.../freescale/sdk_fman/Peripherals/FM/MAC/dtsec.c | 1464 ++++
.../freescale/sdk_fman/Peripherals/FM/MAC/dtsec.c | 1465 ++++
.../freescale/sdk_fman/Peripherals/FM/MAC/dtsec.h | 228 +
.../sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.c | 97 +
.../sdk_fman/Peripherals/FM/MAC/dtsec_mii_acc.h | 42 +
.../freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.c | 658 ++
.../freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.h | 225 +
.../freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.c | 674 ++
.../freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.h | 226 +
.../sdk_fman/Peripherals/FM/MAC/fman_crc32.c | 119 +
.../sdk_fman/Peripherals/FM/MAC/fman_crc32.h | 43 +
.../sdk_fman/Peripherals/FM/MAC/fman_dtsec.c | 845 +++
.../Peripherals/FM/MAC/fman_dtsec_mii_acc.c | 163 +
.../sdk_fman/Peripherals/FM/MAC/fman_memac.c | 511 ++
.../sdk_fman/Peripherals/FM/MAC/fman_memac.c | 532 ++
.../Peripherals/FM/MAC/fman_memac_mii_acc.c | 213 +
.../sdk_fman/Peripherals/FM/MAC/fman_tgec.c | 367 +
.../freescale/sdk_fman/Peripherals/FM/MAC/memac.c | 1096 +++
.../freescale/sdk_fman/Peripherals/FM/MAC/memac.c | 1153 +++
.../freescale/sdk_fman/Peripherals/FM/MAC/memac.h | 110 +
.../sdk_fman/Peripherals/FM/MAC/memac_mii_acc.c | 78 +
.../sdk_fman/Peripherals/FM/MAC/memac_mii_acc.h | 73 +
.../freescale/sdk_fman/Peripherals/FM/MAC/tgec.c | 975 +++
.../freescale/sdk_fman/Peripherals/FM/MAC/tgec.c | 1017 +++
.../freescale/sdk_fman/Peripherals/FM/MAC/tgec.h | 151 +
.../sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.c | 139 +
.../sdk_fman/Peripherals/FM/MAC/tgec_mii_acc.h | 80 +
@ -124,7 +124,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
.../sdk_fman/inc/Peripherals/crc_mac_addr_ext.h | 364 +
.../freescale/sdk_fman/inc/Peripherals/dpaa_ext.h | 210 +
.../freescale/sdk_fman/inc/Peripherals/fm_ext.h | 1731 +++++
.../sdk_fman/inc/Peripherals/fm_mac_ext.h | 859 +++
.../sdk_fman/inc/Peripherals/fm_mac_ext.h | 887 +++
.../sdk_fman/inc/Peripherals/fm_macsec_ext.h | 1271 ++++
.../sdk_fman/inc/Peripherals/fm_muram_ext.h | 170 +
.../sdk_fman/inc/Peripherals/fm_pcd_ext.h | 3974 ++++++++++
@ -154,7 +154,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
.../freescale/sdk_fman/inc/flib/fsl_fman_dtsec.h | 1096 +++
.../sdk_fman/inc/flib/fsl_fman_dtsec_mii_acc.h | 107 +
.../freescale/sdk_fman/inc/flib/fsl_fman_kg.h | 514 ++
.../freescale/sdk_fman/inc/flib/fsl_fman_memac.h | 427 ++
.../freescale/sdk_fman/inc/flib/fsl_fman_memac.h | 434 ++
.../sdk_fman/inc/flib/fsl_fman_memac_mii_acc.h | 78 +
.../freescale/sdk_fman/inc/flib/fsl_fman_port.h | 593 ++
.../freescale/sdk_fman/inc/flib/fsl_fman_prs.h | 102 +
@ -195,7 +195,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
.../freescale/sdk_fman/src/inc/system/sys_io_ext.h | 46 +
.../freescale/sdk_fman/src/inc/types_linux.h | 208 +
.../sdk_fman/src/inc/wrapper/fsl_fman_test.h | 84 +
.../sdk_fman/src/inc/wrapper/lnxwrp_exp_sym.h | 128 +
.../sdk_fman/src/inc/wrapper/lnxwrp_exp_sym.h | 130 +
.../sdk_fman/src/inc/wrapper/lnxwrp_fm_ext.h | 163 +
.../sdk_fman/src/inc/wrapper/lnxwrp_fsl_fman.h | 921 +++
.../ethernet/freescale/sdk_fman/src/inc/xx/xx.h | 50 +
@ -206,7 +206,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
.../freescale/sdk_fman/src/wrapper/lnxwrp_fm.c | 2908 ++++++++
.../freescale/sdk_fman/src/wrapper/lnxwrp_fm.h | 294 +
.../sdk_fman/src/wrapper/lnxwrp_fm_port.c | 1480 ++++
.../sdk_fman/src/wrapper/lnxwrp_ioctls_fm.c | 4813 +++++++++++++
.../sdk_fman/src/wrapper/lnxwrp_ioctls_fm.c | 4854 +++++++++++++
.../sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c | 1297 ++++
.../sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.h | 755 ++
.../sdk_fman/src/wrapper/lnxwrp_resources.h | 121 +
@ -262,13 +262,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
include/uapi/linux/fmd/Peripherals/Kbuild | 4 +
include/uapi/linux/fmd/Peripherals/fm_ioctls.h | 628 ++
include/uapi/linux/fmd/Peripherals/fm_pcd_ioctls.h | 3084 ++++++++
.../uapi/linux/fmd/Peripherals/fm_port_ioctls.h | 948 +++
.../uapi/linux/fmd/Peripherals/fm_port_ioctls.h | 973 +++
.../uapi/linux/fmd/Peripherals/fm_test_ioctls.h | 208 +
include/uapi/linux/fmd/integrations/Kbuild | 1 +
.../linux/fmd/integrations/integration_ioctls.h | 56 +
include/uapi/linux/fmd/ioctls.h | 96 +
include/uapi/linux/fmd/net_ioctls.h | 430 ++
257 files changed, 152931 insertions(+)
257 files changed, 153159 insertions(+)
create mode 100644 drivers/net/ethernet/freescale/sdk_dpaa/Kconfig
create mode 100644 drivers/net/ethernet/freescale/sdk_dpaa/Makefile
create mode 100644 drivers/net/ethernet/freescale/sdk_dpaa/dpaa_1588.c
@ -2923,7 +2923,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+module_exit(dpa_unload);
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.h
@@ -0,0 +1,698 @@
@@ -0,0 +1,687 @@
+/* Copyright 2008-2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
@ -3440,17 +3440,6 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ return fd->offset;
+}
+
+/* Verifies if the skb length is below the interface MTU */
+static inline int dpa_check_rx_mtu(struct sk_buff *skb, int mtu)
+{
+ if (unlikely(skb->len > mtu))
+ if ((skb->protocol != htons(ETH_P_8021Q))
+ || (skb->len > mtu + 4))
+ return -1;
+
+ return 0;
+}
+
+static inline uint16_t dpa_get_headroom(struct dpa_buffer_layout_s *bl)
+{
+ uint16_t headroom;
@ -6119,7 +6108,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+#endif
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c
@@ -0,0 +1,1811 @@
@@ -0,0 +1,1820 @@
+/* Copyright 2008-2013 Freescale Semiconductor, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
@ -6385,7 +6374,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+int dpa_change_mtu(struct net_device *net_dev, int new_mtu)
+{
+ const int max_mtu = dpa_get_max_mtu();
+ int max_mtu = dpa_get_max_mtu();
+
+#ifndef CONFIG_PPC
+ /* Due to the A010022 FMan errata, we can not use contig frames larger
+ * than 4K, nor S/G frames. We need to prevent the user from setting a
+ * large MTU.
+ */
+ if (unlikely(dpaa_errata_a010022))
+ max_mtu = DPA_BP_RAW_SIZE;
+#endif
+
+ /* Make sure we don't exceed the Ethernet controller's MAXFRM */
+ if (new_mtu < 68 || new_mtu > max_mtu) {
@ -8545,7 +8543,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+module_exit(dpa_proxy_unload);
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_sg.c
@@ -0,0 +1,1179 @@
@@ -0,0 +1,1168 @@
+/* Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
@ -9164,13 +9162,6 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ (*count_ptr)--;
+ skb->protocol = eth_type_trans(skb, net_dev);
+
+ /* IP Reassembled frames are allowed to be larger than MTU */
+ if (unlikely(dpa_check_rx_mtu(skb, net_dev->mtu) &&
+ !(fd_status & FM_FD_IPR))) {
+ percpu_stats->rx_dropped++;
+ goto drop_bad_frame;
+ }
+
+ skb_len = skb->len;
+
+#ifdef CONFIG_FSL_DPAA_DBG_LOOP
@ -9203,10 +9194,6 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+packet_dropped:
+ return;
+
+drop_bad_frame:
+ dev_kfree_skb(skb);
+ return;
+
+_release_frame:
+ dpa_fd_release(net_dev, fd);
+}
@ -14903,7 +14890,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/dtsec.c
@@ -0,0 +1,1464 @@
@@ -0,0 +1,1465 @@
+/*
+ * Copyright 2008-2013 Freescale Semiconductor Inc.
+ *
@ -16295,6 +16282,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+ p_FmMacControllerDriver->f_FM_MAC_ResetCounters = DtsecResetCounters;
+ p_FmMacControllerDriver->f_FM_MAC_GetStatistics = DtsecGetStatistics;
+ p_FmMacControllerDriver->f_FM_MAC_GetFrameSizeCounters = NULL;
+
+ p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr = DtsecModifyMacAddress;
+ p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr = DtsecAddHashMacAddress;
@ -16746,7 +16734,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+#endif /* __DTSEC_MII_ACC_H */
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.c
@@ -0,0 +1,658 @@
@@ -0,0 +1,674 @@
+/*
+ * Copyright 2008-2012 Freescale Semiconductor Inc.
+ *
@ -17210,6 +17198,22 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+/* ......................................................................... */
+
+t_Error FM_MAC_GetFrameSizeCounters(t_Handle h_FmMac, t_FmMacFrameSizeCounters *p_FrameSizeCounters, e_CommMode type)
+{
+ t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
+
+ SANITY_CHECK_RETURN_ERROR(p_FmMacControllerDriver, E_INVALID_HANDLE);
+
+ memset(p_FrameSizeCounters, 0, sizeof(t_FmMacFrameSizeCounters));
+
+ if (p_FmMacControllerDriver->f_FM_MAC_GetFrameSizeCounters)
+ return p_FmMacControllerDriver->f_FM_MAC_GetFrameSizeCounters(h_FmMac, p_FrameSizeCounters, type);
+
+ RETURN_ERROR(MINOR, E_NOT_SUPPORTED, NO_MSG);
+}
+
+/* ......................................................................... */
+
+t_Error FM_MAC_ModifyMacAddr (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr)
+{
+ t_FmMacControllerDriver *p_FmMacControllerDriver = (t_FmMacControllerDriver *)h_FmMac;
@ -17407,7 +17411,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+#endif /* (defined(DEBUG_ERRORS) && ... */
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fm_mac.h
@@ -0,0 +1,225 @@
@@ -0,0 +1,226 @@
+/*
+ * Copyright 2008-2012 Freescale Semiconductor Inc.
+ *
@ -17516,6 +17520,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+ t_Error (*f_FM_MAC_ResetCounters) (t_Handle h_FmMac);
+ t_Error (*f_FM_MAC_GetStatistics) (t_Handle h_FmMac, t_FmMacStatistics *p_Statistics);
+ t_Error (*f_FM_MAC_GetFrameSizeCounters) (t_Handle h_FmMac, t_FmMacFrameSizeCounters *p_FrameSizeCounters, e_CommMode type);
+
+ t_Error (*f_FM_MAC_ModifyMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
+ t_Error (*f_FM_MAC_AddHashMacAddr) (t_Handle h_FmMac, t_EnetAddr *p_EnetAddr);
@ -18817,7 +18822,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/fman_memac.c
@@ -0,0 +1,511 @@
@@ -0,0 +1,532 @@
+/*
+ * Copyright 2008-2012 Freescale Semiconductor Inc.
+ *
@ -19180,24 +19185,45 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ case E_MEMAC_COUNTER_R64:
+ ret_val = GET_MEMAC_CNTR_64(r64);
+ break;
+ case E_MEMAC_COUNTER_T64:
+ ret_val = GET_MEMAC_CNTR_64(t64);
+ break;
+ case E_MEMAC_COUNTER_R127:
+ ret_val = GET_MEMAC_CNTR_64(r127);
+ break;
+ case E_MEMAC_COUNTER_T127:
+ ret_val = GET_MEMAC_CNTR_64(t127);
+ break;
+ case E_MEMAC_COUNTER_R255:
+ ret_val = GET_MEMAC_CNTR_64(r255);
+ break;
+ case E_MEMAC_COUNTER_T255:
+ ret_val = GET_MEMAC_CNTR_64(t255);
+ break;
+ case E_MEMAC_COUNTER_R511:
+ ret_val = GET_MEMAC_CNTR_64(r511);
+ break;
+ case E_MEMAC_COUNTER_T511:
+ ret_val = GET_MEMAC_CNTR_64(t511);
+ break;
+ case E_MEMAC_COUNTER_R1023:
+ ret_val = GET_MEMAC_CNTR_64(r1023);
+ break;
+ case E_MEMAC_COUNTER_T1023:
+ ret_val = GET_MEMAC_CNTR_64(t1023);
+ break;
+ case E_MEMAC_COUNTER_R1518:
+ ret_val = GET_MEMAC_CNTR_64(r1518);
+ break;
+ case E_MEMAC_COUNTER_T1518:
+ ret_val = GET_MEMAC_CNTR_64(t1518);
+ break;
+ case E_MEMAC_COUNTER_R1519X:
+ ret_val = GET_MEMAC_CNTR_64(r1519x);
+ break;
+ case E_MEMAC_COUNTER_T1519X:
+ ret_val = GET_MEMAC_CNTR_64(t1519x);
+ break;
+ case E_MEMAC_COUNTER_RFRG:
+ ret_val = GET_MEMAC_CNTR_64(rfrg);
+ break;
@ -19917,7 +19943,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+}
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/memac.c
@@ -0,0 +1,1096 @@
@@ -0,0 +1,1153 @@
+/*
+ * Copyright 2008-2012 Freescale Semiconductor Inc.
+ *
@ -20513,6 +20539,62 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+/* ......................................................................... */
+
+static t_Error MemacGetFrameSizeCounters(t_Handle h_Memac, t_FmMacFrameSizeCounters *p_FrameSizeCounters, e_CommMode type)
+{
+ t_Memac *p_Memac = (t_Memac *)h_Memac;
+
+ SANITY_CHECK_RETURN_ERROR(p_Memac, E_NULL_POINTER);
+ SANITY_CHECK_RETURN_ERROR(!p_Memac->p_MemacDriverParam, E_INVALID_STATE);
+ SANITY_CHECK_RETURN_ERROR(p_FrameSizeCounters, E_NULL_POINTER);
+
+ switch (type)
+ {
+ case e_COMM_MODE_NONE:
+ break;
+
+ case e_COMM_MODE_RX:
+ p_FrameSizeCounters->count_pkts_64 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R64);
+ p_FrameSizeCounters->count_pkts_65_to_127 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R127);
+ p_FrameSizeCounters->count_pkts_128_to_255 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R255);
+ p_FrameSizeCounters->count_pkts_256_to_511 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R511);
+ p_FrameSizeCounters->count_pkts_512_to_1023 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1023);
+ p_FrameSizeCounters->count_pkts_1024_to_1518 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1518);
+ p_FrameSizeCounters->count_pkts_1519_to_1522 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1519X);
+ break;
+
+ case e_COMM_MODE_TX:
+ p_FrameSizeCounters->count_pkts_64 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T64);
+ p_FrameSizeCounters->count_pkts_65_to_127 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T127);
+ p_FrameSizeCounters->count_pkts_128_to_255 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T255);
+ p_FrameSizeCounters->count_pkts_256_to_511 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T511);
+ p_FrameSizeCounters->count_pkts_512_to_1023 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T1023);
+ p_FrameSizeCounters->count_pkts_1024_to_1518 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T1518);
+ p_FrameSizeCounters->count_pkts_1519_to_1522 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T1519X);
+ break;
+
+ case e_COMM_MODE_RX_AND_TX:
+ p_FrameSizeCounters->count_pkts_64 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R64)
+ + fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T64);
+ p_FrameSizeCounters->count_pkts_65_to_127 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R127)
+ + fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T127);
+ p_FrameSizeCounters->count_pkts_128_to_255 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R255)
+ + fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T255);
+ p_FrameSizeCounters->count_pkts_256_to_511 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R511)
+ + fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T511);
+ p_FrameSizeCounters->count_pkts_512_to_1023 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1023)
+ + fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T1023);
+ p_FrameSizeCounters->count_pkts_1024_to_1518 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1518)
+ + fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T1518);
+ p_FrameSizeCounters->count_pkts_1519_to_1522 = fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_R1519X)
+ + fman_memac_get_counter(p_Memac->p_MemMap, E_MEMAC_COUNTER_T1519X);
+ break;
+ }
+
+ return E_OK;
+}
+
+/* ......................................................................... */
+
+static t_Error MemacModifyMacAddress (t_Handle h_Memac, t_EnetAddr *p_EnetAddr)
+{
+ t_Memac *p_Memac = (t_Memac *)h_Memac;
@ -20945,6 +21027,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+ p_FmMacControllerDriver->f_FM_MAC_ResetCounters = MemacResetCounters;
+ p_FmMacControllerDriver->f_FM_MAC_GetStatistics = MemacGetStatistics;
+ p_FmMacControllerDriver->f_FM_MAC_GetFrameSizeCounters = MemacGetFrameSizeCounters;
+
+ p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr = MemacModifyMacAddress;
+ p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr = MemacAddHashMacAddress;
@ -21286,7 +21369,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+#endif /* __MEMAC_MII_ACC_H */
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/MAC/tgec.c
@@ -0,0 +1,975 @@
@@ -0,0 +1,1017 @@
+/*
+ * Copyright 2008-2012 Freescale Semiconductor Inc.
+ *
@ -21727,6 +21810,47 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+/* ......................................................................... */
+
+static t_Error TgecGetFrameSizeCounters(t_Handle h_Tgec, t_FmMacFrameSizeCounters *p_FrameSizeCounters, e_CommMode type)
+{
+ t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
+ struct tgec_regs *p_TgecMemMap;
+
+ SANITY_CHECK_RETURN_ERROR(p_Tgec, E_NULL_POINTER);
+ SANITY_CHECK_RETURN_ERROR(!p_Tgec->p_TgecDriverParam, E_INVALID_STATE);
+ SANITY_CHECK_RETURN_ERROR(p_FrameSizeCounters, E_NULL_POINTER);
+
+ p_TgecMemMap = p_Tgec->p_MemMap;
+
+ switch (type)
+ {
+ case e_COMM_MODE_NONE:
+ break;
+
+ case e_COMM_MODE_RX:
+ p_FrameSizeCounters->count_pkts_64 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R64);
+ p_FrameSizeCounters->count_pkts_65_to_127 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R127);
+ p_FrameSizeCounters->count_pkts_128_to_255 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R255);
+ p_FrameSizeCounters->count_pkts_256_to_511 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R511);
+ p_FrameSizeCounters->count_pkts_512_to_1023 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R1023);
+ p_FrameSizeCounters->count_pkts_1024_to_1518 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R1518);
+ p_FrameSizeCounters->count_pkts_1519_to_1522 = fman_tgec_get_counter(p_TgecMemMap, E_TGEC_COUNTER_R1519X);
+ break;
+
+ case e_COMM_MODE_TX:
+ //Tx counters not supported
+ break;
+
+ case e_COMM_MODE_RX_AND_TX:
+ //Tx counters not supported
+ break;
+ }
+
+ return E_OK;
+}
+
+
+/* ......................................................................... */
+
+static t_Error TgecEnable1588TimeStamp(t_Handle h_Tgec)
+{
+ t_Tgec *p_Tgec = (t_Tgec *)h_Tgec;
@ -22194,6 +22318,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+ p_FmMacControllerDriver->f_FM_MAC_ResetCounters = TgecResetCounters;
+ p_FmMacControllerDriver->f_FM_MAC_GetStatistics = TgecGetStatistics;
+ p_FmMacControllerDriver->f_FM_MAC_GetFrameSizeCounters = TgecGetFrameSizeCounters;
+
+ p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr = TgecModifyMacAddress;
+ p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr = TgecAddHashMacAddress;
@ -77953,7 +78078,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+#endif /* __FM_EXT */
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/inc/Peripherals/fm_mac_ext.h
@@ -0,0 +1,859 @@
@@ -0,0 +1,887 @@
+/*
+ * Copyright 2008-2012 Freescale Semiconductor Inc.
+ *
@ -78153,6 +78278,19 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ - Other */
+} t_FmMacStatistics;
+
+/**************************************************************************//**
+ @Description FM MAC Frame Size Counters
+*//***************************************************************************/
+typedef struct t_FmMacFrameSizeCounters {
+
+ uint64_t count_pkts_64; /**< 64 byte frame counter */
+ uint64_t count_pkts_65_to_127; /**< 65 to 127 byte frame counter */
+ uint64_t count_pkts_128_to_255; /**< 128 to 255 byte frame counter */
+ uint64_t count_pkts_256_to_511; /**< 256 to 511 byte frame counter */
+ uint64_t count_pkts_512_to_1023; /**< 512 to 1023 byte frame counter */
+ uint64_t count_pkts_1024_to_1518; /**< 1024 to 1518 byte frame counter */
+ uint64_t count_pkts_1519_to_1522; /**< 1519 to 1522 byte good frame count */
+} t_FmMacFrameSizeCounters;
+
+/**************************************************************************//**
+ @Group FM_mac_init_grp FM MAC Initialization Unit
@ -78610,6 +78748,21 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+t_Error FM_MAC_GetStatistics(t_Handle h_FmMac, t_FmMacStatistics *p_Statistics);
+
+/**************************************************************************//**
+ @Function FM_MAC_GetFrameSizeCounters
+
+ @Description get MAC statistics counters for different frame size
+
+ @Param[in] h_FmMac - A handle to a FM MAC Module.
+ @Param[in] p_FrameSizeCounters - Structure with counters
+ @Param[in] type - Type of counters to be read
+
+ @Return E_OK on success; Error code otherwise.
+
+ @Cautions Allowed only following FM_Init().
+*//***************************************************************************/
+t_Error FM_MAC_GetFrameSizeCounters(t_Handle h_FmMac, t_FmMacFrameSizeCounters *p_FrameSizeCounters, e_CommMode type);
+
+/**************************************************************************//**
+ @Function FM_MAC_ModifyMacAddr
+
+ @Description Replace the main MAC Address
@ -94578,7 +94731,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+#endif /* __FSL_FMAN_KG_H */
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/inc/flib/fsl_fman_memac.h
@@ -0,0 +1,427 @@
@@ -0,0 +1,434 @@
+/*
+ * Copyright 2008-2012 Freescale Semiconductor Inc.
+ *
@ -94727,12 +94880,19 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+enum memac_counters {
+ E_MEMAC_COUNTER_R64,
+ E_MEMAC_COUNTER_T64,
+ E_MEMAC_COUNTER_R127,
+ E_MEMAC_COUNTER_T127,
+ E_MEMAC_COUNTER_R255,
+ E_MEMAC_COUNTER_T255,
+ E_MEMAC_COUNTER_R511,
+ E_MEMAC_COUNTER_T511,
+ E_MEMAC_COUNTER_R1023,
+ E_MEMAC_COUNTER_T1023,
+ E_MEMAC_COUNTER_R1518,
+ E_MEMAC_COUNTER_T1518,
+ E_MEMAC_COUNTER_R1519X,
+ E_MEMAC_COUNTER_T1519X,
+ E_MEMAC_COUNTER_RFRG,
+ E_MEMAC_COUNTER_RJBR,
+ E_MEMAC_COUNTER_RDRP,
@ -103346,7 +103506,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+#endif /* __FSL_FMAN_TEST_H */
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/src/inc/wrapper/lnxwrp_exp_sym.h
@@ -0,0 +1,128 @@
@@ -0,0 +1,130 @@
+/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
@ -103472,6 +103632,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+/* FMAN MAC exported routines */
+EXPORT_SYMBOL(FM_MAC_GetStatistics);
+
+EXPORT_SYMBOL(FM_MAC_GetFrameSizeCounters);
+
+EXPORT_SYMBOL(FM_GetSpecialOperationCoding);
+
+#endif /* __LNXWRP_EXP_SYM_H */
@ -111188,7 +111350,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+module_exit(fm_port_unload);
--- /dev/null
+++ b/drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm.c
@@ -0,0 +1,4813 @@
@@ -0,0 +1,4854 @@
+/*
+ * Copyright 2008-2012 Freescale Semiconductor Inc.
+ *
@ -115799,6 +115961,47 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ break;
+ }
+
+ case FM_PORT_IOC_GET_MAC_FRAME_SIZE_COUNTERS:
+ {
+ t_LnxWrpFmDev *p_LnxWrpFmDev =
+ (t_LnxWrpFmDev *)p_LnxWrpFmPortDev->h_LnxWrpFmDev;
+ ioc_fm_port_mac_frame_size_counters_t param;
+ t_FmMacFrameSizeCounters frameSizeCounters;
+ int mac_id = p_LnxWrpFmPortDev->id;
+
+ if (!p_LnxWrpFmDev)
+ RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Port not initialized or other error!"));
+
+ if (&p_LnxWrpFmDev->txPorts[mac_id] != p_LnxWrpFmPortDev &&
+ &p_LnxWrpFmDev->rxPorts[mac_id] != p_LnxWrpFmPortDev)
+ mac_id += FM_MAX_NUM_OF_1G_MACS; /* 10G port */
+
+ if (!p_LnxWrpFmDev->macs[mac_id].h_Dev)
+ RETURN_ERROR(MINOR, E_NOT_AVAILABLE, ("Port not initialized or other error!"));
+
+ if (copy_from_user(&param, (ioc_fm_port_mac_frame_size_counters_t *)arg,
+ sizeof(ioc_fm_port_mac_frame_size_counters_t)))
+ RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
+
+ if (FM_MAC_GetFrameSizeCounters(p_LnxWrpFmDev->macs[mac_id].h_Dev,
+ &frameSizeCounters, param.type))
+ RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
+
+ param.count_pkts_64 = frameSizeCounters.count_pkts_64;
+ param.count_pkts_65_to_127 = frameSizeCounters.count_pkts_65_to_127;
+ param.count_pkts_128_to_255 = frameSizeCounters.count_pkts_128_to_255;
+ param.count_pkts_256_to_511 = frameSizeCounters.count_pkts_256_to_511;
+ param.count_pkts_512_to_1023 = frameSizeCounters.count_pkts_512_to_1023;
+ param.count_pkts_1024_to_1518 = frameSizeCounters.count_pkts_1024_to_1518;
+ param.count_pkts_1519_to_1522 = frameSizeCounters.count_pkts_1519_to_1522;
+
+ if (copy_to_user((ioc_fm_port_mac_frame_size_counters_t *)arg, &param,
+ sizeof(ioc_fm_port_mac_frame_size_counters_t)))
+ RETURN_ERROR(MINOR, E_WRITE_FAILED, NO_MSG);
+
+ break;
+ }
+
+ case FM_PORT_IOC_GET_BMI_COUNTERS:
+ {
+ t_LnxWrpFmDev *p_LnxWrpFmDev =
@ -152474,7 +152677,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+/** @} */ /* end of lnx_ioctl_FM_grp group */
--- /dev/null
+++ b/include/uapi/linux/fmd/Peripherals/fm_port_ioctls.h
@@ -0,0 +1,948 @@
@@ -0,0 +1,973 @@
+/* Copyright (c) 2008-2012 Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
@ -153416,6 +153619,31 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+
+#define FM_PORT_IOC_GET_BMI_COUNTERS _IOR(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(42), ioc_fm_port_bmi_stats_t)
+
+typedef struct ioc_fm_port_mac_frame_size_counters_t {
+
+ e_CommMode type;
+ uint64_t count_pkts_64; /**< 64 byte frame counter */
+ uint64_t count_pkts_65_to_127; /**< 65 to 127 byte frame counter */
+ uint64_t count_pkts_128_to_255; /**< 128 to 255 byte frame counter */
+ uint64_t count_pkts_256_to_511; /**< 256 to 511 byte frame counter */
+ uint64_t count_pkts_512_to_1023; /**< 512 to 1023 byte frame counter */
+ uint64_t count_pkts_1024_to_1518; /**< 1024 to 1518 byte frame counter */
+ uint64_t count_pkts_1519_to_1522; /**< 1519 to 1522 byte good frame count */
+} ioc_fm_port_mac_frame_size_counters_t;
+
+/**************************************************************************//**
+ @Function FM_MAC_GetFrameSizeCounters
+
+ @Description get MAC statistics counters for different frame size
+
+ @Param[out] ioc_fm_port_mac_frame_size_counters_t A structure holding the counters
+
+ @Return E_OK on success; Error code otherwise.
+
+ @Cautions Allowed only following FM_Init().
+*//***************************************************************************/
+#define FM_PORT_IOC_GET_MAC_FRAME_SIZE_COUNTERS _IOR(FM_IOC_TYPE_BASE, FM_PORT_IOC_NUM(43), ioc_fm_port_mac_frame_size_counters_t)
+
+
+/** @} */ /* end of lnx_ioctl_FM_PORT_pcd_runtime_control_grp group */
+/** @} */ /* end of lnx_ioctl_FM_PORT_runtime_control_grp group */

20
target/linux/layerscape/patches-4.9/702-pci-support-layerscape.patch
View File

@ -1,4 +1,4 @@
From c4813da334b0c31e9c55eea015f1e898e84ff45b Mon Sep 17 00:00:00 2001
From 9e6e0a53b29190dbd86a39304b59c3028f5b36c2 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 25 Sep 2017 11:04:10 +0800
Subject: [PATCH] pci: support layerscape
@ -15,17 +15,17 @@ Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
drivers/irqchip/irq-ls-scfg-msi.c | 256 +++++++--
drivers/irqchip/irq-ls-scfg-msi.c | 257 +++++++--
drivers/pci/host/Makefile | 2 +-
drivers/pci/host/pci-layerscape-ep-debugfs.c | 758 +++++++++++++++++++++++++++
drivers/pci/host/pci-layerscape-ep.c | 309 +++++++++++
drivers/pci/host/pci-layerscape-ep.h | 115 ++++
drivers/pci/host/pci-layerscape.c | 37 +-
drivers/pci/host/pci-layerscape.c | 38 +-
drivers/pci/host/pcie-designware.c | 6 +
drivers/pci/host/pcie-designware.h | 1 +
drivers/pci/pcie/portdrv_core.c | 181 +++----
include/linux/pci.h | 1 +
10 files changed, 1518 insertions(+), 148 deletions(-)
10 files changed, 1520 insertions(+), 148 deletions(-)
create mode 100644 drivers/pci/host/pci-layerscape-ep-debugfs.c
create mode 100644 drivers/pci/host/pci-layerscape-ep.c
create mode 100644 drivers/pci/host/pci-layerscape-ep.h
@ -198,7 +198,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
&ls_scfg_msi_domain_ops,
msi_data);
if (!msi_data->parent) {
@@ -164,16 +230,117 @@ static int ls_scfg_msi_domains_init(stru
@@ -164,16 +230,118 @@ static int ls_scfg_msi_domains_init(stru
return 0;
}
@ -288,6 +288,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ { .compatible = "fsl,1s1021a-msi", .data = &ls1021_msi_cfg},
+ { .compatible = "fsl,1s1043a-msi", .data = &ls1021_msi_cfg},
+
+ { .compatible = "fsl,ls1012a-msi", .data = &ls1021_msi_cfg },
+ { .compatible = "fsl,ls1021a-msi", .data = &ls1021_msi_cfg },
+ { .compatible = "fsl,ls1043a-msi", .data = &ls1021_msi_cfg },
+ { .compatible = "fsl,ls1043a-v1.1-msi", .data = &ls1043_v1_1_msi_cfg },
@ -317,7 +318,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
msi_data->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(msi_data->regs)) {
@@ -182,23 +349,48 @@ static int ls_scfg_msi_probe(struct plat
@@ -182,23 +350,48 @@ static int ls_scfg_msi_probe(struct plat
}
msi_data->msiir_addr = res->start;
@ -376,7 +377,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
platform_set_drvdata(pdev, msi_data);
return 0;
@@ -207,8 +399,10 @@ static int ls_scfg_msi_probe(struct plat
@@ -207,8 +400,10 @@ static int ls_scfg_msi_probe(struct plat
static int ls_scfg_msi_remove(struct platform_device *pdev)
{
struct ls_scfg_msi *msi_data = platform_get_drvdata(pdev);
@ -388,7 +389,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
irq_domain_remove(msi_data->msi_domain);
irq_domain_remove(msi_data->parent);
@@ -218,12 +412,6 @@ static int ls_scfg_msi_remove(struct pla
@@ -218,12 +413,6 @@ static int ls_scfg_msi_remove(struct pla
return 0;
}
@ -1656,7 +1657,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
}
static int ls_pcie_msi_host_init(struct pcie_port *pp,
@@ -196,20 +209,38 @@ static struct ls_pcie_drvdata ls1021_drv
@@ -196,20 +209,39 @@ static struct ls_pcie_drvdata ls1021_drv
static struct ls_pcie_drvdata ls1043_drvdata = {
.lut_offset = 0x10000,
.ltssm_shift = 24,
@ -1686,6 +1687,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
};
static const struct of_device_id ls_pcie_of_match[] = {
+ { .compatible = "fsl,ls1012a-pcie", .data = &ls1046_drvdata },
{ .compatible = "fsl,ls1021a-pcie", .data = &ls1021_drvdata },
{ .compatible = "fsl,ls1043a-pcie", .data = &ls1043_drvdata },
+ { .compatible = "fsl,ls1046a-pcie", .data = &ls1046_drvdata },

2
target/linux/layerscape/patches-4.9/703-phy-support-layerscape.patch
View File

@ -1741,7 +1741,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
PHY_INTERFACE_MODE_MAX,
} phy_interface_t;
@@ -784,6 +785,9 @@ int phy_stop_interrupts(struct phy_devic
@@ -780,6 +781,9 @@ int phy_stop_interrupts(struct phy_devic
static inline int phy_read_status(struct phy_device *phydev)
{

37
target/linux/layerscape/patches-4.9/704-fsl-mc-layerscape-support.patch
View File

@ -1,4 +1,4 @@
From 464b4d9b8282e0f1e5040e4914505f91ce4d3750 Mon Sep 17 00:00:00 2001
From afb7254de9f03c3efaf4e306dcf5f88e1873fc6b Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 25 Sep 2017 12:06:25 +0800
Subject: [PATCH] fsl-mc: layerscape support
@ -29,7 +29,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
.../{include/dpcon-cmd.h => bus/dpio/dpio-cmd.h} | 73 +-
drivers/staging/fsl-mc/bus/dpio/dpio-driver.c | 296 ++++++
drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt | 135 +++
drivers/staging/fsl-mc/bus/dpio/dpio-service.c | 689 +++++++++++++
drivers/staging/fsl-mc/bus/dpio/dpio-service.c | 693 +++++++++++++
drivers/staging/fsl-mc/bus/dpio/dpio.c | 224 +++++
drivers/staging/fsl-mc/bus/dpio/dpio.h | 109 ++
drivers/staging/fsl-mc/bus/dpio/qbman-portal.c | 1049 ++++++++++++++++++++
@ -68,7 +68,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
drivers/staging/fsl-mc/include/mc-cmd.h | 44 +-
drivers/staging/fsl-mc/include/mc-sys.h | 3 +-
drivers/staging/fsl-mc/include/mc.h | 17 +-
49 files changed, 7380 insertions(+), 2612 deletions(-)
49 files changed, 7384 insertions(+), 2612 deletions(-)
create mode 100644 drivers/staging/fsl-mc/bus/dpbp-cmd.h
create mode 100644 drivers/staging/fsl-mc/bus/dpcon-cmd.h
create mode 100644 drivers/staging/fsl-mc/bus/dpcon.c
@ -1772,7 +1772,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ Dequeue result struct and parsing APIs are defined in dpaa2-global.h.
--- /dev/null
+++ b/drivers/staging/fsl-mc/bus/dpio/dpio-service.c
@@ -0,0 +1,689 @@
@@ -0,0 +1,693 @@
+/*
+ * Copyright 2014-2016 Freescale Semiconductor Inc.
+ * Copyright 2016 NXP
@ -1852,14 +1852,14 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ if (d)
+ return d;
+
+ if (unlikely(cpu >= num_possible_cpus()))
+ if (unlikely(cpu >= (int)num_possible_cpus()))
+ return NULL;
+
+ /*
+ * If cpu == -1, choose the current cpu, with no guarantees about
+ * potentially being migrated away.
+ */
+ if (unlikely(cpu < 0))
+ if (cpu < 0)
+ cpu = smp_processor_id();
+
+ /* If a specific cpu was requested, pick it up immediately */
@ -1871,6 +1871,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ if (d)
+ return d;
+
+ d = service_select_by_cpu(d, -1);
+ if (d)
+ return d;
+
+ spin_lock(&dpio_list_lock);
+ d = list_entry(dpio_list.next, struct dpaa2_io, node);
+ list_del(&d->node);
@ -1897,7 +1901,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ return NULL;
+
+ /* check if CPU is out of range (-1 means any cpu) */
+ if (desc->cpu >= num_possible_cpus()) {
+ if (desc->cpu >= (int)num_possible_cpus()) {
+ kfree(obj);
+ return NULL;
+ }
@ -8354,14 +8358,6 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
* Author: German Rivera <German.Rivera@freescale.com>
*
* This file is licensed under the terms of the GNU General Public
@@ -17,6 +17,7 @@
#include <linux/irqdomain.h>
#include <linux/msi.h>
#include "../include/mc-bus.h"
+#include "fsl-mc-private.h"
/*
* Generate a unique ID identifying the interrupt (only used within the MSI
--- a/drivers/staging/fsl-mc/bus/fsl-mc-private.h
+++ b/drivers/staging/fsl-mc/bus/fsl-mc-private.h
@@ -10,13 +10,15 @@
@ -8393,11 +8389,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
* Author: German Rivera <German.Rivera@freescale.com>
*
* This file is licensed under the terms of the GNU General Public
@@ -17,9 +17,10 @@
#include <linux/of.h>
#include <linux/of_irq.h>
#include "../include/mc-bus.h"
+#include "fsl-mc-private.h"
@@ -20,7 +20,7 @@
#include "fsl-mc-private.h"
static struct irq_chip its_msi_irq_chip = {
- .name = "fsl-mc-bus-msi",
@ -8405,7 +8398,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
.irq_mask = irq_chip_mask_parent,
.irq_unmask = irq_chip_unmask_parent,
.irq_eoi = irq_chip_eoi_parent,
@@ -51,7 +52,7 @@ static int its_fsl_mc_msi_prepare(struct
@@ -52,7 +52,7 @@ static int its_fsl_mc_msi_prepare(struct
return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info);
}
@ -8414,7 +8407,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
.msi_prepare = its_fsl_mc_msi_prepare,
};
@@ -94,8 +95,8 @@ int __init its_fsl_mc_msi_init(void)
@@ -95,8 +95,8 @@ int __init its_fsl_mc_msi_init(void)
continue;
}

112
target/linux/layerscape/patches-4.9/706-fsl-dpaa-use-4-9-ndo-get-stats64.patch Normal file
View File

@ -0,0 +1,112 @@
From: Mathew McBride <matt@traverse.com.au>
Date: Tue, 24 Oct 2017 11:30:00 +1100
Subject: [PATCH] dpaa: backport use of 4.9 ndo_get_stats64
This patch changes the declarations of ndo_get_stats64 handlers
to the previous struct rtnl_link_stats64 * return type instead of
the mainline void return.
Suggested-by: Adrien Gallouët <adrien@gallouet.fr>
Signed-off-by: Mathew McBride <matt@traverse.com.au>
---
drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c | 5 +++--
drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.h | 4 ++--
drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c | 3 ++-
drivers/staging/fsl-dpaa2/ethsw/switch.c | 4 ++--
drivers/staging/fsl-dpaa2/evb/evb.c | 4 ++--
5 files changed, 11 insertions(+), 9 deletions(-)
--- a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c
+++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c
@@ -1296,7 +1296,7 @@ static int dpaa2_eth_set_addr(struct net
/** Fill in counters maintained by the GPP driver. These may be different from
* the hardware counters obtained by ethtool.
*/
-static void dpaa2_eth_get_stats(struct net_device *net_dev,
+static struct rtnl_link_stats64 *dpaa2_eth_get_stats(struct net_device *net_dev,
struct rtnl_link_stats64 *stats)
{
struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
@@ -1312,6 +1312,7 @@ static void dpaa2_eth_get_stats(struct n
for (j = 0; j < num; j++)
netstats[j] += cpustats[j];
}
+ return stats;
}
static int dpaa2_eth_change_mtu(struct net_device *net_dev, int mtu)
--- a/drivers/staging/fsl-dpaa2/ethsw/switch.c
+++ b/drivers/staging/fsl-dpaa2/ethsw/switch.c
@@ -1094,7 +1094,7 @@ static int ethsw_port_fdb_del(struct ndm
return 0;
}
-void ethsw_port_get_stats(struct net_device *netdev,
+struct rtnl_link_stats64 *ethsw_port_get_stats(struct net_device *netdev,
struct rtnl_link_stats64 *storage)
{
struct ethsw_port_priv *port_priv = netdev_priv(netdev);
@@ -1154,7 +1154,7 @@ void ethsw_port_get_stats(struct net_dev
if (err)
goto error;
- return;
+ return storage;
error:
netdev_err(netdev, "dpsw_if_get_counter err %d\n", err);
--- a/drivers/staging/fsl-dpaa2/evb/evb.c
+++ b/drivers/staging/fsl-dpaa2/evb/evb.c
@@ -765,7 +765,7 @@ static int evb_dellink(struct net_device
return 0;
}
-void evb_port_get_stats(struct net_device *netdev,
+struct rtnl_link_stats64 *evb_port_get_stats(struct net_device *netdev,
struct rtnl_link_stats64 *storage)
{
struct evb_port_priv *port_priv = netdev_priv(netdev);
@@ -842,7 +842,7 @@ void evb_port_get_stats(struct net_devic
if (unlikely(err))
goto error;
- return;
+ return storage;
error:
netdev_err(netdev, "dpdmux_if_get_counter err %d\n", err);
--- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c
+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c
@@ -239,8 +239,8 @@ EXPORT_SYMBOL(dpa_timeout);
* Calculates the statistics for the given device by adding the statistics
* collected by each CPU.
*/
-void __cold
-dpa_get_stats64(struct net_device *net_dev,
+struct rtnl_link_stats64 __cold
+*dpa_get_stats64(struct net_device *net_dev,
struct rtnl_link_stats64 *stats)
{
struct dpa_priv_s *priv = netdev_priv(net_dev);
@@ -258,6 +258,7 @@ dpa_get_stats64(struct net_device *net_d
for (j = 0; j < numstats; j++)
netstats[j] += cpustats[j];
}
+ return stats;
}
EXPORT_SYMBOL(dpa_get_stats64);
--- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.h
+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.h
@@ -140,8 +140,8 @@ int dpa_netdev_init(struct net_device *n
int __cold dpa_start(struct net_device *net_dev);
int __cold dpa_stop(struct net_device *net_dev);
void __cold dpa_timeout(struct net_device *net_dev);
-void __cold
-dpa_get_stats64(struct net_device *net_dev,
+struct rtnl_link_stats64 __cold
+*dpa_get_stats64(struct net_device *net_dev,
struct rtnl_link_stats64 *stats);
int dpa_change_mtu(struct net_device *net_dev, int new_mtu);
int dpa_ndo_init(struct net_device *net_dev);

10548
target/linux/layerscape/patches-4.9/706-fsl_ppfe-support-layercape.patch Normal file
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File diff suppressed because it is too large Load Diff

151
target/linux/layerscape/patches-4.9/804-crypto-support-layerscape.patch
View File

@ -1,4 +1,4 @@
From 0a5b97d1f524c1769b4059e3c7123b52755f7121 Mon Sep 17 00:00:00 2001
From 9c9579d76ccd6e738ab98c9b4c73c168912cdb8a Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Wed, 27 Sep 2017 15:02:01 +0800
Subject: [PATCH] crypto: support layerscape
@ -54,7 +54,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
drivers/crypto/caam/compat.h | 1 +
drivers/crypto/caam/ctrl.c | 356 +-
drivers/crypto/caam/ctrl.h | 2 +
drivers/crypto/caam/desc.h | 52 +-
drivers/crypto/caam/desc.h | 55 +-
drivers/crypto/caam/desc_constr.h | 139 +-
drivers/crypto/caam/dpseci.c | 859 ++++
drivers/crypto/caam/dpseci.h | 395 ++
@ -62,7 +62,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
drivers/crypto/caam/error.c | 127 +-
drivers/crypto/caam/error.h | 10 +-
drivers/crypto/caam/intern.h | 31 +-
drivers/crypto/caam/jr.c | 55 +-
drivers/crypto/caam/jr.c | 97 +-
drivers/crypto/caam/jr.h | 2 +
drivers/crypto/caam/key_gen.c | 32 +-
drivers/crypto/caam/key_gen.h | 36 +-
drivers/crypto/caam/pdb.h | 62 +
@ -83,7 +84,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
include/uapi/linux/cryptouser.h | 5 +
scripts/spelling.txt | 3 +
sound/soc/amd/acp-pcm-dma.c | 2 +-
54 files changed, 17263 insertions(+), 3955 deletions(-)
55 files changed, 17310 insertions(+), 3955 deletions(-)
create mode 100644 crypto/acompress.c
create mode 100644 crypto/scompress.c
create mode 100644 crypto/tls.c
@ -15259,9 +15260,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+}
+
+/*
+ * qi_cache_alloc - Allocate buffers from CAAM-QI cache
+ * qi_cache_zalloc - Allocate buffers from CAAM-QI cache
+ *
+ * Allocate data on the hotpath. Instead of using kmalloc, one can use the
+ * Allocate data on the hotpath. Instead of using kzalloc, one can use the
+ * services of the CAAM QI memory cache (backed by kmem_cache). The buffers
+ * will have a size of CAAM_QI_MEMCACHE_SIZE, which should be sufficient for
+ * hosting 16 SG entries.
@ -15270,15 +15271,15 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ *
+ * Returns a pointer to a retrieved buffer on success or NULL on failure.
+ */
+static inline void *qi_cache_alloc(gfp_t flags)
+static inline void *qi_cache_zalloc(gfp_t flags)
+{
+ return kmem_cache_alloc(qi_cache, flags);
+ return kmem_cache_zalloc(qi_cache, flags);
+}
+
+/*
+ * qi_cache_free - Frees buffers allocated from CAAM-QI cache
+ *
+ * @obj - buffer previously allocated by qi_cache_alloc
+ * @obj - buffer previously allocated by qi_cache_zalloc
+ *
+ * No checking is being done, the call is a passthrough call to
+ * kmem_cache_free(...)
@ -15690,7 +15691,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ enum optype op_type = encrypt ? ENCRYPT : DECRYPT;
+
+ /* allocate space for base edesc and link tables */
+ edesc = qi_cache_alloc(GFP_DMA | flags);
+ edesc = qi_cache_zalloc(GFP_DMA | flags);
+ if (unlikely(!edesc)) {
+ dev_err(dev, "could not allocate extended descriptor\n");
+ return ERR_PTR(-ENOMEM);
@ -15895,7 +15896,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ }
+
+ /* allocate space for base edesc and link tables */
+ edesc = qi_cache_alloc(GFP_DMA | flags);
+ edesc = qi_cache_zalloc(GFP_DMA | flags);
+ if (unlikely(!edesc)) {
+ dev_err(dev, "could not allocate extended descriptor\n");
+ return ERR_PTR(-ENOMEM);
@ -16761,7 +16762,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ }
+
+ /* allocate space for base edesc and link tables */
+ edesc = qi_cache_alloc(GFP_DMA | flags);
+ edesc = qi_cache_zalloc(GFP_DMA | flags);
+ if (unlikely(!edesc)) {
+ dev_err(dev, "could not allocate extended descriptor\n");
+ caam_unmap(dev, req->src, req->dst, src_nents, dst_nents,
@ -16916,7 +16917,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ }
+
+ /* allocate space for base edesc and link tables */
+ edesc = qi_cache_alloc(GFP_DMA | flags);
+ edesc = qi_cache_zalloc(GFP_DMA | flags);
+ if (!edesc) {
+ dev_err(dev, "could not allocate extended descriptor\n");
+ caam_unmap(dev, req->src, req->dst, src_nents, dst_nents,
@ -22122,7 +22123,15 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
#define LDST_SRCDST_WORD_ALTDS_CLASS1 (0x0f << LDST_SRCDST_SHIFT)
#define LDST_SRCDST_WORD_PKHA_A_SZ (0x10 << LDST_SRCDST_SHIFT)
#define LDST_SRCDST_WORD_PKHA_B_SZ (0x11 << LDST_SRCDST_SHIFT)
@@ -400,7 +395,7 @@ struct sec4_sg_entry {
@@ -360,6 +355,7 @@ struct sec4_sg_entry {
#define FIFOLD_TYPE_PK_N (0x08 << FIFOLD_TYPE_SHIFT)
#define FIFOLD_TYPE_PK_A (0x0c << FIFOLD_TYPE_SHIFT)
#define FIFOLD_TYPE_PK_B (0x0d << FIFOLD_TYPE_SHIFT)
+#define FIFOLD_TYPE_IFIFO (0x0f << FIFOLD_TYPE_SHIFT)
/* Other types. Need to OR in last/flush bits as desired */
#define FIFOLD_TYPE_MSG_MASK (0x38 << FIFOLD_TYPE_SHIFT)
@@ -400,7 +396,7 @@ struct sec4_sg_entry {
#define FIFOST_TYPE_PKHA_N (0x08 << FIFOST_TYPE_SHIFT)
#define FIFOST_TYPE_PKHA_A (0x0c << FIFOST_TYPE_SHIFT)
#define FIFOST_TYPE_PKHA_B (0x0d << FIFOST_TYPE_SHIFT)
@ -22131,7 +22140,15 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
#define FIFOST_TYPE_AF_SBOX_TKEK (0x21 << FIFOST_TYPE_SHIFT)
#define FIFOST_TYPE_PKHA_E_JKEK (0x22 << FIFOST_TYPE_SHIFT)
#define FIFOST_TYPE_PKHA_E_TKEK (0x23 << FIFOST_TYPE_SHIFT)
@@ -1107,8 +1102,8 @@ struct sec4_sg_entry {
@@ -413,6 +409,7 @@ struct sec4_sg_entry {
#define FIFOST_TYPE_MESSAGE_DATA (0x30 << FIFOST_TYPE_SHIFT)
#define FIFOST_TYPE_RNGSTORE (0x34 << FIFOST_TYPE_SHIFT)
#define FIFOST_TYPE_RNGFIFO (0x35 << FIFOST_TYPE_SHIFT)
+#define FIFOST_TYPE_METADATA (0x3e << FIFOST_TYPE_SHIFT)
#define FIFOST_TYPE_SKIP (0x3f << FIFOST_TYPE_SHIFT)
/*
@@ -1107,8 +1104,8 @@ struct sec4_sg_entry {
/* For non-protocol/alg-only op commands */
#define OP_ALG_TYPE_SHIFT 24
#define OP_ALG_TYPE_MASK (0x7 << OP_ALG_TYPE_SHIFT)
@ -22142,7 +22159,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
#define OP_ALG_ALGSEL_SHIFT 16
#define OP_ALG_ALGSEL_MASK (0xff << OP_ALG_ALGSEL_SHIFT)
@@ -1249,7 +1244,7 @@ struct sec4_sg_entry {
@@ -1249,7 +1246,7 @@ struct sec4_sg_entry {
#define OP_ALG_PKMODE_MOD_PRIMALITY 0x00f
/* PKHA mode copy-memory functions */
@ -22151,7 +22168,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
#define OP_ALG_PKMODE_SRC_REG_MASK (7 << OP_ALG_PKMODE_SRC_REG_SHIFT)
#define OP_ALG_PKMODE_DST_REG_SHIFT 10
#define OP_ALG_PKMODE_DST_REG_MASK (7 << OP_ALG_PKMODE_DST_REG_SHIFT)
@@ -1445,7 +1440,7 @@ struct sec4_sg_entry {
@@ -1445,10 +1442,11 @@ struct sec4_sg_entry {
#define MATH_SRC1_REG2 (0x02 << MATH_SRC1_SHIFT)
#define MATH_SRC1_REG3 (0x03 << MATH_SRC1_SHIFT)
#define MATH_SRC1_IMM (0x04 << MATH_SRC1_SHIFT)
@ -22160,7 +22177,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
#define MATH_SRC1_INFIFO (0x0a << MATH_SRC1_SHIFT)
#define MATH_SRC1_OUTFIFO (0x0b << MATH_SRC1_SHIFT)
#define MATH_SRC1_ONE (0x0c << MATH_SRC1_SHIFT)
@@ -1629,4 +1624,31 @@ struct sec4_sg_entry {
+#define MATH_SRC1_ZERO (0x0f << MATH_SRC1_SHIFT)
/* Destination selectors */
#define MATH_DEST_SHIFT 8
@@ -1629,4 +1627,31 @@ struct sec4_sg_entry {
/* Frame Descriptor Command for Replacement Job Descriptor */
#define FD_CMD_REPLACE_JOB_DESC 0x20000000
@ -24327,7 +24348,22 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
#include "regs.h"
#include "jr.h"
#include "desc.h"
@@ -73,6 +74,8 @@ static int caam_jr_shutdown(struct devic
@@ -22,6 +23,14 @@ struct jr_driver_data {
static struct jr_driver_data driver_data;
+static int jr_driver_probed;
+
+int caam_jr_driver_probed(void)
+{
+ return jr_driver_probed;
+}
+EXPORT_SYMBOL(caam_jr_driver_probed);
+
static int caam_reset_hw_jr(struct device *dev)
{
struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
@@ -73,6 +82,8 @@ static int caam_jr_shutdown(struct devic
ret = caam_reset_hw_jr(dev);
@ -24336,7 +24372,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
/* Release interrupt */
free_irq(jrp->irq, dev);
@@ -128,7 +131,7 @@ static irqreturn_t caam_jr_interrupt(int
@@ -116,6 +127,8 @@ static int caam_jr_remove(struct platfor
dev_err(jrdev, "Failed to shut down job ring\n");
irq_dispose_mapping(jrpriv->irq);
+ jr_driver_probed--;
+
return ret;
}
@@ -128,7 +141,7 @@ static irqreturn_t caam_jr_interrupt(int
/*
* Check the output ring for ready responses, kick
@ -24345,7 +24390,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
*/
irqstate = rd_reg32(&jrp->rregs->jrintstatus);
if (!irqstate)
@@ -150,13 +153,18 @@ static irqreturn_t caam_jr_interrupt(int
@@ -150,13 +163,18 @@ static irqreturn_t caam_jr_interrupt(int
/* Have valid interrupt at this point, just ACK and trigger */
wr_reg32(&jrp->rregs->jrintstatus, irqstate);
@ -24367,7 +24412,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
u32 *userdesc, userstatus;
@@ -230,8 +238,6 @@ static irqreturn_t caam_jr_threadirq(int
@@ -230,8 +248,6 @@ static irqreturn_t caam_jr_threadirq(int
/* reenable / unmask IRQs */
clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
@ -24376,7 +24421,44 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
}
/**
@@ -389,10 +395,11 @@ static int caam_jr_init(struct device *d
@@ -275,6 +291,36 @@ struct device *caam_jr_alloc(void)
EXPORT_SYMBOL(caam_jr_alloc);
/**
+ * caam_jridx_alloc() - Alloc a specific job ring based on its index.
+ *
+ * returns : pointer to the newly allocated physical
+ * JobR dev can be written to if successful.
+ **/
+struct device *caam_jridx_alloc(int idx)
+{
+ struct caam_drv_private_jr *jrpriv;
+ struct device *dev = ERR_PTR(-ENODEV);
+
+ spin_lock(&driver_data.jr_alloc_lock);
+
+ if (list_empty(&driver_data.jr_list))
+ goto end;
+
+ list_for_each_entry(jrpriv, &driver_data.jr_list, list_node) {
+ if (jrpriv->ridx == idx) {
+ atomic_inc(&jrpriv->tfm_count);
+ dev = jrpriv->dev;
+ break;
+ }
+ }
+
+end:
+ spin_unlock(&driver_data.jr_alloc_lock);
+ return dev;
+}
+EXPORT_SYMBOL(caam_jridx_alloc);
+
+/**
* caam_jr_free() - Free the Job Ring
* @rdev - points to the dev that identifies the Job ring to
* be released.
@@ -389,10 +435,11 @@ static int caam_jr_init(struct device *d
jrp = dev_get_drvdata(dev);
@ -24391,7 +24473,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
if (error) {
dev_err(dev, "can't connect JobR %d interrupt (%d)\n",
jrp->ridx, jrp->irq);
@@ -454,6 +461,7 @@ out_free_inpring:
@@ -454,6 +501,7 @@ out_free_inpring:
out_free_irq:
free_irq(jrp->irq, dev);
out_kill_deq:
@ -24399,7 +24481,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
return error;
}
@@ -489,15 +497,28 @@ static int caam_jr_probe(struct platform
@@ -489,15 +537,28 @@ static int caam_jr_probe(struct platform
return -ENOMEM;
}
@ -24435,7 +24517,12 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
/* Identify the interrupt */
jrpriv->irq = irq_of_parse_and_map(nprop, 0);
@@ -520,7 +541,7 @@ static int caam_jr_probe(struct platform
@@ -517,10 +578,12 @@ static int caam_jr_probe(struct platform
atomic_set(&jrpriv->tfm_count, 0);
+ jr_driver_probed++;
+
return 0;
}
@ -24444,6 +24531,18 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
{
.compatible = "fsl,sec-v4.0-job-ring",
},
--- a/drivers/crypto/caam/jr.h
+++ b/drivers/crypto/caam/jr.h
@@ -8,7 +8,9 @@
#define JR_H
/* Prototypes for backend-level services exposed to APIs */
+int caam_jr_driver_probed(void);
struct device *caam_jr_alloc(void);
+struct device *caam_jridx_alloc(int idx);
void caam_jr_free(struct device *rdev);
int caam_jr_enqueue(struct device *dev, u32 *desc,
void (*cbk)(struct device *dev, u32 *desc, u32 status,
--- a/drivers/crypto/caam/key_gen.c
+++ b/drivers/crypto/caam/key_gen.c
@@ -41,15 +41,29 @@ Split key generation--------------------

608
target/linux/layerscape/patches-4.9/805-dma-support-layerscape.patch
View File

@ -1,4 +1,4 @@
From 659603c5f6cbc3d39922d4374df25ae4627d0e88 Mon Sep 17 00:00:00 2001
From 854c1f0e9574e9b25a55b439608c71e013b34a56 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 25 Sep 2017 12:12:20 +0800
Subject: [PATCH] dma: support layerscape
@ -8,8 +8,9 @@ This is a integrated patch for layerscape dma support.
Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
drivers/dma/Kconfig | 14 +
drivers/dma/Makefile | 2 +
drivers/dma/Kconfig | 31 +
drivers/dma/Makefile | 3 +
drivers/dma/caam_dma.c | 563 +++++++++++++++
drivers/dma/dpaa2-qdma/Kconfig | 8 +
drivers/dma/dpaa2-qdma/Makefile | 8 +
drivers/dma/dpaa2-qdma/dpaa2-qdma.c | 986 +++++++++++++++++++++++++
@ -18,7 +19,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
drivers/dma/dpaa2-qdma/fsl_dpdmai.h | 521 ++++++++++++++
drivers/dma/dpaa2-qdma/fsl_dpdmai_cmd.h | 222 ++++++
drivers/dma/fsl-qdma.c | 1201 +++++++++++++++++++++++++++++++
10 files changed, 3678 insertions(+)
11 files changed, 4259 insertions(+)
create mode 100644 drivers/dma/caam_dma.c
create mode 100644 drivers/dma/dpaa2-qdma/Kconfig
create mode 100644 drivers/dma/dpaa2-qdma/Makefile
create mode 100644 drivers/dma/dpaa2-qdma/dpaa2-qdma.c
@ -51,6 +53,30 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
config FSL_RAID
tristate "Freescale RAID engine Support"
depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
@@ -564,6 +578,23 @@ config ZX_DMA
help
Support the DMA engine for ZTE ZX296702 platform devices.
+config CRYPTO_DEV_FSL_CAAM_DMA
+ tristate "CAAM DMA engine support"
+ depends on CRYPTO_DEV_FSL_CAAM_JR
+ default y
+ select DMA_ENGINE
+ select ASYNC_CORE
+ select ASYNC_TX_ENABLE_CHANNEL_SWITCH
+ help
+ Selecting this will offload the DMA operations for users of
+ the scatter gather memcopy API to the CAAM via job rings. The
+ CAAM is a hardware module that provides hardware acceleration to
+ cryptographic operations. It has a built-in DMA controller that can
+ be programmed to read/write cryptographic data. This module defines
+ a DMA driver that uses the DMA capabilities of the CAAM.
+
+ To compile this as a module, choose M here: the module
+ will be called caam_dma.
# driver files
source "drivers/dma/bestcomm/Kconfig"
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -29,6 +29,8 @@ obj-$(CONFIG_DW_DMAC_CORE) += dw/
@ -62,6 +88,580 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
obj-$(CONFIG_FSL_RAID) += fsl_raid.o
obj-$(CONFIG_HSU_DMA) += hsu/
obj-$(CONFIG_IMG_MDC_DMA) += img-mdc-dma.o
@@ -67,6 +69,7 @@ obj-$(CONFIG_TI_DMA_CROSSBAR) += ti-dma-
obj-$(CONFIG_TI_EDMA) += edma.o
obj-$(CONFIG_XGENE_DMA) += xgene-dma.o
obj-$(CONFIG_ZX_DMA) += zx296702_dma.o
+obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_DMA) += caam_dma.o
obj-y += qcom/
obj-y += xilinx/
--- /dev/null
+++ b/drivers/dma/caam_dma.c
@@ -0,0 +1,563 @@
+/*
+ * caam support for SG DMA
+ *
+ * Copyright 2016 Freescale Semiconductor, Inc
+ * Copyright 2017 NXP
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/debugfs.h>
+
+#include <linux/dmaengine.h>
+#include "dmaengine.h"
+
+#include "../crypto/caam/regs.h"
+#include "../crypto/caam/jr.h"
+#include "../crypto/caam/error.h"
+#include "../crypto/caam/intern.h"
+#include "../crypto/caam/desc_constr.h"
+#include "../crypto/caam/sg_sw_sec4.h"
+
+#define DESC_DMA_MEMCPY_LEN ((CAAM_DESC_BYTES_MAX - DESC_JOB_IO_LEN) / \
+ CAAM_CMD_SZ)
+
+/* This is max chunk size of a DMA transfer. If a buffer is larger than this
+ * value it is internally broken into chunks of max CAAM_DMA_CHUNK_SIZE bytes
+ * and for each chunk a DMA transfer request is issued.
+ * This value is the largest number on 16 bits that is a multiple of 256 bytes
+ * (the largest configurable CAAM DMA burst size).
+ */
+#define CAAM_DMA_CHUNK_SIZE 65280
+
+struct caam_dma_sh_desc {
+ u32 desc[DESC_DMA_MEMCPY_LEN] ____cacheline_aligned;
+ dma_addr_t desc_dma;
+};
+
+/* caam dma extended descriptor */
+struct caam_dma_edesc {
+ struct dma_async_tx_descriptor async_tx;
+ struct list_head node;
+ struct caam_dma_ctx *ctx;
+ dma_addr_t src_dma;
+ dma_addr_t dst_dma;
+ unsigned int src_len;
+ unsigned int dst_len;
+ struct sec4_sg_entry *sec4_sg;
+ u32 jd[] ____cacheline_aligned;
+};
+
+/*
+ * caam_dma_ctx - per jr/channel context
+ * @chan: dma channel used by async_tx API
+ * @node: list_head used to attach to the global dma_ctx_list
+ * @jrdev: Job Ring device
+ * @submit_q: queue of pending (submitted, but not enqueued) jobs
+ * @done_not_acked: jobs that have been completed by jr, but maybe not acked
+ * @edesc_lock: protects extended descriptor
+ */
+struct caam_dma_ctx {
+ struct dma_chan chan;
+ struct list_head node;
+ struct device *jrdev;
+ struct list_head submit_q;
+ struct list_head done_not_acked;
+ spinlock_t edesc_lock;
+};
+
+static struct dma_device *dma_dev;
+static struct caam_dma_sh_desc *dma_sh_desc;
+static LIST_HEAD(dma_ctx_list);
+
+static dma_cookie_t caam_dma_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+ struct caam_dma_edesc *edesc = NULL;
+ struct caam_dma_ctx *ctx = NULL;
+ dma_cookie_t cookie;
+
+ edesc = container_of(tx, struct caam_dma_edesc, async_tx);
+ ctx = container_of(tx->chan, struct caam_dma_ctx, chan);
+
+ spin_lock_bh(&ctx->edesc_lock);
+
+ cookie = dma_cookie_assign(tx);
+ list_add_tail(&edesc->node, &ctx->submit_q);
+
+ spin_unlock_bh(&ctx->edesc_lock);
+
+ return cookie;
+}
+
+static unsigned int caam_dma_sg_dma_len(struct scatterlist *sg,
+ unsigned int nents)
+{
+ unsigned int len;
+
+ for (len = 0; sg && nents; sg = sg_next(sg), nents--)
+ len += sg_dma_len(sg);
+
+ return len;
+}
+
+static struct caam_dma_edesc *
+caam_dma_sg_edesc_alloc(struct dma_chan *chan,
+ struct scatterlist *dst_sg, unsigned int dst_nents,
+ struct scatterlist *src_sg, unsigned int src_nents,
+ unsigned long flags)
+{
+ struct caam_dma_ctx *ctx = container_of(chan, struct caam_dma_ctx,
+ chan);
+ struct device *jrdev = ctx->jrdev;
+ struct caam_dma_edesc *edesc;
+ struct sec4_sg_entry *sec4_sg;
+ dma_addr_t sec4_sg_dma_src;
+ unsigned int sec4_sg_bytes;
+
+ if (!dst_sg || !src_sg || !dst_nents || !src_nents)
+ return NULL;
+
+ sec4_sg_bytes = (src_nents + dst_nents) * sizeof(*sec4_sg);
+
+ edesc = kzalloc(sizeof(*edesc) + DESC_JOB_IO_LEN + sec4_sg_bytes,
+ GFP_DMA | GFP_NOWAIT);
+ if (!edesc)
+ return ERR_PTR(-ENOMEM);
+
+ edesc->src_len = caam_dma_sg_dma_len(src_sg, src_nents);
+ edesc->dst_len = caam_dma_sg_dma_len(dst_sg, dst_nents);
+ if (edesc->src_len != edesc->dst_len) {
+ dev_err(jrdev, "%s: src(%u) and dst(%u) len mismatch.\n",
+ __func__, edesc->src_len, edesc->dst_len);
+ kfree(edesc);
+ return ERR_PTR(-EINVAL);
+ }
+
+ dma_async_tx_descriptor_init(&edesc->async_tx, chan);
+ edesc->async_tx.tx_submit = caam_dma_tx_submit;
+ edesc->async_tx.flags = flags;
+ edesc->async_tx.cookie = -EBUSY;
+
+ /* Prepare SEC SGs */
+ edesc->sec4_sg = (void *)edesc + offsetof(struct caam_dma_edesc, jd) +
+ DESC_JOB_IO_LEN;
+
+ sec4_sg = edesc->sec4_sg;
+ sg_to_sec4_sg_last(src_sg, src_nents, sec4_sg, 0);
+
+ sec4_sg += src_nents;
+ sg_to_sec4_sg_last(dst_sg, dst_nents, sec4_sg, 0);
+
+ sec4_sg_dma_src = dma_map_single(jrdev, edesc->sec4_sg, sec4_sg_bytes,
+ DMA_TO_DEVICE);
+ if (dma_mapping_error(jrdev, sec4_sg_dma_src)) {
+ dev_err(jrdev, "error mapping segments to device\n");
+ kfree(edesc);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ edesc->src_dma = sec4_sg_dma_src;
+ edesc->dst_dma = sec4_sg_dma_src + src_nents * sizeof(*sec4_sg);
+ edesc->ctx = ctx;
+
+ return edesc;
+}
+
+static void caam_jr_chan_free_edesc(struct caam_dma_edesc *edesc)
+{
+ struct caam_dma_ctx *ctx = edesc->ctx;
+ struct caam_dma_edesc *_edesc = NULL;
+
+ spin_lock_bh(&ctx->edesc_lock);
+
+ list_add_tail(&edesc->node, &ctx->done_not_acked);
+ list_for_each_entry_safe(edesc, _edesc, &ctx->done_not_acked, node) {
+ if (async_tx_test_ack(&edesc->async_tx)) {
+ list_del(&edesc->node);
+ kfree(edesc);
+ }
+ }
+
+ spin_unlock_bh(&ctx->edesc_lock);
+}
+
+static void caam_dma_done(struct device *dev, u32 *hwdesc, u32 err,
+ void *context)
+{
+ struct caam_dma_edesc *edesc = context;
+ struct caam_dma_ctx *ctx = edesc->ctx;
+ dma_async_tx_callback callback;
+ void *callback_param;
+
+ if (err)
+ caam_jr_strstatus(ctx->jrdev, err);
+
+ dma_run_dependencies(&edesc->async_tx);
+
+ spin_lock_bh(&ctx->edesc_lock);
+ dma_cookie_complete(&edesc->async_tx);
+ spin_unlock_bh(&ctx->edesc_lock);
+
+ callback = edesc->async_tx.callback;
+ callback_param = edesc->async_tx.callback_param;
+
+ dma_descriptor_unmap(&edesc->async_tx);
+
+ caam_jr_chan_free_edesc(edesc);
+
+ if (callback)
+ callback(callback_param);
+}
+
+static void caam_dma_sg_init_job_desc(struct caam_dma_edesc *edesc)
+{
+ u32 *jd = edesc->jd;
+ u32 *sh_desc = dma_sh_desc->desc;
+ dma_addr_t desc_dma = dma_sh_desc->desc_dma;
+
+ /* init the job descriptor */
+ init_job_desc_shared(jd, desc_dma, desc_len(sh_desc), HDR_REVERSE);
+
+ /* set SEQIN PTR */
+ append_seq_in_ptr(jd, edesc->src_dma, edesc->src_len, LDST_SGF);
+
+ /* set SEQOUT PTR */
+ append_seq_out_ptr(jd, edesc->dst_dma, edesc->dst_len, LDST_SGF);
+
+#ifdef DEBUG
+ print_hex_dump(KERN_ERR, "caam dma desc@" __stringify(__LINE__) ": ",
+ DUMP_PREFIX_ADDRESS, 16, 4, jd, desc_bytes(jd), 1);
+#endif
+}
+
+/* This function can be called from an interrupt context */
+static struct dma_async_tx_descriptor *
+caam_dma_prep_sg(struct dma_chan *chan, struct scatterlist *dst_sg,
+ unsigned int dst_nents, struct scatterlist *src_sg,
+ unsigned int src_nents, unsigned long flags)
+{
+ struct caam_dma_edesc *edesc;
+
+ /* allocate extended descriptor */
+ edesc = caam_dma_sg_edesc_alloc(chan, dst_sg, dst_nents, src_sg,
+ src_nents, flags);
+ if (IS_ERR_OR_NULL(edesc))
+ return ERR_CAST(edesc);
+
+ /* Initialize job descriptor */
+ caam_dma_sg_init_job_desc(edesc);
+
+ return &edesc->async_tx;
+}
+
+static void caam_dma_memcpy_init_job_desc(struct caam_dma_edesc *edesc)
+{
+ u32 *jd = edesc->jd;
+ u32 *sh_desc = dma_sh_desc->desc;
+ dma_addr_t desc_dma = dma_sh_desc->desc_dma;
+
+ /* init the job descriptor */
+ init_job_desc_shared(jd, desc_dma, desc_len(sh_desc), HDR_REVERSE);
+
+ /* set SEQIN PTR */
+ append_seq_in_ptr(jd, edesc->src_dma, edesc->src_len, 0);
+
+ /* set SEQOUT PTR */
+ append_seq_out_ptr(jd, edesc->dst_dma, edesc->dst_len, 0);
+
+#ifdef DEBUG
+ print_hex_dump(KERN_ERR, "caam dma desc@" __stringify(__LINE__) ": ",
+ DUMP_PREFIX_ADDRESS, 16, 4, jd, desc_bytes(jd), 1);
+#endif
+}
+
+static struct dma_async_tx_descriptor *
+caam_dma_prep_memcpy(struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
+ size_t len, unsigned long flags)
+{
+ struct caam_dma_edesc *edesc;
+ struct caam_dma_ctx *ctx = container_of(chan, struct caam_dma_ctx,
+ chan);
+
+ edesc = kzalloc(sizeof(*edesc) + DESC_JOB_IO_LEN, GFP_DMA | GFP_NOWAIT);
+ if (!edesc)
+ return ERR_PTR(-ENOMEM);
+
+ dma_async_tx_descriptor_init(&edesc->async_tx, chan);
+ edesc->async_tx.tx_submit = caam_dma_tx_submit;
+ edesc->async_tx.flags = flags;
+ edesc->async_tx.cookie = -EBUSY;
+
+ edesc->src_dma = src;
+ edesc->src_len = len;
+ edesc->dst_dma = dst;
+ edesc->dst_len = len;
+ edesc->ctx = ctx;
+
+ caam_dma_memcpy_init_job_desc(edesc);
+
+ return &edesc->async_tx;
+}
+
+/* This function can be called in an interrupt context */
+static void caam_dma_issue_pending(struct dma_chan *chan)
+{
+ struct caam_dma_ctx *ctx = container_of(chan, struct caam_dma_ctx,
+ chan);
+ struct caam_dma_edesc *edesc, *_edesc;
+
+ spin_lock_bh(&ctx->edesc_lock);
+ list_for_each_entry_safe(edesc, _edesc, &ctx->submit_q, node) {
+ if (caam_jr_enqueue(ctx->jrdev, edesc->jd,
+ caam_dma_done, edesc) < 0)
+ break;
+ list_del(&edesc->node);
+ }
+ spin_unlock_bh(&ctx->edesc_lock);
+}
+
+static void caam_dma_free_chan_resources(struct dma_chan *chan)
+{
+ struct caam_dma_ctx *ctx = container_of(chan, struct caam_dma_ctx,
+ chan);
+ struct caam_dma_edesc *edesc, *_edesc;
+
+ spin_lock_bh(&ctx->edesc_lock);
+ list_for_each_entry_safe(edesc, _edesc, &ctx->submit_q, node) {
+ list_del(&edesc->node);
+ kfree(edesc);
+ }
+ list_for_each_entry_safe(edesc, _edesc, &ctx->done_not_acked, node) {
+ list_del(&edesc->node);
+ kfree(edesc);
+ }
+ spin_unlock_bh(&ctx->edesc_lock);
+}
+
+static int caam_dma_jr_chan_bind(void)
+{
+ struct device *jrdev;
+ struct caam_dma_ctx *ctx;
+ int bonds = 0;
+ int i;
+
+ for (i = 0; i < caam_jr_driver_probed(); i++) {
+ jrdev = caam_jridx_alloc(i);
+ if (IS_ERR(jrdev)) {
+ pr_err("job ring device %d allocation failed\n", i);
+ continue;
+ }
+
+ ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
+ if (!ctx) {
+ caam_jr_free(jrdev);
+ continue;
+ }
+
+ ctx->chan.device = dma_dev;
+ ctx->chan.private = ctx;
+
+ ctx->jrdev = jrdev;
+
+ INIT_LIST_HEAD(&ctx->submit_q);
+ INIT_LIST_HEAD(&ctx->done_not_acked);
+ INIT_LIST_HEAD(&ctx->node);
+ spin_lock_init(&ctx->edesc_lock);
+
+ dma_cookie_init(&ctx->chan);
+
+ /* add the context of this channel to the context list */
+ list_add_tail(&ctx->node, &dma_ctx_list);
+
+ /* add this channel to the device chan list */
+ list_add_tail(&ctx->chan.device_node, &dma_dev->channels);
+
+ bonds++;
+ }
+
+ return bonds;
+}
+
+static inline void caam_jr_dma_free(struct dma_chan *chan)
+{
+ struct caam_dma_ctx *ctx = container_of(chan, struct caam_dma_ctx,
+ chan);
+
+ list_del(&ctx->node);
+ list_del(&chan->device_node);
+ caam_jr_free(ctx->jrdev);
+ kfree(ctx);
+}
+
+static void set_caam_dma_desc(u32 *desc)
+{
+ u32 *jmp_cmd;
+
+ /* dma shared descriptor */
+ init_sh_desc(desc, HDR_SHARE_NEVER | (1 << HDR_START_IDX_SHIFT));
+
+ /* REG1 = CAAM_DMA_CHUNK_SIZE */
+ append_math_add_imm_u32(desc, REG1, ZERO, IMM, CAAM_DMA_CHUNK_SIZE);
+
+ /* REG0 = SEQINLEN - CAAM_DMA_CHUNK_SIZE */
+ append_math_sub_imm_u32(desc, REG0, SEQINLEN, IMM, CAAM_DMA_CHUNK_SIZE);
+
+ /* if (REG0 > 0)
+ * jmp to LABEL1
+ */
+ jmp_cmd = append_jump(desc, JUMP_TEST_INVALL | JUMP_COND_MATH_N |
+ JUMP_COND_MATH_Z);
+
+ /* REG1 = SEQINLEN */
+ append_math_sub(desc, REG1, SEQINLEN, ZERO, CAAM_CMD_SZ);
+
+ /* LABEL1 */
+ set_jump_tgt_here(desc, jmp_cmd);
+
+ /* VARSEQINLEN = REG1 */
+ append_math_add(desc, VARSEQINLEN, REG1, ZERO, CAAM_CMD_SZ);
+
+ /* VARSEQOUTLEN = REG1 */
+ append_math_add(desc, VARSEQOUTLEN, REG1, ZERO, CAAM_CMD_SZ);
+
+ /* do FIFO STORE */
+ append_seq_fifo_store(desc, 0, FIFOST_TYPE_METADATA | LDST_VLF);
+
+ /* do FIFO LOAD */
+ append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 |
+ FIFOLD_TYPE_IFIFO | LDST_VLF);
+
+ /* if (REG0 > 0)
+ * jmp 0xF8 (after shared desc header)
+ */
+ append_jump(desc, JUMP_TEST_INVALL | JUMP_COND_MATH_N |
+ JUMP_COND_MATH_Z | 0xF8);
+
+#ifdef DEBUG
+ print_hex_dump(KERN_ERR, "caam dma shdesc@" __stringify(__LINE__) ": ",
+ DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+}
+
+static int __init caam_dma_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device *ctrldev = dev->parent;
+ struct dma_chan *chan, *_chan;
+ u32 *sh_desc;
+ int err = -ENOMEM;
+ int bonds;
+
+ if (!caam_jr_driver_probed()) {
+ dev_info(dev, "Defer probing after JR driver probing\n");
+ return -EPROBE_DEFER;
+ }
+
+ dma_dev = kzalloc(sizeof(*dma_dev), GFP_KERNEL);
+ if (!dma_dev)
+ return -ENOMEM;
+
+ dma_sh_desc = kzalloc(sizeof(*dma_sh_desc), GFP_KERNEL | GFP_DMA);
+ if (!dma_sh_desc)
+ goto desc_err;
+
+ sh_desc = dma_sh_desc->desc;
+ set_caam_dma_desc(sh_desc);
+ dma_sh_desc->desc_dma = dma_map_single(ctrldev, sh_desc,
+ desc_bytes(sh_desc),
+ DMA_TO_DEVICE);
+ if (dma_mapping_error(ctrldev, dma_sh_desc->desc_dma)) {
+ dev_err(dev, "unable to map dma descriptor\n");
+ goto map_err;
+ }
+
+ INIT_LIST_HEAD(&dma_dev->channels);
+
+ bonds = caam_dma_jr_chan_bind();
+ if (!bonds) {
+ err = -ENODEV;
+ goto jr_bind_err;
+ }
+
+ dma_dev->dev = dev;
+ dma_dev->residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
+ dma_cap_set(DMA_SG, dma_dev->cap_mask);
+ dma_cap_set(DMA_MEMCPY, dma_dev->cap_mask);
+ dma_cap_set(DMA_PRIVATE, dma_dev->cap_mask);
+ dma_dev->device_tx_status = dma_cookie_status;
+ dma_dev->device_issue_pending = caam_dma_issue_pending;
+ dma_dev->device_prep_dma_sg = caam_dma_prep_sg;
+ dma_dev->device_prep_dma_memcpy = caam_dma_prep_memcpy;
+ dma_dev->device_free_chan_resources = caam_dma_free_chan_resources;
+
+ err = dma_async_device_register(dma_dev);
+ if (err) {
+ dev_err(dev, "Failed to register CAAM DMA engine\n");
+ goto jr_bind_err;
+ }
+
+ dev_info(dev, "caam dma support with %d job rings\n", bonds);
+
+ return err;
+
+jr_bind_err:
+ list_for_each_entry_safe(chan, _chan, &dma_dev->channels, device_node)
+ caam_jr_dma_free(chan);
+
+ dma_unmap_single(ctrldev, dma_sh_desc->desc_dma, desc_bytes(sh_desc),
+ DMA_TO_DEVICE);
+map_err:
+ kfree(dma_sh_desc);
+desc_err:
+ kfree(dma_dev);
+ return err;
+}
+
+static int caam_dma_remove(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device *ctrldev = dev->parent;
+ struct caam_dma_ctx *ctx, *_ctx;
+
+ dma_async_device_unregister(dma_dev);
+
+ list_for_each_entry_safe(ctx, _ctx, &dma_ctx_list, node) {
+ list_del(&ctx->node);
+ caam_jr_free(ctx->jrdev);
+ kfree(ctx);
+ }
+
+ dma_unmap_single(ctrldev, dma_sh_desc->desc_dma,
+ desc_bytes(dma_sh_desc->desc), DMA_TO_DEVICE);
+
+ kfree(dma_sh_desc);
+ kfree(dma_dev);
+
+ dev_info(dev, "caam dma support disabled\n");
+ return 0;
+}
+
+static const struct of_device_id caam_dma_match[] = {
+ { .compatible = "fsl,sec-v5.4-dma", },
+ { .compatible = "fsl,sec-v5.0-dma", },
+ { .compatible = "fsl,sec-v4.0-dma", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, caam_dma_match);
+
+static struct platform_driver caam_dma_driver = {
+ .driver = {
+ .name = "caam-dma",
+ .of_match_table = caam_dma_match,
+ },
+ .probe = caam_dma_probe,
+ .remove = caam_dma_remove,
+};
+module_platform_driver(caam_dma_driver);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_DESCRIPTION("NXP CAAM support for SG DMA");
+MODULE_AUTHOR("NXP Semiconductors");
--- /dev/null
+++ b/drivers/dma/dpaa2-qdma/Kconfig
@@ -0,0 +1,8 @@

99
target/linux/layerscape/patches-4.9/806-flextimer-support-layerscape.patch
View File

@ -1,4 +1,4 @@
From a5b3155b532289af793c26251cb087b4a24d5c15 Mon Sep 17 00:00:00 2001
From 76cd2ef6b69b67c09480a3248f7b910897f0bb2f Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Mon, 25 Sep 2017 12:13:12 +0800
Subject: [PATCH] flextimer: support layerscape
@ -10,8 +10,8 @@ Signed-off-by: Meng Yi <meng.yi@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
drivers/clocksource/fsl_ftm_timer.c | 8 +-
drivers/soc/fsl/layerscape/ftm_alarm.c | 286 +++++++++++++++++++++++++++++++++
2 files changed, 290 insertions(+), 4 deletions(-)
drivers/soc/fsl/layerscape/ftm_alarm.c | 367 +++++++++++++++++++++++++++++++++
2 files changed, 371 insertions(+), 4 deletions(-)
create mode 100644 drivers/soc/fsl/layerscape/ftm_alarm.c
--- a/drivers/clocksource/fsl_ftm_timer.c
@ -34,7 +34,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
static inline void ftm_irq_enable(void __iomem *base)
--- /dev/null
+++ b/drivers/soc/fsl/layerscape/ftm_alarm.c
@@ -0,0 +1,286 @@
@@ -0,0 +1,367 @@
+/*
+ * Freescale FlexTimer Module (FTM) Alarm driver.
+ *
@ -53,6 +53,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/libata.h>
+#include <linux/module.h>
+
+#define FTM_SC 0x00
+#define FTM_SC_CLK_SHIFT 3
@ -77,6 +81,57 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+static u32 alarm_freq;
+static bool big_endian;
+
+enum pmu_endian_type {
+ BIG_ENDIAN,
+ LITTLE_ENDIAN,
+};
+
+struct rcpm_cfg {
+ enum pmu_endian_type big_endian; /* Big/Little endian of PMU module */
+ u32 flextimer_set_bit; /* FlexTimer1 is not powerdown during device LPM20 */
+};
+
+static struct rcpm_cfg ls1012a_rcpm_cfg = {
+ .big_endian = BIG_ENDIAN,
+ .flextimer_set_bit = 0x20000,
+};
+
+static struct rcpm_cfg ls1021a_rcpm_cfg = {
+ .big_endian = BIG_ENDIAN,
+ .flextimer_set_bit = 0x20000,
+};
+
+static struct rcpm_cfg ls1043a_rcpm_cfg = {
+ .big_endian = BIG_ENDIAN,
+ .flextimer_set_bit = 0x20000,
+};
+
+static struct rcpm_cfg ls1046a_rcpm_cfg = {
+ .big_endian = BIG_ENDIAN,
+ .flextimer_set_bit = 0x20000,
+};
+
+static struct rcpm_cfg ls1088a_rcpm_cfg = {
+ .big_endian = LITTLE_ENDIAN,
+ .flextimer_set_bit = 0x4000,
+};
+
+static struct rcpm_cfg ls208xa_rcpm_cfg = {
+ .big_endian = LITTLE_ENDIAN,
+ .flextimer_set_bit = 0x4000,
+};
+
+static const struct of_device_id ippdexpcr_of_match[] = {
+ { .compatible = "fsl,ls1012a-ftm", .data = &ls1012a_rcpm_cfg},
+ { .compatible = "fsl,ls1021a-ftm", .data = &ls1021a_rcpm_cfg},
+ { .compatible = "fsl,ls1043a-ftm", .data = &ls1043a_rcpm_cfg},
+ { .compatible = "fsl,ls1046a-ftm", .data = &ls1046a_rcpm_cfg},
+ { .compatible = "fsl,ls1088a-ftm", .data = &ls1088a_rcpm_cfg},
+ { .compatible = "fsl,ls208xa-ftm", .data = &ls208xa_rcpm_cfg},
+ {},
+};
+MODULE_DEVICE_TABLE(of, ippdexpcr_of_match);
+
+static inline u32 ftm_readl(void __iomem *addr)
+{
+ if (big_endian)
@ -251,7 +306,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ struct resource *r;
+ int irq;
+ int ret;
+ u32 ippdexpcr;
+ struct rcpm_cfg *rcpm_cfg;
+ u32 ippdexpcr, flextimer;
+ const struct of_device_id *of_id;
+ enum pmu_endian_type endian;
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!r)
@ -261,14 +319,32 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+ if (IS_ERR(ftm1_base))
+ return PTR_ERR(ftm1_base);
+
+ of_id = of_match_node(ippdexpcr_of_match, np);
+ if (!of_id)
+ return -ENODEV;
+
+ rcpm_cfg = devm_kzalloc(&pdev->dev, sizeof(*rcpm_cfg), GFP_KERNEL);
+ if (!rcpm_cfg)
+ return -ENOMEM;
+
+ rcpm_cfg = (struct rcpm_cfg*)of_id->data;
+ endian = rcpm_cfg->big_endian;
+ flextimer = rcpm_cfg->flextimer_set_bit;
+
+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "FlexTimer1");
+ if (r) {
+ rcpm_ftm_addr = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(rcpm_ftm_addr))
+ return PTR_ERR(rcpm_ftm_addr);
+ ippdexpcr = ioread32be(rcpm_ftm_addr);
+ ippdexpcr |= 0x20000;
+ iowrite32be(ippdexpcr, rcpm_ftm_addr);
+ if (endian == BIG_ENDIAN)
+ ippdexpcr = ioread32be(rcpm_ftm_addr);
+ else
+ ippdexpcr = ioread32(rcpm_ftm_addr);
+ ippdexpcr |= flextimer;
+ if (endian == BIG_ENDIAN)
+ iowrite32be(ippdexpcr, rcpm_ftm_addr);
+ else
+ iowrite32(ippdexpcr, rcpm_ftm_addr);
+ }
+
+ irq = irq_of_parse_and_map(np, 0);
@ -302,7 +378,12 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+}
+
+static const struct of_device_id ftm_alarm_match[] = {
+ { .compatible = "fsl,ftm-alarm", },
+ { .compatible = "fsl,ls1012a-ftm", },
+ { .compatible = "fsl,ls1021a-ftm", },
+ { .compatible = "fsl,ls1043a-ftm", },
+ { .compatible = "fsl,ls1046a-ftm", },
+ { .compatible = "fsl,ls1088a-ftm", },
+ { .compatible = "fsl,ls208xa-ftm", },
+ { .compatible = "fsl,ftm-timer", },
+ { },
+};

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