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bump to 9.003.05

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add RTL8125B(S) support
This commit is contained in:
goldkeyber112 2020-06-24 05:25:15 +08:00
parent 6e2c293610
commit f3225f6770
10 changed files with 3061 additions and 1185 deletions
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2
package/lean/r8125/Makefile
View File

@ -65,7 +65,7 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=r8125
PKG_VERSION:=9.002.02
PKG_VERSION:=9.003.05
PKG_RELEASE:=1
#PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2

6
package/lean/r8125/src/Makefile
View File

@ -37,8 +37,9 @@ CONFIG_DOWN_SPEED_100 = n
CONFIG_ASPM = y
ENABLE_S5WOL = y
ENABLE_S5_KEEP_CURR_MAC = n
ENABLE_EEE = n
ENABLE_EEE = y
ENABLE_S0_MAGIC_PACKET = n
ENABLE_TX_NO_CLOSE = y
ifneq ($(KERNELRELEASE),)
obj-m := r8125.o
@ -78,6 +79,9 @@ ifneq ($(KERNELRELEASE),)
ifeq ($(ENABLE_S0_MAGIC_PACKET), y)
EXTRA_CFLAGS += -DENABLE_S0_MAGIC_PACKET
endif
ifeq ($(ENABLE_TX_NO_CLOSE), y)
EXTRA_CFLAGS += -DENABLE_TX_NO_CLOSE
endif
else
BASEDIR := /lib/modules/$(shell uname -r)
KERNELDIR ?= $(BASEDIR)/build

74
package/lean/r8125/src/r8125.h
View File

@ -4,7 +4,7 @@
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -249,6 +249,14 @@ do { \
#define SUPPORTED_Asym_Pause (1 << 14)
#endif
#ifndef MDIO_EEE_100TX
#define MDIO_EEE_100TX 0x0002
#endif
#ifndef MDIO_EEE_1000T
#define MDIO_EEE_1000T 0x0004
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
#ifdef CONFIG_NET_POLL_CONTROLLER
#define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8125_netpoll
@ -315,12 +323,12 @@ do { \
#define DASH_SUFFIX ""
#endif
#define RTL8125_VERSION "9.002.02" NAPI_SUFFIX DASH_SUFFIX
#define RTL8125_VERSION "9.003.05" NAPI_SUFFIX DASH_SUFFIX
#define MODULENAME "r8125"
#define PFX MODULENAME ": "
#define GPL_CLAIM "\
r8125 Copyright (C) 2019 Realtek NIC software team <nicfae@realtek.com> \n \
r8125 Copyright (C) 2020 Realtek NIC software team <nicfae@realtek.com> \n \
This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \
This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n"
@ -339,9 +347,6 @@ This is free software, and you are welcome to redistribute it under certain cond
#define R8125_MSG_DEFAULT \
(NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
#define TX_BUFFS_AVAIL(tp) \
(tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
#ifdef CONFIG_R8125_NAPI
#define rtl8125_rx_hwaccel_skb vlan_hwaccel_receive_skb
#define rtl8125_rx_quota(count, quota) min(count, quota)
@ -417,13 +422,15 @@ This is free software, and you are welcome to redistribute it under certain cond
#define SHORT_PACKET_PADDING_BUF_SIZE 256
#define RTK_MAGIC_DEBUG_VALUE 0x0badbeef
/* write/read MMIO register */
#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
#define RTL_R8(reg) readb (ioaddr + (reg))
#define RTL_R16(reg) readw (ioaddr + (reg))
#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
#define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg))
#define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg))
#define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg))
#define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg))
#define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg))
#define RTL_R32(tp, reg) ((unsigned long) readl(tp->mmio_addr + (reg)))
#ifndef DMA_64BIT_MASK
#define DMA_64BIT_MASK 0xffffffffffffffffULL
@ -479,6 +486,10 @@ This is free software, and you are welcome to redistribute it under certain cond
#define RTK_ADVERTISE_2500FULL 0x80
/* Tx NO CLOSE */
#define MAX_TX_NO_CLOSE_DESC_PTR_V2 0x10000
#define TX_NO_CLOSE_SW_PTR_MASK_V2 0x1FFFF
/*****************************************************************************/
//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3)
@ -1099,6 +1110,9 @@ enum RTL8125_registers {
TIMER_INT1_8125 = 0x005C,
TIMER_INT2_8125 = 0x008C,
TIMER_INT3_8125 = 0x00F4,
EEE_TXIDLE_TIMER_8125 = 0x6048,
SW_TAIL_PTR0_8125 = 0x2800,
HW_CLO_PTR0_8125 = 0x2802,
};
enum RTL8125_register_content {
@ -1562,6 +1576,7 @@ struct rtl8125_private {
u8 ShortPacketSwChecksum;
u8 UseSwPaddingShortPkt;
u16 SwPaddingShortPktLen;
void *ShortPacketEmptyBuffer;
dma_addr_t ShortPacketEmptyBufferPhy;
@ -1576,6 +1591,10 @@ struct rtl8125_private {
u8 RequiredSecLanDonglePatch;
u8 RequirePhyMdiSwapPatch;
u8 RequireLSOPatch;
u32 HwFiberModeVer;
u32 HwFiberStat;
u8 HwSwitchMdiToFiber;
@ -1594,6 +1613,11 @@ struct rtl8125_private {
u32 HwPcieSNOffset;
u8 HwSuppTxNoCloseVer;
u8 EnableTxNoClose;
u32 NextHwDesCloPtr0;
u32 BeginHwDesCloPtr0;
//Dash+++++++++++++++++
u8 HwSuppDashVer;
u8 DASH;
@ -1683,6 +1707,9 @@ struct rtl8125_private {
//Realwow--------------
#endif //ENABLE_REALWOW_SUPPORT
u32 eee_adv_t;
u8 eee_enabled;
#ifdef ENABLE_R8125_PROCFS
//Procfs support
struct proc_dir_entry *proc_dir;
@ -1697,8 +1724,10 @@ enum eetype {
};
enum mcfg {
CFG_METHOD_2=0,
CFG_METHOD_2=2,
CFG_METHOD_3,
CFG_METHOD_4,
CFG_METHOD_5,
CFG_METHOD_MAX,
CFG_METHOD_DEFAULT = 0xFF
};
@ -1731,6 +1760,8 @@ enum mcfg {
//Ram Code Version
#define NIC_RAMCODE_VERSION_CFG_METHOD_2 (0x0b11)
#define NIC_RAMCODE_VERSION_CFG_METHOD_3 (0x0b33)
#define NIC_RAMCODE_VERSION_CFG_METHOD_4 (0x0b17)
#define NIC_RAMCODE_VERSION_CFG_METHOD_5 (0x0b34)
//hwoptimize
#define HW_PATCH_SOC_LAN (BIT_0)
@ -1738,11 +1769,11 @@ enum mcfg {
void rtl8125_mdio_write(struct rtl8125_private *tp, u32 RegAddr, u32 value);
void rtl8125_mdio_prot_write(struct rtl8125_private *tp, u32 RegAddr, u32 value);
void rtl8125_mdio_prot_write_phy_ocp(struct rtl8125_private *tp, u32 RegAddr, u32 value);
void rtl8125_mdio_prot_direct_write_phy_ocp(struct rtl8125_private *tp, u32 RegAddr, u32 value);
u32 rtl8125_mdio_read(struct rtl8125_private *tp, u32 RegAddr);
u32 rtl8125_mdio_prot_read(struct rtl8125_private *tp, u32 RegAddr);
u32 rtl8125_mdio_prot_read_phy_ocp(struct rtl8125_private *tp, u32 RegAddr);
void rtl8125_ephy_write(void __iomem *ioaddr, int RegAddr, int value);
u32 rtl8125_mdio_prot_direct_read_phy_ocp(struct rtl8125_private *tp, u32 RegAddr);
void rtl8125_ephy_write(struct rtl8125_private *tp, int RegAddr, int value);
void rtl8125_mac_ocp_write(struct rtl8125_private *tp, u16 reg_addr, u16 value);
u16 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr);
void rtl8125_clear_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask);
@ -1750,16 +1781,16 @@ void rtl8125_set_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask);
void rtl8125_ocp_write(struct rtl8125_private *tp, u16 addr, u8 len, u32 data);
void rtl8125_oob_notify(struct rtl8125_private *tp, u8 cmd);
void rtl8125_init_ring_indexes(struct rtl8125_private *tp);
int rtl8125_eri_write(void __iomem *ioaddr, int addr, int len, u32 value, int type);
int rtl8125_eri_write(struct rtl8125_private *tp, int addr, int len, u32 value, int type);
void rtl8125_oob_mutex_lock(struct rtl8125_private *tp);
u32 rtl8125_mdio_read(struct rtl8125_private *tp, u32 RegAddr);
u32 rtl8125_ocp_read(struct rtl8125_private *tp, u16 addr, u8 len);
u32 rtl8125_ocp_read_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 base_address);
u32 rtl8125_ocp_write_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 value, u32 base_address);
u32 rtl8125_eri_read(void __iomem *ioaddr, int addr, int len, int type);
u32 rtl8125_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int len, int type, u32 base_address);
int rtl8125_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int len, u32 value, int type, u32 base_address);
u16 rtl8125_ephy_read(void __iomem *ioaddr, int RegAddr);
u32 rtl8125_eri_read(struct rtl8125_private *tp, int addr, int len, int type);
u32 rtl8125_eri_read_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, int type, u32 base_address);
int rtl8125_eri_write_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, u32 value, int type, u32 base_address);
u16 rtl8125_ephy_read(struct rtl8125_private *tp, int RegAddr);
void rtl8125_wait_txrx_fifo_empty(struct net_device *dev);
void rtl8125_enable_now_is_oob(struct rtl8125_private *tp);
void rtl8125_disable_now_is_oob(struct rtl8125_private *tp);
@ -1771,6 +1802,7 @@ void rtl8125_dash2_enable_rx(struct rtl8125_private *tp);
void rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev);
#define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M) ((_M)->HwSuppCheckPhyDisableModeVer > 0 )
#define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M) (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0)
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
#define netdev_mc_count(dev) ((dev)->mc_count)

14
package/lean/r8125/src/r8125_dash.h
View File

@ -4,7 +4,7 @@
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -241,12 +241,12 @@ RX_DASH_BUFFER_TYPE_2, *PRX_DASH_BUFFER_TYPE_2;
#define CMAC_TXDESC_OFFSET 0x98 //TX: 0x98 - 0x9F
/* cmac write/read MMIO register */
#define RTL_CMAC_W8(reg, val8) writeb ((val8), tp->cmac_ioaddr + (reg))
#define RTL_CMAC_W16(reg, val16) writew ((val16), tp->cmac_ioaddr + (reg))
#define RTL_CMAC_W32(reg, val32) writel ((val32), tp->cmac_ioaddr + (reg))
#define RTL_CMAC_R8(reg) readb (tp->cmac_ioaddr + (reg))
#define RTL_CMAC_R16(reg) readw (tp->cmac_ioaddr + (reg))
#define RTL_CMAC_R32(reg) ((unsigned long) readl (tp->cmac_ioaddr + (reg)))
#define RTL_CMAC_W8(tp, reg, val8) writeb ((val8), tp->cmac_ioaddr + (reg))
#define RTL_CMAC_W16(tp, reg, val16) writew ((val16), tp->cmac_ioaddr + (reg))
#define RTL_CMAC_W32(tp, reg, val32) writel ((val32), tp->cmac_ioaddr + (reg))
#define RTL_CMAC_R8(tp, reg) readb (tp->cmac_ioaddr + (reg))
#define RTL_CMAC_R16(tp, reg) readw (tp->cmac_ioaddr + (reg))
#define RTL_CMAC_R32(tp, reg) ((unsigned long) readl (tp->cmac_ioaddr + (reg)))
int rtl8125_dash_ioctl(struct net_device *dev, struct ifreq *ifr);
void HandleDashInterrupt(struct net_device *dev);

3996
package/lean/r8125/src/r8125_n.c
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File diff suppressed because it is too large Load Diff

2
package/lean/r8125/src/r8125_realwow.h
View File

@ -4,7 +4,7 @@
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

117
package/lean/r8125/src/rtl_eeprom.c
View File

@ -4,7 +4,7 @@
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -52,18 +52,17 @@
//-------------------------------------------------------------------
void rtl8125_eeprom_type(struct rtl8125_private *tp)
{
void __iomem *ioaddr=tp->mmio_addr;
u16 magic = 0;
if (tp->mcfg == CFG_METHOD_DEFAULT)
goto out_no_eeprom;
if(RTL_R8(0xD2)&0x04) {
if(RTL_R8(tp, 0xD2)&0x04) {
//not support
//tp->eeprom_type = EEPROM_TWSI;
//tp->eeprom_len = 256;
goto out_no_eeprom;
} else if(RTL_R32(RxConfig) & RxCfg_9356SEL) {
} else if(RTL_R32(tp, RxConfig) & RxCfg_9356SEL) {
tp->eeprom_type = EEPROM_TYPE_93C56;
tp->eeprom_len = 256;
} else {
@ -80,28 +79,28 @@ out_no_eeprom:
}
}
void rtl8125_eeprom_cleanup(void __iomem *ioaddr)
void rtl8125_eeprom_cleanup(struct rtl8125_private *tp)
{
u8 x;
x = RTL_R8(Cfg9346);
x = RTL_R8(tp, Cfg9346);
x &= ~(Cfg9346_EEDI | Cfg9346_EECS);
RTL_W8(Cfg9346, x);
RTL_W8(tp, Cfg9346, x);
rtl8125_raise_clock(&x, ioaddr);
rtl8125_lower_clock(&x, ioaddr);
rtl8125_raise_clock(tp, &x);
rtl8125_lower_clock(tp, &x);
}
int rtl8125_eeprom_cmd_done(void __iomem *ioaddr)
int rtl8125_eeprom_cmd_done(struct rtl8125_private *tp)
{
u8 x;
int i;
rtl8125_stand_by(ioaddr);
rtl8125_stand_by(tp);
for (i = 0; i < 50000; i++) {
x = RTL_R8(Cfg9346);
x = RTL_R8(tp, Cfg9346);
if (x & Cfg9346_EEDO) {
udelay(RTL_CLOCK_RATE * 2 * 3);
@ -119,7 +118,6 @@ int rtl8125_eeprom_cmd_done(void __iomem *ioaddr)
//-------------------------------------------------------------------
u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg)
{
void __iomem *ioaddr=tp->mmio_addr;
int addr_sz = 6;
u8 x;
u16 data;
@ -134,16 +132,16 @@ u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg)
addr_sz = 8;
x = Cfg9346_EEM1 | Cfg9346_EECS;
RTL_W8(Cfg9346, x);
RTL_W8(tp, Cfg9346, x);
rtl8125_shift_out_bits(RTL_EEPROM_READ_OPCODE, 3, ioaddr);
rtl8125_shift_out_bits(reg, addr_sz, ioaddr);
rtl8125_shift_out_bits(tp, RTL_EEPROM_READ_OPCODE, 3);
rtl8125_shift_out_bits(tp, reg, addr_sz);
data = rtl8125_shift_in_bits(ioaddr);
data = rtl8125_shift_in_bits(tp);
rtl8125_eeprom_cleanup(ioaddr);
rtl8125_eeprom_cleanup(tp);
RTL_W8(Cfg9346, 0);
RTL_W8(tp, Cfg9346, 0);
return data;
}
@ -154,7 +152,6 @@ u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg)
//-------------------------------------------------------------------
void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data)
{
void __iomem *ioaddr=tp->mmio_addr;
u8 x;
int addr_sz = 6;
int w_dummy_addr = 4;
@ -172,56 +169,56 @@ void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data)
}
x = Cfg9346_EEM1 | Cfg9346_EECS;
RTL_W8(Cfg9346, x);
RTL_W8(tp, Cfg9346, x);
rtl8125_shift_out_bits(RTL_EEPROM_EWEN_OPCODE, 5, ioaddr);
rtl8125_shift_out_bits(reg, w_dummy_addr, ioaddr);
rtl8125_stand_by(ioaddr);
rtl8125_shift_out_bits(tp, RTL_EEPROM_EWEN_OPCODE, 5);
rtl8125_shift_out_bits(tp, reg, w_dummy_addr);
rtl8125_stand_by(tp);
rtl8125_shift_out_bits(RTL_EEPROM_ERASE_OPCODE, 3, ioaddr);
rtl8125_shift_out_bits(reg, addr_sz, ioaddr);
if (rtl8125_eeprom_cmd_done(ioaddr) < 0) {
rtl8125_shift_out_bits(tp, RTL_EEPROM_ERASE_OPCODE, 3);
rtl8125_shift_out_bits(tp, reg, addr_sz);
if (rtl8125_eeprom_cmd_done(tp) < 0) {
return;
}
rtl8125_stand_by(ioaddr);
rtl8125_stand_by(tp);
rtl8125_shift_out_bits(RTL_EEPROM_WRITE_OPCODE, 3, ioaddr);
rtl8125_shift_out_bits(reg, addr_sz, ioaddr);
rtl8125_shift_out_bits(data, 16, ioaddr);
if (rtl8125_eeprom_cmd_done(ioaddr) < 0) {
rtl8125_shift_out_bits(tp, RTL_EEPROM_WRITE_OPCODE, 3);
rtl8125_shift_out_bits(tp, reg, addr_sz);
rtl8125_shift_out_bits(tp, data, 16);
if (rtl8125_eeprom_cmd_done(tp) < 0) {
return;
}
rtl8125_stand_by(ioaddr);
rtl8125_stand_by(tp);
rtl8125_shift_out_bits(RTL_EEPROM_EWDS_OPCODE, 5, ioaddr);
rtl8125_shift_out_bits(reg, w_dummy_addr, ioaddr);
rtl8125_shift_out_bits(tp, RTL_EEPROM_EWDS_OPCODE, 5);
rtl8125_shift_out_bits(tp, reg, w_dummy_addr);
rtl8125_eeprom_cleanup(ioaddr);
RTL_W8(Cfg9346, 0);
rtl8125_eeprom_cleanup(tp);
RTL_W8(tp, Cfg9346, 0);
}
void rtl8125_raise_clock(u8 *x, void __iomem *ioaddr)
void rtl8125_raise_clock(struct rtl8125_private *tp, u8 *x)
{
*x = *x | Cfg9346_EESK;
RTL_W8(Cfg9346, *x);
RTL_W8(tp, Cfg9346, *x);
udelay(RTL_CLOCK_RATE);
}
void rtl8125_lower_clock(u8 *x, void __iomem *ioaddr)
void rtl8125_lower_clock(struct rtl8125_private *tp, u8 *x)
{
*x = *x & ~Cfg9346_EESK;
RTL_W8(Cfg9346, *x);
RTL_W8(tp, Cfg9346, *x);
udelay(RTL_CLOCK_RATE);
}
void rtl8125_shift_out_bits(int data, int count, void __iomem *ioaddr)
void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count)
{
u8 x;
int mask;
mask = 0x01 << (count - 1);
x = RTL_R8(Cfg9346);
x = RTL_R8(tp, Cfg9346);
x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
do {
@ -230,62 +227,62 @@ void rtl8125_shift_out_bits(int data, int count, void __iomem *ioaddr)
else
x &= ~Cfg9346_EEDI;
RTL_W8(Cfg9346, x);
RTL_W8(tp, Cfg9346, x);
udelay(RTL_CLOCK_RATE);
rtl8125_raise_clock(&x, ioaddr);
rtl8125_lower_clock(&x, ioaddr);
rtl8125_raise_clock(tp, &x);
rtl8125_lower_clock(tp, &x);
mask = mask >> 1;
} while(mask);
x &= ~Cfg9346_EEDI;
RTL_W8(Cfg9346, x);
RTL_W8(tp, Cfg9346, x);
}
u16 rtl8125_shift_in_bits(void __iomem *ioaddr)
u16 rtl8125_shift_in_bits(struct rtl8125_private *tp)
{
u8 x;
u16 d, i;
x = RTL_R8(Cfg9346);
x = RTL_R8(tp, Cfg9346);
x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
d = 0;
for (i = 0; i < 16; i++) {
d = d << 1;
rtl8125_raise_clock(&x, ioaddr);
rtl8125_raise_clock(tp, &x);
x = RTL_R8(Cfg9346);
x = RTL_R8(tp, Cfg9346);
x &= ~Cfg9346_EEDI;
if (x & Cfg9346_EEDO)
d |= 1;
rtl8125_lower_clock(&x, ioaddr);
rtl8125_lower_clock(tp, &x);
}
return d;
}
void rtl8125_stand_by(void __iomem *ioaddr)
void rtl8125_stand_by(struct rtl8125_private *tp)
{
u8 x;
x = RTL_R8(Cfg9346);
x = RTL_R8(tp, Cfg9346);
x &= ~(Cfg9346_EECS | Cfg9346_EESK);
RTL_W8(Cfg9346, x);
RTL_W8(tp, Cfg9346, x);
udelay(RTL_CLOCK_RATE);
x |= Cfg9346_EECS;
RTL_W8(Cfg9346, x);
RTL_W8(tp, Cfg9346, x);
}
void rtl8125_set_eeprom_sel_low(void __iomem *ioaddr)
void rtl8125_set_eeprom_sel_low(struct rtl8125_private *tp)
{
RTL_W8(Cfg9346, Cfg9346_EEM1);
RTL_W8(Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK);
RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
RTL_W8(tp, Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK);
udelay(20);
RTL_W8(Cfg9346, Cfg9346_EEM1);
RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
}

19
package/lean/r8125/src/rtl_eeprom.h
View File

@ -4,7 +4,7 @@
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -41,15 +41,12 @@
#define RTL_CLOCK_RATE 3
void rtl8125_eeprom_type(struct rtl8125_private *tp);
void rtl8125_eeprom_cleanup(void __iomem *ioaddr);
void rtl8125_eeprom_cleanup(struct rtl8125_private *tp);
u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg);
void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data);
void rtl8125_shift_out_bits(int data, int count, void __iomem *ioaddr);
u16 rtl8125_shift_in_bits(void __iomem *ioaddr);
void rtl8125_raise_clock(u8 *x, void __iomem *ioaddr);
void rtl8125_lower_clock(u8 *x, void __iomem *ioaddr);
void rtl8125_stand_by(void __iomem *ioaddr);
void rtl8125_set_eeprom_sel_low(void __iomem *ioaddr);
void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count);
u16 rtl8125_shift_in_bits(struct rtl8125_private *tp);
void rtl8125_raise_clock(struct rtl8125_private *tp, u8 *x);
void rtl8125_lower_clock(struct rtl8125_private *tp, u8 *x);
void rtl8125_stand_by(struct rtl8125_private *tp);
void rtl8125_set_eeprom_sel_low(struct rtl8125_private *tp);

14
package/lean/r8125/src/rtltool.c
View File

@ -4,7 +4,7 @@
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -121,7 +121,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
return -EPERM;
spin_lock_irqsave(&tp->lock, flags);
my_cmd.data = rtl8125_ephy_read(tp->mmio_addr, my_cmd.offset);
my_cmd.data = rtl8125_ephy_read(tp, my_cmd.offset);
spin_unlock_irqrestore(&tp->lock, flags);
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
@ -136,7 +136,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
return -EPERM;
spin_lock_irqsave(&tp->lock, flags);
rtl8125_ephy_write(tp->mmio_addr, my_cmd.offset, my_cmd.data);
rtl8125_ephy_write(tp, my_cmd.offset, my_cmd.data);
spin_unlock_irqrestore(&tp->lock, flags);
break;
@ -144,7 +144,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
my_cmd.data = 0;
if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
spin_lock_irqsave(&tp->lock, flags);
my_cmd.data = rtl8125_eri_read(tp->mmio_addr, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
my_cmd.data = rtl8125_eri_read(tp, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
spin_unlock_irqrestore(&tp->lock, flags);
} else {
ret = -EOPNOTSUPP;
@ -167,7 +167,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
spin_lock_irqsave(&tp->lock, flags);
rtl8125_eri_write(tp->mmio_addr, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
rtl8125_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
spin_unlock_irqrestore(&tp->lock, flags);
} else {
ret = -EOPNOTSUPP;
@ -330,7 +330,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
return -EPERM;
spin_lock_irqsave(&tp->lock, flags);
my_cmd.data = rtl8125_mdio_prot_read_phy_ocp(tp, my_cmd.offset);
my_cmd.data = rtl8125_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset);
spin_unlock_irqrestore(&tp->lock, flags);
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
@ -345,7 +345,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
return -EPERM;
spin_lock_irqsave(&tp->lock, flags);
rtl8125_mdio_prot_write_phy_ocp(tp, my_cmd.offset, my_cmd.data);
rtl8125_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data);
spin_unlock_irqrestore(&tp->lock, flags);
break;

2
package/lean/r8125/src/rtltool.h
View File

@ -4,7 +4,7 @@
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free