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kernel: bump to 3.8.134, 4.9.155, 4.14.98, 4.19.20

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This commit is contained in:
coolsnowwolf 2019-02-12 23:17:22 +08:00
parent 42c7a446e3
commit f16d4fe369
110 changed files with 4577 additions and 633 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
include/kernel-version.mk
View File

@ -2,15 +2,15 @@
LINUX_RELEASE?=1
LINUX_VERSION-3.18 = .133
LINUX_VERSION-4.9 = .153
LINUX_VERSION-4.14 = .96
LINUX_VERSION-4.19 = .16
LINUX_VERSION-3.18 = .134
LINUX_VERSION-4.9 = .155
LINUX_VERSION-4.14 = .98
LINUX_VERSION-4.19 = .20
LINUX_KERNEL_HASH-3.18.133 = 3ec7f47365a8a050e629a5016e90e38a800e840c844901c979e9e796f8dc6711
LINUX_KERNEL_HASH-4.9.153 = 9066929ec2550794ae107350a5f3c5b648438aa915cfc62bac5b7a54b9d7731a
LINUX_KERNEL_HASH-4.14.96 = 110daeae1a416b7e0ec8dce5e86d67552deeb4567f696c3869389be239f0ecb5
LINUX_KERNEL_HASH-4.19.16 = d8a088381fe3e7e5484c060dabcdda4b053ef7114f91cfd56db003a89bb11bdf
LINUX_KERNEL_HASH-3.18.134 = 36bdd04cab3b6c824a4b7e32ae02503f437e0916d5a4ff04c90aa22da2749c2f
LINUX_KERNEL_HASH-4.9.155 = a52ac60be33c0fe312d99361f8e30211599956e958ba415d93194c6c9d073c9d
LINUX_KERNEL_HASH-4.14.98 = 8f021171b1b1efb41326e603116a45126fc030d06aaa9b0784ae612323010c5f
LINUX_KERNEL_HASH-4.19.20 = dc7d2776dad4bf738e741ed05e7d1bea685855cfb7a62d1706f5f7aeabfa04a4
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

6
target/linux/ar71xx/patches-4.14/950-add-boardinfo-platform-data.patch
View File

@ -26,7 +26,7 @@
#endif /* __MDIO_BOARD_INFO_H */
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
@@ -455,6 +455,17 @@ void mdiobus_free(struct mii_bus *bus)
@@ -456,6 +456,17 @@ void mdiobus_free(struct mii_bus *bus)
}
EXPORT_SYMBOL(mdiobus_free);
@ -44,7 +44,7 @@
/**
* mdiobus_scan - scan a bus for MDIO devices.
* @bus: mii_bus to scan
@@ -470,6 +481,7 @@ EXPORT_SYMBOL(mdiobus_free);
@@ -471,6 +482,7 @@ EXPORT_SYMBOL(mdiobus_free);
struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr)
{
struct phy_device *phydev;
@ -52,7 +52,7 @@
int err;
phydev = get_phy_device(bus, addr, false);
@@ -482,6 +494,12 @@ struct phy_device *mdiobus_scan(struct m
@@ -483,6 +495,12 @@ struct phy_device *mdiobus_scan(struct m
*/
of_mdiobus_link_mdiodev(bus, &phydev->mdio);

10
target/linux/brcm2708/patches-4.14/950-0292-net-mdiobus-add-unlocked-accessors.patch
View File

@ -19,7 +19,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
@@ -493,6 +493,55 @@ struct phy_device *mdiobus_scan(struct m
@@ -494,6 +494,55 @@ struct phy_device *mdiobus_scan(struct m
EXPORT_SYMBOL(mdiobus_scan);
/**
@ -75,7 +75,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
* mdiobus_read_nested - Nested version of the mdiobus_read function
* @bus: the mii_bus struct
* @addr: the phy address
@@ -512,11 +561,9 @@ int mdiobus_read_nested(struct mii_bus *
@@ -513,11 +562,9 @@ int mdiobus_read_nested(struct mii_bus *
BUG_ON(in_interrupt());
mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
@ -88,7 +88,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return retval;
}
EXPORT_SYMBOL(mdiobus_read_nested);
@@ -538,11 +585,9 @@ int mdiobus_read(struct mii_bus *bus, in
@@ -539,11 +586,9 @@ int mdiobus_read(struct mii_bus *bus, in
BUG_ON(in_interrupt());
mutex_lock(&bus->mdio_lock);
@ -101,7 +101,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return retval;
}
EXPORT_SYMBOL(mdiobus_read);
@@ -568,11 +613,9 @@ int mdiobus_write_nested(struct mii_bus
@@ -569,11 +614,9 @@ int mdiobus_write_nested(struct mii_bus
BUG_ON(in_interrupt());
mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
@ -114,7 +114,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
return err;
}
EXPORT_SYMBOL(mdiobus_write_nested);
@@ -595,11 +638,9 @@ int mdiobus_write(struct mii_bus *bus, i
@@ -596,11 +639,9 @@ int mdiobus_write(struct mii_bus *bus, i
BUG_ON(in_interrupt());
mutex_lock(&bus->mdio_lock);

13
target/linux/brcm47xx/patches-4.14/161-MIPS-BCM47XX-Enable-USB-power-on-Netgear-WNDR3400v3.patch → target/linux/brcm47xx/patches-4.14/034-v4.20-MIPS-BCM47XX-Enable-USB-power-on-Netgear-WNDR3400v3.patch
View File

@ -1,13 +1,22 @@
From 17cb62255ef8f6b6ac270024204a8fa65537b333 Mon Sep 17 00:00:00 2001
From feef7918667b84f9d5653c501542dd8d84ae32af Mon Sep 17 00:00:00 2001
From: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date: Sun, 19 Aug 2018 21:23:14 +0300
Date: Sun, 19 Aug 2018 22:20:23 +0300
Subject: [PATCH] MIPS: BCM47XX: Enable USB power on Netgear WNDR3400v3
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Setting GPIO 21 high seems to be required to enable power to USB ports
on the WNDR3400v3. As there is already similar code for WNR3500L,
make the existing USB power GPIO code generic and use that.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20259/
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
---
arch/mips/bcm47xx/workarounds.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)

2
target/linux/brcm47xx/patches-4.14/901-Revert-bcma-switch-GPIO-portions-to-use-GPIOLIB_IRQC.patch
View File

@ -188,7 +188,7 @@ Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
chip->direction_input = bcma_gpio_direction_input;
chip->direction_output = bcma_gpio_direction_output;
- chip->owner = THIS_MODULE;
- chip->parent = bcma_bus_get_host_dev(bus);
- chip->parent = bus->dev;
+#if IS_BUILTIN(CONFIG_BCM47XX) || IS_BUILTIN(CONFIG_ARCH_BCM_5301X)
+ chip->to_irq = bcma_gpio_to_irq;
+#endif

13
target/linux/brcm47xx/patches-4.19/161-MIPS-BCM47XX-Enable-USB-power-on-Netgear-WNDR3400v3.patch → target/linux/brcm47xx/patches-4.19/030-v4.20-MIPS-BCM47XX-Enable-USB-power-on-Netgear-WNDR3400v3.patch
View File

@ -1,13 +1,22 @@
From 17cb62255ef8f6b6ac270024204a8fa65537b333 Mon Sep 17 00:00:00 2001
From feef7918667b84f9d5653c501542dd8d84ae32af Mon Sep 17 00:00:00 2001
From: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date: Sun, 19 Aug 2018 21:23:14 +0300
Date: Sun, 19 Aug 2018 22:20:23 +0300
Subject: [PATCH] MIPS: BCM47XX: Enable USB power on Netgear WNDR3400v3
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Setting GPIO 21 high seems to be required to enable power to USB ports
on the WNDR3400v3. As there is already similar code for WNR3500L,
make the existing USB power GPIO code generic and use that.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20259/
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
---
arch/mips/bcm47xx/workarounds.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)

4
target/linux/brcm47xx/patches-4.19/830-huawei_e970_support.patch
View File

@ -8,7 +8,7 @@
#include <asm/bootinfo.h>
#include <asm/idle.h>
#include <asm/prom.h>
@@ -225,6 +226,33 @@ static struct fixed_phy_status bcm47xx_f
@@ -254,6 +255,33 @@ static struct fixed_phy_status bcm47xx_f
.duplex = DUPLEX_FULL,
};
@ -42,7 +42,7 @@
static int __init bcm47xx_register_bus_complete(void)
{
switch (bcm47xx_bus_type) {
@@ -244,6 +272,7 @@ static int __init bcm47xx_register_bus_c
@@ -275,6 +303,7 @@ static int __init bcm47xx_register_bus_c
bcm47xx_workarounds();
fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status, -1);

495
target/linux/gemini/config-4.19 Normal file
View File

@ -0,0 +1,495 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_AMBA_PL08X=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_GEMINI=y
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_ARCH_HAS_KCOV=y
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
CONFIG_ARCH_HAS_SET_MEMORY=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_ARCH_MOXART is not set
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V4=y
# CONFIG_ARCH_MULTI_V4T is not set
CONFIG_ARCH_MULTI_V4_V5=y
# CONFIG_ARCH_MULTI_V5 is not set
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_SMMU is not set
# CONFIG_ARM_SP805_WATCHDOG is not set
CONFIG_ARM_UNWIND=y
CONFIG_ATA=y
CONFIG_ATAGS=y
CONFIG_ATA_VERBOSE_ERROR=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_MISC=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BOUNCE=y
# CONFIG_BPF_SYSCALL is not set
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=16
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
CONFIG_CMDLINE="console=ttyS0,19200n8"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_GEMINI=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_COREDUMP=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_CPU_CACHE_FA=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FA=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
CONFIG_CPU_FA526=y
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_NO_EFFICIENT_FFS=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_TLB_FA=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRASH_CORE=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC_CCITT=y
CONFIG_CRC_ITU_T=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_CCM=y
CONFIG_CRYPTO_CMAC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CTR=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_GCM=y
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_GHASH=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_USER is not set
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_IOSCHED="cfq"
CONFIG_DMADEVICES=y
CONFIG_DMATEST=y
CONFIG_DMA_CMA=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_ENGINE_RAID=y
CONFIG_DMA_OF=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DRM=y
CONFIG_DRM_BRIDGE=y
# CONFIG_DRM_CDNS_DSI is not set
# CONFIG_DRM_DEBUG_SELFTEST is not set
CONFIG_DRM_GEM_CMA_HELPER=y
# CONFIG_DRM_I2C_NXP_TDA9950 is not set
CONFIG_DRM_KMS_CMA_HELPER=y
CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_KMS_HELPER=y
CONFIG_DRM_PANEL=y
# CONFIG_DRM_PANEL_ARM_VERSATILE is not set
CONFIG_DRM_PANEL_BRIDGE=y
CONFIG_DRM_PANEL_ILITEK_IL9322=y
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
# CONFIG_DRM_RCAR_LVDS is not set
# CONFIG_DRM_SII9234 is not set
# CONFIG_DRM_THINE_THC63LVD1024 is not set
CONFIG_DRM_TVE200=y
# CONFIG_DRM_VKMS is not set
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_93CX6=y
CONFIG_ELF_CORE=y
# CONFIG_EMBEDDED is not set
# CONFIG_EXPERT is not set
CONFIG_EXT4_FS=y
CONFIG_FARADAY_FTINTC010=y
CONFIG_FB=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_CMDLINE=y
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_FOPS=y
CONFIG_FB_SYS_IMAGEBLIT=y
CONFIG_FHANDLE=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
# CONFIG_FONTS is not set
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
CONFIG_FONT_SUPPORT=y
# CONFIG_FPE_FASTFPE is not set
# CONFIG_FPE_NWFPE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FTTMR010_TIMER=y
CONFIG_FTWDT010_WATCHDOG=y
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_GEMINI_ETHERNET=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GLOB=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_FTGPIO010=y
CONFIG_GPIO_GENERIC=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_HAVE_EBPF_JIT=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HDMI=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_HWMON=y
CONFIG_HW_CONSOLE=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_HELPER_AUTO=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_INPUT_KEYBOARD=y
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IOSCHED_CFQ=y
CONFIG_IPC_NS=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_JBD2=y
CONFIG_KALLSYMS=y
CONFIG_KERNEL_LZMA=y
# CONFIG_KERNEL_XZ is not set
CONFIG_KEXEC=y
CONFIG_KEXEC_CORE=y
CONFIG_KEYBOARD_DLINK_DIR685=y
# CONFIG_LDM_DEBUG is not set
CONFIG_LDM_PARTITION=y
CONFIG_LEDS_TRIGGER_DISK=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_LOGO_LINUX_MONO is not set
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_GPIO=y
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_PCI=y
CONFIG_MIGRATION=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_MQ_IOSCHED_DEADLINE=y
CONFIG_MQ_IOSCHED_KYBER=y
# CONFIG_MSCC_OCELOT_SWITCH is not set
CONFIG_MTD_CFI_STAA=y
# CONFIG_MTD_IMPA7 is not set
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_OF_GEMINI=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_NAMESPACES=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DSA=y
# CONFIG_NET_DSA_LEGACY is not set
CONFIG_NET_DSA_REALTEK_SMI=y
CONFIG_NET_DSA_VITESSE_VSC73XX=y
CONFIG_NET_NS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NLS=y
CONFIG_NO_BOOTMEM=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NVMEM=y
CONFIG_OABI_COMPAT=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
# CONFIG_PACKET is not set
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_PATA_FTIDE010=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_FTPCI100=y
# CONFIG_PCI_V3_SEMI is not set
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PID_NS=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_GEMINI=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
# CONFIG_PM_DEBUG is not set
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GEMINI_POWEROFF=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_RCU=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_RATIONAL=y
CONFIG_RCU_CPU_STALL_TIMEOUT=21
# CONFIG_RCU_EXPERT is not set
CONFIG_RCU_NEED_SEGCBLIST=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_RD_BZIP2=y
CONFIG_RD_GZIP=y
CONFIG_RD_LZ4=y
CONFIG_RD_LZMA=y
CONFIG_RD_LZO=y
CONFIG_RD_XZ=y
CONFIG_REALTEK_PHY=y
CONFIG_REFCOUNT_FULL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RELAY=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RSEQ=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_DRV_CMOS is not set
CONFIG_RTC_DRV_FTRTC010=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_NVMEM=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_SATA_GEMINI=y
CONFIG_SATA_PMP=y
CONFIG_SCSI=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SENSORS_GPIO_FAN=y
CONFIG_SENSORS_LM75=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_EXAR=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIO=y
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SFP is not set
CONFIG_SG_POOL=y
CONFIG_SLUB_DEBUG=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SRCU=y
# CONFIG_STAGING is not set
# CONFIG_STRICT_KERNEL_RWX is not set
# CONFIG_STRICT_MODULE_RWX is not set
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SWPHY=y
CONFIG_SYNC_FILE=y
# CONFIG_SYN_COOKIES is not set
CONFIG_SYSFS_SYSCALL=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TASKS_RCU=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TREE_SRCU=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_USB_SUPPORT=y
# CONFIG_USB_ROLE_SWITCH is not set
# CONFIG_USERIO is not set
CONFIG_USER_NS=y
CONFIG_USE_OF=y
CONFIG_UTS_NS=y
CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_VITESSE_PHY=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_IA64=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_X86=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0
CONFIG_ZLIB_INFLATE=y

0
target/linux/gemini/image/ImageInfo-sq201 → target/linux/gemini/image/ImageInfo-itian_sq201
View File

0
target/linux/gemini/image/ImageInfo-ib4220 → target/linux/gemini/image/ImageInfo-raidsonic_ib-4220-b
View File

161
target/linux/gemini/image/Makefile
View File

@ -12,12 +12,14 @@ include $(INCLUDE_DIR)/image.mk
# D-Link devices.
define Build/dir685-images
mkwrggimg -i $(IMAGE_KERNEL) \
-o $(BIN_DIR)/$(IMG_PREFIX)-dir685-fwupdate.bin \
-o $@.new \
-d /dev/mtdblock/1 \
-s wrgns01_dlwbr_dir685RBWW \
-v 'N/A' \
-m dir685 \
-B 96bb
mv $@.new $@
endef
# Build D-Link DNS-313 images using the special header tool.
@ -25,53 +27,57 @@ endef
# to satisfy the boot loader on the device. The zImage is
# the only real content.
define Build/dns313-images
if [ -d $(BIN_DIR)/.boot ] ; then rm -rf $(BIN_DIR)/.boot ; fi
mkdir -p $(BIN_DIR)/.boot
echo "dummy" > $(BIN_DIR)/.boot/dummyfile
dns313-header $(BIN_DIR)/.boot/dummyfile \
$(BIN_DIR)/.boot/rootfs.tgz
dns313-header $(BIN_DIR)/.boot/dummyfile \
$(BIN_DIR)/.boot/rd.gz
mkdir -p $@.tmp/.boot
echo "dummy" > $@.tmp/dummyfile
dns313-header $@.tmp/dummyfile \
$@.tmp/.boot/rootfs.tgz
dns313-header $@.tmp/dummyfile \
$@.tmp/.boot/rd.gz
dns313-header $(IMAGE_KERNEL) \
$(BIN_DIR)/.boot/zImage
rm -f $(BIN_DIR)/.boot/dummyfile
(cd $(BIN_DIR); tar -czf $(IMG_PREFIX)-dns313-bootpart.tar.gz .boot)
if [ -d $(BIN_DIR)/.boot ] ; then rm -rf $(BIN_DIR)/.boot ; fi
$@.tmp/.boot/zImage
tar --sort=name --owner=0 --group=0 --numeric-owner -czf $@ \
-C $@.tmp .boot \
$(if $(SOURCE_DATE_EPOCH),--mtime="@$(SOURCE_DATE_EPOCH)")
rm -rf $@.tmp
endef
# Create the special NAS4220B image format with the squashfs
# and overlay inside the "rd.gz" file. We pad it out to 6144K
# which is the size of the initramfs partition.
define Build/wiligear-image
$(STAGING_DIR_HOST)/bin/mkfwimage2 \
-m GEOS -f 0x30000000 -z \
-v $(1).v5.00.SL3512.OpenWrt.00000.000000.000000 \
-p Kernel:0x020000:0x100000:0:0:$(IMAGE_KERNEL) \
-p Ramdisk:0x120000:0x500000:0:0:$@ \
-o $@.new
mv $@.new $@
endef
# Create the special NAS4220B and Itian Square One SQ201 image
# format with the squashfs and overlay inside the "rd.gz" file.
# We pad it out to 6144K which is the size of the initramfs partition.
#
# The "application" partition is just blank. You can put anything
# there when using OpenWRT. We just use that to create the
# "sysupgrade" firmware image.
define Build/nas4220b-images
dd if=$(IMAGE_ROOTFS) of=$(BIN_DIR)/rd.gz bs=6144k conv=sync
dd if=/dev/zero of=$(BIN_DIR)/hddapp.tgz bs=6144k count=1
cp $(IMAGE_KERNEL) $(BIN_DIR)/zImage
cp ./ImageInfo-ib4220 $(BIN_DIR)/ImageInfo
(cd $(BIN_DIR); tar -czf $(IMG_PREFIX)-sysupgrade-ib4220b.tar.gz ImageInfo zImage rd.gz hddapp.tgz)
mv $(BIN_DIR)/rd.gz $(BIN_DIR)/$(IMG_PREFIX)-nas4220b-rd.gz
rm $(BIN_DIR)/hddapp.tgz
mv $(BIN_DIR)/zImage $(BIN_DIR)/$(IMG_PREFIX)-nas4220b-zImage
rm -f $(BIN_DIR)/ImageInfo
endef
define Build/nas4220b-sq201-images
mkdir -p $@.tmp
# The Itian Square One SQ201 uses the same method.
define Build/sq201-images
dd if=$(IMAGE_ROOTFS) of=$(BIN_DIR)/rd.gz bs=6144k conv=sync
dd if=/dev/zero of=$(BIN_DIR)/hddapp.tgz bs=6144k count=1
cp $(IMAGE_KERNEL) $(BIN_DIR)/zImage
cp ./ImageInfo-sq201 $(BIN_DIR)/ImageInfo
sed -i -e "s/DATESTR/`date +%Y%m%d`/g" $(BIN_DIR)/ImageInfo
(cd $(BIN_DIR); tar -czf $(IMG_PREFIX)-sysupgrade-sq201.tar.gz ImageInfo zImage rd.gz hddapp.tgz)
mv $(BIN_DIR)/rd.gz $(BIN_DIR)/$(IMG_PREFIX)-sq201-rd.gz
rm $(BIN_DIR)/hddapp.tgz
mv $(BIN_DIR)/zImage $(BIN_DIR)/$(IMG_PREFIX)-sq201-zImage
rm -f $(BIN_DIR)/ImageInfo
endef
mv $@ $@.tmp/rd.gz
dd if=/dev/zero of=$@.tmp/hddapp.tgz bs=6144k count=1
cp $(IMAGE_KERNEL) $@.tmp/zImage
cp ./ImageInfo-$(1) $@.tmp/ImageInfo
sed -i -e "s/DATESTR/`date +%Y%m%d $(if $(SOURCE_DATE_EPOCH),--date "@$(SOURCE_DATE_EPOCH)")`/g" $@.tmp/ImageInfo
(cd $@.tmp; tar --sort=name --owner=0 --group=0 --numeric-owner -czf $@ * \
$(if $(SOURCE_DATE_EPOCH),--mtime="@$(SOURCE_DATE_EPOCH)"))
rm -rf $@.tmp
endef
# WBD-111 and WBD-222:
# work around the bootloader's bug with extra nops
@ -86,14 +92,11 @@ endef
# All DTB files are prefixed with "gemini-"
define Device/Default
DEVICE_DTS := $(patsubst %.dtb,%,$(notdir $(wildcard $(if $(IB),$(KDIR),$(DTS_DIR))/*-$(1).dtb)))
PROFILES := Default
KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
KERNEL_NAME := zImage
KERNEL := kernel-bin | append-dtb
FILESYSTEMS := squashfs
IMAGE_NAME := $$(IMAGE_PREFIX)-$$(1).$$(2)
BLOCKSIZE := 128k
PAGESIZE := 2048
endef
# A reasonable set of default packages handling the NAS type
@ -105,56 +108,70 @@ GEMINI_NAS_PACKAGES:=kmod-md-mod kmod-md-linear kmod-md-multipath \
kmod-nls-utf8 kmod-usb-storage-extras \
samba36-server mdadm cfdisk fdisk e2fsprogs badblocks
define Device/dlink-dir-685
define Device/dlink_dir-685
DEVICE_TITLE := D-Link DIR-685 Xtreme N Storage Router
DEVICE_DTS := gemini-dlink-dir-685
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES) \
kmod-switch-rtl8366rb swconfig \
rt2800-pci
IMAGES += dir685-image
IMAGE/dir685-image := dir685-images
kmod-rt2800-pci
IMAGES := factory.bin
IMAGE/factory.bin := dir685-images
endef
TARGET_DEVICES += dlink-dir-685
TARGET_DEVICES += dlink_dir-685
define Device/dlink-dns-313
define Device/dlink_dns-313
DEVICE_TITLE := D-Link DNS-313 1-Bay Network Storage Enclosure
DEVICE_DTS := gemini-dlink-dns-313
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES)
IMAGES += dns313-image
IMAGE/dns313-image := dns313-images
IMAGES := factory.bin
IMAGE/factory.bin := dns313-images
endef
TARGET_DEVICES += dlink-dns-313
TARGET_DEVICES += dlink_dns-313
define Device/nas4220b
DEVICE_TITLE := Raidsonic NAS IB-4220-B
IMAGES += nas4220b-image
IMAGE/nas4220b-image := nas4220b-images
define Device/itian-raidsonic
IMAGES := factory.bin
IMAGE/factory.bin := append-rootfs | pad-rootfs | pad-to 6144k | \
nas4220b-sq201-images $(1)
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES)
endef
TARGET_DEVICES += nas4220b
define Device/rut1xx
DEVICE_TITLE := Teltonika RUT1xx
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES)
endef
TARGET_DEVICES += rut1xx
define Device/sq201
define Device/itian_sq201
$(Device/itian-raidsonic)
DEVICE_TITLE := ITian Square One SQ201
IMAGES += sq201-image
IMAGE/sq201-image := sq201-images
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES) rt61-pci usb2-pci
DEVICE_DTS := gemini-sq201
DEVICE_PACKAGES += kmod-rt61-pci kmod-usb2-pci
endef
TARGET_DEVICES += sq201
TARGET_DEVICES += itian_sq201
define Device/wbd111
define Device/raidsonic_ib-4220-b
$(Device/itian-raidsonic)
DEVICE_TITLE := Raidsonic NAS IB-4220-B
DEVICE_DTS := gemini-nas4220b
endef
TARGET_DEVICES += raidsonic_ib-4220-b
# The wiliboard images need some changes to be functional and buildable.
#
# The dts would need to use the ecoscentric,redboot-fis-partitions partition
# parser to get the correct partition offsets and size.
#
# The mkfwimage2 call need to be adjusted to reflect the real size of kernel
# and rootfs. It is expected that the OEM firmware adjusts the on flash
# partition table with the values defined in the image header.
define Device/wiliboard_wbd111
DEVICE_TITLE := Wiliboard WBD-111
DEVICE_DTS := gemini-wbd111
KERNEL := kernel-bin | append-dtb | wbd-nops
IMAGES := factory.bin
IMAGE/factory.bin := append-rootfs | pad-rootfs | wiligear-image "WILI-S.WILIBOARD"
endef
TARGET_DEVICES += wbd111
define Device/wbd222
define Device/wiliboard_wbd222
DEVICE_TITLE := Wiliboard WBD-222
DEVICE_DTS := gemini-wbd222
KERNEL := kernel-bin | append-dtb | wbd-nops
IMAGES := factory.bin
IMAGE/factory.bin := append-rootfs | pad-rootfs | wiligear-image "WILI-S.WBD222"
endef
TARGET_DEVICES += wbd222
$(eval $(call BuildImage))

23
target/linux/gemini/patches-4.14/0012-ARM-dts-Add-ethernet-PHYs-to-the-a-bunch-of-Geminis.patch
View File

@ -13,7 +13,6 @@ Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-nas4220b.dts | 13 +++++++++++++
arch/arm/boot/dts/gemini-rut1xx.dts | 13 +++++++++++++
arch/arm/boot/dts/gemini-wbd111.dts | 13 +++++++++++++
arch/arm/boot/dts/gemini-wbd222.dts | 18 ++++++++++++++++++
4 files changed, 57 insertions(+)
@ -24,28 +23,6 @@ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
};
};
+ mdio0: ethernet-phy {
+ compatible = "virtual,mdio-gpio";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
soc {
flash@30000000 {
status = "okay";
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -58,6 +58,19 @@
};
};
+ mdio0: ethernet-phy {
+ compatible = "virtual,mdio-gpio";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */

29
target/linux/gemini/patches-4.14/0031-ARM-dts-Add-the-FOTG210-USB-host-to-Gemini.patch
View File

@ -19,7 +19,6 @@ the patch is only included in the series for context.
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 8 ++++++++
arch/arm/boot/dts/gemini-nas4220b.dts | 8 ++++++++
arch/arm/boot/dts/gemini-rut1xx.dts | 20 ++++++++++++++++++++
arch/arm/boot/dts/gemini-wbd111.dts | 20 ++++++++++++++++++++
arch/arm/boot/dts/gemini-wbd222.dts | 21 +++++++++++++++++++++
arch/arm/boot/dts/gemini.dtsi | 26 ++++++++++++++++++++++++++
@ -54,34 +53,6 @@ the patch is only included in the series for context.
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -114,5 +114,25 @@
pinctrl-names = "default";
pinctrl-0 = <&gpio1_default_pins>;
};
+
+ ethernet@60000000 {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet-port@1 {
+ /* Not used in this platform */
+ };
+ };
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};

31
target/linux/gemini/patches-4.19/0001-pinctrl-gemini-Mask-and-set-properly.patch Normal file
View File

@ -0,0 +1,31 @@
From f8ac3d3472a8dc99c8647a637611d146d88be8cb Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Tue, 9 Oct 2018 10:09:14 +0200
Subject: [PATCH 01/18] pinctrl: gemini: Mask and set properly
The code was written under the assumption that the
regmap_update_bits() would mask the bits in the mask and
set the bits in the value.
It missed the points that it will not set bits in the value
unless these are also masked in the mask. Set value bits
that are not in the mask will simply be ignored.
Fixes: 06351d133dea ("pinctrl: add a Gemini SoC pin controller")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/pinctrl-gemini.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -2184,7 +2184,8 @@ static int gemini_pmx_set_mux(struct pin
func->name, grp->name);
regmap_read(pmx->map, GLOBAL_MISC_CTRL, &before);
- regmap_update_bits(pmx->map, GLOBAL_MISC_CTRL, grp->mask,
+ regmap_update_bits(pmx->map, GLOBAL_MISC_CTRL,
+ grp->mask | grp->value,
grp->value);
regmap_read(pmx->map, GLOBAL_MISC_CTRL, &after);

141
target/linux/gemini/patches-4.19/0002-pinctrl-gemini-Fix-up-TVC-clock-group.patch Normal file
View File

@ -0,0 +1,141 @@
From ce81398dccb984855de606b75db25eddecdaa9e5 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Wed, 10 Oct 2018 20:25:39 +0200
Subject: [PATCH 02/18] pinctrl: gemini: Fix up TVC clock group
The previous fix made the TVC clock get muxed in on the
D-Link DIR-685 instead of giving nagging warnings of this
not working. Not good. We didn't want that, as it breaks
video.
Create a specific group for the TVC CLK, and break out
a specific GPIO group for it on the SL3516 so we can use
that line as GPIO if we don't need the TVC CLK.
Fixes: d17f477c5bc6 ("pinctrl: gemini: Mask and set properly")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/pinctrl-gemini.c | 44 ++++++++++++++++++++++++++------
1 file changed, 36 insertions(+), 8 deletions(-)
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -591,13 +591,16 @@ static const unsigned int tvc_3512_pins[
319, /* TVC_DATA[1] */
301, /* TVC_DATA[2] */
283, /* TVC_DATA[3] */
- 265, /* TVC_CLK */
320, /* TVC_DATA[4] */
302, /* TVC_DATA[5] */
284, /* TVC_DATA[6] */
266, /* TVC_DATA[7] */
};
+static const unsigned int tvc_clk_3512_pins[] = {
+ 265, /* TVC_CLK */
+};
+
/* NAND flash pins */
static const unsigned int nflash_3512_pins[] = {
199, 200, 201, 202, 216, 217, 218, 219, 220, 234, 235, 236, 237, 252,
@@ -629,7 +632,7 @@ static const unsigned int pflash_3512_pi
/* Serial flash pins CE0, CE1, DI, DO, CK */
static const unsigned int sflash_3512_pins[] = { 230, 231, 232, 233, 211 };
-/* The GPIO0A (0) pin overlap with TVC and extended parallel flash */
+/* The GPIO0A (0) pin overlap with TVC CLK and extended parallel flash */
static const unsigned int gpio0a_3512_pins[] = { 265 };
/* The GPIO0B (1-4) pins overlap with TVC and ICE */
@@ -823,7 +826,13 @@ static const struct gemini_pin_group gem
.num_pins = ARRAY_SIZE(tvc_3512_pins),
/* Conflict with character LCD and ICE */
.mask = LCD_PADS_ENABLE,
- .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE,
+ .value = TVC_PADS_ENABLE,
+ },
+ {
+ .name = "tvcclkgrp",
+ .pins = tvc_clk_3512_pins,
+ .num_pins = ARRAY_SIZE(tvc_clk_3512_pins),
+ .value = TVC_CLK_PAD_ENABLE,
},
/*
* The construction is done such that it is possible to use a serial
@@ -860,8 +869,8 @@ static const struct gemini_pin_group gem
.name = "gpio0agrp",
.pins = gpio0a_3512_pins,
.num_pins = ARRAY_SIZE(gpio0a_3512_pins),
- /* Conflict with TVC */
- .mask = TVC_PADS_ENABLE,
+ /* Conflict with TVC CLK */
+ .mask = TVC_CLK_PAD_ENABLE,
},
{
.name = "gpio0bgrp",
@@ -1531,13 +1540,16 @@ static const unsigned int tvc_3516_pins[
311, /* TVC_DATA[1] */
394, /* TVC_DATA[2] */
374, /* TVC_DATA[3] */
- 333, /* TVC_CLK */
354, /* TVC_DATA[4] */
395, /* TVC_DATA[5] */
312, /* TVC_DATA[6] */
334, /* TVC_DATA[7] */
};
+static const unsigned int tvc_clk_3516_pins[] = {
+ 333, /* TVC_CLK */
+};
+
/* NAND flash pins */
static const unsigned int nflash_3516_pins[] = {
243, 260, 261, 224, 280, 262, 281, 264, 300, 263, 282, 301, 320, 283,
@@ -1570,7 +1582,7 @@ static const unsigned int pflash_3516_pi
static const unsigned int sflash_3516_pins[] = { 296, 338, 295, 359, 339 };
/* The GPIO0A (0-4) pins overlap with TVC and extended parallel flash */
-static const unsigned int gpio0a_3516_pins[] = { 333, 354, 395, 312, 334 };
+static const unsigned int gpio0a_3516_pins[] = { 354, 395, 312, 334 };
/* The GPIO0B (5-7) pins overlap with ICE */
static const unsigned int gpio0b_3516_pins[] = { 375, 396, 376 };
@@ -1602,6 +1614,9 @@ static const unsigned int gpio0j_3516_pi
/* The GPIO0K (30,31) pins overlap with NAND flash */
static const unsigned int gpio0k_3516_pins[] = { 275, 298 };
+/* The GPIO0L (0) pins overlap with TVC_CLK */
+static const unsigned int gpio0l_3516_pins[] = { 333 };
+
/* The GPIO1A (0-4) pins that overlap with IDE and parallel flash */
static const unsigned int gpio1a_3516_pins[] = { 221, 200, 222, 201, 220 };
@@ -1761,7 +1776,13 @@ static const struct gemini_pin_group gem
.num_pins = ARRAY_SIZE(tvc_3516_pins),
/* Conflict with character LCD */
.mask = LCD_PADS_ENABLE,
- .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE,
+ .value = TVC_PADS_ENABLE,
+ },
+ {
+ .name = "tvcclkgrp",
+ .pins = tvc_clk_3516_pins,
+ .num_pins = ARRAY_SIZE(tvc_clk_3516_pins),
+ .value = TVC_CLK_PAD_ENABLE,
},
/*
* The construction is done such that it is possible to use a serial
@@ -1873,6 +1894,13 @@ static const struct gemini_pin_group gem
.value = PFLASH_PADS_DISABLE | NAND_PADS_DISABLE,
},
{
+ .name = "gpio0lgrp",
+ .pins = gpio0l_3516_pins,
+ .num_pins = ARRAY_SIZE(gpio0l_3516_pins),
+ /* Conflict with TVE CLK */
+ .mask = TVC_CLK_PAD_ENABLE,
+ },
+ {
.name = "gpio1agrp",
.pins = gpio1a_3516_pins,
.num_pins = ARRAY_SIZE(gpio1a_3516_pins),

82
target/linux/gemini/patches-4.19/0003-pinctrl-gemini-Drop-noisy-debug-prints.patch Normal file
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@ -0,0 +1,82 @@
From 5d1bd9669ddcd26384672891c37110046e1ac8e8 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Tue, 9 Oct 2018 10:12:24 +0200
Subject: [PATCH 03/18] pinctrl: gemini: Drop noisy debug prints
The dev_info() in the pin control driver is really just good
for debug, so drop it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/pinctrl-gemini.c | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -2207,9 +2207,9 @@ static int gemini_pmx_set_mux(struct pin
return -ENODEV;
}
- dev_info(pmx->dev,
- "ACTIVATE function \"%s\" with group \"%s\"\n",
- func->name, grp->name);
+ dev_dbg(pmx->dev,
+ "ACTIVATE function \"%s\" with group \"%s\"\n",
+ func->name, grp->name);
regmap_read(pmx->map, GLOBAL_MISC_CTRL, &before);
regmap_update_bits(pmx->map, GLOBAL_MISC_CTRL,
@@ -2240,10 +2240,10 @@ static int gemini_pmx_set_mux(struct pin
"GLOBAL MISC CTRL before: %08x, after %08x, expected %08x\n",
before, after, expected);
} else {
- dev_info(pmx->dev,
- "padgroup %s %s\n",
- gemini_padgroups[i],
- enabled ? "enabled" : "disabled");
+ dev_dbg(pmx->dev,
+ "padgroup %s %s\n",
+ gemini_padgroups[i],
+ enabled ? "enabled" : "disabled");
}
}
@@ -2262,10 +2262,10 @@ static int gemini_pmx_set_mux(struct pin
"GLOBAL MISC CTRL before: %08x, after %08x, expected %08x\n",
before, after, expected);
} else {
- dev_info(pmx->dev,
- "padgroup %s %s\n",
- gemini_padgroups[i],
- enabled ? "enabled" : "disabled");
+ dev_dbg(pmx->dev,
+ "padgroup %s %s\n",
+ gemini_padgroups[i],
+ enabled ? "enabled" : "disabled");
}
}
@@ -2492,9 +2492,9 @@ static int gemini_pinconf_group_set(stru
regmap_update_bits(pmx->map, GLOBAL_IODRIVE,
grp->driving_mask,
val);
- dev_info(pmx->dev,
- "set group %s to %d mA drive strength mask %08x val %08x\n",
- grp->name, arg, grp->driving_mask, val);
+ dev_dbg(pmx->dev,
+ "set group %s to %d mA drive strength mask %08x val %08x\n",
+ grp->name, arg, grp->driving_mask, val);
break;
default:
dev_err(pmx->dev, "invalid config param %04x\n", param);
@@ -2585,8 +2585,8 @@ static int gemini_pmx_probe(struct platf
/* Print initial state */
tmp = val;
for_each_set_bit(i, &tmp, PADS_MAXBIT) {
- dev_info(dev, "pad group %s %s\n", gemini_padgroups[i],
- (val & BIT(i)) ? "enabled" : "disabled");
+ dev_dbg(dev, "pad group %s %s\n", gemini_padgroups[i],
+ (val & BIT(i)) ? "enabled" : "disabled");
}
/* Check if flash pin is set */

20
target/linux/gemini/patches-4.19/0004-boot-sq201-from-sda1.patch Normal file
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@ -0,0 +1,20 @@
From 95be54e285767c5209bb51df923373f78b8c4099 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 16 Jul 2018 23:36:30 +0200
Subject: [PATCH 04/18] boot sq201 from sda1
---
arch/arm/boot/dts/gemini-sq201.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini-sq201.dts
@@ -20,7 +20,7 @@
};
chosen {
- bootargs = "console=ttyS0,115200n8";
+ bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait";
stdout-path = &uart0;
};

47
target/linux/gemini/patches-4.19/0005-mtd-physmap_of-Move-custom-initialization.patch Normal file
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@ -0,0 +1,47 @@
From 58ecb60d53d43e8d584708722a2cf851ba88f9e1 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Thu, 11 Oct 2018 19:53:40 +0200
Subject: [PATCH 05/18] mtd: physmap_of: Move custom initialization
In order to be able to assign custom complex mappings
to the physmap_of plugin for Gemini, move the initialization
so that the simple map is initialized before we enter the
platform-specific functions so the latter can override
them.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/mtd/maps/physmap_of_core.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
--- a/drivers/mtd/maps/physmap_of_core.c
+++ b/drivers/mtd/maps/physmap_of_core.c
@@ -239,13 +239,6 @@ static int of_flash_probe(struct platfor
else if (of_property_read_bool(dp, "little-endian"))
info->list[i].map.swap = CFI_LITTLE_ENDIAN;
- err = of_flash_probe_gemini(dev, dp, &info->list[i].map);
- if (err)
- goto err_out;
- err = of_flash_probe_versatile(dev, dp, &info->list[i].map);
- if (err)
- goto err_out;
-
err = -ENOMEM;
info->list[i].map.virt = ioremap(info->list[i].map.phys,
info->list[i].map.size);
@@ -257,6 +250,14 @@ static int of_flash_probe(struct platfor
simple_map_init(&info->list[i].map);
+ /* Variants can override map accessors */
+ err = of_flash_probe_gemini(dev, dp, &info->list[i].map);
+ if (err)
+ goto err_out;
+ err = of_flash_probe_versatile(dev, dp, &info->list[i].map);
+ if (err)
+ goto err_out;
+
/*
* On some platforms (e.g. MPC5200) a direct 1:1 mapping
* may cause problems with JFFS2 usage, as the local bus (LPB)

187
target/linux/gemini/patches-4.19/0006-mtd-physmap_of_gemini-Handle-pin-control.patch Normal file
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@ -0,0 +1,187 @@
From 8e5e628a9de439d02914b85a48e1ac3e04ea486a Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Thu, 11 Oct 2018 20:03:49 +0200
Subject: [PATCH 06/18] mtd: physmap_of_gemini: Handle pin control
This enables the complex mapping for the Gemini and kicks in
custom read/write functions that will wrap the existing
simple functions in calls to enable/disable the parallel
flash pins using pin controls.
This is necessary on some hardware such as the D-Link
DIR-685 where all flash pins are patched in/out at the same
time, but some of the flash pins are in practice unused by
the flash and have anyway been reused as GPIO.
This concerns specifically CE1 on the Gemini. There is only
one flash chip, so only CE0 is used, and the line for CE1
has been reused as chip select for the emulated SPI port
connected to the display. If we try to use the same lines
for flash and GPIO at the same time, one of them will loose:
the GPIO line will disappear because it gets disconnected
from the pin when the flash group is muxed out.
Fix this by introducing two pin control states named simply
"enabled" and "disabled" and only enable the flash lines
when absolutely necessary (during read/write/copy). This
way, they are available for GPIO at all other times and
the display works.
Collect all the state variables in a struct named
struct gemini_flash and allocate this struct at probe
time.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/mtd/maps/Kconfig | 1 +
drivers/mtd/maps/physmap_of_gemini.c | 105 ++++++++++++++++++++++++++-
2 files changed, 105 insertions(+), 1 deletion(-)
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -89,6 +89,7 @@ config MTD_PHYSMAP_OF_GEMINI
depends on MTD_PHYSMAP_OF
depends on MFD_SYSCON
default ARCH_GEMINI
+ select MTD_COMPLEX_MAPPINGS
help
This provides some extra DT physmap parsing for the Gemini
platforms, some detection and setting up parallel mode on the
--- a/drivers/mtd/maps/physmap_of_gemini.c
+++ b/drivers/mtd/maps/physmap_of_gemini.c
@@ -10,9 +10,11 @@
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/mtd/map.h>
+#include <linux/mtd/xip.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/bitops.h>
+#include <linux/pinctrl/consumer.h>
#include "physmap_of_gemini.h"
/*
@@ -49,6 +51,77 @@ static const struct of_device_id syscon_
{ },
};
+struct gemini_flash {
+ struct device *dev;
+ struct pinctrl *p;
+ struct pinctrl_state *enabled_state;
+ struct pinctrl_state *disabled_state;
+};
+
+/* Static local state */
+static struct gemini_flash *gf;
+
+static void gemini_flash_enable_pins(void)
+{
+ int ret;
+
+ if (IS_ERR(gf->enabled_state))
+ return;
+ ret = pinctrl_select_state(gf->p, gf->enabled_state);
+ if (ret)
+ dev_err(gf->dev, "failed to enable pins\n");
+}
+
+static void gemini_flash_disable_pins(void)
+{
+ int ret;
+
+ if (IS_ERR(gf->disabled_state))
+ return;
+ ret = pinctrl_select_state(gf->p, gf->disabled_state);
+ if (ret)
+ dev_err(gf->dev, "failed to disable pins\n");
+}
+
+static map_word __xipram gemini_flash_map_read(struct map_info *map,
+ unsigned long ofs)
+{
+ map_word __xipram ret;
+
+ gemini_flash_enable_pins();
+ ret = inline_map_read(map, ofs);
+ gemini_flash_disable_pins();
+
+ return ret;
+}
+
+static void __xipram gemini_flash_map_write(struct map_info *map,
+ const map_word datum,
+ unsigned long ofs)
+{
+ gemini_flash_enable_pins();
+ inline_map_write(map, datum, ofs);
+ gemini_flash_disable_pins();
+}
+
+static void __xipram gemini_flash_map_copy_from(struct map_info *map,
+ void *to, unsigned long from,
+ ssize_t len)
+{
+ gemini_flash_enable_pins();
+ inline_map_copy_from(map, to, from, len);
+ gemini_flash_disable_pins();
+}
+
+static void __xipram gemini_flash_map_copy_to(struct map_info *map,
+ unsigned long to,
+ const void *from, ssize_t len)
+{
+ gemini_flash_enable_pins();
+ inline_map_copy_to(map, to, from, len);
+ gemini_flash_disable_pins();
+}
+
int of_flash_probe_gemini(struct platform_device *pdev,
struct device_node *np,
struct map_info *map)
@@ -62,6 +135,11 @@ int of_flash_probe_gemini(struct platfor
if (!of_device_is_compatible(np, "cortina,gemini-flash"))
return 0;
+ gf = devm_kzalloc(dev, sizeof(*gf), GFP_KERNEL);
+ if (!gf)
+ return -ENOMEM;
+ gf->dev = dev;
+
rmap = syscon_regmap_lookup_by_phandle(np, "syscon");
if (IS_ERR(rmap)) {
dev_err(dev, "no syscon\n");
@@ -96,7 +174,32 @@ int of_flash_probe_gemini(struct platfor
map->bankwidth * 8);
}
- dev_info(&pdev->dev, "initialized Gemini-specific physmap control\n");
+ gf->p = devm_pinctrl_get(dev);
+ if (IS_ERR(gf->p)) {
+ dev_err(dev, "no pinctrl handle\n");
+ ret = PTR_ERR(gf->p);
+ return ret;
+ }
+
+ gf->enabled_state = pinctrl_lookup_state(gf->p, "enabled");
+ if (IS_ERR(gf->enabled_state))
+ dev_err(dev, "no enabled pin control state\n");
+
+ gf->disabled_state = pinctrl_lookup_state(gf->p, "disabled");
+ if (IS_ERR(gf->enabled_state)) {
+ dev_err(dev, "no disabled pin control state\n");
+ } else {
+ ret = pinctrl_select_state(gf->p, gf->disabled_state);
+ if (ret)
+ dev_err(gf->dev, "failed to disable pins\n");
+ }
+
+ map->read = gemini_flash_map_read;
+ map->write = gemini_flash_map_write;
+ map->copy_from = gemini_flash_map_copy_from;
+ map->copy_to = gemini_flash_map_copy_to;
+
+ dev_info(dev, "initialized Gemini-specific physmap control\n");
return 0;
}

66
target/linux/gemini/patches-4.19/0007-ARM-dts-Fix-up-the-D-Link-DIR-685-MTD-partition-info.patch Normal file
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@ -0,0 +1,66 @@
From 0f6c4817471faf572b5273cdf90160790b0c3b29 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Thu, 17 May 2018 17:00:10 +0200
Subject: [PATCH 07/18] ARM: dts: Fix up the D-Link DIR-685 MTD partition info
The vendor firmware was analyzed to get the right idea about
this flash layout. /proc/mtd contains:
dev: size erasesize name
mtd0: 01e7ff40 00020000 "rootfs"
mtd1: 01f40000 00020000 "upgrade"
mtd2: 00040000 00020000 "rgdb"
mtd3: 00020000 00020000 "nvram"
mtd4: 00040000 00020000 "RedBoot"
mtd5: 00020000 00020000 "LangPack"
mtd6: 02000000 00020000 "flash"
Here "flash" is obviously the whole device and we know "rootfs"
is a bogus hack to point to a squashfs rootfs inside of the main
"upgrade partition". We know "RedBoot" is the first 0x40000 of
the flash and the "upgrade" partition follows from 0x40000 to
0x1f8000. So we have mtd0, 1, 4 and 6 covered.
Remains:
mtd2: 00040000 00020000 "rgdb"
mtd3: 00020000 00020000 "nvram"
mtd5: 00020000 00020000 "LangPack"
Inspecting the flash at 0x1f8000 and 0x1fa000 reveals each of
these starting with "RGCFG1" so we assume 0x1f8000-1fbfff is
"rgdb" of 0x40000.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -274,20 +274,16 @@
read-only;
};
/*
- * Between the boot loader and the rootfs is the kernel
- * in a custom Storlink format flashed from the boot
- * menu. The rootfs is in squashfs format.
+ * This firmware image contains the kernel catenated
+ * with the squashfs root filesystem. For some reason
+ * this is called "upgrade" on the vendor system.
*/
- partition@1800c0 {
- label = "rootfs";
- reg = <0x001800c0 0x01dbff40>;
- read-only;
- };
- partition@1f40000 {
+ partition@40000 {
label = "upgrade";
- reg = <0x01f40000 0x00040000>;
+ reg = <0x00040000 0x01f40000>;
read-only;
};
+ /* RGDB, Residental Gateway Database? */
partition@1f80000 {
label = "rgdb";
reg = <0x01f80000 0x00040000>;

162
target/linux/gemini/patches-4.19/0008-ARM-dts-Enable-Gemini-flash-access.patch Normal file
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@ -0,0 +1,162 @@
From 74631102645df8984acbdf67b731e4d437f27fed Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Thu, 11 Oct 2018 20:06:23 +0200
Subject: [PATCH 08/18] ARM: dts: Enable Gemini flash access
Some Gemini platforms have a parallel NOR flash which conflicts
with use cases reusing some of the flash lines (such as CE1)
for GPIO.
Fix this on the D-Link DIR-685 and Itian SQ201 by creating
"enabled" and "disabled" states for the flash pin control
handle, and rely on the flash handling code to switch this
in and out when accessed so these lines can be used
for GPIO when flash is not accessed, and enable flash
access.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 35 +++++++++++++++-------
arch/arm/boot/dts/gemini-sq201.dts | 31 ++++++++++---------
2 files changed, 41 insertions(+), 25 deletions(-)
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -64,7 +64,6 @@
gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
- /* Collides with pflash CE1, not so cool */
cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
@@ -253,15 +252,18 @@
soc {
flash@30000000 {
/*
- * Flash access is by default disabled, because it
- * collides with the Chip Enable signal for the display
- * panel, that reuse the parallel flash Chip Select 1
- * (CS1). Enabling flash makes graphics stop working.
- *
- * We might be able to hack around this by letting
- * GPIO poke around in the flash controller registers.
+ * Flash access collides with the Chip Enable signal for
+ * the display panel, that reuse the parallel flash Chip
+ * Select 1 (CS1). We switch the pin control state so we
+ * enable these pins for flash access only when we need
+ * then, and when disabled they can be used for GPIO which
+ * is what the display panel needs.
*/
- /* status = "okay"; */
+ status = "okay";
+ pinctrl-names = "enabled", "disabled";
+ pinctrl-0 = <&pflash_default_pins>;
+ pinctrl-1 = <&pflash_disabled_pins>;
+
/* 32MB of flash */
reg = <0x30000000 0x02000000>;
@@ -327,7 +329,6 @@
"gpio0cgrp",
"gpio0egrp",
"gpio0fgrp",
- "gpio0ggrp",
"gpio0hgrp";
};
};
@@ -342,6 +343,18 @@
groups = "gpio1bgrp";
};
};
+ /*
+ * These GPIO groups will be mapped in over some
+ * of the flash pins when the flash is not in
+ * active use.
+ */
+ pflash_disabled_pins: pinctrl-pflash-disabled {
+ mux {
+ function = "gpio0";
+ groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
+ "gpio0kgrp";
+ };
+ };
pinctrl-gmii {
mux {
function = "gmii";
@@ -430,7 +443,7 @@
};
display-controller@6a000000 {
- status = "okay";
+ status = "disabled";
port@0 {
reg = <0>;
--- a/arch/arm/boot/dts/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini-sq201.dts
@@ -41,14 +41,12 @@
compatible = "gpio-leds";
led-green-info {
label = "sq201:green:info";
- /* Conflict with parallel flash */
gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led-green-usb {
label = "sq201:green:usb";
- /* Conflict with parallel and NAND flash */
gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "usb-host";
@@ -126,15 +124,10 @@
soc {
flash@30000000 {
- /*
- * Flash access can be enabled, with the side effect
- * of disabling access to GPIO LED on GPIO0[20] which
- * reuse one of the parallel flash chip select lines.
- * Also the default firmware on the machine has the
- * problem that since it uses the flash, the two LEDS
- * on the right become numb.
- */
- /* status = "okay"; */
+ status = "okay";
+ pinctrl-names = "enabled", "disabled";
+ pinctrl-0 = <&pflash_default_pins>;
+ pinctrl-1 = <&pflash_disabled_pins>;
/* 16MB of flash */
reg = <0x30000000 0x01000000>;
@@ -184,9 +177,7 @@
mux {
function = "gpio0";
groups = "gpio0fgrp",
- "gpio0ggrp",
- "gpio0hgrp",
- "gpio0kgrp";
+ "gpio0hgrp";
};
};
/*
@@ -199,6 +190,18 @@
groups = "gpio1dgrp";
};
};
+ /*
+ * These GPIO groups will be mapped in over some
+ * of the flash pins when the flash is not in
+ * active use.
+ */
+ pflash_disabled_pins: pinctrl-pflash-disabled {
+ mux {
+ function = "gpio0";
+ groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
+ "gpio0kgrp";
+ };
+ };
pinctrl-gmii {
mux {
function = "gmii";

45
target/linux/gemini/patches-4.19/0009-mtd-partitions-Add-RedBoot-FIS-DT-bindings.patch Normal file
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@ -0,0 +1,45 @@
From 3dfe7ff875a64b83de21dad6365225f41f3cdb17 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 19 Oct 2018 08:22:18 +0200
Subject: [PATCH 09/18] mtd: partitions: Add RedBoot FIS DT bindings
This adds device tree bindings for the RedBoot FIS partition
format.
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
.../bindings/mtd/partitions/redboot-fis.txt | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/partitions/redboot-fis.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.txt
@@ -0,0 +1,27 @@
+RedBoot FLASH Image System (FIS) Partitions
+===========================================
+
+The FLASH Image System (FIS) directory is a flash description
+format closely associated with the RedBoot boot loader.
+
+It uses one single flash eraseblock in the flash to store an index of
+all images in the flash.
+
+This block size will vary depending on flash but is typically
+32 KB in size.
+
+Required properties:
+- compatible : (required) must be "redboot-fis"
+- fis-index-block : (required) a index to the eraseblock containing
+ the FIS directory on this device. On a flash memory with 32KB
+ eraseblocks, 0 means the first eraseblock at 0x00000000, 1 means the
+ second eraseblock at 0x00008000 and so on.
+
+Example:
+
+flash@0 {
+ partitions {
+ compatible = "redboot-fis";
+ fis-index-block = <0>;
+ };
+};

72
target/linux/gemini/patches-4.19/0010-mtd-partitions-Add-second-compatible-for-redboot.patch Normal file
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@ -0,0 +1,72 @@
From e1b9d122030220d8b8176d9e23568e26fa2f9d23 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 19 Oct 2018 08:56:41 +0200
Subject: [PATCH 10/18] mtd: partitions: Add second compatible for redboot
Simple backport of the upstream redboot partition table
bindings that are used in the mainline Linux kernel.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/mtd/redboot.c | 29 ++++++++++++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
--- a/drivers/mtd/redboot.c
+++ b/drivers/mtd/redboot.c
@@ -25,7 +25,7 @@
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/vmalloc.h>
-
+#include <linux/of.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/module.h>
@@ -56,6 +56,31 @@ static inline int redboot_checksum(struc
return 1;
}
+#ifdef CONFIG_OF
+static void parse_redboot_of(struct mtd_info *master)
+{
+ struct device_node *np;
+ u32 dirblock;
+ int ret;
+
+ np = mtd_get_of_node(master);
+ if (!np)
+ return;
+ ret = of_property_read_u32(np, "fis-index-block", &dirblock);
+ if (ret)
+ return;
+ /*
+ * Assign the block found in the device tree to the local
+ * directory block pointer.
+ */
+ directory = dirblock;
+}
+#else
+static void parse_redboot_of(struct mtd_info *master)
+{
+}
+#endif
+
static int parse_redboot_partitions(struct mtd_info *master,
const struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
@@ -75,6 +100,7 @@ static int parse_redboot_partitions(stru
#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
static char nullstring[] = "unallocated";
#endif
+ parse_redboot_of(master);
if ( directory < 0 ) {
offset = master->size + directory * master->erasesize;
@@ -298,6 +324,7 @@ static int parse_redboot_partitions(stru
static const struct of_device_id redboot_parser_of_match_table[] = {
{ .compatible = "ecoscentric,redboot-fis-partitions" },
+ { .compatible = "redboot-fis" },
{},
};
MODULE_DEVICE_TABLE(of, redboot_parser_of_match_table);

68
target/linux/gemini/patches-4.19/0011-ARM-dts-Fix-up-SQ201-flash-access.patch Normal file
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@ -0,0 +1,68 @@
From 186692e51e6c40d8ebd05d25f009098eb00f8110 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 19 Oct 2018 09:00:51 +0200
Subject: [PATCH 11/18] ARM: dts: Fix up SQ201 flash access
This sets the partition information on the SQ201 to be read
out from the RedBoot partition table, removes the static
partition table and sets our boot options to mount root from
/dev/mtdblock2 where the initramfs resides.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-sq201.dts | 37 ++++--------------------------
1 file changed, 5 insertions(+), 32 deletions(-)
--- a/arch/arm/boot/dts/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini-sq201.dts
@@ -20,7 +20,7 @@
};
chosen {
- bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait";
+ bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
stdout-path = &uart0;
};
@@ -131,37 +131,10 @@
/* 16MB of flash */
reg = <0x30000000 0x01000000>;
- partition@0 {
- label = "RedBoot";
- reg = <0x00000000 0x00120000>;
- read-only;
- };
- partition@120000 {
- label = "Kernel";
- reg = <0x00120000 0x00200000>;
- };
- partition@320000 {
- label = "Ramdisk";
- reg = <0x00320000 0x00600000>;
- };
- partition@920000 {
- label = "Application";
- reg = <0x00920000 0x00600000>;
- };
- partition@f20000 {
- label = "VCTL";
- reg = <0x00f20000 0x00020000>;
- read-only;
- };
- partition@f40000 {
- label = "CurConf";
- reg = <0x00f40000 0x000a0000>;
- read-only;
- };
- partition@fe0000 {
- label = "FIS directory";
- reg = <0x00fe0000 0x00020000>;
- read-only;
+ partitions {
+ compatible = "redboot-fis";
+ /* Eraseblock at 0xfe0000 */
+ fis-index-block = <0x1fc>;
};
};

25
target/linux/gemini/patches-4.19/0012-ARM-dts-Blank-D-Link-DIR-685-console.patch Normal file
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@ -0,0 +1,25 @@
From ec8b953c92c1dd0e0f1450f4b9a32c60125d4510 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 27 Aug 2018 00:10:39 +0200
Subject: [PATCH 12/18] ARM: dts: Blank D-Link DIR-685 console
Leaving this NAS with display and backlight on heats it up
and dissipates power. Turn off the screen after 4 minutes,
it comes back on when a user touches the keys.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -20,7 +20,7 @@
};
chosen {
- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
+ bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300";
stdout-path = "uart0:19200n8";
};

116
target/linux/gemini/patches-4.19/0013-usb-host-fotg2-add-silicon-clock-handling.patch Normal file
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@ -0,0 +1,116 @@
From e76906e8e9dfaeeb22a37706aca493b86e4367bd Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 21 Apr 2017 20:46:12 +0200
Subject: [PATCH 13/18] usb: host: fotg2: add silicon clock handling
When used in a system with software-controlled silicon clocks,
the FOTG210 needs to grab, prepare and enable the clock.
This is needed on for example the Cortina Gemini, where the
platform will by default gate off the clock unless the
peripheral (in this case the USB driver) grabs and enables
the clock.
If there is no clock available on the platform, we live
without it. Make sure to percolate probe deferrals.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Handle probe deferrals on the clock controller, no matter
how unlikely they are.
- Send the patch to get Gemini USB rolling and try to get some
stuff upstream, this patch should be fine on its own.
---
drivers/usb/host/fotg210-hcd.c | 33 +++++++++++++++++++++++++++++----
drivers/usb/host/fotg210.h | 3 +++
2 files changed, 32 insertions(+), 4 deletions(-)
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -31,6 +31,7 @@
#include <linux/uaccess.h>
#include <linux/platform_device.h>
#include <linux/io.h>
+#include <linux/clk.h>
#include <asm/byteorder.h>
#include <asm/irq.h>
@@ -5596,7 +5597,7 @@ static int fotg210_hcd_probe(struct plat
hcd->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(hcd->regs)) {
retval = PTR_ERR(hcd->regs);
- goto failed;
+ goto failed_put_hcd;
}
hcd->rsrc_start = res->start;
@@ -5606,22 +5607,42 @@ static int fotg210_hcd_probe(struct plat
fotg210->caps = hcd->regs;
+ /* It's OK not to supply this clock */
+ fotg210->pclk = clk_get(dev, "PCLK");
+ if (!IS_ERR(fotg210->pclk)) {
+ retval = clk_prepare_enable(fotg210->pclk);
+ if (retval) {
+ dev_err(dev, "failed to enable PCLK\n");
+ goto failed_put_hcd;
+ }
+ } else if (PTR_ERR(fotg210->pclk) == -EPROBE_DEFER) {
+ /*
+ * Percolate deferrals, for anything else,
+ * just live without the clocking.
+ */
+ retval = PTR_ERR(fotg210->pclk);
+ goto failed_dis_clk;
+ }
+
retval = fotg210_setup(hcd);
if (retval)
- goto failed;
+ goto failed_dis_clk;
fotg210_init(fotg210);
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (retval) {
dev_err(dev, "failed to add hcd with err %d\n", retval);
- goto failed;
+ goto failed_dis_clk;
}
device_wakeup_enable(hcd->self.controller);
return retval;
-failed:
+failed_dis_clk:
+ if (!IS_ERR(fotg210->pclk))
+ clk_disable_unprepare(fotg210->pclk);
+failed_put_hcd:
usb_put_hcd(hcd);
fail_create_hcd:
dev_err(dev, "init %s fail, %d\n", dev_name(dev), retval);
@@ -5637,6 +5658,10 @@ static int fotg210_hcd_remove(struct pla
{
struct device *dev = &pdev->dev;
struct usb_hcd *hcd = dev_get_drvdata(dev);
+ struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
+
+ if (!IS_ERR(fotg210->pclk))
+ clk_disable_unprepare(fotg210->pclk);
if (!hcd)
return 0;
--- a/drivers/usb/host/fotg210.h
+++ b/drivers/usb/host/fotg210.h
@@ -182,6 +182,9 @@ struct fotg210_hcd { /* one per contro
# define COUNT(x)
#endif
+ /* silicon clock */
+ struct clk *pclk;
+
/* debug files */
struct dentry *debug_dir;
};

63
target/linux/gemini/patches-4.19/0014-usb-host-add-DT-bindings-for-faraday-fotg2.patch Normal file
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@ -0,0 +1,63 @@
From f9cfc45c57227448d4239e9582258587aacf34e7 Mon Sep 17 00:00:00 2001
From: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Date: Wed, 8 Feb 2017 21:00:09 +0100
Subject: [PATCH 14/18] usb: host: add DT bindings for faraday fotg2
This adds device tree bindings for the Faraday FOTG2
dual-mode host controller.
Cc: devicetree@vger.kernel.org
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Changed "OTH" to "OTG"
- Collected Rob's ACK.
- I don't see any problem with these bindings, but IIRC Hans
had some reservations for the OTG mode, maybe we can strip
some properties like the mini-usb thing and use as a starter
so we can add host mode at least?
---
.../bindings/usb/faraday,fotg210.txt | 35 +++++++++++++++++++
1 file changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/faraday,fotg210.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/faraday,fotg210.txt
@@ -0,0 +1,35 @@
+Faraday FOTG Host controller
+
+This OTG-capable USB host controller is found in Cortina Systems
+Gemini and other SoC products.
+
+Required properties:
+- compatible: should be one of:
+ "faraday,fotg210"
+ "cortina,gemini-usb", "faraday,fotg210"
+- reg: should contain one register range i.e. start and length
+- interrupts: description of the interrupt line
+
+Optional properties:
+- clocks: should contain the IP block clock
+- clock-names: should be "PCLK" for the IP block clock
+
+Required properties for "cortina,gemini-usb" compatible:
+- syscon: a phandle to the system controller to access PHY registers
+
+Optional properties for "cortina,gemini-usb" compatible:
+- cortina,gemini-mini-b: boolean property that indicates that a Mini-B
+ OTG connector is in use
+- wakeup-source: see power/wakeup-source.txt
+
+Example for Gemini:
+
+usb@68000000 {
+ compatible = "cortina,gemini-usb", "faraday,fotg210";
+ reg = <0x68000000 0x1000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cc 12>;
+ clock-names = "PCLK";
+ syscon = <&syscon>;
+ wakeup-source;
+};

43
target/linux/gemini/patches-4.19/0015-usb-host-fotg2-add-device-tree-probing.patch Normal file
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@ -0,0 +1,43 @@
From 8f45c69ba80a993a6dba2397825b27e11fa9dea7 Mon Sep 17 00:00:00 2001
From: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Date: Thu, 9 Feb 2017 15:20:49 +0100
Subject: [PATCH 15/18] usb: host: fotg2: add device tree probing
Add device tree probing to the fotg2 driver.
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
[Drop DMA mask coercion, drivers/of/platform.c does the job]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/usb/host/fotg210-hcd.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -10,6 +10,7 @@
* Most of code borrowed from the Linux-3.7 EHCI driver
*/
#include <linux/module.h>
+#include <linux/of.h>
#include <linux/device.h>
#include <linux/dmapool.h>
#include <linux/kernel.h>
@@ -5672,9 +5673,18 @@ static int fotg210_hcd_remove(struct pla
return 0;
}
+#ifdef CONFIG_OF
+static const struct of_device_id fotg210_of_match[] = {
+ { .compatible = "faraday,fotg210" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, fotg210_of_match);
+#endif
+
static struct platform_driver fotg210_hcd_driver = {
.driver = {
.name = "fotg210-hcd",
+ .of_match_table = of_match_ptr(fotg210_of_match),
},
.probe = fotg210_hcd_probe,
.remove = fotg210_hcd_remove,

131
target/linux/gemini/patches-4.19/0016-usb-host-fotg2-add-Gemini-specific-handling.patch Normal file
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@ -0,0 +1,131 @@
From b331ae758123ba20ba41199e007ac33fc0f242e3 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 21 Apr 2017 22:19:00 +0200
Subject: [PATCH 16/18] usb: host: fotg2: add Gemini-specific handling
The Cortina Systems Gemini has bolted on a PHY inside the
silicon that can be handled by six bits in a MISC register in
the system controller.
If we are running on Gemini, look up a syscon regmap through
a phandle and enable VBUS and optionally the Mini-B connector.
If the device is flagged as "wakeup-source" using the standard
DT bindings, we also enable this in the global controller for
respective port.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/usb/host/Kconfig | 1 +
drivers/usb/host/fotg210-hcd.c | 76 ++++++++++++++++++++++++++++++++++
2 files changed, 77 insertions(+)
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -372,6 +372,7 @@ config USB_ISP1362_HCD
config USB_FOTG210_HCD
tristate "FOTG210 HCD support"
depends on USB && HAS_DMA && HAS_IOMEM
+ select MFD_SYSCON
---help---
Faraday FOTG210 is an OTG controller which can be configured as
an USB2.0 host. It is designed to meet USB2.0 EHCI specification
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -33,6 +33,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/clk.h>
+#include <linux/bitops.h>
+/* For Cortina Gemini */
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
#include <asm/byteorder.h>
#include <asm/irq.h>
@@ -5554,6 +5558,72 @@ static void fotg210_init(struct fotg210_
iowrite32(value, &fotg210->regs->otgcsr);
}
+/*
+ * Gemini-specific initialization function, only executed on the
+ * Gemini SoC using the global misc control register.
+ */
+#define GEMINI_GLOBAL_MISC_CTRL 0x30
+#define GEMINI_MISC_USB0_WAKEUP BIT(14)
+#define GEMINI_MISC_USB1_WAKEUP BIT(15)
+#define GEMINI_MISC_USB0_VBUS_ON BIT(22)
+#define GEMINI_MISC_USB1_VBUS_ON BIT(23)
+#define GEMINI_MISC_USB0_MINI_B BIT(29)
+#define GEMINI_MISC_USB1_MINI_B BIT(30)
+
+static int fotg210_gemini_init(struct device *dev, struct usb_hcd *hcd)
+{
+ struct device_node *np = dev->of_node;
+ struct regmap *map;
+ bool mini_b;
+ bool wakeup;
+ u32 mask, val;
+ int ret;
+
+ map = syscon_regmap_lookup_by_phandle(np, "syscon");
+ if (IS_ERR(map)) {
+ dev_err(dev, "no syscon\n");
+ return PTR_ERR(map);
+ }
+ mini_b = of_property_read_bool(np, "cortina,gemini-mini-b");
+ wakeup = of_property_read_bool(np, "wakeup-source");
+
+ /*
+ * Figure out if this is USB0 or USB1 by simply checking the
+ * physical base address.
+ */
+ mask = 0;
+ if (hcd->rsrc_start == 0x69000000) {
+ val = GEMINI_MISC_USB1_VBUS_ON;
+ if (mini_b)
+ val |= GEMINI_MISC_USB1_MINI_B;
+ else
+ mask |= GEMINI_MISC_USB1_MINI_B;
+ if (wakeup)
+ val |= GEMINI_MISC_USB1_WAKEUP;
+ else
+ mask |= GEMINI_MISC_USB1_WAKEUP;
+ } else {
+ val = GEMINI_MISC_USB0_VBUS_ON;
+ if (mini_b)
+ val |= GEMINI_MISC_USB0_MINI_B;
+ else
+ mask |= GEMINI_MISC_USB0_MINI_B;
+ if (wakeup)
+ val |= GEMINI_MISC_USB0_WAKEUP;
+ else
+ mask |= GEMINI_MISC_USB0_WAKEUP;
+ }
+
+ ret = regmap_update_bits(map, GEMINI_GLOBAL_MISC_CTRL, mask, val);
+ if (ret) {
+ dev_err(dev, "failed to initialize Gemini PHY\n");
+ return ret;
+ }
+
+ dev_info(dev, "initialized Gemini PHY\n");
+ return 0;
+}
+
/**
* fotg210_hcd_probe - initialize faraday FOTG210 HCDs
*
@@ -5631,6 +5701,12 @@ static int fotg210_hcd_probe(struct plat
fotg210_init(fotg210);
+ if (of_device_is_compatible(dev->of_node, "cortina,gemini-usb")) {
+ retval = fotg210_gemini_init(dev, hcd);
+ if (retval)
+ goto failed_dis_clk;
+ }
+
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (retval) {
dev_err(dev, "failed to add hcd with err %d\n", retval);

27
target/linux/gemini/patches-4.19/0017-usb-host-fotg2-restart-hcd-after-port-reset.patch Normal file
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@ -0,0 +1,27 @@
From b9d300b5aea18f2e992201d182d939030130aab2 Mon Sep 17 00:00:00 2001
From: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Date: Sat, 14 Apr 2018 18:49:57 +0200
Subject: [PATCH 17/18] usb: host: fotg2: restart hcd after port reset
on Gemini SoC FOTG2 stalls after port reset
rerstart the hcd.
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/usb/host/fotg210-hcd.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -1633,6 +1633,10 @@ static int fotg210_hub_control(struct us
/* see what we found out */
temp = check_reset_complete(fotg210, wIndex, status_reg,
fotg210_readl(fotg210, status_reg));
+
+ /* restart schedule */
+ fotg210->command |= CMD_RUN;
+ fotg210_writel(fotg210, fotg210->command, &fotg210->regs->command);
}
if (!(temp & (PORT_RESUME|PORT_RESET))) {

191
target/linux/gemini/patches-4.19/0018-ARM-dts-Add-the-FOTG210-USB-host-to-Gemini-boards.patch Normal file
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@ -0,0 +1,191 @@
From 1ff9a279dbeb0034929042faef186ce934474c2b Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 21 Apr 2017 20:50:22 +0200
Subject: [PATCH 18/18] ARM: dts: Add the FOTG210 USB host to Gemini boards
This adds the FOTG210 USB host controller to the Gemini
device trees. In the main SoC DTSI it is flagged as disabled
and then it is selectively enabled on the devices that utilize
it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Rebased to kernel v4.19-rc1
- Drop pinctrl-0 handle from the second USB port
- Add comment on how to deal with the USB pin control
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 8 ++++++
arch/arm/boot/dts/gemini-nas4220b.dts | 8 ++++++
arch/arm/boot/dts/gemini-rut1xx.dts | 20 ++++++++++++++
arch/arm/boot/dts/gemini-sl93512r.dts | 8 ++++++
arch/arm/boot/dts/gemini-sq201.dts | 8 ++++++
arch/arm/boot/dts/gemini-wbd111.dts | 8 ++++++
arch/arm/boot/dts/gemini-wbd222.dts | 8 ++++++
arch/arm/boot/dts/gemini.dtsi | 32 ++++++++++++++++++++++
8 files changed, 100 insertions(+)
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -452,5 +452,13 @@
};
};
};
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -204,5 +204,13 @@
ata@63400000 {
status = "okay";
};
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -124,5 +124,25 @@
/* Not used in this platform */
};
};
+
+ ethernet@60000000 {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet-port@1 {
+ /* Not used in this platform */
+ };
+ };
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-sl93512r.dts
+++ b/arch/arm/boot/dts/gemini-sl93512r.dts
@@ -324,5 +324,13 @@
ata@63400000 {
status = "okay";
};
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini-sq201.dts
@@ -292,5 +292,13 @@
ata@63000000 {
status = "okay";
};
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-wbd111.dts
+++ b/arch/arm/boot/dts/gemini-wbd111.dts
@@ -171,5 +171,13 @@
/* Not used in this platform */
};
};
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -183,5 +183,13 @@
phy-handle = <&phy1>;
};
};
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -409,5 +409,37 @@
#size-cells = <0>;
status = "disabled";
};
+
+ usb@68000000 {
+ compatible = "cortina,gemini-usb", "faraday,fotg210";
+ reg = <0x68000000 0x1000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_USB0>;
+ clocks = <&syscon GEMINI_CLK_GATE_USB0>;
+ clock-names = "PCLK";
+ /*
+ * This will claim pins for USB0 and USB1 at the same
+ * time as they are using some common pins. If you for
+ * some reason have a system using USB1 at 96000000 but
+ * NOT using USB0 at 68000000 you wll have to add the
+ * usb_default_pins to the USB controller at 96000000
+ * in your .dts for the board.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_default_pins>;
+ syscon = <&syscon>;
+ status = "disabled";
+ };
+
+ usb@69000000 {
+ compatible = "cortina,gemini-usb", "faraday,fotg210";
+ reg = <0x69000000 0x1000>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_USB1>;
+ clocks = <&syscon GEMINI_CLK_GATE_USB1>;
+ clock-names = "PCLK";
+ syscon = <&syscon>;
+ status = "disabled";
+ };
};
};

10
target/linux/generic/backport-4.14/012-kbuild-add-macro-for-controlling-warnings-to-linux-c.patch
View File

@ -84,10 +84,11 @@ Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
--- a/include/linux/compiler-gcc.h
+++ b/include/linux/compiler-gcc.h
@@ -358,3 +358,28 @@
* code
*/
#define uninitialized_var(x) x = x
@@ -362,3 +362,30 @@
#if GCC_VERSION >= 50100
#define COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW 1
#endif
+
+
+/*
+ * Turn individual warnings and errors on and off locally, depending
@ -113,6 +114,7 @@ Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+#else
+#define __diag_GCC_8(s)
+#endif
+
--- a/include/linux/compiler_types.h
+++ b/include/linux/compiler_types.h
@@ -283,4 +283,22 @@ struct ftrace_likely_data {

74
target/linux/generic/backport-4.14/100-arm-cns3xxx-fix-writing-to-wrong-PCI-registers-after.patch
View File

@ -1,74 +0,0 @@
From 03556dab1cb02d85b50d7be3ee3a3bac001f5991 Mon Sep 17 00:00:00 2001
From: Koen Vandeputte <koen.vandeputte@ncentric.com>
Date: Tue, 18 Dec 2018 12:14:06 +0100
Subject: [PATCH] arm: cns3xxx: fix writing to wrong PCI registers after
alignment
Originally, cns3xxx used it's own functions for mapping, reading and writing registers.
Commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
removed the internal PCI config write function in favor of the generic one:
cns3xxx_pci_write_config() --> pci_generic_config_write()
cns3xxx_pci_write_config() expected aligned addresses, being produced by cns3xxx_pci_map_bus()
while the generic one pci_generic_config_write() actually expects the real address
as both the function and hardware are capable of byte-aligned writes.
This currently leads to pci_generic_config_write() writing
to the wrong registers on some ocasions.
First issue seen due to this:
- driver ath9k gets loaded
- The driver wants to write value 0xA8 to register PCI_LATENCY_TIMER, located at 0x0D
- cns3xxx_pci_map_bus() aligns the address to 0x0C
- pci_generic_config_write() effectively writes 0xA8 into register 0x0C (CACHE_LINE_SIZE)
This seems to cause some slight instability when certain PCI devices are used.
Another issue example caused by this this is the PCI bus numbering,
where the primary bus is higher than the secondary, which is impossible.
Before:
00:00.0 PCI bridge: Cavium, Inc. Device 3400 (rev 01) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 255
Bus: primary=02, secondary=01, subordinate=ff, sec-latency=0
After fix:
00:00.0 PCI bridge: Cavium, Inc. Device 3400 (rev 01) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 255
Bus: primary=00, secondary=01, subordinate=02, sec-latency=0
And very likely some more ..
Fix all by omitting the alignment being done in the mapping function.
Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Bjorn Helgaas <bhelgaas@google.com>
CC: Krzysztof Halasa <khalasa@piap.pl>
CC: Olof Johansson <olof@lixom.net>
CC: Robin Leblon <robin.leblon@ncentric.com>
CC: Rob Herring <robh@kernel.org>
CC: Russell King <linux@armlinux.org.uk>
CC: Tim Harvey <tharvey@gateworks.com>
CC: stable@vger.kernel.org # v4.0+
---
arch/arm/mach-cns3xxx/pcie.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -83,7 +83,7 @@ static void __iomem *cns3xxx_pci_map_bus
} else /* remote PCI bus */
base = cnspci->cfg1_regs + ((busno & 0xf) << 20);
- return base + (where & 0xffc) + (devfn << 12);
+ return base + where + (devfn << 12);
}
static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn,

10
target/linux/generic/backport-4.14/420-enable-CONFIG_MMC_SDHCI_IO_ACCESSORS.patch
View File

@ -13,11 +13,11 @@ Acked-by: Adrian Hunter <adrian.hunter@intel.com>
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -429,6 +429,7 @@ config MMC_SDHCI_MSM
tristate "Qualcomm SDHCI Controller Support"
depends on ARCH_QCOM || (ARM && COMPILE_TEST)
@@ -310,6 +310,7 @@ config MMC_SDHCI_BCM_KONA
tristate "SDHCI support on Broadcom KONA platform"
depends on ARCH_BCM_MOBILE
depends on MMC_SDHCI_PLTFM
+ select MMC_SDHCI_IO_ACCESSORS
help
This selects the Secure Digital Host Controller Interface (SDHCI)
support present in Qualcomm SOCs. The controller supports
This selects the Broadcom Kona Secure Digital Host Controller
Interface(SDHCI) support.

199
target/linux/generic/backport-4.19/080-v5.1-0001-bcma-keep-a-direct-pointer-to-the-struct-device.patch Normal file
View File

@ -0,0 +1,199 @@
From 5a1c18b761ddb299a06746948b9ec2814b04fa92 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 2 Jan 2019 00:00:01 +0100
Subject: [PATCH] bcma: keep a direct pointer to the struct device
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Accessing struct device is pretty useful/common so having a direct
pointer:
1) Simplifies some code
2) Makes bcma_bus_get_host_dev() unneeded
3) Allows further improvements like using dev_* printing helpers
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
---
drivers/bcma/bcma_private.h | 1 -
drivers/bcma/driver_gpio.c | 2 +-
drivers/bcma/host_pci.c | 2 ++
drivers/bcma/host_soc.c | 4 ++--
drivers/bcma/main.c | 45 +++++++++----------------------------
include/linux/bcma/bcma.h | 11 +++------
6 files changed, 18 insertions(+), 47 deletions(-)
--- a/drivers/bcma/bcma_private.h
+++ b/drivers/bcma/bcma_private.h
@@ -33,7 +33,6 @@ int __init bcma_bus_early_register(struc
int bcma_bus_suspend(struct bcma_bus *bus);
int bcma_bus_resume(struct bcma_bus *bus);
#endif
-struct device *bcma_bus_get_host_dev(struct bcma_bus *bus);
/* scan.c */
void bcma_detect_chip(struct bcma_bus *bus);
--- a/drivers/bcma/driver_gpio.c
+++ b/drivers/bcma/driver_gpio.c
@@ -183,7 +183,7 @@ int bcma_gpio_init(struct bcma_drv_cc *c
chip->direction_input = bcma_gpio_direction_input;
chip->direction_output = bcma_gpio_direction_output;
chip->owner = THIS_MODULE;
- chip->parent = bcma_bus_get_host_dev(bus);
+ chip->parent = bus->dev;
#if IS_BUILTIN(CONFIG_OF)
chip->of_node = cc->core->dev.of_node;
#endif
--- a/drivers/bcma/host_pci.c
+++ b/drivers/bcma/host_pci.c
@@ -196,6 +196,8 @@ static int bcma_host_pci_probe(struct pc
goto err_pci_release_regions;
}
+ bus->dev = &dev->dev;
+
/* Map MMIO */
err = -ENOMEM;
bus->mmio = pci_iomap(dev, 0, ~0UL);
--- a/drivers/bcma/host_soc.c
+++ b/drivers/bcma/host_soc.c
@@ -179,7 +179,6 @@ int __init bcma_host_soc_register(struct
/* Host specific */
bus->hosttype = BCMA_HOSTTYPE_SOC;
bus->ops = &bcma_host_soc_ops;
- bus->host_pdev = NULL;
/* Initialize struct, detect chip */
bcma_init_bus(bus);
@@ -213,6 +212,8 @@ static int bcma_host_soc_probe(struct pl
if (!bus)
return -ENOMEM;
+ bus->dev = dev;
+
/* Map MMIO */
bus->mmio = of_iomap(np, 0);
if (!bus->mmio)
@@ -221,7 +222,6 @@ static int bcma_host_soc_probe(struct pl
/* Host specific */
bus->hosttype = BCMA_HOSTTYPE_SOC;
bus->ops = &bcma_host_soc_ops;
- bus->host_pdev = pdev;
/* Initialize struct, detect chip */
bcma_init_bus(bus);
--- a/drivers/bcma/main.c
+++ b/drivers/bcma/main.c
@@ -223,8 +223,8 @@ unsigned int bcma_core_irq(struct bcma_d
mips_irq = bcma_core_mips_irq(core);
return mips_irq <= 4 ? mips_irq + 2 : 0;
}
- if (bus->host_pdev)
- return bcma_of_get_irq(&bus->host_pdev->dev, core, num);
+ if (bus->dev)
+ return bcma_of_get_irq(bus->dev, core, num);
return 0;
case BCMA_HOSTTYPE_SDIO:
return 0;
@@ -239,18 +239,18 @@ void bcma_prepare_core(struct bcma_bus *
core->dev.release = bcma_release_core_dev;
core->dev.bus = &bcma_bus_type;
dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index);
- core->dev.parent = bcma_bus_get_host_dev(bus);
- if (core->dev.parent)
- bcma_of_fill_device(core->dev.parent, core);
+ core->dev.parent = bus->dev;
+ if (bus->dev)
+ bcma_of_fill_device(bus->dev, core);
switch (bus->hosttype) {
case BCMA_HOSTTYPE_PCI:
- core->dma_dev = &bus->host_pci->dev;
+ core->dma_dev = bus->dev;
core->irq = bus->host_pci->irq;
break;
case BCMA_HOSTTYPE_SOC:
- if (IS_ENABLED(CONFIG_OF) && bus->host_pdev) {
- core->dma_dev = &bus->host_pdev->dev;
+ if (IS_ENABLED(CONFIG_OF) && bus->dev) {
+ core->dma_dev = bus->dev;
} else {
core->dev.dma_mask = &core->dev.coherent_dma_mask;
core->dma_dev = &core->dev;
@@ -261,28 +261,6 @@ void bcma_prepare_core(struct bcma_bus *
}
}
-struct device *bcma_bus_get_host_dev(struct bcma_bus *bus)
-{
- switch (bus->hosttype) {
- case BCMA_HOSTTYPE_PCI:
- if (bus->host_pci)
- return &bus->host_pci->dev;
- else
- return NULL;
- case BCMA_HOSTTYPE_SOC:
- if (bus->host_pdev)
- return &bus->host_pdev->dev;
- else
- return NULL;
- case BCMA_HOSTTYPE_SDIO:
- if (bus->host_sdio)
- return &bus->host_sdio->dev;
- else
- return NULL;
- }
- return NULL;
-}
-
void bcma_init_bus(struct bcma_bus *bus)
{
mutex_lock(&bcma_buses_mutex);
@@ -402,7 +380,6 @@ int bcma_bus_register(struct bcma_bus *b
{
int err;
struct bcma_device *core;
- struct device *dev;
/* Scan for devices (cores) */
err = bcma_bus_scan(bus);
@@ -425,10 +402,8 @@ int bcma_bus_register(struct bcma_bus *b
bcma_core_pci_early_init(&bus->drv_pci[0]);
}
- dev = bcma_bus_get_host_dev(bus);
- if (dev) {
- of_platform_default_populate(dev->of_node, NULL, dev);
- }
+ if (bus->dev)
+ of_platform_default_populate(bus->dev->of_node, NULL, bus->dev);
/* Cores providing flash access go before SPROM init */
list_for_each_entry(core, &bus->cores, list) {
--- a/include/linux/bcma/bcma.h
+++ b/include/linux/bcma/bcma.h
@@ -332,6 +332,8 @@ extern int bcma_arch_register_fallback_s
struct ssb_sprom *out));
struct bcma_bus {
+ struct device *dev;
+
/* The MMIO area. */
void __iomem *mmio;
@@ -339,14 +341,7 @@ struct bcma_bus {
enum bcma_hosttype hosttype;
bool host_is_pcie2; /* Used for BCMA_HOSTTYPE_PCI only */
- union {
- /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
- struct pci_dev *host_pci;
- /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
- struct sdio_func *host_sdio;
- /* Pointer to platform device (only for BCMA_HOSTTYPE_SOC) */
- struct platform_device *host_pdev;
- };
+ struct pci_dev *host_pci; /* PCI bus pointer (BCMA_HOSTTYPE_PCI only) */
struct bcma_chipinfo chipinfo;

36
target/linux/generic/backport-4.19/080-v5.1-0002-bcma-use-dev_-printing-functions.patch Normal file
View File

@ -0,0 +1,36 @@
From 777bc4801a6868fcbff09ffb6e30f023e7c5ed38 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 2 Jan 2019 00:00:02 +0100
Subject: [PATCH] bcma: use dev_* printing functions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It provides more meaningful messages.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
---
drivers/bcma/bcma_private.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/bcma/bcma_private.h
+++ b/drivers/bcma/bcma_private.h
@@ -10,13 +10,13 @@
#include <linux/delay.h>
#define bcma_err(bus, fmt, ...) \
- pr_err("bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
+ dev_err((bus)->dev, "bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
#define bcma_warn(bus, fmt, ...) \
- pr_warn("bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
+ dev_warn((bus)->dev, "bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
#define bcma_info(bus, fmt, ...) \
- pr_info("bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
+ dev_info((bus)->dev, "bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
#define bcma_debug(bus, fmt, ...) \
- pr_debug("bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
+ dev_dbg((bus)->dev, "bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
struct bcma_bus;

2
target/linux/generic/backport-4.19/095-Allow-class-e-address-assignment-via-ifconfig-ioctl.patch
View File

@ -37,7 +37,7 @@ Reviewed-by: John Gilmore <gnu@toad.com>
-#define IN_EXPERIMENTAL(a) ((((long int) (a)) & 0xf0000000) == 0xf0000000)
-#define IN_BADCLASS(a) IN_EXPERIMENTAL((a))
+#define IN_BADCLASS(a) ((((long int) (a) ) == 0xffffffff)
+#define IN_BADCLASS(a) (((long int) (a) ) == (long int)0xffffffff)
+#define IN_EXPERIMENTAL(a) IN_BADCLASS((a))
+
+#define IN_CLASSE(a) ((((long int) (a)) & 0xf0000000) == 0xf0000000)

74
target/linux/generic/backport-4.19/100-arm-cns3xxx-fix-writing-to-wrong-PCI-registers-after.patch
View File

@ -1,74 +0,0 @@
From 03556dab1cb02d85b50d7be3ee3a3bac001f5991 Mon Sep 17 00:00:00 2001
From: Koen Vandeputte <koen.vandeputte@ncentric.com>
Date: Tue, 18 Dec 2018 12:14:06 +0100
Subject: [PATCH] arm: cns3xxx: fix writing to wrong PCI registers after
alignment
Originally, cns3xxx used it's own functions for mapping, reading and writing registers.
Commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
removed the internal PCI config write function in favor of the generic one:
cns3xxx_pci_write_config() --> pci_generic_config_write()
cns3xxx_pci_write_config() expected aligned addresses, being produced by cns3xxx_pci_map_bus()
while the generic one pci_generic_config_write() actually expects the real address
as both the function and hardware are capable of byte-aligned writes.
This currently leads to pci_generic_config_write() writing
to the wrong registers on some ocasions.
First issue seen due to this:
- driver ath9k gets loaded
- The driver wants to write value 0xA8 to register PCI_LATENCY_TIMER, located at 0x0D
- cns3xxx_pci_map_bus() aligns the address to 0x0C
- pci_generic_config_write() effectively writes 0xA8 into register 0x0C (CACHE_LINE_SIZE)
This seems to cause some slight instability when certain PCI devices are used.
Another issue example caused by this this is the PCI bus numbering,
where the primary bus is higher than the secondary, which is impossible.
Before:
00:00.0 PCI bridge: Cavium, Inc. Device 3400 (rev 01) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 255
Bus: primary=02, secondary=01, subordinate=ff, sec-latency=0
After fix:
00:00.0 PCI bridge: Cavium, Inc. Device 3400 (rev 01) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 255
Bus: primary=00, secondary=01, subordinate=02, sec-latency=0
And very likely some more ..
Fix all by omitting the alignment being done in the mapping function.
Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Bjorn Helgaas <bhelgaas@google.com>
CC: Krzysztof Halasa <khalasa@piap.pl>
CC: Olof Johansson <olof@lixom.net>
CC: Robin Leblon <robin.leblon@ncentric.com>
CC: Rob Herring <robh@kernel.org>
CC: Russell King <linux@armlinux.org.uk>
CC: Tim Harvey <tharvey@gateworks.com>
CC: stable@vger.kernel.org # v4.0+
---
arch/arm/mach-cns3xxx/pcie.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -83,7 +83,7 @@ static void __iomem *cns3xxx_pci_map_bus
} else /* remote PCI bus */
base = cnspci->cfg1_regs + ((busno & 0xf) << 20);
- return base + (where & 0xffc) + (devfn << 12);
+ return base + where + (devfn << 12);
}
static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn,

46
target/linux/generic/backport-4.19/101-arm-cns3xxx-use-actual-size-reads-for-PCIe.patch Normal file
View File

@ -0,0 +1,46 @@
From 4cc30de79d293f1e8c5f50ae3a9c005def9564a0 Mon Sep 17 00:00:00 2001
From: Koen Vandeputte <koen.vandeputte@ncentric.com>
Date: Mon, 7 Jan 2019 14:14:27 +0100
Subject: [PATCH 2/2] arm: cns3xxx: use actual size reads for PCIe
commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(),
which preserved the property of only doing 32-bit reads.
It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(),
so it changed writes from always being 32 bits to being the actual size,
which works just fine.
Due to:
- The documentation does not mention that only 32 bit access is allowed.
- Writes are already executed using the actual size
- Extensive testing shows that 8b, 16b and 32b reads work as intended
It makes perfectly sense to also swap 32 bit reading in favor of actual size.
Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Krzysztof Halasa <khalasa@piap.pl>
CC: Olof Johansson <olof@lixom.net>
CC: Robin Leblon <robin.leblon@ncentric.com>
CC: Rob Herring <robh@kernel.org>
CC: Russell King <linux@armlinux.org.uk>
CC: Tim Harvey <tharvey@gateworks.com>
CC: stable@vger.kernel.org # v4.0+
---
arch/arm/mach-cns3xxx/pcie.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struc
u32 mask = (0x1ull << (size * 8)) - 1;
int shift = (where % 4) * 8;
- ret = pci_generic_config_read32(bus, devfn, where, size, val);
+ ret = pci_generic_config_read(bus, devfn, where, size, val);
if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn &&
(where & 0xffc) == PCI_CLASS_REVISION)

10
target/linux/generic/backport-4.9/012-kbuild-add-macro-for-controlling-warnings-to-linux-c.patch
View File

@ -84,10 +84,11 @@ Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
--- a/include/linux/compiler-gcc.h
+++ b/include/linux/compiler-gcc.h
@@ -334,3 +334,28 @@
* code
*/
#define uninitialized_var(x) x = x
@@ -338,3 +338,30 @@
#if GCC_VERSION >= 50100
#define COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW 1
#endif
+
+
+/*
+ * Turn individual warnings and errors on and off locally, depending
@ -113,6 +114,7 @@ Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+#else
+#define __diag_GCC_8(s)
+#endif
+
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -578,4 +578,23 @@ static __always_inline void __write_once

4
target/linux/generic/backport-4.9/021-bridge-multicast-to-unicast.patch
View File

@ -51,7 +51,7 @@ Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
#define IFLA_BRPORT_MAX (__IFLA_BRPORT_MAX - 1)
--- a/net/bridge/br_forward.c
+++ b/net/bridge/br_forward.c
@@ -174,6 +174,29 @@ out:
@@ -173,6 +173,29 @@ out:
return p;
}
@ -81,7 +81,7 @@ Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
/* called under rcu_read_lock */
void br_flood(struct net_bridge *br, struct sk_buff *skb,
enum br_pkt_type pkt_type, bool local_rcv, bool local_orig)
@@ -242,10 +265,20 @@ void br_multicast_flood(struct net_bridg
@@ -241,10 +264,20 @@ void br_multicast_flood(struct net_bridg
rport = rp ? hlist_entry(rp, struct net_bridge_port, rlist) :
NULL;

2
target/linux/generic/backport-4.9/090-net-generalize-napi_complete_done.patch
View File

@ -657,7 +657,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
gfar_write(&regs->rstat, gfargrp->rstat);
--- a/drivers/net/ethernet/freescale/ucc_geth.c
+++ b/drivers/net/ethernet/freescale/ucc_geth.c
@@ -3301,7 +3301,7 @@ static int ucc_geth_poll(struct napi_str
@@ -3303,7 +3303,7 @@ static int ucc_geth_poll(struct napi_str
howmany += ucc_geth_rx(ugeth, i, budget - howmany);
if (howmany < budget) {

74
target/linux/generic/backport-4.9/100-arm-cns3xxx-fix-writing-to-wrong-PCI-registers-after.patch
View File

@ -1,74 +0,0 @@
From 03556dab1cb02d85b50d7be3ee3a3bac001f5991 Mon Sep 17 00:00:00 2001
From: Koen Vandeputte <koen.vandeputte@ncentric.com>
Date: Tue, 18 Dec 2018 12:14:06 +0100
Subject: [PATCH] arm: cns3xxx: fix writing to wrong PCI registers after
alignment
Originally, cns3xxx used it's own functions for mapping, reading and writing registers.
Commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
removed the internal PCI config write function in favor of the generic one:
cns3xxx_pci_write_config() --> pci_generic_config_write()
cns3xxx_pci_write_config() expected aligned addresses, being produced by cns3xxx_pci_map_bus()
while the generic one pci_generic_config_write() actually expects the real address
as both the function and hardware are capable of byte-aligned writes.
This currently leads to pci_generic_config_write() writing
to the wrong registers on some ocasions.
First issue seen due to this:
- driver ath9k gets loaded
- The driver wants to write value 0xA8 to register PCI_LATENCY_TIMER, located at 0x0D
- cns3xxx_pci_map_bus() aligns the address to 0x0C
- pci_generic_config_write() effectively writes 0xA8 into register 0x0C (CACHE_LINE_SIZE)
This seems to cause some slight instability when certain PCI devices are used.
Another issue example caused by this this is the PCI bus numbering,
where the primary bus is higher than the secondary, which is impossible.
Before:
00:00.0 PCI bridge: Cavium, Inc. Device 3400 (rev 01) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 255
Bus: primary=02, secondary=01, subordinate=ff, sec-latency=0
After fix:
00:00.0 PCI bridge: Cavium, Inc. Device 3400 (rev 01) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 255
Bus: primary=00, secondary=01, subordinate=02, sec-latency=0
And very likely some more ..
Fix all by omitting the alignment being done in the mapping function.
Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Bjorn Helgaas <bhelgaas@google.com>
CC: Krzysztof Halasa <khalasa@piap.pl>
CC: Olof Johansson <olof@lixom.net>
CC: Robin Leblon <robin.leblon@ncentric.com>
CC: Rob Herring <robh@kernel.org>
CC: Russell King <linux@armlinux.org.uk>
CC: Tim Harvey <tharvey@gateworks.com>
CC: stable@vger.kernel.org # v4.0+
---
arch/arm/mach-cns3xxx/pcie.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -83,7 +83,7 @@ static void __iomem *cns3xxx_pci_map_bus
} else /* remote PCI bus */
base = cnspci->cfg1_regs + ((busno & 0xf) << 20);
- return base + (where & 0xffc) + (devfn << 12);
+ return base + where + (devfn << 12);
}
static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn,

14
target/linux/generic/hack-4.14/721-phy_packets.patch
View File

@ -15,23 +15,23 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1410,6 +1410,7 @@ enum netdev_priv_flags {
IFF_RXFH_CONFIGURED = 1<<25,
@@ -1412,6 +1412,7 @@ enum netdev_priv_flags {
IFF_PHONY_HEADROOM = 1<<26,
IFF_MACSEC = 1<<27,
+ IFF_NO_IP_ALIGN = 1<<28,
IFF_L3MDEV_RX_HANDLER = 1<<28,
+ IFF_NO_IP_ALIGN = 1<<29,
};
#define IFF_802_1Q_VLAN IFF_802_1Q_VLAN
@@ -1439,6 +1440,7 @@ enum netdev_priv_flags {
#define IFF_TEAM IFF_TEAM
@@ -1442,6 +1443,7 @@ enum netdev_priv_flags {
#define IFF_RXFH_CONFIGURED IFF_RXFH_CONFIGURED
#define IFF_MACSEC IFF_MACSEC
#define IFF_L3MDEV_RX_HANDLER IFF_L3MDEV_RX_HANDLER
+#define IFF_NO_IP_ALIGN IFF_NO_IP_ALIGN
/**
* struct net_device - The DEVICE structure.
@@ -1725,6 +1727,11 @@ struct net_device {
@@ -1728,6 +1730,11 @@ struct net_device {
const struct xfrmdev_ops *xfrmdev_ops;
#endif
@ -43,7 +43,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
const struct header_ops *header_ops;
unsigned int flags;
@@ -1794,6 +1801,10 @@ struct net_device {
@@ -1797,6 +1804,10 @@ struct net_device {
struct mpls_dev __rcu *mpls_ptr;
#endif

4
target/linux/generic/hack-4.14/902-debloat_proc.patch
View File

@ -338,7 +338,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/ipv4/fib_trie.c
+++ b/net/ipv4/fib_trie.c
@@ -2731,10 +2731,12 @@ static const struct file_operations fib_
@@ -2740,10 +2740,12 @@ static const struct file_operations fib_
int __net_init fib_proc_init(struct net *net)
{
@ -353,7 +353,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
&fib_triestat_fops))
goto out2;
@@ -2744,17 +2746,21 @@ int __net_init fib_proc_init(struct net
@@ -2753,17 +2755,21 @@ int __net_init fib_proc_init(struct net
return 0;
out3:

2
target/linux/generic/hack-4.14/911-kobject_add_broadcast_uevent.patch
View File

@ -20,7 +20,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#ifdef CONFIG_UEVENT_HELPER
/* path to the userspace helper executed on an event */
extern char uevent_helper[];
@@ -224,4 +226,7 @@ int kobject_synth_uevent(struct kobject
@@ -241,4 +243,7 @@ int kobject_synth_uevent(struct kobject
__printf(2, 3)
int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...);

2
target/linux/generic/hack-4.19/204-module_strip.patch
View File

@ -98,7 +98,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1993,6 +1993,13 @@ config TRIM_UNUSED_KSYMS
@@ -1994,6 +1994,13 @@ config TRIM_UNUSED_KSYMS
If unsure, or if you need to build out-of-tree modules, say N.

2
target/linux/generic/hack-4.19/301-mips_image_cmdline_hack.patch
View File

@ -10,7 +10,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1140,6 +1140,10 @@ config SYNC_R4K
@@ -1143,6 +1143,10 @@ config SYNC_R4K
config MIPS_MACHINE
def_bool n

14
target/linux/generic/hack-4.19/721-phy_packets.patch
View File

@ -15,23 +15,23 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1510,6 +1510,7 @@ enum netdev_priv_flags {
IFF_NO_RX_HANDLER = 1<<26,
@@ -1512,6 +1512,7 @@ enum netdev_priv_flags {
IFF_FAILOVER = 1<<27,
IFF_FAILOVER_SLAVE = 1<<28,
+ IFF_NO_IP_ALIGN = 1<<29,
IFF_L3MDEV_RX_HANDLER = 1<<29,
+ IFF_NO_IP_ALIGN = 1<<30,
};
#define IFF_802_1Q_VLAN IFF_802_1Q_VLAN
@@ -1540,6 +1541,7 @@ enum netdev_priv_flags {
#define IFF_NO_RX_HANDLER IFF_NO_RX_HANDLER
@@ -1543,6 +1544,7 @@ enum netdev_priv_flags {
#define IFF_FAILOVER IFF_FAILOVER
#define IFF_FAILOVER_SLAVE IFF_FAILOVER_SLAVE
#define IFF_L3MDEV_RX_HANDLER IFF_L3MDEV_RX_HANDLER
+#define IFF_NO_IP_ALIGN IFF_NO_IP_ALIGN
/**
* struct net_device - The DEVICE structure.
@@ -1838,6 +1840,11 @@ struct net_device {
@@ -1841,6 +1843,11 @@ struct net_device {
const struct tlsdev_ops *tlsdev_ops;
#endif
@ -43,7 +43,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
const struct header_ops *header_ops;
unsigned int flags;
@@ -1913,6 +1920,10 @@ struct net_device {
@@ -1916,6 +1923,10 @@ struct net_device {
struct mpls_dev __rcu *mpls_ptr;
#endif

2
target/linux/generic/hack-4.19/901-debloat_sock_diag.patch
View File

@ -61,7 +61,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
struct dst_entry *__sk_dst_check(struct sock *sk, u32 cookie)
{
struct dst_entry *dst = __sk_dst_get(sk);
@@ -1600,9 +1612,11 @@ static void __sk_free(struct sock *sk)
@@ -1601,9 +1613,11 @@ static void __sk_free(struct sock *sk)
if (likely(sk->sk_net_refcnt))
sock_inuse_add(sock_net(sk), -1);

6
target/linux/generic/hack-4.19/902-debloat_proc.patch
View File

@ -327,7 +327,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -3482,6 +3482,8 @@ static __net_initdata struct pernet_oper
@@ -3483,6 +3483,8 @@ static __net_initdata struct pernet_oper
static int __init proto_init(void)
{
@ -338,7 +338,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/ipv4/fib_trie.c
+++ b/net/ipv4/fib_trie.c
@@ -2708,11 +2708,13 @@ static const struct seq_operations fib_r
@@ -2717,11 +2717,13 @@ static const struct seq_operations fib_r
int __net_init fib_proc_init(struct net *net)
{
@ -354,7 +354,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
fib_triestat_seq_show, NULL))
goto out2;
@@ -2723,17 +2725,21 @@ int __net_init fib_proc_init(struct net
@@ -2732,17 +2734,21 @@ int __net_init fib_proc_init(struct net
return 0;
out3:

4
target/linux/generic/hack-4.9/641-bridge_port_isolate.patch
View File

@ -25,7 +25,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/bridge/br_forward.c
+++ b/net/bridge/br_forward.c
@@ -141,6 +141,9 @@ static int deliver_clone(const struct ne
@@ -140,6 +140,9 @@ static int deliver_clone(const struct ne
void br_forward(const struct net_bridge_port *to,
struct sk_buff *skb, bool local_rcv, bool local_orig)
{
@ -35,7 +35,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (to && should_deliver(to, skb)) {
if (local_rcv)
deliver_clone(to, skb, local_orig);
@@ -206,6 +209,8 @@ void br_flood(struct net_bridge *br, str
@@ -205,6 +208,8 @@ void br_flood(struct net_bridge *br, str
struct net_bridge_port *p;
list_for_each_entry_rcu(p, &br->port_list, list) {

2
target/linux/generic/hack-4.9/661-use_fq_codel_by_default.patch
View File

@ -44,7 +44,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
device, it has to decide which ones to send first, which ones to
--- a/net/sched/sch_api.c
+++ b/net/sched/sch_api.c
@@ -1978,7 +1978,7 @@ static int __init pktsched_init(void)
@@ -1977,7 +1977,7 @@ static int __init pktsched_init(void)
return err;
}

14
target/linux/generic/hack-4.9/721-phy_packets.patch
View File

@ -15,23 +15,23 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1398,6 +1398,7 @@ enum netdev_priv_flags {
IFF_RXFH_CONFIGURED = 1<<25,
@@ -1400,6 +1400,7 @@ enum netdev_priv_flags {
IFF_PHONY_HEADROOM = 1<<26,
IFF_MACSEC = 1<<27,
+ IFF_NO_IP_ALIGN = 1<<28,
IFF_L3MDEV_RX_HANDLER = 1<<28,
+ IFF_NO_IP_ALIGN = 1<<29,
};
#define IFF_802_1Q_VLAN IFF_802_1Q_VLAN
@@ -1427,6 +1428,7 @@ enum netdev_priv_flags {
#define IFF_TEAM IFF_TEAM
@@ -1430,6 +1431,7 @@ enum netdev_priv_flags {
#define IFF_RXFH_CONFIGURED IFF_RXFH_CONFIGURED
#define IFF_MACSEC IFF_MACSEC
#define IFF_L3MDEV_RX_HANDLER IFF_L3MDEV_RX_HANDLER
+#define IFF_NO_IP_ALIGN IFF_NO_IP_ALIGN
/**
* struct net_device - The DEVICE structure.
@@ -1713,6 +1715,11 @@ struct net_device {
@@ -1716,6 +1718,11 @@ struct net_device {
const struct ndisc_ops *ndisc_ops;
#endif
@ -43,7 +43,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
const struct header_ops *header_ops;
unsigned int flags;
@@ -1780,6 +1787,10 @@ struct net_device {
@@ -1783,6 +1790,10 @@ struct net_device {
struct mpls_dev __rcu *mpls_ptr;
#endif

4
target/linux/generic/hack-4.9/902-debloat_proc.patch
View File

@ -339,7 +339,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/ipv4/fib_trie.c
+++ b/net/ipv4/fib_trie.c
@@ -2667,10 +2667,12 @@ static const struct file_operations fib_
@@ -2677,10 +2677,12 @@ static const struct file_operations fib_
int __net_init fib_proc_init(struct net *net)
{
@ -354,7 +354,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
&fib_triestat_fops))
goto out2;
@@ -2680,17 +2682,21 @@ int __net_init fib_proc_init(struct net
@@ -2690,17 +2692,21 @@ int __net_init fib_proc_init(struct net
return 0;
out3:

2
target/linux/generic/hack-4.9/911-kobject_add_broadcast_uevent.patch
View File

@ -20,7 +20,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#ifdef CONFIG_UEVENT_HELPER
/* path to the userspace helper executed on an event */
extern char uevent_helper[];
@@ -222,4 +224,7 @@ int add_uevent_var(struct kobj_uevent_en
@@ -239,4 +241,7 @@ int add_uevent_var(struct kobj_uevent_en
int kobject_action_type(const char *buf, size_t count,
enum kobject_action *type);

2
target/linux/generic/pending-4.14/644-net-pppoe-support-hardware-flow-table-offload.patch
View File

@ -73,7 +73,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#include <linux/nsproxy.h>
#include <net/net_namespace.h>
#include <net/netns/generic.h>
@@ -977,8 +982,36 @@ static int pppoe_xmit(struct ppp_channel
@@ -978,8 +983,36 @@ static int pppoe_xmit(struct ppp_channel
return __pppoe_xmit(sk, skb);
}

2
target/linux/generic/pending-4.14/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
View File

@ -66,7 +66,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
static void rt_fibinfo_free(struct rtable __rcu **rtp)
--- a/net/ipv4/fib_trie.c
+++ b/net/ipv4/fib_trie.c
@@ -2460,6 +2460,7 @@ static const char *const rtn_type_names[
@@ -2469,6 +2469,7 @@ static const char *const rtn_type_names[
[RTN_THROW] = "THROW",
[RTN_NAT] = "NAT",
[RTN_XRESOLVE] = "XRESOLVE",

2
target/linux/generic/pending-4.14/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
View File

@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1763,6 +1763,8 @@ struct net_device {
@@ -1766,6 +1766,8 @@ struct net_device {
struct netdev_hw_addr_list mc;
struct netdev_hw_addr_list dev_addrs;

2
target/linux/generic/pending-4.19/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
View File

@ -71,7 +71,7 @@ Signed-off-by: Tobias Wolf <dev-NTEO@vplace.de>
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -6384,7 +6384,7 @@ static void __ref alloc_node_mem_map(str
@@ -6372,7 +6372,7 @@ static void __ref alloc_node_mem_map(str
mem_map = NODE_DATA(0)->node_mem_map;
#if defined(CONFIG_HAVE_MEMBLOCK_NODE_MAP) || defined(CONFIG_FLATMEM)
if (page_to_pfn(mem_map) != pgdat->node_start_pfn)

62
target/linux/generic/pending-4.19/142-jffs2-Fix-use-of-uninitialized-delayed_work-lockdep-.patch
View File

@ -1,62 +0,0 @@
From a788c5272769ddbcdbab297cf386413eeac04463 Mon Sep 17 00:00:00 2001
From: Daniel Santos <daniel.santos@pobox.com>
Date: Fri, 19 Oct 2018 03:30:20 -0500
Subject: [PATCH] jffs2: Fix use of uninitialized delayed_work, lockdep
breakage
jffs2_sync_fs makes the assumption that if CONFIG_JFFS2_FS_WRITEBUFFER
is defined then a write buffer is available and has been initialized.
However, this does is not the case when the mtd device has no
out-of-band buffer:
int jffs2_nand_flash_setup(struct jffs2_sb_info *c)
{
if (!c->mtd->oobsize)
return 0;
...
The resulting call to cancel_delayed_work_sync passing a uninitialized
(but zeroed) delayed_work struct forces lockdep to become disabled.
[ 90.050639] overlayfs: upper fs does not support tmpfile.
[ 90.652264] INFO: trying to register non-static key.
[ 90.662171] the code is fine but needs lockdep annotation.
[ 90.673090] turning off the locking correctness validator.
[ 90.684021] CPU: 0 PID: 1762 Comm: mount_root Not tainted 4.14.63 #0
[ 90.696672] Stack : 00000000 00000000 80d8f6a2 00000038 805f0000 80444600 8fe364f4 805dfbe7
[ 90.713349] 80563a30 000006e2 8068370c 00000001 00000000 00000001 8e2fdc48 ffffffff
[ 90.730020] 00000000 00000000 80d90000 00000000 00000106 00000000 6465746e 312e3420
[ 90.746690] 6b636f6c 03bf0000 f8000000 20676e69 00000000 80000000 00000000 8e2c2a90
[ 90.763362] 80d90000 00000001 00000000 8e2c2a90 00000003 80260dc0 08052098 80680000
[ 90.780033] ...
[ 90.784902] Call Trace:
[ 90.789793] [<8000f0d8>] show_stack+0xb8/0x148
[ 90.798659] [<8005a000>] register_lock_class+0x270/0x55c
[ 90.809247] [<8005cb64>] __lock_acquire+0x13c/0xf7c
[ 90.818964] [<8005e314>] lock_acquire+0x194/0x1dc
[ 90.828345] [<8003f27c>] flush_work+0x200/0x24c
[ 90.837374] [<80041dfc>] __cancel_work_timer+0x158/0x210
[ 90.847958] [<801a8770>] jffs2_sync_fs+0x20/0x54
[ 90.857173] [<80125cf4>] iterate_supers+0xf4/0x120
[ 90.866729] [<80158fc4>] sys_sync+0x44/0x9c
[ 90.875067] [<80014424>] syscall_common+0x34/0x58
Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
Reviewed-by: Hou Tao <houtao1@huawei.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
---
fs/jffs2/super.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/fs/jffs2/super.c
+++ b/fs/jffs2/super.c
@@ -101,7 +101,8 @@ static int jffs2_sync_fs(struct super_bl
struct jffs2_sb_info *c = JFFS2_SB_INFO(sb);
#ifdef CONFIG_JFFS2_FS_WRITEBUFFER
- cancel_delayed_work_sync(&c->wbuf_dwork);
+ if (jffs2_is_writebuffered(c))
+ cancel_delayed_work_sync(&c->wbuf_dwork);
#endif
mutex_lock(&c->alloc_sem);

2
target/linux/generic/pending-4.19/203-kallsyms_uncompressed.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1145,6 +1145,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
@@ -1146,6 +1146,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
the unaligned access emulation.
see arch/parisc/kernel/unaligned.c for reference

4
target/linux/generic/pending-4.19/300-mips_expose_boot_raw.patch
View File

@ -9,7 +9,7 @@ Acked-by: Rob Landley <rob@landley.net>
---
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1059,9 +1059,6 @@ config FW_ARC
@@ -1062,9 +1062,6 @@ config FW_ARC
config ARCH_MAY_HAVE_PC_FDC
bool
@ -19,7 +19,7 @@ Acked-by: Rob Landley <rob@landley.net>
config CEVT_BCM1480
bool
@@ -2965,6 +2962,18 @@ choice
@@ -2968,6 +2965,18 @@ choice
bool "Extend builtin kernel arguments with bootloader arguments"
endchoice

2
target/linux/generic/pending-4.19/304-mips_disable_fpu.patch
View File

@ -24,7 +24,7 @@ v2: incorporated changes suggested by Jonas Gorski
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2889,6 +2889,20 @@ config MIPS_O32_FP64_SUPPORT
@@ -2892,6 +2892,20 @@ config MIPS_O32_FP64_SUPPORT
If unsure, say N.

142
target/linux/generic/pending-4.19/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch Normal file
View File

@ -0,0 +1,142 @@
From 87ec87c2ad615c1a177cd08ef5fa29fc739f6e50 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 23 Dec 2018 18:06:53 +0100
Subject: [PATCH] MIPS: Add CPU option reporting to /proc/cpuinfo
Many MIPS CPUs have optional CPU features which are not activates for
all CPU cores. Print the CPU options which are implemented in the core
in /proc/cpuinfo. This makes it possible to see what features are
supported and which are not supported. This should cover all standard
MIPS extensions, before it only printed information about the main MIPS
ASEs.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/kernel/proc.c | 116 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 116 insertions(+)
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -130,6 +130,122 @@ static int show_cpuinfo(struct seq_file
seq_printf(m, "micromips kernel\t: %s\n",
(read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no");
}
+
+ seq_printf(m, "Options implemented\t:");
+ if (cpu_has_tlb)
+ seq_printf(m, "%s", " tlb");
+ if (cpu_has_ftlb)
+ seq_printf(m, "%s", " ftlb");
+ if (cpu_has_tlbinv)
+ seq_printf(m, "%s", " tlbinv");
+ if (cpu_has_segments)
+ seq_printf(m, "%s", " segments");
+ if (cpu_has_rixiex)
+ seq_printf(m, "%s", " rixiex");
+ if (cpu_has_ldpte)
+ seq_printf(m, "%s", " ldpte");
+ if (cpu_has_maar)
+ seq_printf(m, "%s", " maar");
+ if (cpu_has_rw_llb)
+ seq_printf(m, "%s", " rw_llb");
+ if (cpu_has_4kex)
+ seq_printf(m, "%s", " 4kex");
+ if (cpu_has_3k_cache)
+ seq_printf(m, "%s", " 3k_cache");
+ if (cpu_has_4k_cache)
+ seq_printf(m, "%s", " 4k_cache");
+ if (cpu_has_6k_cache)
+ seq_printf(m, "%s", " 6k_cache");
+ if (cpu_has_8k_cache)
+ seq_printf(m, "%s", " 8k_cache");
+ if (cpu_has_tx39_cache)
+ seq_printf(m, "%s", " tx39_cache");
+ if (cpu_has_octeon_cache)
+ seq_printf(m, "%s", " octeon_cache");
+ if (cpu_has_fpu)
+ seq_printf(m, "%s", " fpu");
+ if (cpu_has_32fpr)
+ seq_printf(m, "%s", " 32fpr");
+ if (cpu_has_cache_cdex_p)
+ seq_printf(m, "%s", " cache_cdex_p");
+ if (cpu_has_cache_cdex_s)
+ seq_printf(m, "%s", " cache_cdex_s");
+ if (cpu_has_prefetch)
+ seq_printf(m, "%s", " prefetch");
+ if (cpu_has_mcheck)
+ seq_printf(m, "%s", " mcheck");
+ if (cpu_has_ejtag)
+ seq_printf(m, "%s", " ejtag");
+ if (cpu_has_llsc)
+ seq_printf(m, "%s", " llsc");
+ if (cpu_has_bp_ghist)
+ seq_printf(m, "%s", " bp_ghist");
+ if (cpu_has_guestctl0ext)
+ seq_printf(m, "%s", " guestctl0ext");
+ if (cpu_has_guestctl1)
+ seq_printf(m, "%s", " guestctl1");
+ if (cpu_has_guestctl2)
+ seq_printf(m, "%s", " guestctl2");
+ if (cpu_has_guestid)
+ seq_printf(m, "%s", " guestid");
+ if (cpu_has_drg)
+ seq_printf(m, "%s", " drg");
+ if (cpu_has_rixi)
+ seq_printf(m, "%s", " rixi");
+ if (cpu_has_lpa)
+ seq_printf(m, "%s", " lpa");
+ if (cpu_has_mvh)
+ seq_printf(m, "%s", " mvh");
+ if (cpu_has_vtag_icache)
+ seq_printf(m, "%s", " vtag_icache");
+ if (cpu_has_dc_aliases)
+ seq_printf(m, "%s", " dc_aliases");
+ if (cpu_has_ic_fills_f_dc)
+ seq_printf(m, "%s", " ic_fills_f_dc");
+ if (cpu_has_pindexed_dcache)
+ seq_printf(m, "%s", " pindexed_dcache");
+ if (cpu_has_userlocal)
+ seq_printf(m, "%s", " userlocal");
+ if (cpu_has_nofpuex)
+ seq_printf(m, "%s", " nofpuex");
+ if (cpu_has_vint)
+ seq_printf(m, "%s", " vint");
+ if (cpu_has_veic)
+ seq_printf(m, "%s", " veic");
+ if (cpu_has_inclusive_pcaches)
+ seq_printf(m, "%s", " inclusive_pcaches");
+ if (cpu_has_perf_cntr_intr_bit)
+ seq_printf(m, "%s", " perf_cntr_intr_bit");
+ if (cpu_has_ufr)
+ seq_printf(m, "%s", " ufr");
+ if (cpu_has_fre)
+ seq_printf(m, "%s", " fre");
+ if (cpu_has_cdmm)
+ seq_printf(m, "%s", " cdmm");
+ if (cpu_has_small_pages)
+ seq_printf(m, "%s", " small_pages");
+ if (cpu_has_nan_legacy)
+ seq_printf(m, "%s", " nan_legacy");
+ if (cpu_has_nan_2008)
+ seq_printf(m, "%s", " nan_2008");
+ if (cpu_has_ebase_wg)
+ seq_printf(m, "%s", " ebase_wg");
+ if (cpu_has_badinstr)
+ seq_printf(m, "%s", " badinstr");
+ if (cpu_has_badinstrp)
+ seq_printf(m, "%s", " badinstrp");
+ if (cpu_has_contextconfig)
+ seq_printf(m, "%s", " contextconfig");
+ if (cpu_has_perf)
+ seq_printf(m, "%s", " perf");
+ if (cpu_has_shared_ftlb_ram)
+ seq_printf(m, "%s", " shared_ftlb_ram");
+ if (cpu_has_shared_ftlb_entries)
+ seq_printf(m, "%s", " shared_ftlb_entries");
+ if (cpu_has_mipsmt_pertccounters)
+ seq_printf(m, "%s", " mipsmt_pertccounters");
+ seq_printf(m, "\n");
+
seq_printf(m, "shadow register sets\t: %d\n",
cpu_data[n].srsets);
seq_printf(m, "kscratch registers\t: %d\n",

10
target/linux/generic/pending-4.19/341-MIPS-mm-remove-no-op-dma_map_ops-where-possible.patch
View File

@ -19,7 +19,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1113,7 +1113,6 @@ config DMA_PERDEV_COHERENT
@@ -1116,7 +1116,6 @@ config DMA_PERDEV_COHERENT
config DMA_NONCOHERENT
bool
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
@ -27,7 +27,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
select NEED_DMA_MAP_STATE
select DMA_NONCOHERENT_MMAP
select DMA_NONCOHERENT_CACHE_SYNC
@@ -1894,9 +1893,11 @@ config SYS_HAS_CPU_MIPS32_R3_5
@@ -1897,9 +1896,11 @@ config SYS_HAS_CPU_MIPS32_R3_5
config SYS_HAS_CPU_MIPS32_R5
bool
@ -39,7 +39,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
config SYS_HAS_CPU_MIPS64_R1
bool
@@ -1906,6 +1907,7 @@ config SYS_HAS_CPU_MIPS64_R2
@@ -1909,6 +1910,7 @@ config SYS_HAS_CPU_MIPS64_R2
config SYS_HAS_CPU_MIPS64_R6
bool
@ -47,7 +47,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
config SYS_HAS_CPU_R3000
bool
@@ -1942,6 +1944,7 @@ config SYS_HAS_CPU_R8000
@@ -1945,6 +1947,7 @@ config SYS_HAS_CPU_R8000
config SYS_HAS_CPU_R10000
bool
@ -55,7 +55,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
config SYS_HAS_CPU_RM7000
bool
@@ -1970,6 +1973,7 @@ config SYS_HAS_CPU_BMIPS4380
@@ -1973,6 +1976,7 @@ config SYS_HAS_CPU_BMIPS4380
config SYS_HAS_CPU_BMIPS5000
bool
select SYS_HAS_CPU_BMIPS

2
target/linux/generic/pending-4.19/644-net-pppoe-support-hardware-flow-table-offload.patch
View File

@ -73,7 +73,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#include <linux/nsproxy.h>
#include <net/net_namespace.h>
#include <net/netns/generic.h>
@@ -975,8 +980,36 @@ static int pppoe_xmit(struct ppp_channel
@@ -976,8 +981,36 @@ static int pppoe_xmit(struct ppp_channel
return __pppoe_xmit(sk, skb);
}

2
target/linux/generic/pending-4.19/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
View File

@ -66,7 +66,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
static void rt_fibinfo_free(struct rtable __rcu **rtp)
--- a/net/ipv4/fib_trie.c
+++ b/net/ipv4/fib_trie.c
@@ -2465,6 +2465,7 @@ static const char *const rtn_type_names[
@@ -2474,6 +2474,7 @@ static const char *const rtn_type_names[
[RTN_THROW] = "THROW",
[RTN_NAT] = "NAT",
[RTN_XRESOLVE] = "XRESOLVE",

2
target/linux/generic/pending-4.19/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
View File

@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1876,6 +1876,8 @@ struct net_device {
@@ -1879,6 +1879,8 @@ struct net_device {
struct netdev_hw_addr_list mc;
struct netdev_hw_addr_list dev_addrs;

70
target/linux/generic/pending-4.19/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch Normal file
View File

@ -0,0 +1,70 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Subject: [PATCH] bcma: get SoC device struct & copy its DMA params to the
subdevices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
For bus devices to be fully usable it's required to set their DMA
parameters.
For years it has been missing and remained unnoticed because of
mips_dma_alloc_coherent() silently handling the empty coherent_dma_mask.
Kernel 4.19 came with a lot of DMA changes and caused a regression on
the bcm47xx. Starting with the commit f8c55dc6e828 ("MIPS: use generic
dma noncoherent ops for simple noncoherent platforms") DMA coherent
allocations just fail. Example:
[ 1.114914] bgmac_bcma bcma0:2: Allocation of TX ring 0x200 failed
[ 1.121215] bgmac_bcma bcma0:2: Unable to alloc memory for DMA
[ 1.127626] bgmac_bcma: probe of bcma0:2 failed with error -12
[ 1.133838] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded
This change fixes above regression in addition to the MIPS bcm47xx
commit 321c46b91550 ("MIPS: BCM47XX: Setup struct device for the SoC").
It also fixes another *old* GPIO regression caused by a parent pointing
to the NULL:
[ 0.157054] missing gpiochip .dev parent pointer
[ 0.157287] bcma: bus0: Error registering GPIO driver: -22
introduced by the commit 74f4e0cc6108 ("bcma: switch GPIO portions to
use GPIOLIB_IRQCHIP").
Fixes: f8c55dc6e828 ("MIPS: use generic dma noncoherent ops for simple noncoherent platforms")
Fixes: 74f4e0cc6108 ("bcma: switch GPIO portions to use GPIOLIB_IRQCHIP")
Cc: linux-mips@linux-mips.org
Cc: Christoph Hellwig <hch@lst.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/drivers/bcma/host_soc.c
+++ b/drivers/bcma/host_soc.c
@@ -191,6 +191,8 @@ int __init bcma_host_soc_init(struct bcm
struct bcma_bus *bus = &soc->bus;
int err;
+ bus->dev = soc->dev;
+
/* Scan bus and initialize it */
err = bcma_bus_early_register(bus);
if (err)
--- a/drivers/bcma/main.c
+++ b/drivers/bcma/main.c
@@ -236,12 +236,16 @@ EXPORT_SYMBOL(bcma_core_irq);
void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core)
{
+ struct device *dev = &core->dev;
+
core->dev.release = bcma_release_core_dev;
core->dev.bus = &bcma_bus_type;
dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index);
core->dev.parent = bus->dev;
- if (bus->dev)
+ if (bus->dev) {
bcma_of_fill_device(bus->dev, core);
+ dma_coerce_mask_and_coherent(dev, bus->dev->coherent_dma_mask);
+ }
switch (bus->hosttype) {
case BCMA_HOSTTYPE_PCI:

2
target/linux/generic/pending-4.19/920-mangle_bootargs.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1527,6 +1527,15 @@ config EMBEDDED
@@ -1528,6 +1528,15 @@ config EMBEDDED
an embedded system so certain expert options are available
for configuration.

2
target/linux/generic/pending-4.9/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
View File

@ -66,7 +66,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
static void rt_fibinfo_free(struct rtable __rcu **rtp)
--- a/net/ipv4/fib_trie.c
+++ b/net/ipv4/fib_trie.c
@@ -2396,6 +2396,7 @@ static const char *const rtn_type_names[
@@ -2406,6 +2406,7 @@ static const char *const rtn_type_names[
[RTN_THROW] = "THROW",
[RTN_NAT] = "NAT",
[RTN_XRESOLVE] = "XRESOLVE",

2
target/linux/generic/pending-4.9/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
View File

@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1749,6 +1749,8 @@ struct net_device {
@@ -1752,6 +1752,8 @@ struct net_device {
struct netdev_hw_addr_list mc;
struct netdev_hw_addr_list dev_addrs;

4
target/linux/ixp4xx/patches-4.9/160-delayed_uart_io.patch
View File

@ -18,7 +18,7 @@
uart->capabilities = up->capabilities;
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
@@ -2250,6 +2250,7 @@ uart_report_port(struct uart_driver *drv
@@ -2254,6 +2254,7 @@ uart_report_port(struct uart_driver *drv
snprintf(address, sizeof(address),
"I/O 0x%lx offset 0x%x", port->iobase, port->hub6);
break;
@ -26,7 +26,7 @@
case UPIO_MEM:
case UPIO_MEM16:
case UPIO_MEM32:
@@ -2914,6 +2915,7 @@ int uart_match_port(struct uart_port *po
@@ -2918,6 +2919,7 @@ int uart_match_port(struct uart_port *po
case UPIO_HUB6:
return (port1->iobase == port2->iobase) &&
(port1->hub6 == port2->hub6);

8
target/linux/layerscape/patches-4.14/202-core-linux-support-layerscape.patch
View File

@ -200,7 +200,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
int (*ndo_del_slave)(struct net_device *dev,
struct net_device *slave_dev);
netdev_features_t (*ndo_fix_features)(struct net_device *dev,
@@ -2341,7 +2342,8 @@ int register_netdevice_notifier(struct n
@@ -2344,7 +2345,8 @@ int register_netdevice_notifier(struct n
int unregister_netdevice_notifier(struct notifier_block *nb);
struct netdev_notifier_info {
@ -210,7 +210,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
};
struct netdev_notifier_info_ext {
@@ -2373,6 +2375,7 @@ static inline void netdev_notifier_info_
@@ -2376,6 +2378,7 @@ static inline void netdev_notifier_info_
struct net_device *dev)
{
info->dev = dev;
@ -218,7 +218,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
}
static inline struct net_device *
@@ -2381,6 +2384,12 @@ netdev_notifier_info_to_dev(const struct
@@ -2384,6 +2387,12 @@ netdev_notifier_info_to_dev(const struct
return info->dev;
}
@ -241,7 +241,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
void __kfree_skb(struct sk_buff *skb);
extern struct kmem_cache *skbuff_head_cache;
@@ -3293,6 +3294,7 @@ static inline void skb_free_datagram_loc
@@ -3294,6 +3295,7 @@ static inline void skb_free_datagram_loc
}
int skb_kill_datagram(struct sock *sk, struct sk_buff *skb, unsigned int flags);
int skb_copy_bits(const struct sk_buff *skb, int offset, void *to, int len);

8
target/linux/layerscape/patches-4.14/807-usb-support-layerscape.patch
View File

@ -432,7 +432,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
reg &= ~DWC3_DCTL_INITU2ENA;
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -3203,6 +3203,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
@@ -3205,6 +3205,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
{
int ret;
int irq;
@ -440,7 +440,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
irq = dwc3_gadget_get_irq(dwc);
if (irq < 0) {
@@ -3279,6 +3280,12 @@ int dwc3_gadget_init(struct dwc3 *dwc)
@@ -3281,6 +3282,12 @@ int dwc3_gadget_init(struct dwc3 *dwc)
goto err4;
}
@ -1253,7 +1253,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
while (ep_ring->dequeue != td->last_trb)
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1599,13 +1599,38 @@ static int xhci_urb_dequeue(struct usb_h
@@ -1597,13 +1597,38 @@ static int xhci_urb_dequeue(struct usb_h
ret = -ENOMEM;
goto done;
}
@ -1298,7 +1298,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
}
done:
spin_unlock_irqrestore(&xhci->lock, flags);
@@ -4990,7 +5015,7 @@ int xhci_gen_setup(struct usb_hcd *hcd,
@@ -4988,7 +5013,7 @@ int xhci_gen_setup(struct usb_hcd *hcd,
return retval;
xhci_dbg(xhci, "Called HCD init\n");

4
target/linux/mediatek/patches-4.14/0190-usb-xhci-mtk-supports-remote-wakeup-for-mt2712-with-.patch
View File

@ -229,7 +229,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
mtk->num_phys = of_count_phandle_with_args(node,
"phys", "#phy-cells");
@@ -780,7 +723,7 @@ static int __maybe_unused xhci_mtk_suspe
@@ -782,7 +725,7 @@ static int __maybe_unused xhci_mtk_suspe
xhci_mtk_host_disable(mtk);
xhci_mtk_phy_power_off(mtk);
xhci_mtk_clks_disable(mtk);
@ -238,7 +238,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
return 0;
}
@@ -790,7 +733,7 @@ static int __maybe_unused xhci_mtk_resum
@@ -792,7 +735,7 @@ static int __maybe_unused xhci_mtk_resum
struct usb_hcd *hcd = mtk->hcd;
struct xhci_hcd *xhci = hcd_to_xhci(hcd);

4
target/linux/mpc85xx/Makefile
View File

@ -10,9 +10,9 @@ ARCH:=powerpc
BOARD:=mpc85xx
BOARDNAME:=Freescale MPC85xx
CPU_TYPE:=8540
FEATURES:=squashfs
FEATURES:=squashfs ramdisk
MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
SUBTARGETS:=generic p1020
SUBTARGETS:=generic p1020 p2020
KERNEL_PATCHVER:=4.14

5
target/linux/mpc85xx/base-files/etc/board.d/02_network
View File

@ -13,6 +13,11 @@ case "$board" in
aerohive,hiveap-330)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
ocedo,panda)
ucidef_set_interface_wan "eth1"
ucidef_add_switch "switch0" \
"0:lan" "1:lan" "2:lan" "3:lan" "4:lan" "5:lan" "6:lan" "7:lan" "8u@eth0"
;;
tplink,tl-wdr4900-v1)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "1:wan"

38
target/linux/mpc85xx/base-files/etc/diag.sh
View File

@ -1,38 +0,0 @@
#!/bin/sh
# Copyright (C) 2013 OpenWrt.org
. /lib/functions.sh
. /lib/functions/leds.sh
get_status_led() {
case $(board_name) in
aerohive,hiveap-330)
status_led="hiveap-330:green:tricolor0"
;;
tplink,tl-wdr4900-v1)
status_led="tp-link:blue:system"
;;
esac
}
set_state() {
get_status_led
case "$1" in
preinit)
status_led_blink_preinit
;;
failsafe)
status_led_blink_failsafe
;;
preinit_regular)
status_led_blink_preinit_regular
;;
done)
status_led_on
;;
esac
}

25
target/linux/mpc85xx/base-files/etc/hotplug.d/ieee80211/10-fix-wifi-mac Normal file
View File

@ -0,0 +1,25 @@
#!/bin/ash
[ "$ACTION" == "add" ] || exit 0
PHYNBR=${DEVPATH##*/phy}
[ -n $PHYNBR ] || exit 0
. /lib/functions.sh
. /lib/functions/system.sh
board=$(board_name)
case "$board" in
ocedo,panda)
WMAC=wmac$(($PHYNBR + 1))
MAC=$(mtd_get_mac_ascii uboot-env0 ${WMAC})
echo ${MAC} > /sys${DEVPATH}/macaddress
;;
sophos,red-15w-rev1)
echo $(mtd_get_mac_ascii u-boot-env ethaddr) > /sys${DEVPATH}/macaddress
;;
*)
;;
esac

14
target/linux/mpc85xx/base-files/lib/upgrade/platform.sh
View File

@ -9,4 +9,16 @@ platform_check_image() {
return 0
}
# use default for platform_do_upgrade()
platform_do_upgrade() {
local board=$(board_name)
case "$board" in
ocedo,panda|\
sophos,red-15w-rev1)
nand_do_upgrade "$ARGV"
;;
*)
default_do_upgrade "$ARGV"
;;
esac
}

45
target/linux/mpc85xx/config-4.14
View File

@ -7,9 +7,11 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
CONFIG_ARCH_HAS_WALK_MEMORY=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
@ -17,6 +19,12 @@ CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_MMAP_RND_BITS=11
CONFIG_ARCH_MMAP_RND_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
# CONFIG_ARCH_RANDOM is not set
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
@ -25,6 +33,7 @@ CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
CONFIG_ASN1=y
CONFIG_AUDIT_ARCH=y
CONFIG_BLK_MQ_PCI=y
@ -48,16 +57,6 @@ CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_AKCIPHER=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_AUTHENC=y
#CONFIG_CRYPTO_DEV_FSL_CAAM=y
#CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
#CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
# CONFIG_CRYPTO_DEV_FSL_CAAM_IMX is not set
# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set
#CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
#CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y
#CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
#CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HW=y
@ -87,6 +86,7 @@ CONFIG_ENABLE_MUST_CHECK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
# CONFIG_FHCI_DEBUG is not set
CONFIG_FIXED_PHY=y
# CONFIG_FORCE_SMP is not set
CONFIG_FSL_BOOKE=y
# CONFIG_FSL_DPAA is not set
CONFIG_FSL_EMB_PERFMON=y
@ -115,7 +115,7 @@ CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
# CONFIG_GENERIC_TBSYNC is not set
CONFIG_GENERIC_TIME_VSYSCALL_OLD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GEN_RTC=y
# CONFIG_GE_FPGA is not set
# CONFIG_GE_IMP3A is not set
@ -124,6 +124,7 @@ CONFIG_GPIOLIB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_SYSFS=y
# CONFIG_GRO_CELLS is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
@ -146,10 +147,12 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_GENERIC_RCU_GUP=y
CONFIG_HAVE_GENERIC_GUP=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_KPROBES_ON_FTRACE=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
@ -171,6 +174,7 @@ CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_MPC=y
CONFIG_ILLEGAL_POINTER_VALUE=0
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IOMMU_HELPER=y
# CONFIG_IPIC is not set
@ -189,7 +193,8 @@ CONFIG_LOWMEM_CAM_NUM=3
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_LXT_PHY=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MDIO_BOARDINFO=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MIGRATION=y
# CONFIG_MMIO_NVRAM is not set
CONFIG_MODULES_USE_ELF_RELA=y
@ -237,6 +242,7 @@ CONFIG_OLD_SIGSUSPEND=y
# CONFIG_P1022_RDK is not set
# CONFIG_P1023_RDB is not set
CONFIG_PAGE_OFFSET=0xc0000000
# CONFIG_PANDA is not set
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
@ -292,13 +298,16 @@ CONFIG_PPC_SMP_MUXED_IPI=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
# CONFIG_PPC_XICS is not set
# CONFIG_PPC_XIVE is not set
# CONFIG_PPC_XIVE_SPAPR is not set
# CONFIG_PQ2ADS is not set
# CONFIG_PTP_1588_CLOCK_GIANFAR is not set
CONFIG_QE_GPIO=y
CONFIG_QE_USB=y
CONFIG_QUICC_ENGINE=y
CONFIG_RAS=y
# CONFIG_RCU_NEED_SEGCBLIST is not set
# CONFIG_RCU_STALL_COMMON is not set
# CONFIG_RED_15W_REV1 is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
@ -322,7 +331,6 @@ CONFIG_SPE=y
CONFIG_SPE_POSSIBLE=y
CONFIG_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_SPI_FSL_LIB=y
CONFIG_SPI_MASTER=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
@ -332,8 +340,9 @@ CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TASK_SIZE=0xc0000000
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_THREAD_SHIFT=13
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
# CONFIG_TL_WDR4900_V1 is not set
# CONFIG_TQM8540 is not set
# CONFIG_TQM8541 is not set
@ -351,10 +360,8 @@ CONFIG_USB_EHCI_FSL=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_EHCI_HCD_PPC_OF=y
CONFIG_USB_EHCI_PCI=y
CONFIG_USB_FHCI_HCD=y
CONFIG_USB_SUPPORT=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_VDSO32=y
# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
CONFIG_VM_EVENT_COUNTERS=y

332
target/linux/mpc85xx/config-4.19 Normal file
View File

@ -0,0 +1,332 @@
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_ADVANCED_OPTIONS is not set
CONFIG_AR8216_PHY=y
CONFIG_AR8216_PHY_LEDS=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_ARCH_HAS_MEMBARRIER_CALLBACKS=y
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_WALK_MEMORY=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_MMAP_RND_BITS=11
CONFIG_ARCH_MMAP_RND_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
CONFIG_ASN1=y
CONFIG_AUDIT_ARCH=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOOKE=y
CONFIG_BOOKE_WDT=y
CONFIG_BOUNCE=y
# CONFIG_BSC9131_RDB is not set
# CONFIG_BSC9132_QDS is not set
# CONFIG_C293_PCIE is not set
CONFIG_CLONE_BACKWARDS=y
CONFIG_CLZ_TAB=y
CONFIG_CMDLINE="console=ttyS0,115200"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_CORENET_GENERIC is not set
# CONFIG_CPM2 is not set
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
# CONFIG_CRYPTO_AES_PPC_SPE is not set
CONFIG_CRYPTO_AKCIPHER=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_MD5_PPC is not set
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RSA=y
# CONFIG_CRYPTO_SHA1_PPC is not set
# CONFIG_CRYPTO_SHA1_PPC_SPE is not set
# CONFIG_CRYPTO_SHA256_PPC_SPE is not set
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
# CONFIG_E200 is not set
CONFIG_E500=y
# CONFIG_E5500_CPU is not set
# CONFIG_E6500_CPU is not set
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
# CONFIG_FHCI_DEBUG is not set
CONFIG_FIXED_PHY=y
CONFIG_FSL_BOOKE=y
# CONFIG_FSL_DPAA is not set
CONFIG_FSL_EMB_PERFMON=y
# CONFIG_FSL_FMAN is not set
CONFIG_FSL_GTM=y
CONFIG_FSL_LBC=y
CONFIG_FSL_PCI=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_SOC=y
CONFIG_FSL_SOC_BOOKE=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_NVRAM=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GEN_RTC=y
# CONFIG_GE_IMP3A is not set
CONFIG_GIANFAR=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_SYSFS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_CBPF_JIT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_GUP=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_KPROBES_ON_FTRACE=y
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y
# CONFIG_HIVEAP_330 is not set
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_MPC=y
CONFIG_ILLEGAL_POINTER_VALUE=0
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_ISA_DMA_API=y
CONFIG_KERNEL_GZIP=y
CONFIG_KERNEL_START=0xc0000000
# CONFIG_KSI8560 is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOWMEM_CAM_NUM=3
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_LXT_PHY=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MEMFD_CREATE=y
CONFIG_MIGRATION=y
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MPC8536_DS is not set
# CONFIG_MPC8540_ADS is not set
# CONFIG_MPC8560_ADS is not set
# CONFIG_MPC85xx_CDS is not set
# CONFIG_MPC85xx_DS is not set
# CONFIG_MPC85xx_MDS is not set
# CONFIG_MPC85xx_RDB is not set
CONFIG_MPIC=y
# CONFIG_MPIC_MSGR is not set
CONFIG_MPIC_TIMER=y
CONFIG_MPILIB=y
# CONFIG_MTD_CFI is not set
CONFIG_MTD_M25P80=y
CONFIG_MTD_SPI_NOR=y
# CONFIG_MVME2500 is not set
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NLS=y
CONFIG_NO_BOOTMEM=y
CONFIG_NR_IRQS=512
CONFIG_NVMEM=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND=y
# CONFIG_P1010_RDB is not set
# CONFIG_P1022_DS is not set
# CONFIG_P1022_RDK is not set
# CONFIG_P1023_RDB is not set
CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
# CONFIG_PCIEASPM_DEBUG is not set
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYSICAL_ALIGN=0x04000000
CONFIG_PHYSICAL_START=0x00000000
# CONFIG_PHYS_64BIT is not set
# CONFIG_PPA8548 is not set
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_PPC64 is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_8xx is not set
CONFIG_PPC_ADV_DEBUG_DACS=2
CONFIG_PPC_ADV_DEBUG_DVCS=0
CONFIG_PPC_ADV_DEBUG_IACS=2
CONFIG_PPC_ADV_DEBUG_REGS=y
CONFIG_PPC_BARRIER_NOSPEC=y
CONFIG_PPC_BOOK3E_MMU=y
# CONFIG_PPC_BOOK3S_32 is not set
CONFIG_PPC_DOORBELL=y
# CONFIG_PPC_E500MC is not set
# CONFIG_PPC_EARLY_DEBUG is not set
CONFIG_PPC_FSL_BOOK3E=y
CONFIG_PPC_INDIRECT_PCI=y
# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set
CONFIG_PPC_MMU_NOHASH=y
CONFIG_PPC_PCI_CHOICE=y
# CONFIG_PPC_PTDUMP is not set
# CONFIG_PPC_QEMU_E500 is not set
CONFIG_PPC_SMP_MUXED_IPI=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
CONFIG_QE_GPIO=y
CONFIG_QE_USB=y
CONFIG_QUICC_ENGINE=y
CONFIG_RAS=y
# CONFIG_RED_15W_REV1 is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GENERIC=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
# CONFIG_SBC8548 is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SERIAL_QE is not set
CONFIG_SIMPLE_GPIO=y
# CONFIG_SOCRATES is not set
CONFIG_SPARSE_IRQ=y
CONFIG_SPE=y
CONFIG_SPE_POSSIBLE=y
CONFIG_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SRCU=y
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_STX_GP3 is not set
CONFIG_SWCONFIG=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TASK_SIZE=0xc0000000
CONFIG_THREAD_SHIFT=13
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
# CONFIG_TL_WDR4900_V1 is not set
# CONFIG_TQM8540 is not set
# CONFIG_TQM8541 is not set
# CONFIG_TQM8548 is not set
# CONFIG_TQM8555 is not set
# CONFIG_TQM8560 is not set
# CONFIG_TWR_P102x is not set
CONFIG_UCC=y
CONFIG_UCC_FAST=y
CONFIG_UCC_GETH=y
# CONFIG_UGETH_TX_ON_DEMAND is not set
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_EHCI_FSL=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_EHCI_HCD_PPC_OF=y
CONFIG_USB_FHCI_HCD=y
CONFIG_USB_SUPPORT=y
CONFIG_VDSO32=y
# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_XES_MPC85xx is not set
# CONFIG_XPS_USB_HCD_XILINX is not set
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_POWERPC=y

11
target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts
View File

@ -14,6 +14,13 @@
model = "Aerohive HiveAP-330";
compatible = "aerohive,hiveap-330";
aliases {
led-boot = &tricolor_green;
led-failsafe = &tricolor_red;
led-running = &tricolor_green;
led-upgrade = &tricolor_red;
};
chosen {
bootargs-override = "console=ttyS0,9600";
};
@ -109,12 +116,12 @@
compatible = "national,lp5521";
reg = <0x32>;
clock-mode = /bits/ 8 <2>;
chan0 {
tricolor_red: chan0 {
chan-name = "hiveap-330:red:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
chan1 {
tricolor_green:chan1 {
chan-name = "hiveap-330:green:tricolor0";
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;

264
target/linux/mpc85xx/files/arch/powerpc/boot/dts/panda.dts Normal file
View File

@ -0,0 +1,264 @@
// SPDX-License-Identifier: GPL-2.0-or-later or MIT
/include/ "fsl/p1020si-pre.dtsi"
/ {
model = "OCEDO Panda";
compatible = "ocedo,panda";
aliases {
led-boot = &system_blue;
led-failsafe = &system_blue;
led-running = &system_blue;
led-upgrade = &system_blue;
};
chosen {
/* Needed for initramfs */
bootargs-override = "console=ttyS0,115200 ubi.mtd=3,2048";
};
memory {
device_type = "memory";
};
lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xec000000 0x04000000
0x1 0x0 0x0 0xff800000 0x00040000
0x2 0x0 0x0 0xffa00000 0x00020000
0x3 0x0 0x0 0xffb00000 0x00020000>;
nand@1,0 {
compatible = "fsl,p1020-fcm-nand", "fsl,elbc-fcm-nand";
reg = <0x1 0x0 0x40000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0xa0000>;
label = "uboot";
read-only;
};
partition@a0000 {
reg = <0xa0000 0x20000>;
label = "uboot-env0";
};
partition@c0000 {
reg = <0xc0000 0x40000>;
label = "uboot-env1";
};
partition@100000 {
reg = <0x100000 0xff00000>;
label = "ubi";
};
};
};
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
i2c@3000 {
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
gpio0: gpio-controller@fc00 {
};
mdio@24000 {
phy0: ethernet-phy@8 {
reg = <0x8>;
};
phy1: ethernet-phy@9 {
reg = <0x9>;
};
switch0: ethernet-phy@0 {
reg = <0x0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "lan5";
};
port@5 {
reg = <5>;
label = "lan6";
};
port@6 {
reg = <6>;
label = "lan7";
};
port@7 {
reg = <7>;
label = "lan8";
};
port@8 {
reg = <8>;
label = "cpu";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
mdio@25000 {
tbi_phy0: tbi-phy@11 {
reg = <0x11>;
};
};
mdio@26000 {
tbi_phy1: tbi-phy@11 {
reg = <0x11>;
};
};
enet0: ethernet@b0000 {
phy-connection-type = "rgmii-id";
phy-handle = <&switch0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
enet1: ethernet@b1000 {
phy-connection-type = "sgmii";
phy-handle = <&phy0>;
tbi-handle = <&tbi_phy0>;
};
enet2: ethernet@b2000 {
phy-connection-type = "sgmii";
phy-handle = <&phy1>;
tbi-handle = <&tbi_phy1>;
};
usb@22000 {
phy_type = "ulpi";
dr_mode = "host";
};
usb@23000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
reg = <0 0xffe09000 0 0x1000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
leds {
compatible = "gpio-leds";
power {
gpios = <&gpio0 0 0>;
label = "panda:green:power";
default-state = "on";
};
wlan0 {
gpios = <&gpio0 1 0>;
label = "panda:yellow:wlan0";
linux,default-trigger = "phy0tpt";
};
wlan1 {
gpios = <&gpio0 2 0>;
label = "panda:red:wlan1";
linux,default-trigger = "phy1tpt";
};
tbd_orange {
gpios = <&gpio0 3 0>;
label = "panda:orange:tbd";
};
system_blue: system {
gpios = <&gpio0 4 0>;
label = "panda:blue:system";
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 6 1>;
linux,code = <0x198>;
};
};
};
/include/ "fsl/p1020si-post.dtsi"

214
target/linux/mpc85xx/files/arch/powerpc/boot/dts/red-15w-rev1.dts Normal file
View File

@ -0,0 +1,214 @@
// SPDX-License-Identifier: GPL-2.0-or-later or MIT
/include/ "fsl/p1010si-pre.dtsi"
/ {
model = "Sophos RED 15w Rev.1";
compatible = "sophos,red-15w-rev1";
aliases {
led-boot = &system_green;
led-failsafe = &system_red;
led-running = &system_green;
led-upgrade = &system_red;
};
memory {
device_type = "memory";
};
leds {
compatible = "gpio-leds";
system_green: system_green {
gpios = <&gpio0 7 0>;
label = "red-15w-rev1:green:system";
};
system_red: system_red {
gpios = <&gpio0 3 0>;
label = "red-15w-rev1:red:system";
};
router {
gpios = <&gpio0 5 1>;
label = "red-15w-rev1:green:router";
};
internet {
gpios = <&gpio0 4 1>;
label = "red-15w-rev1:green:internet";
};
tunnel {
gpios = <&gpio0 8 1>;
label = "red-15w-rev1:green:tunnel";
};
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
i2c@3000 {
eeprom@50 {
compatible = "st,24c256";
reg = <0x50>;
};
};
i2c@3100 {
eeprom@52 {
compatible = "atmel,24c01";
reg = < 0x52 >;
};
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "utmi";
dr_mode = "host";
};
mdio@24000 {
phy0: ethernet-phy@0 {
reg = <0x0>;
};
};
mdio@25000 {
tbi_phy: tbi-phy@11 {
reg = <0x11>;
};
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
phy-connection-type = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
enet1: ethernet@b1000 {
phy-handle = <&phy0>;
phy-connection-type = "sgmii";
tbi-handle = <&tbi_phy>;
};
enet2: ethernet@b2000 {
status = "disabled";
};
sdhc@2e000 {
status = "disabled";
};
};
ifc: ifc@ffe1e000 {
reg = <0x0 0xffe1e000 0 0x2000>;
/* NOR, NAND Flashes and CPLD on board */
ranges = <0x0 0x0 0x0 0xee000000 0x02000000
0x1 0x0 0x0 0xff800000 0x00010000
0x3 0x0 0x0 0xffb00000 0x00000020>;
nand@1,0 {
compatible = "fsl,ifc-nand";
reg = <0x1 0x0 0x10000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Original partition layout:
* 0x000000000000-0x000000100000 : "NAND U-Boot Image"
* 0x000000100000-0x000000200000 : "NAND U-Boot Environment"
* 0x000000200000-0x000000300000 : "Provisioning"
* - OS-Image 1
* 0x000000300000-0x000000400000 : "fdt1"
* 0x000000400000-0x000000c00000 : "uimage1"
* 0x000000c00000-0x000001c00000 : "rootfs1"
* - OS-Image 2
* 0x000001c00000-0x000001d00000 : "fdt2"
* 0x000001d00000-0x000002500000 : "uimage2"
* 0x000002500000-0x000003500000 : "rootfs2"
* - Empty
* 0x000003500000-0x000008000000 : "data"
*/
partition@0 {
reg = <0x0 0x100000>;
label = "u-boot";
read-only;
};
partition@100000 {
reg = <0x100000 0x100000>;
label = "u-boot-env";
};
partition@200000 {
reg = <0x200000 0x100000>;
label = "provisioning";
read-only;
};
partition@300000 {
reg = <0x300000 0x800000>;
label = "kernel";
};
partition@b00000 {
reg = <0xb00000 0x7500000>;
label = "ubi";
};
oem-partition@300000 {
reg = <0x300000 0x1900000>;
label = "sophos-os1";
};
oem-partition@1c00000 {
reg = <0x1c00000 0x1900000>;
label = "sophos-os2";
};
oem-partition@3500000 {
reg = <0x3500000 0x4b00000>;
label = "sophos-data";
};
};
};
};
pci0: pcie@ffe09000 {
status = "disabled";
};
pci1: pcie@ffe0a000 {
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
};
/include/ "fsl/p1010si-post.dtsi"

69
target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
View File

@ -24,6 +24,10 @@
aliases {
spi0 = &spi0;
led-boot = &system_green;
led-failsafe = &system_green;
led-running = &system_green;
led-upgrade = &system_green;
};
memory {
@ -35,49 +39,44 @@
spi0: spi@7000 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
u-boot@0 {
reg = <0x0 0x0050000>;
label = "u-boot";
read-only;
};
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
dtb@50000 {
reg = <0x00050000 0x00010000>;
label = "dtb";
read-only;
};
partition@0 {
reg = <0x0 0x0050000>;
label = "u-boot";
read-only;
};
kernel@60000 {
reg = <0x00060000 0x002a0000>;
label = "kernel";
};
partition@50000 {
reg = <0x00050000 0x00010000>;
label = "dtb";
read-only;
};
rootfs@300000 {
reg = <0x00300000 0x00ce0000>;
label = "rootfs";
};
partition@60000 {
compatible = "tplink,firmware";
reg = <0x00060000 0x00f80000>;
label = "firmware";
};
config: config@fe0000 {
reg = <0x00fe0000 0x00010000>;
label = "config";
read-only;
};
config: partition@fe0000 {
reg = <0x00fe0000 0x00010000>;
label = "config";
read-only;
};
caldata@ff0000 {
reg = <0x00ff0000 0x00010000>;
label = "caldata";
read-only;
};
firmware@60000 {
reg = <0x00060000 0x00f80000>;
label = "firmware";
partition@ff0000 {
reg = <0x00ff0000 0x00010000>;
label = "caldata";
read-only;
};
};
};
};
@ -197,7 +196,7 @@
leds {
compatible = "gpio-leds";
system {
system_green: system {
gpios = <&gpio0 2 1>; /* active low */
label = "tp-link:blue:system";
};

91
target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/panda.c Normal file
View File

@ -0,0 +1,91 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* OCEDO Panda Board Setup
*
* Copyright (C) 2019 David Bauer <mail@david-bauer.net>
*
* Based on:
* mpc85xx_rdb.c:
* MPC85xx RDB Board Setup
* Copyright 2013 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "smp.h"
#include "mpc85xx.h"
void __init panda_pic_init(void)
{
struct mpic *mpic;
mpic = mpic_alloc(NULL, 0,
MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
/*
* Setup the architecture
*/
static void __init panda_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("panda_setup_arch()", 0);
mpc85xx_smp_init();
fsl_pci_assign_primary();
pr_info("Panda board from OCEDO\n");
}
machine_arch_initcall(panda, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init panda_probe(void)
{
if (of_machine_is_compatible("ocedo,panda"))
return 1;
return 0;
}
define_machine(panda) {
.name = "P1020 RDB",
.probe = panda_probe,
.setup_arch = panda_setup_arch,
.init_IRQ = panda_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

87
target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/red15w_rev1.c Normal file
View File

@ -0,0 +1,87 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Sophos RED 15w Rev.1 Board Setup
*
* Copyright (C) 2019 David Bauer <mail@david-bauer.net>
*
* Based on:
* p1010rdb.c:
* P1010 RDB Board Setup
* Copyright 2011 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "mpc85xx.h"
void __init red_15w_rev1_pic_init(void)
{
struct mpic *mpic;
mpic = mpic_alloc(NULL, 0,
MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
/*
* Setup the architecture
*/
static void __init red_15w_rev1_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("red_15w_rev1_setup_arch()", 0);
fsl_pci_assign_primary();
pr_info("RED 15w Rev.1 from Sophos\n");
}
machine_arch_initcall(red_15w_rev1, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init red_15w_rev1_probe(void)
{
if (of_machine_is_compatible("sophos,red-15w-rev1"))
return 1;
return 0;
}
define_machine(red_15w_rev1) {
.name = "P1010 RDB",
.probe = red_15w_rev1_probe,
.setup_arch = red_15w_rev1_setup_arch,
.init_IRQ = red_15w_rev1_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

18
target/linux/mpc85xx/generic/config-default
View File

@ -1 +1,19 @@
# CONFIG_FSL_CORENET_CF is not set
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
# CONFIG_MTD_UBI_FASTMAP is not set
# CONFIG_MTD_UBI_GLUEBI is not set
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_REALTEK_PHY=y
CONFIG_RED_15W_REV1=y
CONFIG_TL_WDR4900_V1=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_ZLIB=y

1
target/linux/mpc85xx/generic/target.mk
View File

@ -1,4 +1,5 @@
BOARDNAME:=Generic
FEATURES+=nand
KERNELNAME:=cuImage.tl-wdr4900-v1
define Target/Description

85
target/linux/mpc85xx/image/Makefile
View File

@ -7,6 +7,30 @@ include $(INCLUDE_DIR)/image.mk
DEVICE_VARS += TPLINK_HWID TPLINK_HWREV TPLINK_FLASHLAYOUT
define rootfs_align
$(patsubst %-256k,0x40000,$(patsubst %-128k,0x20000,$(patsubst %-64k,0x10000,$(patsubst squashfs%,0x4,$(patsubst root.%,%,$(1))))))
endef
# combine kernel and rootfs into one image
# mktplinkfw <type> <optional extra arguments to mktplinkfw binary>
# <type> is "sysupgrade" or "factory"
#
# -a align the rootfs start on an <align> bytes boundary
# -j add jffs2 end-of-filesystem markers
# -s strip padding from end of the image
# -X reserve <size> bytes in the firmware image (hexval prefixed with 0x)
define Build/mktplinkfw
-$(STAGING_DIR_HOST)/bin/mktplinkfw \
-H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) -N OpenWrt -V $(REVISION) \
-k $(IMAGE_KERNEL) \
-r $@ \
-o $@.new \
-j -X 0x40000 \
-a $(call rootfs_align,$(FILESYSTEM)) \
$(wordlist 2,$(words $(1)),$(1)) \
$(if $(findstring sysupgrade,$(word 1,$(1))),-s) && mv $@.new $@ || rm -f $@
endef
define Device/Default
PROFILES := Default
DEVICE_DTS := $(1)
@ -16,17 +40,6 @@ define Device/Default
KERNEL := kernel-bin
endef
define Build/tplink-v1-image
$(STAGING_DIR_HOST)/bin/mktplinkfw \
-H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) \
-N "$(VERSION_DIST)" -V $(REVISION) \
-k $(IMAGE_KERNEL) \
-r $(IMAGE_ROOTFS) \
-j \
$(1) \
-o $@
endef
ifeq ($(SUBTARGET),generic)
define Device/tl-wdr4900-v1
@ -36,14 +49,27 @@ define Device/tl-wdr4900-v1
TPLINK_HWREV := 1
TPLINK_FLASHLAYOUT := 16Mppc
KERNEL_NAME := cuImage.tl-wdr4900-v1
KERNEL_INITRAMFS :=
SUPPORTED_DEVICES:=tl-wdr4900-v1 tplink,tl-wdr4900-v1
IMAGES := fdt.bin factory.bin sysupgrade.bin
IMAGE/fdt.bin := append-dtb
IMAGE/factory.bin := tplink-v1-image
IMAGE/sysupgrade.bin := tplink-v1-image -s | append-metadata
IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw sysupgrade | append-metadata
IMAGE/factory.bin := append-rootfs | mktplinkfw factory
endef
TARGET_DEVICES += tl-wdr4900-v1
define Device/red-15w-rev1
DEVICE_TITLE := Sophos RED 15w Rev.1
DEVICE_PACKAGES := kmod-usb2
# Original firmware uses a dedicated DTB-partition.
# The bootloader however supports FIT-images.
KERNEL = kernel-bin | gzip | fit gzip $(KDIR)/image-$$(DEVICE_DTS).dtb
SUPPORTED_DEVICES := sophos,red-15w-rev1
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += red-15w-rev1
endif
ifeq ($(SUBTARGET),p1020)
@ -64,6 +90,39 @@ define Device/hiveap-330
endef
TARGET_DEVICES += hiveap-330
define Device/panda
DEVICE_TITLE := OCEDO Panda
DEVICE_PACKAGES := kmod-rtc-ds1307 kmod-usb2 uboot-envtools
KERNEL = kernel-bin | gzip | fit gzip $(KDIR)/image-$$(DEVICE_DTS).dtb
PAGESIZE := 2048
SUBPAGESIZE := 512
BLOCKSIZE := 128k
SUPPORTED_DEVICES := ocedo,panda
IMAGES := fdt.bin sysupgrade.bin
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
IMAGE/fdt.bin := append-dtb
endef
TARGET_DEVICES += panda
endif
ifeq ($(SUBTARGET),p2020)
define Device/p2020rdb
DEVICE_TITLE := Freescale P2020RDB
DEVICE_DTS_DIR := $(DTS_DIR)/fsl
DEVICE_PACKAGES := kmod-hwmon-core kmod-hwmon-lm90 kmod-rtc-ds1307 \
kmod-gpio-pca953x kmod-eeprom-at24
BLOCKSIZE := 128k
KERNEL := kernel-bin | gzip | \
fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
SUPPORTED_DEVICES := fsl,P2020RDB
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \
pad-rootfs $$(BLOCKSIZE) | append-metadata
endef
TARGET_DEVICES += p2020rdb
endif
$(eval $(call BuildImage))

22
target/linux/mpc85xx/p1020/config-default
View File

@ -1,13 +1,16 @@
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_AT803X_PHY=y
CONFIG_BROADCOM_PHY=y
CONFIG_CMDLINE_OVERRIDE=y
CONFIG_CPU_RMAP=y
CONFIG_EEPROM_LEGACY=y
# CONFIG_FSL_CORENET_CF is not set
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_TBSYNC=y
# CONFIG_GPIO_MAX77620 is not set
CONFIG_HAVE_RCU_TABLE_FREE=y
CONFIG_HIVEAP_330=y
CONFIG_PANDA=y
CONFIG_I2C_CHARDEV=y
CONFIG_LEDS_LP5521=y
CONFIG_LEDS_LP55XX_COMMON=y
@ -16,7 +19,16 @@ CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_MFD_CORE=y
CONFIG_MFD_MAX77620=y
CONFIG_MTD_CFI=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_FSL_ELBC=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
# CONFIG_MTD_UBI_FASTMAP is not set
# CONFIG_MTD_UBI_GLUEBI is not set
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NR_CPUS=2
@ -28,5 +40,15 @@ CONFIG_RPS=y
# CONFIG_RTC_DRV_MAX77686 is not set
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SMP=y
CONFIG_SWCONFIG_B53=y
# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set
CONFIG_SWCONFIG_B53_PHY_DRIVER=y
# CONFIG_SWCONFIG_B53_PHY_FIXUP is not set
# CONFIG_SWCONFIG_B53_SPI_DRIVER is not set
# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
CONFIG_TREE_RCU=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_ZLIB=y
CONFIG_XPS=y

2
target/linux/mpc85xx/p1020/target.mk
View File

@ -1,5 +1,5 @@
BOARDNAME:=P1020
FEATURES += ramdisk
FEATURES+=nand
define Target/Description
Build firmware images for Freescale P1020 based boards.

31
target/linux/mpc85xx/p2020/config-default Normal file
View File

@ -0,0 +1,31 @@
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_CPU_RMAP=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_TBSYNC=y
CONFIG_HAVE_RCU_TABLE_FREE=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_MPC85xx_RDB=y
CONFIG_MTD_CFI=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_BCH=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_BCH=y
CONFIG_MTD_NAND_FSL_ELBC=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIT_FW=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NR_CPUS=2
CONFIG_PADATA=y
CONFIG_PCI_MSI=y
CONFIG_PPC_MSI_BITMAP=y
CONFIG_RCU_NEED_SEGCBLIST=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SMP=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_XPS=y

15
target/linux/mpc85xx/p2020/profiles/00-default.mk Normal file
View File

@ -0,0 +1,15 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Default
NAME:=Default Profile
PRIORITY:=1
endef
define Profile/Default/Description
Default package set compatible with most P2020 boards.
endef
$(eval $(call Profile,Default))

5
target/linux/mpc85xx/p2020/target.mk Normal file
View File

@ -0,0 +1,5 @@
BOARDNAME:=P2020
define Target/Description
Build firmware images for Freescale P2020 based boards.
endef

170
target/linux/mpc85xx/patches-4.14/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch Normal file
View File

@ -0,0 +1,170 @@
From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Sun, 30 Dec 2018 23:24:41 +0100
Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT
This patch apply chages for OpenWRT in P2020RDB
dts file.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++---------
1 file changed, 63 insertions(+), 35 deletions(-)
--- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts
@@ -2,6 +2,7 @@
* P2020 RDB Device Tree Source
*
* Copyright 2009-2012 Freescale Semiconductor Inc.
+ * Copyright 2018 Pawel Dembicki <paweldembicki@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -9,10 +10,15 @@
* option) any later version.
*/
+/dts-v1/;
+
/include/ "p2020si-pre.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
/ {
- model = "fsl,P2020RDB";
+ model = "Freescale P2020RDB";
compatible = "fsl,P2020RDB";
aliases {
@@ -38,48 +44,38 @@
0x2 0x0 0x0 0xffb00000 0x00020000>;
nor@0,0 {
- #address-cells = <1>;
- #size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x1000000>;
bank-width = <2>;
device-width = <1>;
- partition@0 {
- /* This location must not be altered */
- /* 256KB for Vitesse 7385 Switch firmware */
- reg = <0x0 0x00040000>;
- label = "NOR (RO) Vitesse-7385 Firmware";
- read-only;
- };
-
- partition@40000 {
- /* 256KB for DTB Image */
- reg = <0x00040000 0x00040000>;
- label = "NOR (RO) DTB Image";
- read-only;
- };
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
- partition@80000 {
- /* 3.5 MB for Linux Kernel Image */
- reg = <0x00080000 0x00380000>;
- label = "NOR (RO) Linux Kernel Image";
- read-only;
- };
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg = <0x0 0x00040000>;
+ label = "NOR (RO) Vitesse-7385 Firmware";
+ read-only;
+ };
- partition@400000 {
- /* 11MB for JFFS2 based Root file System */
- reg = <0x00400000 0x00b00000>;
- label = "NOR (RW) JFFS2 Root File System";
- };
+ partition@40000 {
+ compatible = "denx,fit";
+ reg = <0x00040000 0x00ec0000>;
+ label = "firmware";
+ };
- partition@f00000 {
- /* This location must not be altered */
- /* 512KB for u-boot Bootloader Image */
- /* 512KB for u-boot Environment Variables */
- reg = <0x00f00000 0x00100000>;
- label = "NOR (RO) U-Boot Image";
- read-only;
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x00f00000 0x00100000>;
+ label = "u-boot";
+ read-only;
+ };
};
};
@@ -144,13 +140,43 @@
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
+ gpio0: gpio-controller@fc00 {
+ };
+
i2c@3000 {
+ temperature-sensor@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ };
+
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
+ i2c@3100 {
+ pmic@11 {
+ compatible = "zl2006";
+ reg = <0x11>;
+ };
+
+ gpio@18 {
+ compatible = "nxp,pca9557";
+ reg = <0x18>;
+ };
+
+ eeprom@52 {
+ compatible = "atmel,24c01";
+ reg = <0x52>;
+ };
+ };
+
spi@7000 {
flash@0 {
#address-cells = <1>;
@@ -204,10 +230,12 @@
phy0: ethernet-phy@0 {
interrupts = <3 1 0 0>;
reg = <0x0>;
+ reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
phy1: ethernet-phy@1 {
interrupts = <3 1 0 0>;
reg = <0x1>;
+ reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
tbi-phy@2 {
device_type = "tbi-phy";

29
target/linux/mpc85xx/patches-4.14/105-powerpc-85xx-red-15w-rev1.patch Normal file
View File

@ -0,0 +1,29 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -173,6 +173,16 @@ config XES_MPC85xx
Manufacturer: Extreme Engineering Solutions, Inc.
URL: <http://www.xes-inc.com/>
+config RED_15W_REV1
+ bool "Sophos RED 15w Rev.1"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the SOPHOS RED 15w Rev.1 board.
+
+ This board is a wireless VPN router with a Freescale P1010 SoC.
+
config STX_GP3
bool "Silicon Turnkey Express GP3"
help
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_P1023_RDB) += p1023_rdb.o
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
+obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o
obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o

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