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rockchip: adjust default DMA coherent_pool to 2MiB

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coolsnowwolf 2022-08-12 11:09:56 +00:00
parent 07c6d87fb0
commit e9a10023af
2 changed files with 28 additions and 0 deletions

0
target/linux/rockchip/patches-5.19/105-nanopi-r4s-sd-signalling.patch → target/linux/rockchip/patches-5.19/0105-nanopi-r4s-sd-signalling.patch
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target/linux/rockchip/patches-5.19/0911-kernel-dma-adjust-default-coherent_pool-to-2MiB.patch Normal file
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@ -0,0 +1,28 @@
From 16bdf3e76fec6ddb44f1fcf221139fb39d225031 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Sat, 2 Jan 2021 05:23:55 +0000
Subject: [PATCH] kernel: dma: adjust default coherent_pool to 2MiB
---
kernel/dma/pool.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
--- a/kernel/dma/pool.c
+++ b/kernel/dma/pool.c
@@ -189,13 +189,11 @@ static int __init dma_atomic_pool_init(v
int ret = 0;
/*
- * If coherent_pool was not used on the command line, default the pool
- * sizes to 128KB per 1GB of memory, min 128KB, max MAX_ORDER-1.
+ * Always use 2MiB as default pool size.
+ * See: https://forum.armbian.com/topic/4811-uas-mainline-kernel-coherent-pool-memory-size/
*/
if (!atomic_pool_size) {
- unsigned long pages = totalram_pages() / (SZ_1G / SZ_128K);
- pages = min_t(unsigned long, pages, MAX_ORDER_NR_PAGES);
- atomic_pool_size = max_t(size_t, pages << PAGE_SHIFT, SZ_128K);
+ atomic_pool_size = SZ_2M;
}
INIT_WORK(&atomic_pool_work, atomic_pool_work_fn);