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update linux target patch

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This commit is contained in:
coolsnowwolf 2018-05-22 18:44:30 +08:00
parent 51820afeae
commit e985e89cae
216 changed files with 12531 additions and 12300 deletions
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11
target/linux/ath79/base-files/etc/board.d/01_leds Normal file → Executable file
View File

@ -5,8 +5,19 @@
board_config_update
board=$(board_name)
boardname="${board##*,}"
case "$board" in
"avm,fritz300e")
ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth0"
ucidef_set_led_wlan "wlan" "WLAN" "$boardname:green:wlan" "phy0tpt"
ucidef_set_rssimon "wlan0" "200000" "1"
ucidef_set_led_rssi "rssilow" "RSSILOW" "$boardname:green:rssi0" "wlan0" "1" "100"
ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "$boardname:green:rssi1" "wlan0" "20" "100"
ucidef_set_led_rssi "rssimedium" "RSSIMEDIUM" "$boardname:green:rssi2" "wlan0" "40" "100"
ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "$boardname:green:rssi3" "wlan0" "60" "100"
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$boardname:green:rssi4" "wlan0" "80" "100"
;;
"glinet,ar150")
ucidef_set_led_wlan "wlan" "WLAN" "gl-ar150:orange:wlan" "phy0tpt"
;;

15
target/linux/ath79/base-files/etc/board.d/02_network Normal file → Executable file
View File

@ -8,6 +8,7 @@ ath79_setup_interfaces()
local board="$1"
case "$board" in
"avm,fritz300e"|\
"ubnt,unifi")
ucidef_set_interface_lan "eth0"
;;
@ -36,9 +37,23 @@ ath79_setup_interfaces()
esac
}
ath79_setup_macs()
{
local board="$1"
case "$board" in
avm,fritz300e)
lan_mac=$(fritz_tffs -n maca -i $(find_mtd_part "tffs (1)"))
;;
esac
[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
}
board_config_update
board=$(board_name)
ath79_setup_interfaces $board
ath79_setup_macs $board
board_config_flush
exit 0

4
target/linux/ath79/base-files/etc/diag.sh
View File

@ -4,8 +4,12 @@
get_status_led() {
local board=$(board_name)
local boardname="${board##*,}"
case $board in
"avm,fritz300e")
status_led="${boardname}:green:power"
;;
"glinet,ar150")
status_led="gl-ar150:orange:wlan"
;;

21
target/linux/ath79/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom
View File

@ -24,11 +24,32 @@ ath9k_eeprom_extract() {
ath9k_eeprom_die "failed to extract from $mtd"
}
ath9k_eeprom_extract_reverse() {
local part=$1
local offset=$2
local count=$3
local mtd
local reversed
local caldata
mtd=$(find_mtd_chardev "$part")
reversed=$(hexdump -v -s $offset -n $count -e '/1 "%02x "' $mtd)
for byte in $reversed; do
caldata="\x${byte}${caldata}"
done
printf "%b" "$caldata" > /lib/firmware/$FIRMWARE
}
board=$(board_name)
case "$FIRMWARE" in
"ath9k-eeprom-pci-0000:00:00.0.bin")
case $board in
"avm,fritz300e")
ath9k_eeprom_extract_reverse "urloader" 5441 1088
;;
"ubnt,unifi")
ath9k_eeprom_extract "art" 4096 2048
;;

208
target/linux/ath79/base-files/lib/upgrade/platform.sh
View File

@ -2,205 +2,11 @@
# Copyright (C) 2011 OpenWrt.org
#
. /lib/functions/system.sh
PART_NAME=firmware
RAMFS_COPY_BIN='nandwrite'
CI_BLKSZ=65536
CI_LDADR=0x80060000
PLATFORM_DO_UPGRADE_COMBINED_SEPARATE_MTD=0
platform_find_partitions() {
local first dev size erasesize name
while read dev size erasesize name; do
name=${name#'"'}; name=${name%'"'}
case "$name" in
vmlinux.bin.l7|vmlinux|kernel|linux|linux.bin|rootfs|filesystem)
if [ -z "$first" ]; then
first="$name"
else
echo "$erasesize:$first:$name"
break
fi
;;
esac
done < /proc/mtd
}
platform_find_kernelpart() {
local part
for part in "${1%:*}" "${1#*:}"; do
case "$part" in
vmlinux.bin.l7|vmlinux|kernel|linux|linux.bin)
echo "$part"
break
;;
esac
done
}
platform_find_rootfspart() {
local part
for part in "${1%:*}" "${1#*:}"; do
[ "$part" != "$2" ] && echo "$part" && break
done
}
platform_do_upgrade_combined() {
local partitions=$(platform_find_partitions)
local kernelpart=$(platform_find_kernelpart "${partitions#*:}")
local erase_size=$((0x${partitions%%:*})); partitions="${partitions#*:}"
local kern_length=0x$(dd if="$1" bs=2 skip=1 count=4 2>/dev/null)
local kern_blocks=$(($kern_length / $CI_BLKSZ))
local root_blocks=$((0x$(dd if="$1" bs=2 skip=5 count=4 2>/dev/null) / $CI_BLKSZ))
if [ -n "$partitions" ] && [ -n "$kernelpart" ] && \
[ ${kern_blocks:-0} -gt 0 ] && \
[ ${root_blocks:-0} -gt 0 ] && \
[ ${erase_size:-0} -gt 0 ];
then
local rootfspart=$(platform_find_rootfspart "$partitions" "$kernelpart")
local append=""
[ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 ] && append="-j $CONF_TAR"
if [ "$PLATFORM_DO_UPGRADE_COMBINED_SEPARATE_MTD" -ne 1 ]; then
( dd if="$1" bs=$CI_BLKSZ skip=1 count=$kern_blocks 2>/dev/null; \
dd if="$1" bs=$CI_BLKSZ skip=$((1+$kern_blocks)) count=$root_blocks 2>/dev/null ) | \
mtd -r $append -F$kernelpart:$kern_length:$CI_LDADR,rootfs write - $partitions
elif [ -n "$rootfspart" ]; then
dd if="$1" bs=$CI_BLKSZ skip=1 count=$kern_blocks 2>/dev/null | \
mtd write - $kernelpart
dd if="$1" bs=$CI_BLKSZ skip=$((1+$kern_blocks)) count=$root_blocks 2>/dev/null | \
mtd -r $append write - $rootfspart
fi
fi
PLATFORM_DO_UPGRADE_COMBINED_SEPARATE_MTD=0
}
tplink_get_image_hwid() {
get_image "$@" | dd bs=4 count=1 skip=16 2>/dev/null | hexdump -v -n 4 -e '1/1 "%02x"'
}
tplink_get_image_mid() {
get_image "$@" | dd bs=4 count=1 skip=17 2>/dev/null | hexdump -v -n 4 -e '1/1 "%02x"'
}
tplink_get_image_boot_size() {
get_image "$@" | dd bs=4 count=1 skip=37 2>/dev/null | hexdump -v -n 4 -e '1/1 "%02x"'
}
tplink_pharos_check_image() {
local magic_long="$(get_magic_long "$1")"
[ "$magic_long" != "7f454c46" ] && {
echo "Invalid image magic '$magic_long'"
return 1
}
local model_string="$(tplink_pharos_get_model_string)"
local line
# Here $1 is given to dd directly instead of get_image as otherwise the skip
# will take almost a second (as dd can't seek then)
#
# This will fail if the image isn't local, but that's fine: as the
# read loop won't be executed at all, it will return true, so the image
# is accepted (loading the first 1.5M of a remote image for this check seems
# a bit extreme)
dd if="$1" bs=1 skip=1511432 count=1024 2>/dev/null | while read line; do
[ "$line" = "$model_string" ] && break
done || {
echo "Unsupported image (model not in support-list)"
return 1
}
return 0
}
seama_get_type_magic() {
get_image "$@" | dd bs=1 count=4 skip=53 2>/dev/null | hexdump -v -n 4 -e '1/1 "%02x"'
}
wrgg_get_image_magic() {
get_image "$@" | dd bs=4 count=1 skip=8 2>/dev/null | hexdump -v -n 4 -e '1/1 "%02x"'
}
cybertan_get_image_magic() {
get_image "$@" | dd bs=8 count=1 skip=0 2>/dev/null | hexdump -v -n 8 -e '1/1 "%02x"'
}
cybertan_check_image() {
local magic="$(cybertan_get_image_magic "$1")"
local fw_magic="$(cybertan_get_hw_magic)"
[ "$fw_magic" != "$magic" ] && {
echo "Invalid image, ID mismatch, got:$magic, but need:$fw_magic"
return 1
}
return 0
}
platform_do_upgrade_compex() {
local fw_file=$1
local fw_part=$PART_NAME
local fw_mtd=$(find_mtd_part $fw_part)
local fw_length=0x$(dd if="$fw_file" bs=2 skip=1 count=4 2>/dev/null)
local fw_blocks=$(($fw_length / 65536))
if [ -n "$fw_mtd" ] && [ ${fw_blocks:-0} -gt 0 ]; then
local append=""
[ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 ] && append="-j $CONF_TAR"
sync
dd if="$fw_file" bs=64k skip=1 count=$fw_blocks 2>/dev/null | \
mtd $append write - "$fw_part"
fi
}
alfa_check_image() {
local magic_long="$(get_magic_long "$1")"
local fw_part_size=$(mtd_get_part_size firmware)
case "$magic_long" in
"27051956")
[ "$fw_part_size" != "16318464" ] && {
echo "Invalid image magic \"$magic_long\" for $fw_part_size bytes"
return 1
}
;;
"68737173")
[ "$fw_part_size" != "7929856" ] && {
echo "Invalid image magic \"$magic_long\" for $fw_part_size bytes"
return 1
}
;;
esac
return 0
}
REQUIRE_IMAGE_METADATA=1
platform_check_image() {
local board=$(board_name)
local magic="$(get_magic_word "$1")"
local magic_long="$(get_magic_long "$1")"
[ "$#" -gt 1 ] && return 1
case "$board" in
"ubnt,unifi")
[ "$magic" != "2705" ] && {
echo "Invalid image type."
return 1
}
return 0
;;
esac
echo "Sysupgrade is not yet supported on $board."
return 1
return 0
}
platform_do_upgrade() {
@ -212,13 +18,3 @@ platform_do_upgrade() {
;;
esac
}
disable_watchdog() {
killall watchdog
( ps | grep -v 'grep' | grep '/dev/watchdog' ) && {
echo 'Could not disable watchdog'
return 1
}
}
append sysupgrade_pre_upgrade disable_watchdog

13
target/linux/ath79/config-4.14
View File

@ -24,7 +24,6 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
# CONFIG_ARCH_WANTS_THP_SWAP is not set
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_AT803X_PHY=y
CONFIG_ATH79=y
@ -55,15 +54,10 @@ CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_DMA_NOOP_OPS is not set
# CONFIG_DMA_VIRT_OPS is not set
# CONFIG_DRM_LIB_RANDOM is not set
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_EXPORTFS=y
CONFIG_FIXED_PHY=y
CONFIG_FUTEX_PI=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
@ -132,10 +126,7 @@ CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HW_HAS_PCI=y
CONFIG_HZ_PERIODIC=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_COMPRESSION=""
CONFIG_INITRAMFS_ROOT_GID=0
CONFIG_INITRAMFS_ROOT_UID=0
CONFIG_INITRAMFS_SOURCE="../../root"
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IP17XX_PHY=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
@ -181,6 +172,7 @@ CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_LZMA_FW=y
CONFIG_MTD_SPLIT_SEAMA_FW=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_SPLIT_WRGG_FW=y
CONFIG_MTD_TPLINK_PARTS=y
@ -240,7 +232,6 @@ CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y
CONFIG_THIN_ARCHIVES=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
CONFIG_USB_SUPPORT=y

13
target/linux/ath79/dts/ar7241_ubnt-xm.dts
View File

@ -1,13 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ar7241_ubnt-xm.dtsi"
/ {
compatible = "ubnt,xm", "qca,ar7241";
model = "Ubiquiti Networks XM (rev 1.0) board";
};
&eth1 {
compatible = "syscon";
};

4
target/linux/ath79/dts/ar7241_ubnt-bullet-m.dts → target/linux/ath79/dts/ar7241_ubnt_bullet-m.dts
View File

@ -1,10 +1,10 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ar7241_ubnt-xm.dtsi"
#include "ar7241_ubnt_xm.dtsi"
/ {
compatible = "ubnt,xm", "qca,ar7241";
compatible = "ubnt,bullet-m", "qca,ar7241";
model = "Ubiquiti Bullet M";
};

4
target/linux/ath79/dts/ar7241_ubnt-nano-m.dts → target/linux/ath79/dts/ar7241_ubnt_nano-m.dts
View File

@ -1,9 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ar7241_ubnt-xm.dtsi"
#include "ar7241_ubnt_xm.dtsi"
/ {
compatible = "ubnt,nm", "qca,ar7241";
compatible = "ubnt,nano-m", "qca,ar7241";
model = "Ubiquiti Nanostation M";
};

4
target/linux/ath79/dts/ar7241_ubnt-rocket-m.dts → target/linux/ath79/dts/ar7241_ubnt_rocket-m.dts
View File

@ -1,10 +1,10 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ar7241_ubnt-xm.dtsi"
#include "ar7241_ubnt_xm.dtsi"
/ {
compatible = "ubnt,rm", "qca,ar7241";
compatible = "ubnt,rocket-m", "qca,ar7241";
model = "Ubiquiti Rocket M";
};

0
target/linux/ath79/dts/ar7241_ubnt-unifi.dts → target/linux/ath79/dts/ar7241_ubnt_unifi.dts
View File

0
target/linux/ath79/dts/ar7241_ubnt-xm.dtsi → target/linux/ath79/dts/ar7241_ubnt_xm.dtsi
View File

169
target/linux/ath79/dts/ar7242_avm_fritz300e.dts Normal file
View File

@ -0,0 +1,169 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar7242.dtsi"
/ {
compatible = "avm,fritz300e", "qca,ar7242";
model = "AVM FRITZ!WLAN Repeater 300E";
memory@0 {
device_type = "memory";
reg = <0x0 0x4000000>;
};
gpio-keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
power {
label = "fritz300e:green:power";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
default-state = "on";
};
lan {
label = "fritz300e:green:lan";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
wlan {
label = "fritz300e:green:wlan";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
};
ath9k-leds {
compatible = "gpio-leds";
rssi0 {
label = "fritz300e:green:rssi0";
gpios = <&ath9k 10 GPIO_ACTIVE_LOW>;
};
rssi1 {
label = "fritz300e:green:rssi1";
gpios = <&ath9k 4 GPIO_ACTIVE_LOW>;
};
rssi2 {
label = "fritz300e:green:rssi2";
gpios = <&ath9k 6 GPIO_ACTIVE_LOW>;
};
rssi3 {
label = "fritz300e:green:rssi3";
gpios = <&ath9k 7 GPIO_ACTIVE_LOW>;
};
rssi4 {
label = "fritz300e:green:rssi4";
gpios = <&ath9k 5 GPIO_ACTIVE_LOW>;
};
};
eth-phy-reset {
compatible = "regulator-fixed";
regulator-name = "eth-phy-reset";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio 11 GPIO_ACTIVE_LOW>;
startup-delay-us = <300000>;
enable-active-high;
regulator-always-on;
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x20000>;
label = "urloader";
read-only;
};
partition@20000 {
reg = <0x20000 0xee0000>;
label = "firmware";
};
partition@f00000 {
reg = <0xf00000 0x80000>;
label = "tffs (1)";
read-only;
};
partition@f80000 {
reg = <0xf80000 0x80000>;
label = "tffs (2)";
read-only;
};
};
};
};
&uart {
status = "okay";
};
&pcie {
status = "okay";
ath9k: wifi@0000 {
reg = <0x0000 0 0 0 0>;
#gpio-cells = <2>;
gpio-controller;
qca,no-eeprom;
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
};
};
&eth0 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy0>;
pll-data = <0x16000000 0x00000101 0x00001313>;
};

5
target/linux/ath79/dts/ar724x.dtsi
View File

@ -65,9 +65,8 @@
};
pll: pll-controller@18050000 {
compatible = "qca,ar7240-pll",
"qca,ar7240-pll";
reg = <0x18050000 0x20>;
compatible = "qca,ar7240-pll", "syscon";
reg = <0x18050000 0x3c>;
clock-names = "ref";
/* The board must provides the ref clock */

4
target/linux/ath79/dts/ar9132.dtsi
View File

@ -7,6 +7,10 @@
#address-cells = <1>;
#size-cells = <1>;
chosen {
bootargs = "console=ttyS0,115200";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;

2
target/linux/ath79/dts/ar9330_gl_ar150.dts → target/linux/ath79/dts/ar9330_glinet_ar150.dts
View File

@ -8,7 +8,7 @@
/ {
model = "GL.iNet GL-AR150";
compatible = "glinet,ar150";
compatible = "glinet,ar150", "qca,ar9330";
aliases {
serial0 = &uart;

2
target/linux/ath79/dts/ar9331_dpt_module.dts
View File

@ -8,7 +8,7 @@
/ {
model = "DPTechnics DPT-Module";
compatible = "dptechnics,dpt-module";
compatible = "dptechnics,dpt-module", "qca,ar9331";
aliases {
serial0 = &uart;

2
target/linux/ath79/dts/ar9331_dragino_ms14.dts
View File

@ -8,7 +8,7 @@
/ {
model = "Dragino MS14 (Dragino 2)";
compatible = "dragino,ms14";
compatible = "dragino,ms14", "qca,ar9331";
aliases {
serial0 = &uart;

2
target/linux/ath79/dts/ar9331_ew_dorin.dts → target/linux/ath79/dts/ar9331_embeddedwireless_dorin.dts
View File

@ -8,7 +8,7 @@
/ {
model = "Embedded Wireless Dorin";
compatible = "embeddedwireless,dorin";
compatible = "embeddedwireless,dorin", "qca,ar9331";
aliases {
serial0 = &uart;

2
target/linux/ath79/dts/ar9331_omega.dts
View File

@ -8,7 +8,7 @@
/ {
model = "Onion Omega";
compatible = "onion,omega";
compatible = "onion,omega", "qca,ar9331";
aliases {
serial0 = &uart;

2
target/linux/ath79/dts/ar9331_tl_mr3020.dts
View File

@ -8,7 +8,7 @@
/ {
model = "TP-Link TL-MR3020";
compatible = "tplink,tl-mr3020";
compatible = "tplink,tl-mr3020", "qca,ar9331";
aliases {
serial0 = &uart;

0
target/linux/ath79/dts/qca9558_om5p_ac.dts → target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts
View File

8
target/linux/ath79/generic/config-default
View File

@ -1,7 +1,7 @@
CONFIG_BLK_MQ_PCI=y
CONFIG_HW_HAS_PCI=y
CONFIG_INTEL_XWAY_PHY=y
CONFIG_LEDS_RESET=y
# CONFIG_MIPS_MACHINE is not set
CONFIG_MTD_SPLIT_EVA_FW=y
CONFIG_OF_ADDRESS_PCI=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
@ -12,5 +12,5 @@ CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHY_AR7100_USB=y
CONFIG_PHY_AR7200_USB=y
# CONFIG_WIRELESS is not set
# CONFIG_WLAN is not set
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y

22
target/linux/ath79/image/Makefile
View File

@ -3,14 +3,13 @@ include $(INCLUDE_DIR)/image.mk
KERNEL_LOADADDR = 0x80060000
DEVICE_VARS += CMDLINE CONSOLE IMAGE_SIZE BOARDNAME LOADER_FLASH_OFFS LOADER_TYPE ATH_SOC
DEVICE_VARS += IMAGE_SIZE LOADER_FLASH_OFFS LOADER_TYPE ATH_SOC
define Build/loader-common
rm -rf $@.src
$(MAKE) -C lzma-loader \
PKG_BUILD_DIR="$@.src" \
TARGET_DIR="$(dir $@)" LOADER_NAME="$(notdir $@)" \
BOARD="$(BOARDNAME)" \
LZMA_TEXT_START=0x80a00000 LOADADDR=0x80060000 \
$(1) compile loader.$(LOADER_TYPE)
mv "$@.$(LOADER_TYPE)" "$@"
@ -22,12 +21,12 @@ define Build/loader-kernel
endef
define Build/loader-kernel-cmdline
$(call Build/loader-common,LOADER_DATA="$@" KERNEL_CMDLINE="$(CMDLINE)")
$(call Build/loader-common,LOADER_DATA="$@")
endef
define Build/loader-okli-compile
$(call Build/loader-common,FLASH_OFFS=$(LOADER_FLASH_OFFS) FLASH_MAX=0 KERNEL_CMDLINE="$(CMDLINE)")
$(call Build/loader-common,FLASH_OFFS=$(LOADER_FLASH_OFFS) FLASH_MAX=0)
endef
define Build/loader-okli
@ -49,31 +48,26 @@ define Build/relocate-kernel
rm -rf $@.relocate
endef
define Build/copy-file
cat "$(1)" > "$@"
endef
define Device/Default
ATH_SOC :=
BOARDNAME :=
DEVICE_PROFILE = $$(BOARDNAME)
DEVICE_DTS_DIR := ../dts
DEVICE_DTS = $$(ATH_SOC)_$(1)
PROFILES = Default Minimal $$(DEVICE_PROFILE)
PROFILES = Default
MTDPARTS :=
BLOCKSIZE := 64k
CONSOLE = ttyS0,115200
CMDLINE = $$(if $$(BOARDNAME),board=$$(BOARDNAME)) $$(if $$(MTDPARTS),mtdparts=$$(MTDPARTS)) $$(if $$(CONSOLE),console=$$(CONSOLE))
KERNEL := kernel-bin | append-dtb | lzma | uImage lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | uImage lzma
COMPILE :=
SUPPORTED_DEVICES := $(subst _,$(comma),$(1))
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin = append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs
IMAGE/sysupgrade.bin = append-kernel | pad-to $$$$(BLOCKSIZE) | \
append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE)
endef
ifeq ($(SUBTARGET),generic)
include ./tp-link.mk
include ./generic.mk
include ./generic-tp-link.mk
include ./generic-ubnt.mk
endif
$(eval $(call BuildImage))

62
target/linux/ath79/image/tp-link.mk → target/linux/ath79/image/generic-tp-link.mk
View File

@ -1,5 +1,9 @@
DEVICE_VARS += TPLINK_HWID TPLINK_HWREV TPLINK_FLASHLAYOUT TPLINK_HEADER_VERSION TPLINK_BOARD_NAME
define rootfs_align
$(patsubst %-256k,0x40000,$(patsubst %-128k,0x20000,$(patsubst %-64k,0x10000,$(patsubst squashfs%,0x4,$(patsubst root.%,%,$(1))))))
endef
# combine kernel and rootfs into one image
# mktplinkfw <type> <optional extra arguments to mktplinkfw binary>
# <type> is "sysupgrade" or "factory"
@ -35,85 +39,45 @@ define Build/mktplinkfw-combined
@mv $@.new $@
endef
# add RE450 and similar header to the kernel image
define Build/mktplinkfw-kernel
$(STAGING_DIR_HOST)/bin/mktplinkfw-kernel \
-H $(TPLINK_HWID) -N OpenWrt -V $(REVISION) \
-L $(KERNEL_LOADADDR) -E $(KERNEL_LOADADDR) \
-k $@ \
-o $@.new
@mv $@.new $@
endef
define Build/uImageArcher
mkimage -A $(LINUX_KARCH) \
-O linux -T kernel \
-C $(1) -a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \
-n '$(call toupper,$(LINUX_KARCH)) LEDE Linux-$(LINUX_VERSION)' -d $@ $@.new
@mv $@.new $@
endef
define Device/tplink
TPLINK_HWREV := 0x1
TPLINK_HEADER_VERSION := 1
LOADER_TYPE := gz
KERNEL := kernel-bin | patch-cmdline | lzma
KERNEL_INITRAMFS := kernel-bin | patch-cmdline | lzma | mktplinkfw-combined
# IMAGES := sysupgrade.bin
KERNEL := kernel-bin | append-dtb | lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | tplink-v1-header
IMAGES := sysupgrade.bin factory.bin
IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw sysupgrade
# IMAGE/factory.bin := append-rootfs | mktplinkfw factory | a
IMAGE/factory.bin := append-rootfs | mktplinkfw factory
endef
define Device/tplink-nolzma
$(Device/tplink)
$(Device/tplink)
LOADER_FLASH_OFFS := 0x22000
COMPILE := loader-$(1).gz
COMPILE/loader-$(1).gz := loader-okli-compile
#KERNEL := copy-file $(KDIR)/vmlinux.bin.lzma | uImage lzma -M 0x4f4b4c49 | loader-okli $(1)
KERNEL:= kernel-bin | append-dtb | lzma |uImage lzma -M 0x4f4b4c49 | loader-okli $(1)
KERNEL_INITRAMFS := copy-file $(KDIR)/vmlinux-initramfs.bin.lzma | loader-kernel-cmdline | mktplinkfw-combined
KERNEL := kernel-bin | append-dtb | lzma | uImage lzma -M 0x4f4b4c49 | loader-okli $(1)
KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | tplink-v1-header
endef
define Device/tplink-4m
$(Device/tplink-nolzma)
$(Device/tplink-nolzma)
TPLINK_FLASHLAYOUT := 4M
IMAGE_SIZE := 3904k
endef
define Device/tplink-8m
$(Device/tplink-nolzma)
$(Device/tplink-nolzma)
TPLINK_FLASHLAYOUT := 8M
IMAGE_SIZE := 7936k
endef
define Device/tplink-4mlzma
$(Device/tplink)
TPLINK_FLASHLAYOUT := 4Mlzma
IMAGE_SIZE := 3904k
endef
define Device/tplink-8mlzma
$(Device/tplink)
TPLINK_FLASHLAYOUT := 8Mlzma
IMAGE_SIZE := 7936k
endef
define Device/tplink-16mlzma
$(Device/tplink)
TPLINK_FLASHLAYOUT := 16Mlzma
IMAGE_SIZE := 15872k
endef
define Device/tl_wr1043nd_v1
$(Device/tplink-8m)
ATH_SOC := ar9132
DEVICE_TITLE := TP-LINK TL-WR1043N/ND v1
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
BOARDNAME := TL-WR1043ND
DEVICE_PROFILE := TLWR1043
TPLINK_HWID := 0x10430001
SUPPORTED_DEVICES := tplink,tl-wr1043nd-v1 tl-wr1043nd
endef
#TARGET_DEVICES += tl_wr1043nd_v1

228
target/linux/ath79/image/generic-ubnt.mk
View File

@ -24,252 +24,58 @@ define Build/mkubntimage-split
rm $@.old1 $@.old2 )
endef
define Build/mkubntimage2
-$(STAGING_DIR_HOST)/bin/mkfwimage2 -f 0x9f000000 \
-v $(UBNT_TYPE).$(UBNT_CHIP).v6.0.0-$(VERSION_DIST)-$(REVISION) \
-p jffs2:0x50000:0xf60000:0:0:$@ \
-o $@.new
@mv $@.new $@
endef
# UBNT_BOARD e.g. one of (XS2, XS5, RS, XM)
# UBNT_TYPE e.g. one of (BZ, XM, XW)
# UBNT_CHIP e.g. one of (ar7240, ar933x, ar934x)
define Device/ubnt
DEVICE_PACKAGES := kmod-usb-core kmod-usb2
DEVICE_PROFILE := UBNT
IMAGE_SIZE := 7552k
UBNT_BOARD := XM
IMAGES := sysupgrade.bin factory.bin
IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | mkubntimage-split
IMAGES += factory.bin
IMAGE/factory.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | \
append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | mkubntimage-split
endef
define Device/ubnt-xm
$(Device/ubnt)
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ohci
DEVICE_PACKAGES += kmod-usb-ohci
UBNT_TYPE := XM
UBNT_CHIP := ar7240
ATH_SOC := ar7241
KERNEL := kernel-bin | append-dtb | relocate-kernel | lzma | uImage lzma
endef
define Device/ubnt-xw
$(Device/ubnt)
UBNT_TYPE := XW
UBNT_CHIP := ar934x
endef
define Device/ubnt-bz
$(Device/ubnt)
UBNT_TYPE := BZ
UBNT_CHIP := ar7240
ATH_SOC := ar7241
endef
define Device/rw2458n
$(Device/ubnt-xm)
DEVICE_TITLE := Ubiquiti RW2458N
BOARDNAME := RW2458N
endef
#TARGET_DEVICES += rw2458n
define Device/ubnt-airrouter
$(Device/ubnt-xm)
DEVICE_TITLE := Ubiquiti AirRouter
BOARDNAME := UBNT-AR
endef
#TARGET_DEVICES += ubnt-airrouter
define Device/ubnt-bullet-m
define Device/ubnt_bullet-m
$(Device/ubnt-xm)
DEVICE_TITLE := Ubiquiti Bullet-M
BOARDNAME := UBNT-BM
SUPPORTED_DEVICES += bullet-m
endef
TARGET_DEVICES += ubnt-bullet-m
TARGET_DEVICES += ubnt_bullet-m
define Device/ubnt-rocket-m
define Device/ubnt_rocket-m
$(Device/ubnt-xm)
DEVICE_TITLE := Ubiquiti Rocket-M
BOARDNAME := UBNT-RM
SUPPORTED_DEVICES += rocket-m
endef
TARGET_DEVICES += ubnt-rocket-m
TARGET_DEVICES += ubnt_rocket-m
define Device/ubnt-nano-m
define Device/ubnt_nano-m
$(Device/ubnt-xm)
DEVICE_TITLE := Ubiquiti Nano-M
BOARDNAME := UBNT-NM
SUPPORTED_DEVICES += nano-m
endef
TARGET_DEVICES += ubnt-nano-m
TARGET_DEVICES += ubnt_nano-m
define Device/ubnt-unifi
define Device/ubnt_unifi
$(Device/ubnt-bz)
ATH_SOC := ar7241
DEVICE_TITLE := Ubiquiti UniFi
BOARDNAME := UBNT-UF
DEVICE_PROFILE += UBNTUNIFI
endef
TARGET_DEVICES += ubnt-unifi
define Device/ubnt-unifiac
DEVICE_PACKAGES := kmod-usb-core kmod-usb2
DEVICE_PROFILE := UBNT
IMAGE_SIZE := 7744k
MTDPARTS := spi0.0:384k(u-boot)ro,64k(u-boot-env)ro,7744k(firmware),7744k(ubnt-airos)ro,128k(bs),256k(cfg)ro,64k(EEPROM)ro
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE)
endef
define Device/ubnt-unifiac-lite
$(Device/ubnt-unifiac)
DEVICE_TITLE := Ubiquiti UniFi AC-Lite
DEVICE_PACKAGES := kmod-ath10k ath10k-firmware-qca988x
DEVICE_PROFILE += UBNTUNIFIACLITE
BOARDNAME := UBNT-UF-AC-LITE
endef
#TARGET_DEVICES += ubnt-unifiac-lite
define Device/ubnt-unifiac-mesh
$(Device/ubnt-unifiac-lite)
DEVICE_TITLE := Ubiquiti UniFi AC-Mesh
endef
#TARGET_DEVICES += ubnt-unifiac-mesh
define Device/ubnt-unifiac-pro
$(Device/ubnt-unifiac)
DEVICE_TITLE := Ubiquiti UniFi AC-Pro
DEVICE_PACKAGES += kmod-ath10k ath10k-firmware-qca988x
DEVICE_PROFILE += UBNTUNIFIACPRO
BOARDNAME := UBNT-UF-AC-PRO
endef
#TARGET_DEVICES += ubnt-unifiac-pro
define Device/ubnt-unifi-outdoor
$(Device/ubnt-bz)
DEVICE_TITLE := Ubiquiti UniFi Outdoor
BOARDNAME := UBNT-U20
DEVICE_PROFILE += UBNTUNIFIOUTDOOR
endef
#TARGET_DEVICES += ubnt-unifi-outdoor
define Device/ubnt-nano-m-xw
$(Device/ubnt-xw)
DEVICE_TITLE := Ubiquiti Nano M XW
BOARDNAME := UBNT-NM-XW
endef
#TARGET_DEVICES += ubnt-nano-m-xw
define Device/ubnt-loco-m-xw
$(Device/ubnt-xw)
DEVICE_TITLE := Ubiquiti Loco XW
BOARDNAME := UBNT-LOCO-XW
endef
#TARGET_DEVICES += ubnt-loco-m-xw
define Device/ubnt-rocket-m-xw
$(Device/ubnt-xw)
DEVICE_TITLE := Ubiquiti Rocket M XW
BOARDNAME := UBNT-RM-XW
endef
#TARGET_DEVICES += ubnt-rocket-m-xw
define Device/ubnt-rocket-m-ti
$(Device/ubnt-xw)
DEVICE_TITLE := Ubiquiti Rocket M TI
BOARDNAME := UBNT-RM-TI
UBNT_TYPE := TI
endef
#TARGET_DEVICES += ubnt-rocket-m-ti
define Device/ubnt-air-gateway
$(Device/ubnt-xm)
DEVICE_TITLE := Ubiquiti Air Gateway
BOARDNAME := UBNT-AGW
UBNT_TYPE := AirGW
UBNT_CHIP := ar933x
CONSOLE := ttyATH0,115200
endef
#TARGET_DEVICES += ubnt-air-gateway
define Device/ubnt-air-gateway-pro
$(Device/ubnt-xm)
DEVICE_TITLE := Ubiquiti Air Gateway Pro
BOARDNAME := UBNT-AGWP
UBNT_TYPE := AirGWP
UBNT_CHIP := ar934x
endef
#TARGET_DEVICES += ubnt-air-gateway-pro
define Device/ubdev01
$(Device/ubnt-xm)
DEVICE_TITLE := Ubiquiti ubDEV01
MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,7488k(firmware),64k(certs),256k(cfg)ro,64k(EEPROM)ro
BOARDNAME := UBNT-UF
UBNT_BOARD := UBDEV01
endef
#TARGET_DEVICES += ubdev01
define Device/ubnt-routerstation
DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2
DEVICE_PROFILE := UBNT
IMAGE_SIZE := 16128k
IMAGES := sysupgrade.bin factory.bin
IMAGE/factory.bin := append-rootfs | pad-rootfs | mkubntimage
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | combined-image | check-size $$$$(IMAGE_SIZE)
KERNEL := kernel-bin | patch-cmdline | lzma | pad-to $$(BLOCKSIZE)
endef
define Device/ubnt-rs
$(Device/ubnt-routerstation)
DEVICE_TITLE := Ubiquiti RouterStation
BOARDNAME := UBNT-RS
DEVICE_PROFILE += UBNTRS
UBNT_BOARD := RS
UBNT_TYPE := RSx
UBNT_CHIP := ar7100
endef
#TARGET_DEVICES += ubnt-rs
define Device/ubnt-rspro
$(Device/ubnt-routerstation)
DEVICE_TITLE := Ubiquiti RouterStation Pro
BOARDNAME := UBNT-RSPRO
DEVICE_PROFILE += UBNTRSPRO
UBNT_BOARD := RSPRO
UBNT_TYPE := RSPRO
UBNT_CHIP := ar7100pro
endef
#TARGET_DEVICES += ubnt-rspro
define Device/ubnt-ls-sr71
$(Device/ubnt-routerstation)
DEVICE_TITLE := Ubiquiti LS-SR71
BOARDNAME := UBNT-LS-SR71
UBNT_BOARD := LS-SR71
UBNT_TYPE := LS-SR71
UBNT_CHIP := ar7100
endef
#TARGET_DEVICES += ubnt-ls-sr71
define Device/ubnt-uap-pro
DEVICE_TITLE := Ubiquiti UAP Pro
KERNEL_SIZE := 1536k
IMAGE_SIZE := 15744k
MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1536k(kernel),14208k(rootfs),256k(cfg)ro,64k(EEPROM)ro,15744k@0x50000(firmware)
UBNT_TYPE := BZ
UBNT_CHIP := ar934x
BOARDNAME := UAP-PRO
DEVICE_PROFILE := UBNT UAPPRO
KERNEL := kernel-bin | patch-cmdline | lzma | uImage lzma | jffs2 kernel0
IMAGES := sysupgrade.bin factory.bin
IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | mkubntimage2
endef
define Device/ubnt-unifi-outdoor-plus
$(Device/ubnt-uap-pro)
DEVICE_TITLE := Ubiquiti UniFi Outdoor Plus
UBNT_CHIP := ar7240
BOARDNAME := UBNT-UOP
DEVICE_PROFILE := UBNT
SUPPORTED_DEVICES += unifi
endef
TARGET_DEVICES += ubnt_unifi

79
target/linux/ath79/image/generic.mk
View File

@ -21,73 +21,70 @@ define Build/netgear-uImage
$(call Build/uImage,$(1) -M $(NETGEAR_KERNEL_MAGIC))
endef
define Device/ew_dorin
define Device/avm_fritz300e
ATH_SOC := ar7242
DEVICE_TITLE := AVM FRITZ!WLAN Repeater 300E
KERNEL := kernel-bin | append-dtb | lzma | eva-image
KERNEL_INITRAMFS := $$(KERNEL)
IMAGE_SIZE := 15232k
IMAGE/sysupgrade.bin := append-kernel | pad-to 64k | \
append-squashfs-fakeroot-be | pad-to 256 | \
append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE)
DEVICE_PACKAGES := fritz-tffs rssileds -swconfig
endef
TARGET_DEVICES += avm_fritz300e
define Device/embeddedwireless_dorin
ATH_SOC := ar9331
DEVICE_TITLE := Embedded Wireless Dorin
DEVICE_PACKAGES := kmod-usb-chipidea2
IMAGE_SIZE := 16000k
SUPPORTED_DEVICES += ew-dorin
endef
TARGET_DEVICES += embeddedwireless_dorin
TARGET_DEVICES += ew_dorin
define Device/gl_ar150
define Device/glinet_ar150
ATH_SOC := ar9330
DEVICE_TITLE := GL.iNet GL-AR150
DEVICE_PACKAGES := kmod-usb-chipidea2
IMAGE_SIZE := 16000k
SUPPORTED_DEVICES += gl-ar150
endef
TARGET_DEVICES += gl_ar150
TARGET_DEVICES += glinet_ar150
define Device/om5p_ac
define Device/openmesh_om5p-ac-v2
ATH_SOC := qca9558
DEVICE_TITLE := OpenMesh OM5P-AC
DEVICE_PROFILE := OM5P-AC
DEVICE_TITLE := OpenMesh OM5P-AC v2
DEVICE_PACKAGES := kmod-ath10k ath10k-firmware-qca988x om-watchdog
IMAGE_SIZE := 7808k
SUPPORTED_DEVICES += om5p-acv2
endef
TARGET_DEVICES += om5p_ac
define Device/netgear_wndr3700
ATH_SOC:=ar7100
DEVICE_TITLE := NETGEAR WNDR3700
DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport kmod-leds-reset
NETGEAR_KERNEL_MAGIC := 0x33373030
NETGEAR_BOARD_ID := WNDR3700
IMAGE_SIZE := 7680k
IMAGES := sysupgrade.bin factory.img factory-NA.img
KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs
IMAGE/sysupgrade.bin := $$(IMAGE/default) | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE)
IMAGE/factory-NA.img := $$(IMAGE/default) | netgear-dni NA | check-size $$$$(IMAGE_SIZE)
endef
#TARGET_DEVICES += netgear_wndr3700
define Device/netgear_wndr3700v2
$(Device/netgear_wndr3700)
DEVICE_TITLE := NETGEAR WNDR3700 v2
NETGEAR_BOARD_ID := WNDR3700v2
NETGEAR_KERNEL_MAGIC := 0x33373031
NETGEAR_HW_ID := 29763654+16+64
IMAGE_SIZE := 15872k
IMAGES := sysupgrade.bin factory.img
endef
#TARGET_DEVICES += netgear_wndr3700v2
TARGET_DEVICES += openmesh_om5p-ac-v2
define Device/netgear_wndr3800
$(Device/netgear_wndr3700v2)
ATH_SOC := ar7161
DEVICE_TITLE := NETGEAR WNDR3800
NETGEAR_KERNEL_MAGIC := 0x33373031
KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
NETGEAR_BOARD_ID := WNDR3800
NETGEAR_HW_ID := 29763654+16+128
IMAGE_SIZE := 15872k
IMAGES := sysupgrade.bin factory.img
IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs
IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE)
DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport kmod-leds-reset
SUPPORTED_DEVICES += wndr3800
endef
TARGET_DEVICES += netgear_wndr3800
define Device/buffalo_wzr-hp-g450h
ATH_SOC := ar7242
DEVICE_TITLE := Buffalo WZR-HP-G450H
DEVICE_PROFILE := WZR-HP-G450H
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
IMAGE_SIZE := 32256k
SUPPORTED_DEVICES += wzr-hp-g450h
endef
TARGET_DEVICES += buffalo_wzr-hp-g450h

1058
target/linux/ath79/image/legacy.mk
View File

File diff suppressed because it is too large Load Diff

68
target/linux/ath79/patches-4.14/902-at803x-add-reset-gpio-pdata.patch
View File

@ -1,68 +0,0 @@
Add support for configuring AT803x GPIO reset via platform data.
This is necessary, because ath79 is not converted to device tree yet.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/linux/platform_data/phy-at803x.h
+++ b/include/linux/platform_data/phy-at803x.h
@@ -6,6 +6,8 @@ struct at803x_platform_data {
int enable_rgmii_tx_delay:1;
int enable_rgmii_rx_delay:1;
int fixup_rgmii_tx_delay:1;
+ int has_reset_gpio:1;
+ int reset_gpio;
};
#endif /* _PHY_AT803X_PDATA_H */
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -264,6 +264,7 @@ static int at803x_resume(struct phy_devi
static int at803x_probe(struct phy_device *phydev)
{
+ struct at803x_platform_data *pdata;
struct device *dev = &phydev->mdio.dev;
struct at803x_priv *priv;
struct gpio_desc *gpiod_reset;
@@ -276,6 +277,12 @@ static int at803x_probe(struct phy_devic
phydev->drv->phy_id != ATH8032_PHY_ID)
goto does_not_require_reset_workaround;
+ pdata = dev_get_platdata(dev);
+ if (pdata && pdata->has_reset_gpio) {
+ devm_gpio_request(dev, pdata->reset_gpio, "reset");
+ gpio_direction_output(pdata->reset_gpio, 1);
+ }
+
gpiod_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(gpiod_reset))
return PTR_ERR(gpiod_reset);
@@ -407,15 +414,23 @@ static void at803x_link_change_notify(st
* cannot recover from by software.
*/
if (phydev->state == PHY_NOLINK) {
- if (priv->gpiod_reset && !priv->phy_reset) {
+ if ((priv->gpiod_reset || (pdata && pdata->has_reset_gpio)) &&
+ !priv->phy_reset) {
struct at803x_context context;
at803x_context_save(phydev, &context);
- gpiod_set_value(priv->gpiod_reset, 1);
- msleep(1);
- gpiod_set_value(priv->gpiod_reset, 0);
- msleep(1);
+ if (pdata && pdata->has_reset_gpio) {
+ gpio_set_value_cansleep(pdata->reset_gpio, 0);
+ msleep(1);
+ gpio_set_value_cansleep(pdata->reset_gpio, 1);
+ msleep(1);
+ } else {
+ gpiod_set_value(priv->gpiod_reset, 1);
+ msleep(1);
+ gpiod_set_value(priv->gpiod_reset, 0);
+ msleep(1);
+ }
at803x_context_restore(phydev, &context);

17
target/linux/gemini/Makefile
View File

@ -1,5 +1,5 @@
#
# Copyright (C) 2009-2013 OpenWrt.org
# Copyright (C) 2009-2018 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
@ -9,15 +9,22 @@ include $(TOPDIR)/rules.mk
ARCH:=arm
BOARD:=gemini
BOARDNAME:=Cortina Systems CS351x
SUBTARGETS:=raidsonic wiligear
FEATURES:=squashfs pci rtc
FEATURES:=squashfs pci rtc usb dt gpio display
CPU_TYPE:=fa526
MAINTAINER:=Roman Yeryomin <roman@advem.lv>
KERNEL_PATCHVER:=4.4
KERNEL_PATCHVER:=4.14
KERNELNAME:=zImage
define Target/Description
Build firmware images for the StorLink/Cortina Gemini CS351x ARM FA526 CPU
endef
KERNELNAME:=zImage dtbs
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
kmod-leds-gpio kmod-led-trig-heartbeat \
kmod-gpio-button-hotplug
$(eval $(call BuildTarget))

25
target/linux/gemini/base-files/lib/preinit/05_set_ether_mac_gemini
View File

@ -1,13 +1,28 @@
#!/bin/sh
set_ether_mac() {
# Most devices have a standard "VCTL" partition
CONFIG_PARTITION="$(grep "VCTL" /proc/mtd | cut -d: -f1)"
MAC1="$(strings /dev/$CONFIG_PARTITION |grep MAC|cut -d: -f2|cut -c3-14|sed -e 's,\(..\),:\1,g' -e 's,^:,,')"
MAC2="$(strings /dev/$CONFIG_PARTITION |grep MAC|cut -d: -f8|cut -c3-14|sed -e 's,\(..\),:\1,g' -e 's,^:,,')"
if [ ! -z $CONFIG_PARTITION ] ; then
MAC1="$(strings /dev/$CONFIG_PARTITION |grep MAC|cut -d: -f2|cut -c3-14|sed -e 's,\(..\),:\1,g' -e 's,^:,,')"
MAC2="$(strings /dev/$CONFIG_PARTITION |grep MAC|cut -d: -f8|cut -c3-14|sed -e 's,\(..\),:\1,g' -e 's,^:,,')"
ifconfig eth0 hw ether $MAC1 2>/dev/null
ifconfig eth1 hw ether $MAC2 2>/dev/null
ifconfig eth0 hw ether $MAC1 2>/dev/null
ifconfig eth1 hw ether $MAC2 2>/dev/null
return 0
fi
# The DNS-313 has a special field in its RedBoot
# binary that we need to check
CONFIG_PARTITION="$(grep "RedBoot" /proc/mtd | cut -d: -f1)"
if [ ! -z $CONFIG_PARTITION ] ; then
DEVID="$(dd if=/dev/mtdblock0 bs=1 skip=119508 count=7 2>/dev/null)"
if [ "x$DEVID" = "xdns-313" ] ; then
MAC1="$(dd if=/dev/mtdblock0 bs=1 skip=119540 count=6 2>/dev/null | hexdump -n6 -e '/1 ":%02X"' | sed s/^://g)"
ifconfig eth0 hw ether $MAC1 2>/dev/null
return 0
fi
fi
}
boot_hook_add preinit_main set_ether_mac

445
target/linux/gemini/config-4.14 Normal file
View File

@ -0,0 +1,445 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_AMBA_PL08X=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_GEMINI=y
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
CONFIG_ARCH_HAS_SET_MEMORY=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_ARCH_MOXART is not set
CONFIG_ARCH_MULTIPLATFORM=y
# CONFIG_ARCH_MULTI_CPU_AUTO is not set
CONFIG_ARCH_MULTI_V4=y
# CONFIG_ARCH_MULTI_V4T is not set
CONFIG_ARCH_MULTI_V4_V5=y
# CONFIG_ARCH_MULTI_V5 is not set
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_SMMU is not set
# CONFIG_ARM_SP805_WATCHDOG is not set
CONFIG_ARM_UNWIND=y
CONFIG_ATA=y
CONFIG_ATAGS=y
CONFIG_ATA_VERBOSE_ERROR=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_MISC=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BOUNCE=y
# CONFIG_BPF_SYSCALL is not set
# CONFIG_CACHE_L2X0 is not set
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="console=ttyS0,19200n8"
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_GEMINI=y
CONFIG_COMPACTION=y
CONFIG_COMPAT_BRK=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_COREDUMP=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_CPU_CACHE_FA=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FA=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
CONFIG_CPU_FA526=y
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_NO_EFFICIENT_FFS=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_TLB_FA=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRASH_CORE=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC_CCITT=y
CONFIG_CRC_ITU_T=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_CCM=y
CONFIG_CRYPTO_CMAC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CTR=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_GCM=y
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_GHASH=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_UART_8250 is not set
# CONFIG_DEBUG_USER is not set
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZ4=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_IOSCHED="cfq"
CONFIG_DEVMEM=y
CONFIG_DMADEVICES=y
CONFIG_DMATEST=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_ENGINE_RAID=y
CONFIG_DMA_OF=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_93CX6=y
CONFIG_ELF_CORE=y
# CONFIG_EMBEDDED is not set
# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_EXPERT is not set
CONFIG_EXT4_FS=y
CONFIG_FARADAY_FTINTC010=y
CONFIG_FHANDLE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
# CONFIG_FPE_FASTFPE is not set
# CONFIG_FPE_NWFPE is not set
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FTTMR010_TIMER=y
CONFIG_FTWDT010_WATCHDOG=y
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_GEMINI_ETHERNET=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GLOB=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_FTGPIO010=y
CONFIG_GPIO_GENERIC=y
# CONFIG_GRO_CELLS is not set
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
# CONFIG_HAVE_ARCH_BITREVERSE is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_HAVE_EBPF_JIT=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_HWMON=y
CONFIG_HW_CONSOLE=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_HELPER_AUTO=y
# CONFIG_INITRAMFS_FORCE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_IOMMU_HELPER=y
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IOSCHED_CFQ=y
CONFIG_IPC_NS=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_JBD2=y
CONFIG_KALLSYMS=y
CONFIG_KERNEL_LZMA=y
# CONFIG_KERNEL_XZ is not set
CONFIG_KEXEC=y
CONFIG_KEXEC_CORE=y
# CONFIG_LDM_DEBUG is not set
CONFIG_LDM_PARTITION=y
CONFIG_LEDS_TRIGGER_DISK=y
CONFIG_LIBFDT=y
CONFIG_LZ4_DECOMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MANDATORY_FILE_LOCKING=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_GPIO=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_PCI=y
CONFIG_MIGRATION=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_MQ_IOSCHED_DEADLINE=y
CONFIG_MQ_IOSCHED_KYBER=y
CONFIG_MTD_CFI_STAA=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_OF_GEMINI=y
CONFIG_MULTI_IRQ_HANDLER=y
CONFIG_NAMESPACES=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DSA=y
CONFIG_NET_NS=y
CONFIG_NET_PACKET_ENGINE=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NET_VENDOR_CORTINA=y
CONFIG_NLS=y
CONFIG_NO_BOOTMEM=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NVMEM=y
CONFIG_OABI_COMPAT=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_ADDRESS_PCI=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
# CONFIG_PACKET is not set
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_PATA_FTIDE010=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_FTPCI100=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PID_NS=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_GEMINI=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
# CONFIG_PM_DEBUG is not set
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GEMINI_POWEROFF=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_RCU=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_RATIONAL=y
CONFIG_RCU_CPU_STALL_TIMEOUT=21
# CONFIG_RCU_EXPERT is not set
CONFIG_RCU_NEED_SEGCBLIST=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_RD_BZIP2=y
CONFIG_RD_GZIP=y
CONFIG_RD_LZ4=y
CONFIG_RD_LZMA=y
CONFIG_RD_LZO=y
CONFIG_RD_XZ=y
CONFIG_REALTEK_PHY=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RELAY=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_DRV_CMOS is not set
CONFIG_RTC_DRV_FTRTC010=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_NVMEM=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_SATA_GEMINI=y
CONFIG_SATA_PMP=y
# CONFIG_SCHED_INFO is not set
CONFIG_SCSI=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SENSORS_GPIO_FAN=y
CONFIG_SENSORS_LM75=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_EXAR=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIO=y
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_SERPORT=y
CONFIG_SG_POOL=y
CONFIG_SLUB_DEBUG=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SRCU=y
# CONFIG_STAGING is not set
# CONFIG_STRICT_KERNEL_RWX is not set
# CONFIG_STRICT_MODULE_RWX is not set
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYNC_FILE=y
# CONFIG_SYN_COOKIES is not set
CONFIG_SYSFS_SYSCALL=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TASKS_RCU=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TREE_SRCU=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
# CONFIG_USB_EHCI_HCD is not set
CONFIG_USB_FOTG210_HCD=y
CONFIG_USB_SUPPORT=y
# CONFIG_USERIO is not set
CONFIG_USER_NS=y
CONFIG_USE_OF=y
CONFIG_UTS_NS=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_IA64=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_X86=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0
CONFIG_ZLIB_INFLATE=y

165
target/linux/gemini/config-4.4
View File

@ -1,165 +0,0 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_GEMINI=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
CONFIG_ARCH_USES_GETTIMEOFFSET=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARM=y
# CONFIG_ARM_CPU_SUSPEND is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_NR_BANKS=8
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARPD is not set
CONFIG_ATA=y
CONFIG_ATAGS=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,19200 mem=32M"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_CPU_CACHE_FA=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FA=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
CONFIG_CPU_FA526=y
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_TLB_FA=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
# CONFIG_DEBUG_USER is not set
CONFIG_DEBUG_UART_PHYS=0x42000000
CONFIG_DEBUG_UART_VIRT=0xf4200000
CONFIG_DEBUG_UART_8250_SHIFT=2
# CONFIG_DEBUG_UART_8250_WORD is not set
# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
# CONFIG_DLCI is not set
CONFIG_DMADEVICES=y
CONFIG_DNOTIFY=y
# CONFIG_DW_DMAC_CORE is not set
# CONFIG_DW_DMAC_PCI is not set
CONFIG_FRAME_POINTER=y
CONFIG_GEMINI_MEM_SWAP=y
CONFIG_GEMINI_SL351X=y
CONFIG_GEMINI_WATCHDOG=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_BPF_JIT=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
# CONFIG_HSU_DMA_PCI is not set
CONFIG_HWMON=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_IRQ_WORK=y
CONFIG_KTIME_SCALAR=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_MACH_NAS4220B is not set
# CONFIG_MACH_RUT100 is not set
CONFIG_MACH_WBD111=y
CONFIG_MACH_WBD222=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BOARDINFO=y
CONFIG_MDIO_GPIO=y
CONFIG_MIGHT_HAVE_PCI=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_PHYSMAP=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_MACH_GPIO_H=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_VENDOR_GEMINI=y
# CONFIG_OF is not set
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PATA_GEMINI=y
CONFIG_PCI=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
# CONFIG_PREEMPT_RCU is not set
# CONFIG_RCU_STALL_COMMON is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GEMINI=y
# CONFIG_SCHED_HRTICK is not set
# CONFIG_SCSI_DMA is not set
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_UID16=y
CONFIG_UIDGID_CONVERTED=y
CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h"
CONFIG_USB_ARCH_HAS_XHCI=y
CONFIG_USB_SUPPORT=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WAN=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZONE_DMA_FLAG=0

21
target/linux/gemini/files/arch/arm/mach-gemini/include/mach/gmac.h
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@ -1,21 +0,0 @@
/*
* Gemini GMAC specific defines
*
* Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __NET_GEMINI_PLATFORM_H__
#define __NET_GEMINI_PLATFORM_H__
#include <linux/phy.h>
struct gemini_gmac_platform_data {
char *bus_id[2]; /* NULL means that this port is not used */
phy_interface_t interface[2];
};
#endif /* __NET_GEMINI_PLATFORM_H__ */

318
target/linux/gemini/files/arch/arm/mach-gemini/pci.c
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@ -1,318 +0,0 @@
/*
* Support for Gemini PCI Controller
*
* Copyright (C) 2009 Janos Laube <janos.dev@gmail.com>
* Copyright (C) 2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
*
* based on SL2312 PCI controller code
* Storlink (C) 2003
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <asm/mach/pci.h>
#include <mach/irqs.h>
#include <mach/hardware.h>
#define GEMINI_PCI_IOSIZE_1M 0x0000
#define GEMINI_PCI_PMC 0x40
#define GEMINI_PCI_PMCSR 0x44
#define GEMINI_PCI_CTRL1 0x48
#define GEMINI_PCI_CTRL2 0x4C
#define GEMINI_PCI_MEM1_BASE_SIZE 0x50
#define GEMINI_PCI_MEM2_BASE_SIZE 0x54
#define GEMINI_PCI_MEM3_BASE_SIZE 0x58
#define PCI_CTRL2_INTSTS_OFFSET 28
#define PCI_CTRL2_INTMASK_OFFSET 22
#define GEMINI_PCI_DMA_MASK 0xFFF00000
#define GEMINI_PCI_DMA_MEM1_BASE 0x00000000
#define GEMINI_PCI_DMA_MEM2_BASE 0x00000000
#define GEMINI_PCI_DMA_MEM3_BASE 0x00000000
#define GEMINI_PCI_DMA_MEM1_SIZE 7
#define GEMINI_PCI_DMA_MEM2_SIZE 6
#define GEMINI_PCI_DMA_MEM3_SIZE 6
#define PCI_CONF_ENABLE (1 << 31)
#define PCI_CONF_WHERE(r) ((r) & 0xFC)
#define PCI_CONF_BUS(b) (((b) & 0xFF) << 16)
#define PCI_CONF_DEVICE(d) (((d) & 0x1F) << 11)
#define PCI_CONF_FUNCTION(f) (((f) & 0x07) << 8)
#define PCI_IOSIZE_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE))
#define PCI_PROT_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x04)
#define PCI_CTRL_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x08)
#define PCI_SOFTRST_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x10)
#define PCI_CONFIG_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x28)
#define PCI_DATA_REG (IO_ADDRESS(GEMINI_PCI_IO_BASE) + 0x2C)
static DEFINE_SPINLOCK(gemini_pci_lock);
static int gemini_pci_read_config(struct pci_bus* bus, unsigned int fn,
int config, int size, u32* value)
{
unsigned long irq_flags;
spin_lock_irqsave(&gemini_pci_lock, irq_flags);
__raw_writel(PCI_CONF_BUS(bus->number) |
PCI_CONF_DEVICE(PCI_SLOT(fn)) |
PCI_CONF_FUNCTION(PCI_FUNC(fn)) |
PCI_CONF_WHERE(config) |
PCI_CONF_ENABLE,
PCI_CONFIG_REG);
*value = __raw_readl(PCI_DATA_REG);
if (size == 1)
*value = (*value >> (8 * (config & 3))) & 0xFF;
else if (size == 2)
*value = (*value >> (8 * (config & 3))) & 0xFFFF;
spin_unlock_irqrestore(&gemini_pci_lock, irq_flags);
dev_dbg(&bus->dev,
"[read] slt: %.2d, fnc: %d, cnf: 0x%.2X, val (%d bytes): 0x%.8X\n",
PCI_SLOT(fn), PCI_FUNC(fn), config, size, *value);
return PCIBIOS_SUCCESSFUL;
}
static int gemini_pci_write_config(struct pci_bus* bus, unsigned int fn,
int config, int size, u32 value)
{
unsigned long irq_flags = 0;
int ret = PCIBIOS_SUCCESSFUL;
dev_dbg(&bus->dev,
"[write] slt: %.2d, fnc: %d, cnf: 0x%.2X, val (%d bytes): 0x%.8X\n",
PCI_SLOT(fn), PCI_FUNC(fn), config, size, value);
spin_lock_irqsave(&gemini_pci_lock, irq_flags);
__raw_writel(PCI_CONF_BUS(bus->number) |
PCI_CONF_DEVICE(PCI_SLOT(fn)) |
PCI_CONF_FUNCTION(PCI_FUNC(fn)) |
PCI_CONF_WHERE(config) |
PCI_CONF_ENABLE,
PCI_CONFIG_REG);
switch(size) {
case 4:
__raw_writel(value, PCI_DATA_REG);
break;
case 2:
__raw_writew(value, PCI_DATA_REG + (config & 3));
break;
case 1:
__raw_writeb(value, PCI_DATA_REG + (config & 3));
break;
default:
ret = PCIBIOS_BAD_REGISTER_NUMBER;
}
spin_unlock_irqrestore(&gemini_pci_lock, irq_flags);
return ret;
}
static struct pci_ops gemini_pci_ops = {
.read = gemini_pci_read_config,
.write = gemini_pci_write_config,
};
static struct resource gemini_pci_resource_io = {
.name = "PCI I/O Space",
.start = GEMINI_PCI_IO_BASE,
.end = GEMINI_PCI_IO_BASE + SZ_1M - 1,
.flags = IORESOURCE_IO,
};
static struct resource gemini_pci_resource_mem = {
.name = "PCI Memory Space",
.start = GEMINI_PCI_MEM_BASE,
.end = GEMINI_PCI_MEM_BASE + SZ_128M - 1,
.flags = IORESOURCE_MEM,
};
static int __init gemini_pci_request_resources(struct pci_sys_data *sys)
{
if (request_resource(&ioport_resource, &gemini_pci_resource_io))
goto bad_resources;
if (request_resource(&iomem_resource, &gemini_pci_resource_mem))
goto bad_resources;
pci_add_resource(&sys->resources, &gemini_pci_resource_io);
pci_add_resource(&sys->resources, &gemini_pci_resource_mem);
return 0;
bad_resources:
pr_err("Gemini PCI: request_resource() failed. "
"Abort PCI bus enumeration.\n");
return -1;
}
static int __init gemini_pci_setup(int nr, struct pci_sys_data *sys)
{
unsigned int cmd;
pcibios_min_io = 0x100;
pcibios_min_mem = 0;
if ((nr > 0) || gemini_pci_request_resources(sys))
return 0;
/* setup I/O space to 1MB size */
__raw_writel(GEMINI_PCI_IOSIZE_1M, PCI_IOSIZE_REG);
/* setup hostbridge */
cmd = __raw_readl(PCI_CTRL_REG);
cmd |= PCI_COMMAND_IO;
cmd |= PCI_COMMAND_MEMORY;
cmd |= PCI_COMMAND_MASTER;
__raw_writel(cmd, PCI_CTRL_REG);
return 1;
}
static struct pci_bus* __init gemini_pci_scan_bus(int nr, struct pci_sys_data* sys)
{
unsigned int reg = 0;
struct pci_bus* bus = 0;
bus = pci_scan_bus(nr, &gemini_pci_ops, sys);
if (bus) {
dev_dbg(&bus->dev, "setting up PCI DMA\n");
reg = (GEMINI_PCI_DMA_MEM1_BASE & GEMINI_PCI_DMA_MASK)
| (GEMINI_PCI_DMA_MEM1_SIZE << 16);
gemini_pci_write_config(bus, 0, GEMINI_PCI_MEM1_BASE_SIZE, 4, reg);
reg = (GEMINI_PCI_DMA_MEM2_BASE & GEMINI_PCI_DMA_MASK)
| (GEMINI_PCI_DMA_MEM2_SIZE << 16);
gemini_pci_write_config(bus, 0, GEMINI_PCI_MEM2_BASE_SIZE, 4, reg);
reg = (GEMINI_PCI_DMA_MEM3_BASE & GEMINI_PCI_DMA_MASK)
| (GEMINI_PCI_DMA_MEM3_SIZE << 16);
gemini_pci_write_config(bus, 0, GEMINI_PCI_MEM3_BASE_SIZE, 4, reg);
}
return bus;
}
/* Should work with all boards based on original Storlink EVB */
static int __init gemini_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
if (slot < 9 || slot > 12)
return -1;
return PCI_IRQ_BASE + (((slot - 9) + (pin - 1)) & 0x3);
}
static struct hw_pci gemini_hw_pci __initdata = {
.nr_controllers = 1,
.setup = gemini_pci_setup,
.scan = gemini_pci_scan_bus,
.map_irq = gemini_pci_map_irq,
};
/* we need this for muxed PCI interrupts handling */
static struct pci_bus bogus_pci_bus;
static void gemini_pci_ack_irq(struct irq_data *d)
{
unsigned int irq = d->irq;
unsigned int reg;
gemini_pci_read_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, &reg);
reg &= ~(0xF << PCI_CTRL2_INTSTS_OFFSET);
reg |= 1 << (irq - PCI_IRQ_BASE + PCI_CTRL2_INTSTS_OFFSET);
gemini_pci_write_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, reg);
}
static void gemini_pci_mask_irq(struct irq_data *d)
{
unsigned int irq = d->irq;
unsigned int reg;
gemini_pci_read_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, &reg);
reg &= ~((0xF << PCI_CTRL2_INTSTS_OFFSET)
| (1 << (irq - PCI_IRQ_BASE + PCI_CTRL2_INTMASK_OFFSET)));
gemini_pci_write_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, reg);
}
static void gemini_pci_unmask_irq(struct irq_data *d)
{
unsigned int irq = d->irq;
unsigned int reg;
gemini_pci_read_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, &reg);
reg &= ~(0xF << PCI_CTRL2_INTSTS_OFFSET);
reg |= 1 << (irq - PCI_IRQ_BASE + PCI_CTRL2_INTMASK_OFFSET);
gemini_pci_write_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, reg);
}
static void gemini_pci_irq_handler(struct irq_desc *desc)
{
unsigned int pci_irq_no, irq_stat, reg, i;
gemini_pci_read_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2, 4, &reg);
irq_stat = reg >> PCI_CTRL2_INTSTS_OFFSET;
for (i = 0; i < 4; i++) {
if ((irq_stat & (1 << i)) == 0)
continue;
pci_irq_no = PCI_IRQ_BASE + i;
BUG_ON(!(irq_desc[pci_irq_no].handle_irq));
irq_desc[pci_irq_no].handle_irq(&irq_desc[pci_irq_no]);
}
}
static struct irq_chip gemini_pci_irq_chip = {
.name = "PCI",
.irq_ack = gemini_pci_ack_irq,
.irq_mask = gemini_pci_mask_irq,
.irq_unmask = gemini_pci_unmask_irq,
};
static int __init gemini_pci_init(void)
{
int i;
for (i = 72; i <= 95; i++)
gpio_request(i, "PCI");
/* initialize our bogus bus */
dev_set_name(&bogus_pci_bus.dev, "PCI IRQ handler");
bogus_pci_bus.number = 0;
/* mask and clear all interrupts */
gemini_pci_write_config(&bogus_pci_bus, 0, GEMINI_PCI_CTRL2 + 2, 2,
0xF000);
for (i = PCI_IRQ_BASE; i < PCI_IRQ_BASE + 4; i++) {
irq_set_chip_and_handler(i, &gemini_pci_irq_chip,
handle_level_irq);
}
irq_set_chained_handler(IRQ_PCI, gemini_pci_irq_handler);
pci_common_init(&gemini_hw_pci);
return 0;
}
subsys_initcall(gemini_pci_init);

234
target/linux/gemini/files/drivers/ata/pata_gemini.c
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@ -1,234 +0,0 @@
/*
* Support for Gemini PATA
*
* Copyright (C) 2009 Janos Laube <janos.dev@gmail.com>
* Copyright (C) 2010 Frederic Pecourt <opengemini@free.fr>
* Copyright (C) 2011 Tobias Waldvogel <tobias.waldvogel@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
/* Values of IOMUX
* 26:24 bits is "IDE IO Select"
* 111:100 - Reserved
* 011 - ata0 <-> sata0, sata1; bring out ata1
* 010 - ata1 <-> sata1, sata0; bring out ata0
* 001 - ata0 <-> sata0, ata1 <-> sata1; bring out ata1
* 000 - ata0 <-> sata0, ata1 <-> sata1; bring out ata0
*
*/
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/libata.h>
#include <linux/leds.h>
#include <mach/hardware.h>
#include <mach/global_reg.h>
#define DRV_NAME "pata-gemini"
#define PATA_GEMINI_PORTS 1
#define PIO_TIMING_REG 0x10
#define MDMA_TIMING_REG 0x11
#define UDMA_TIMING0_REG 0x12
#define UDMA_TIMING1_REG 0x13
#define CLK_MOD_REG 0x14
#define CLK_MOD_66M_DEV0_BIT 0
#define CLK_MOD_66M_DEV1_BIT 1
#define CLK_MOD_UDMA_DEV0_BIT 4
#define CLK_MOD_UDMA_DEV1_BIT 5
#define CLK_MOD_66M_DEV0 (1 << CLK_MOD_66M_DEV0_BIT)
#define CLK_MOD_66M_DEV1 (1 << CLK_MOD_66M_DEV1_BIT)
#define CLK_MOD_UDMA_DEV0 (1 << CLK_MOD_UDMA_DEV0_BIT)
#define CLK_MOD_UDMA_DEV1 (1 << CLK_MOD_UDMA_DEV1_BIT)
#define SATA_ENABLE_PDEV_MASK 0x01
#define SATA_ENABLE_PDEV_PM 0x02
#define SATA_ENABLE_PDEV_ADDED 0x04
#define SATA_ENABLE_PDEV_REMOVED 0x08
#define SATA_ENABLE_SDEV_MASK 0x10
#define SATA_ENABLE_SDEV_PM 0x20
#define SATA_ENABLE_SDEV_ADDED 0x40
#define SATA_ENABLE_SDEV_REMOVED 0x80
MODULE_AUTHOR("Janos Laube <janos.dev@gmail.com>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRV_NAME);
static unsigned char PIO_TIMING[5] = {
0xaa, 0xa3, 0xa1, 0x33, 0x31
};
static unsigned char TIMING_MW_DMA[4][2] = {
{ 0x44, 1 }, // 480 4.2
{ 0x42, 1 }, // 150 13.3
{ 0x31, 1 }, // 120 16.7
{ 0x21, 1 }, // 100 20
};
static unsigned char TIMING_UDMA[7][2] = {
{ 0x33, 0 }, //240 16.7
{ 0x31, 0 }, //160 25
{ 0x21, 0 }, //120 33.3
{ 0x21, 1 }, //90 44.4
{ 0x11, 1 }, //60 66.7
{ 0x11 | 0x80, 0 }, //40 100
{ 0x11 | 0x80, 1 }, //30 133
};
static struct scsi_host_template pata_gemini_sht = {
ATA_NCQ_SHT(DRV_NAME),
.can_queue = 1,
.sg_tablesize = 128,
.dma_boundary = 0xffffU,
};
static void gemini_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
void __iomem *clk_reg = ap->ioaddr.bmdma_addr + CLK_MOD_REG;
void __iomem *tim_reg = ap->ioaddr.bmdma_addr + UDMA_TIMING0_REG;
unsigned short udma = adev->dma_mode;
unsigned short speed = udma;
unsigned short devno = adev->devno & 1;
unsigned short i;
u8 mod_udma_mask = 1 << (CLK_MOD_UDMA_DEV0_BIT + devno);
u8 mod_66m_mask = 1 << (CLK_MOD_66M_DEV0_BIT + devno);
u8 clk_mod;
u8 timing;
clk_mod = ioread8(clk_reg);
clk_mod &= ~mod_udma_mask;
if (speed & XFER_UDMA_0) {
i = speed & ~XFER_UDMA_0;
timing = TIMING_UDMA[i][0];
clk_mod |= mod_udma_mask;
if (TIMING_UDMA[i][1])
clk_mod |= mod_66m_mask;
} else {
i = speed & ~XFER_MW_DMA_0;
timing = TIMING_MW_DMA[i][0];
clk_mod |= mod_udma_mask;
if (TIMING_MW_DMA[i][1])
clk_mod |= mod_66m_mask;
}
iowrite8(clk_mod, clk_reg);
iowrite8(timing, tim_reg + devno);
return;
}
static void gemini_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
void __iomem *pio_reg = ap->ioaddr.bmdma_addr + PIO_TIMING_REG;
unsigned int pio = adev->pio_mode - XFER_PIO_0;
iowrite8(PIO_TIMING[pio], pio_reg);
}
unsigned int gemini_qc_issue(struct ata_queued_cmd *qc)
{
ledtrig_ide_activity();
return ata_bmdma_qc_issue(qc);
}
static struct ata_port_operations pata_gemini_port_ops = {
.inherits = &ata_bmdma_port_ops,
.set_dmamode = gemini_set_dmamode,
.set_piomode = gemini_set_piomode,
.qc_issue = gemini_qc_issue,
};
static struct ata_port_info pata_gemini_portinfo = {
.flags = 0,
.udma_mask = ATA_UDMA6,
.pio_mask = ATA_PIO4,
.port_ops = &pata_gemini_port_ops,
};
static const struct ata_port_info *pata_gemini_ports = &pata_gemini_portinfo;
static int pata_gemini_probe(struct platform_device *pdev)
{
struct ata_host *host;
struct resource *res;
unsigned int irq, i;
void __iomem *mmio_base;
/* standard bdma init */
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
pr_info(DRV_NAME ": irq %d, io base 0x%08x\n", irq, res->start);
mmio_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
host = ata_host_alloc_pinfo(&pdev->dev, &pata_gemini_ports, 1);
if (!host)
return -ENOMEM;
for (i = 0; i < host->n_ports; i++) {
struct ata_port *ap = host->ports[i];
struct ata_ioports *ioaddr = &ap->ioaddr;
ioaddr->bmdma_addr = mmio_base;
ioaddr->cmd_addr = mmio_base + 0x20;
ioaddr->ctl_addr = mmio_base + 0x36;
ioaddr->altstatus_addr = ioaddr->ctl_addr;
ata_sff_std_ports(ioaddr);
host->ports[i]->cbl = ATA_CBL_SATA;
}
return ata_host_activate(host, irq, ata_bmdma_interrupt,
IRQF_SHARED, &pata_gemini_sht);
}
static int pata_gemini_remove(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct ata_host *host = dev_get_drvdata(dev);
ata_host_detach(host);
return 0;
}
static struct platform_driver pata_gemini_driver = {
.probe = pata_gemini_probe,
.remove = pata_gemini_remove,
.driver.owner = THIS_MODULE,
.driver.name = DRV_NAME,
};
static int __init pata_gemini_module_init(void)
{
return platform_driver_probe(&pata_gemini_driver, pata_gemini_probe);
}
static void __exit pata_gemini_module_exit(void)
{
platform_driver_unregister(&pata_gemini_driver);
}
module_init(pata_gemini_module_init);
module_exit(pata_gemini_module_exit);

31
target/linux/gemini/files/drivers/net/ethernet/gemini/Kconfig
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@ -1,31 +0,0 @@
#
# Gemini device configuration
#
config NET_VENDOR_GEMINI
bool "Cortina Gemini devices"
default y
depends on ARCH_GEMINI
---help---
If you have a network (Ethernet) card belonging to this class, say Y
and read the Ethernet-HOWTO, available from
<http://www.tldp.org/docs.html#howto>.
Note that the answer to this question doesn't directly affect the
kernel: saying N will just cause the configurator to skip all
the questions about D-Link devices. If you say Y, you will be asked for
your specific card in the following questions.
if NET_VENDOR_GEMINI
config GEMINI_SL351X
tristate "StorLink SL351x Gigabit Ethernet support"
depends on ARCH_GEMINI
select PHYLIB
select MDIO_BITBANG
select MDIO_GPIO
select CRC32
---help---
This driver supports StorLink SL351x (Gemini) dual Gigabit Ethernet.
endif # NET_VENDOR_GEMINI

5
target/linux/gemini/files/drivers/net/ethernet/gemini/Makefile
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@ -1,5 +0,0 @@
#
# Makefile for the Cortina Gemini network device drivers.
#
obj-$(CONFIG_GEMINI_SL351X) += sl351x.o

2340
target/linux/gemini/files/drivers/net/ethernet/gemini/sl351x.c
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File diff suppressed because it is too large Load Diff

1436
target/linux/gemini/files/drivers/net/ethernet/gemini/sl351x_hw.h
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File diff suppressed because it is too large Load Diff

258
target/linux/gemini/files/drivers/usb/host/ehci-fotg2.c
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@ -1,258 +0,0 @@
/*
* Gemini EHCI Host Controller driver
*
* Copyright (C) 2014 Roman Yeryomin <roman@advem.lv>
* Copyright (C) 2012 Tobias Waldvogel
* based on GPLd code from Sony Computer Entertainment Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/kernel.h>
#include <linux/hrtimer.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <linux/usb/ehci_pdriver.h>
#include <mach/hardware.h>
#include <mach/global_reg.h>
#include "ehci.h"
#define DRV_NAME "ehci-fotg2"
#define HCD_MISC 0x40
#define OTGC_SCR 0x80
#define OTGC_INT_STS 0x84
#define OTGC_INT_EN 0x88
#define GLOBAL_ISR 0xC0
#define GLOBAL_ICR 0xC4
#define GLOBAL_INT_POLARITY (1 << 3)
#define GLOBAL_INT_MASK_HC (1 << 2)
#define GLOBAL_INT_MASK_OTG (1 << 1)
#define GLOBAL_INT_MASK_DEV (1 << 0)
#define OTGC_SCR_ID (1 << 21)
#define OTGC_SCR_CROLE (1 << 20)
#define OTGC_SCR_VBUS_VLD (1 << 19)
#define OTGC_SCR_A_SRP_RESP_TYPE (1 << 8)
#define OTGC_SCR_A_SRP_DET_EN (1 << 7)
#define OTGC_SCR_A_SET_B_HNP_EN (1 << 6)
#define OTGC_SCR_A_BUS_DROP (1 << 5)
#define OTGC_SCR_A_BUS_REQ (1 << 4)
#define OTGC_INT_APLGRMV (1 << 12)
#define OTGC_INT_BPLGRMV (1 << 11)
#define OTGC_INT_OVC (1 << 10)
#define OTGC_INT_IDCHG (1 << 9)
#define OTGC_INT_RLCHG (1 << 8)
#define OTGC_INT_AVBUSERR (1 << 5)
#define OTGC_INT_ASRPDET (1 << 4)
#define OTGC_INT_BSRPDN (1 << 0)
#define OTGC_INT_A_TYPE ( \
OTGC_INT_ASRPDET | \
OTGC_INT_AVBUSERR | \
OTGC_INT_OVC | \
OTGC_INT_RLCHG | \
OTGC_INT_IDCHG | \
OTGC_INT_APLGRMV \
)
#define OTGC_INT_B_TYPE ( \
OTGC_INT_AVBUSERR | \
OTGC_INT_OVC | \
OTGC_INT_RLCHG | \
OTGC_INT_IDCHG \
)
static void fotg2_otg_init(struct usb_hcd *hcd)
{
u32 val;
writel(GLOBAL_INT_POLARITY | GLOBAL_INT_MASK_HC |
GLOBAL_INT_MASK_OTG | GLOBAL_INT_MASK_DEV,
hcd->regs + GLOBAL_ICR);
val = readl(hcd->regs + OTGC_SCR);
val &= ~(OTGC_SCR_A_SRP_RESP_TYPE | OTGC_SCR_A_SRP_DET_EN |
OTGC_SCR_A_BUS_DROP | OTGC_SCR_A_SET_B_HNP_EN);
val |= OTGC_SCR_A_BUS_REQ;
writel(val, hcd->regs + OTGC_SCR);
writel(OTGC_INT_A_TYPE, hcd->regs + OTGC_INT_EN);
/* setup MISC register, fixes timing problems */
val = readl(hcd->regs + HCD_MISC);
val |= 0xD;
writel(val, hcd->regs + HCD_MISC);
writel(~0, hcd->regs + GLOBAL_ISR);
writel(~0, hcd->regs + OTGC_INT_STS);
}
static int fotg2_ehci_reset(struct usb_hcd *hcd)
{
int retval;
retval = ehci_setup(hcd);
if (retval)
return retval;
writel(GLOBAL_INT_POLARITY, hcd->regs + GLOBAL_ICR);
return 0;
}
static const struct hc_driver fotg2_ehci_hc_driver = {
.description = hcd_name,
.product_desc = "FOTG2 EHCI Host Controller",
.hcd_priv_size = sizeof(struct ehci_hcd),
.irq = ehci_irq,
.flags = HCD_MEMORY | HCD_USB2,
.reset = fotg2_ehci_reset,
.start = ehci_run,
.stop = ehci_stop,
.shutdown = ehci_shutdown,
.urb_enqueue = ehci_urb_enqueue,
.urb_dequeue = ehci_urb_dequeue,
.endpoint_disable = ehci_endpoint_disable,
.endpoint_reset = ehci_endpoint_reset,
.get_frame_number = ehci_get_frame,
.hub_status_data = ehci_hub_status_data,
.hub_control = ehci_hub_control,
#if defined(CONFIG_PM)
.bus_suspend = ehci_bus_suspend,
.bus_resume = ehci_bus_resume,
#endif
.relinquish_port = ehci_relinquish_port,
.port_handed_over = ehci_port_handed_over,
.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
};
static irqreturn_t fotg2_ehci_irq(int irq, void *data)
{
struct usb_hcd *hcd = data;
u32 icr, sts;
irqreturn_t retval;
icr = readl(hcd->regs + GLOBAL_ICR);
writel(GLOBAL_INT_POLARITY | GLOBAL_INT_MASK_HC |
GLOBAL_INT_MASK_OTG | GLOBAL_INT_MASK_DEV,
hcd->regs + GLOBAL_ICR);
retval = IRQ_NONE;
sts = ~icr;
sts &= GLOBAL_INT_MASK_HC | GLOBAL_INT_MASK_OTG | GLOBAL_INT_MASK_DEV;
sts &= readl(hcd->regs + GLOBAL_ISR);
writel(sts, hcd->regs + GLOBAL_ISR);
if (unlikely(sts & GLOBAL_INT_MASK_DEV)) {
ehci_warn(hcd_to_ehci(hcd),
"Received unexpected irq for device role\n");
retval = IRQ_HANDLED;
}
if (unlikely(sts & GLOBAL_INT_MASK_OTG)) {
u32 otg_sts;
otg_sts = readl(hcd->regs + OTGC_INT_STS);
writel(otg_sts, hcd->regs + OTGC_INT_STS);
ehci_warn(hcd_to_ehci(hcd),
"Received unexpected irq for OTG management\n");
retval = IRQ_HANDLED;
}
if (sts & GLOBAL_INT_MASK_HC) {
retval = IRQ_NONE;
}
writel(icr, hcd->regs + GLOBAL_ICR);
return retval;
}
static int fotg2_ehci_probe(struct platform_device *pdev)
{
struct usb_hcd *hcd;
struct resource *res;
int irq , err;
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
pr_err("no irq provided");
return irq;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
pr_err("no memory resource provided");
return -ENXIO;
}
hcd = usb_create_hcd(&fotg2_ehci_hc_driver, &pdev->dev,
dev_name(&pdev->dev));
if (!hcd)
return -ENOMEM;
hcd->rsrc_start = res->start;
hcd->rsrc_len = resource_size(res);
hcd->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(hcd->regs)) {
err = -ENOMEM;
goto err_put_hcd;
}
hcd->has_tt = 1;
hcd_to_ehci(hcd)->caps = hcd->regs;
fotg2_otg_init(hcd);
err = request_irq(irq, &fotg2_ehci_irq, IRQF_SHARED, "fotg2", hcd);
if (err)
goto err_put_hcd;
err = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (err)
goto err_put_hcd;
platform_set_drvdata(pdev, hcd);
return 0;
err_put_hcd:
usb_put_hcd(hcd);
return err;
}
static int fotg2_ehci_remove(struct platform_device *pdev)
{
struct usb_hcd *hcd = platform_get_drvdata(pdev);
writel(GLOBAL_INT_POLARITY | GLOBAL_INT_MASK_HC |
GLOBAL_INT_MASK_OTG | GLOBAL_INT_MASK_DEV,
hcd->regs + GLOBAL_ICR);
free_irq(hcd->irq, hcd);
usb_remove_hcd(hcd);
usb_put_hcd(hcd);
platform_set_drvdata(pdev, NULL);
return 0;
}
MODULE_ALIAS("platform:" DRV_NAME);
static struct platform_driver ehci_fotg2_driver = {
.probe = fotg2_ehci_probe,
.remove = fotg2_ehci_remove,
.driver.name = DRV_NAME,
};

378
target/linux/gemini/files/drivers/watchdog/gemini_wdt.c
View File

@ -1,378 +0,0 @@
/*
* Watchdog driver for Cortina Systems Gemini SoC
*
* Copyright (C) 2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/fs.h>
#include <linux/uaccess.h>
#include <linux/miscdevice.h>
#include <linux/platform_device.h>
#include <linux/watchdog.h>
#include <linux/slab.h>
#define GEMINI_WDCOUNTER 0x0
#define GEMINI_WDLOAD 0x4
#define GEMINI_WDRESTART 0x8
#define WDRESTART_MAGIC 0x5AB9
#define GEMINI_WDCR 0xC
#define WDCR_CLOCK_5MHZ (1 << 4)
#define WDCR_SYS_RST (1 << 1)
#define WDCR_ENABLE (1 << 0)
#define WDT_CLOCK 5000000 /* 5 MHz */
#define WDT_DEFAULT_TIMEOUT 13
#define WDT_MAX_TIMEOUT (0xFFFFFFFF / WDT_CLOCK)
/* status bits */
#define WDT_ACTIVE 0
#define WDT_OK_TO_CLOSE 1
static unsigned int timeout = WDT_DEFAULT_TIMEOUT;
static int nowayout = WATCHDOG_NOWAYOUT;
static DEFINE_SPINLOCK(gemini_wdt_lock);
static struct platform_device *gemini_wdt_dev;
struct gemini_wdt_struct {
struct resource *res;
struct device *dev;
void __iomem *base;
unsigned long status;
};
static struct watchdog_info gemini_wdt_info = {
.identity = "Gemini watchdog",
.options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING |
WDIOF_SETTIMEOUT,
};
/* Disable the watchdog. */
static void gemini_wdt_stop(struct gemini_wdt_struct *gemini_wdt)
{
spin_lock(&gemini_wdt_lock);
__raw_writel(0, gemini_wdt->base + GEMINI_WDCR);
clear_bit(WDT_ACTIVE, &gemini_wdt->status);
spin_unlock(&gemini_wdt_lock);
}
/* Service the watchdog */
static void gemini_wdt_service(struct gemini_wdt_struct *gemini_wdt)
{
__raw_writel(WDRESTART_MAGIC, gemini_wdt->base + GEMINI_WDRESTART);
}
/* Enable and reset the watchdog. */
static void gemini_wdt_start(struct gemini_wdt_struct *gemini_wdt)
{
spin_lock(&gemini_wdt_lock);
__raw_writel(timeout * WDT_CLOCK, gemini_wdt->base + GEMINI_WDLOAD);
gemini_wdt_service(gemini_wdt);
/* set clock before enabling */
__raw_writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST,
gemini_wdt->base + GEMINI_WDCR);
__raw_writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST | WDCR_ENABLE,
gemini_wdt->base + GEMINI_WDCR);
set_bit(WDT_ACTIVE, &gemini_wdt->status);
spin_unlock(&gemini_wdt_lock);
}
/* Watchdog device is opened, and watchdog starts running. */
static int gemini_wdt_open(struct inode *inode, struct file *file)
{
struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(gemini_wdt_dev);
if (test_bit(WDT_ACTIVE, &gemini_wdt->status))
return -EBUSY;
file->private_data = gemini_wdt;
gemini_wdt_start(gemini_wdt);
return nonseekable_open(inode, file);
}
/* Close the watchdog device. */
static int gemini_wdt_close(struct inode *inode, struct file *file)
{
struct gemini_wdt_struct *gemini_wdt = file->private_data;
/* Disable the watchdog if possible */
if (test_bit(WDT_OK_TO_CLOSE, &gemini_wdt->status))
gemini_wdt_stop(gemini_wdt);
else
dev_warn(gemini_wdt->dev, "Device closed unexpectedly - timer will not stop\n");
return 0;
}
/* Handle commands from user-space. */
static long gemini_wdt_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
struct gemini_wdt_struct *gemini_wdt = file->private_data;
int value;
switch (cmd) {
case WDIOC_KEEPALIVE:
gemini_wdt_service(gemini_wdt);
return 0;
case WDIOC_GETSUPPORT:
return copy_to_user((struct watchdog_info *)arg, &gemini_wdt_info,
sizeof(gemini_wdt_info)) ? -EFAULT : 0;
case WDIOC_SETTIMEOUT:
if (get_user(value, (int *)arg))
return -EFAULT;
if ((value < 1) || (value > WDT_MAX_TIMEOUT))
return -EINVAL;
timeout = value;
/* restart wdt to use new timeout */
gemini_wdt_stop(gemini_wdt);
gemini_wdt_start(gemini_wdt);
/* Fall through */
case WDIOC_GETTIMEOUT:
return put_user(timeout, (int *)arg);
case WDIOC_GETTIMELEFT:
value = __raw_readl(gemini_wdt->base + GEMINI_WDCOUNTER);
return put_user(value / WDT_CLOCK, (int *)arg);
default:
return -ENOTTY;
}
}
/* Refresh the watchdog whenever device is written to. */
static ssize_t gemini_wdt_write(struct file *file, const char *data,
size_t len, loff_t *ppos)
{
struct gemini_wdt_struct *gemini_wdt = file->private_data;
if (len) {
if (!nowayout) {
size_t i;
clear_bit(WDT_OK_TO_CLOSE, &gemini_wdt->status);
for (i = 0; i != len; i++) {
char c;
if (get_user(c, data + i))
return -EFAULT;
if (c == 'V')
set_bit(WDT_OK_TO_CLOSE,
&gemini_wdt->status);
}
}
gemini_wdt_service(gemini_wdt);
}
return len;
}
static const struct file_operations gemini_wdt_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.unlocked_ioctl = gemini_wdt_ioctl,
.open = gemini_wdt_open,
.release = gemini_wdt_close,
.write = gemini_wdt_write,
};
static struct miscdevice gemini_wdt_miscdev = {
.minor = WATCHDOG_MINOR,
.name = "watchdog",
.fops = &gemini_wdt_fops,
};
static void gemini_wdt_shutdown(struct platform_device *pdev)
{
struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(pdev);
gemini_wdt_stop(gemini_wdt);
}
static int gemini_wdt_probe(struct platform_device *pdev)
{
int ret;
int res_size;
struct resource *res;
void __iomem *base;
struct gemini_wdt_struct *gemini_wdt;
unsigned int reg;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "can't get device resources\n");
return -ENODEV;
}
res_size = resource_size(res);
if (!request_mem_region(res->start, res_size, res->name)) {
dev_err(&pdev->dev, "can't allocate %d bytes at %d address\n",
res_size, res->start);
return -ENOMEM;
}
base = ioremap(res->start, res_size);
if (!base) {
dev_err(&pdev->dev, "ioremap failed\n");
ret = -EIO;
goto fail0;
}
gemini_wdt = kzalloc(sizeof(struct gemini_wdt_struct), GFP_KERNEL);
if (!gemini_wdt) {
dev_err(&pdev->dev, "can't allocate interface\n");
ret = -ENOMEM;
goto fail1;
}
/* Setup gemini_wdt driver structure */
gemini_wdt->base = base;
gemini_wdt->res = res;
/* Set up platform driver data */
platform_set_drvdata(pdev, gemini_wdt);
gemini_wdt_dev = pdev;
if (gemini_wdt_miscdev.parent) {
ret = -EBUSY;
goto fail2;
}
gemini_wdt_miscdev.parent = &pdev->dev;
reg = __raw_readw(gemini_wdt->base + GEMINI_WDCR);
if (reg & WDCR_ENABLE) {
/* Watchdog was enabled by the bootloader, disable it. */
reg &= ~(WDCR_ENABLE);
__raw_writel(reg, gemini_wdt->base + GEMINI_WDCR);
}
ret = misc_register(&gemini_wdt_miscdev);
if (ret)
goto fail2;
return 0;
fail2:
platform_set_drvdata(pdev, NULL);
kfree(gemini_wdt);
fail1:
iounmap(base);
fail0:
release_mem_region(res->start, res_size);
return ret;
}
static int gemini_wdt_remove(struct platform_device *pdev)
{
struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(pdev);
platform_set_drvdata(pdev, NULL);
misc_deregister(&gemini_wdt_miscdev);
gemini_wdt_dev = NULL;
iounmap(gemini_wdt->base);
release_mem_region(gemini_wdt->res->start, resource_size(gemini_wdt->res));
kfree(gemini_wdt);
return 0;
}
#ifdef CONFIG_PM
static int gemini_wdt_suspend(struct platform_device *pdev, pm_message_t message)
{
struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(pdev);
unsigned int reg;
reg = __raw_readw(gemini_wdt->base + GEMINI_WDCR);
reg &= ~(WDCR_WDENABLE);
__raw_writel(reg, gemini_wdt->base + GEMINI_WDCR);
return 0;
}
static int gemini_wdt_resume(struct platform_device *pdev)
{
struct gemini_wdt_struct *gemini_wdt = platform_get_drvdata(pdev);
unsigned int reg;
if (gemini_wdt->status) {
reg = __raw_readw(gemini_wdt->base + GEMINI_WDCR);
reg |= WDCR_WDENABLE;
__raw_writel(reg, gemini_wdt->base + GEMINI_WDCR);
}
return 0;
}
#else
#define gemini_wdt_suspend NULL
#define gemini_wdt_resume NULL
#endif
static struct platform_driver gemini_wdt_driver = {
.probe = gemini_wdt_probe,
.remove = gemini_wdt_remove,
.shutdown = gemini_wdt_shutdown,
.suspend = gemini_wdt_suspend,
.resume = gemini_wdt_resume,
.driver = {
.name = "gemini-wdt",
.owner = THIS_MODULE,
},
};
static int __init gemini_wdt_init(void)
{
return platform_driver_probe(&gemini_wdt_driver, gemini_wdt_probe);
}
static void __exit gemini_wdt_exit(void)
{
platform_driver_unregister(&gemini_wdt_driver);
}
module_init(gemini_wdt_init);
module_exit(gemini_wdt_exit);
module_param(timeout, uint, 0);
MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
MODULE_AUTHOR("Paulius Zaleckas");
MODULE_DESCRIPTION("Watchdog driver for Gemini");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
MODULE_ALIAS("platform:gemini-wdt");

185
target/linux/gemini/image/Makefile
View File

@ -1,5 +1,5 @@
#
# Copyright (C) 2009-2014 OpenWrt.org
# Copyright (C) 2009-2018 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
@ -7,81 +7,124 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
ifeq ($(SUBTARGET),wiligear)
define Image/Prepare
# WBD111: mach id 1690 (0x69a)
echo -en "\x06\x1c\xa0\xe3\x9a\x10\x81\xe3" > $(KDIR)/wbd111-zImage
cat $(KDIR)/zImage >> $(KDIR)/wbd111-zImage
# WBD222: mach id 2753 (0xAC1)
echo -en "\x0a\x1c\xa0\xe3\xc1\x10\x81\xe3" > $(KDIR)/wbd222-zImage
cat $(KDIR)/zImage >> $(KDIR)/wbd222-zImage
endef
endif
ifeq ($(SUBTARGET),raidsonic)
define Image/Prepare
# NAS4220: mach id 2038 (0x7F6)
echo -en "\x07\x1c\xa0\xe3\xf6\x10\x81\xe3" > $(KDIR)/nas4220-zImage
cat $(KDIR)/zImage >> $(KDIR)/nas4220-zImage
endef
endif
ifeq ($(SUBTARGET),wiligear)
define Image/BuildKernel
# workaround the bootloader's bug with extra nops
echo -en "\x00\x00\xa0\xe1\x00\x00\xa0\xe1\x00\x00\xa0\xe1\x00\x00\xa0\xe1" > $(BIN_DIR)/$(IMG_PREFIX)-wbd111-zImage
cat $(KDIR)/wbd111-zImage >> $(BIN_DIR)/$(IMG_PREFIX)-wbd111-zImage
echo -en "\x00\x00\xa0\xe1\x00\x00\xa0\xe1\x00\x00\xa0\xe1\x00\x00\xa0\xe1" > $(BIN_DIR)/$(IMG_PREFIX)-wbd222-zImage
cat $(KDIR)/wbd222-zImage >> $(BIN_DIR)/$(IMG_PREFIX)-wbd222-zImage
endef
endif
define Image/Build/jffs2-64k
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/$(IMG_PREFIX)-$(1).img bs=64k conv=sync
# Just copy the zImage for D-Link DIR-685
define Build/dir685-images
cp $(IMAGE_KERNEL) $(BIN_DIR)/$(IMG_PREFIX)-dir685-zImage
endef
define Image/Build/jffs2-128k
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/$(IMG_PREFIX)-$(1).img bs=128k conv=sync
# Build D-Link DNS-313 images using the special header tool.
# rootfs.tgz and rd.tgz contains nothing, we only need them
# to satisfy the boot loader on the device. The zImage is
# the only real content.
define Build/dns313-images
if [ -d $(BIN_DIR)/.boot ] ; then rm -rf $(BIN_DIR)/.boot ; fi
mkdir -p $(BIN_DIR)/.boot
echo "dummy" > $(BIN_DIR)/.boot/dummyfile
dns313-header $(BIN_DIR)/.boot/dummyfile \
$(BIN_DIR)/.boot/rootfs.tgz
dns313-header $(BIN_DIR)/.boot/dummyfile \
$(BIN_DIR)/.boot/rd.gz
dns313-header $(IMAGE_KERNEL) \
$(BIN_DIR)/.boot/zImage
rm -f $(BIN_DIR)/.boot/dummyfile
(cd $(BIN_DIR); tar -czf $(IMG_PREFIX)-dns313-bootpart.tar.gz .boot)
if [ -d $(BIN_DIR)/.boot ] ; then rm -rf $(BIN_DIR)/.boot ; fi
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/$(IMG_PREFIX)-$(1).img bs=128k conv=sync
endef
ifeq ($(SUBTARGET),wiligear)
define Image/Build
$(call Image/Build/$(1),$(1))
-$(STAGING_DIR_HOST)/bin/mkfwimage2 \
-m GEOS -f 0x30000000 -z \
-v WILI-S.WILIBOARD.v5.00.SL3512.OpenWrt.00000.000000.000000 \
-o $(BIN_DIR)/$(IMG_PREFIX)-wbd111-$(1).bin \
-p Kernel:0x020000:0x100000:0:0:$(BIN_DIR)/$(IMG_PREFIX)-wbd111-zImage \
-p Ramdisk:0x120000:0x500000:0:0:$(BIN_DIR)/$(IMG_PREFIX)-$(1).img
-$(STAGING_DIR_HOST)/bin/mkfwimage2 \
-m GEOS -f 0x30000000 -z \
-v WILI-S.WBD222.v5.00.SL3512.OpenWrt.00000.000000.000000 \
-o $(BIN_DIR)/$(IMG_PREFIX)-wbd222-$(1).bin \
-p Kernel:0x020000:0x100000:0:0:$(BIN_DIR)/$(IMG_PREFIX)-wbd222-zImage \
-p Ramdisk:0x120000:0x500000:0:0:$(BIN_DIR)/$(IMG_PREFIX)-$(1).img
endef
endif
ifeq ($(SUBTARGET),raidsonic)
define Image/Build
$(call Image/Build/$(1),$(1))
dd if=$(BIN_DIR)/$(IMG_PREFIX)-$(1).img of=$(BIN_DIR)/rd.gz bs=6144k count=1
# dd if=/dev/zero of=$(BIN_DIR)/hddapp.tgz bs=6144k count=1
dd if=$(BIN_DIR)/$(IMG_PREFIX)-$(1).img of=$(BIN_DIR)/hddapp.tgz bs=6144k count=1 seek=1
cp $(KDIR)/nas4220-zImage $(BIN_DIR)/$(IMG_PREFIX)-nas4220-zImage
cp $(BIN_DIR)/$(IMG_PREFIX)-nas4220-zImage $(BIN_DIR)/zImage
# Create the special NAS4220B image format with the squashfs
# split across two "partitions" named rd.gz and hddapp.tgz but
# essentially just being used by OpenWRT as one big partition
define Build/nas4220b-images
dd if=$(IMAGE_ROOTFS) of=$(BIN_DIR)/rd.gz bs=6144k conv=sync
dd if=$(IMAGE_ROOTFS) of=$(BIN_DIR)/hddapp.tgz bs=6144k count=1 seek=1
cp $(IMAGE_KERNEL) $(BIN_DIR)/zImage
cp ./ImageInfo-ib4220 $(BIN_DIR)/ImageInfo
(cd $(BIN_DIR); tar -czf $(IMG_PREFIX)-sysupgrade-ib4220.tar.gz ImageInfo zImage rd.gz hddapp.tgz)
mv $(BIN_DIR)/rd.gz $(BIN_DIR)/$(IMG_PREFIX)-nas4220-rd.gz
mv $(BIN_DIR)/hddapp.tgz $(BIN_DIR)/$(IMG_PREFIX)-nas4220-hddapp.tgz
rm -f $(BIN_DIR)/zImage $(BIN_DIR)/ImageInfo
(cd $(BIN_DIR); tar -czf $(IMG_PREFIX)-sysupgrade-ib4220b.tar.gz ImageInfo zImage rd.gz hddapp.tgz)
mv $(BIN_DIR)/rd.gz $(BIN_DIR)/$(IMG_PREFIX)-nas4220b-rd.gz
mv $(BIN_DIR)/hddapp.tgz $(BIN_DIR)/$(IMG_PREFIX)-nas4220b-hddapp.tgz
mv $(BIN_DIR)/zImage $(BIN_DIR)/$(IMG_PREFIX)-nas4220b-zImage
rm -f $(BIN_DIR)/ImageInfo
endef
endif
# WBD-111 and WBD-222:
# work around the bootloader's bug with extra nops
# FIXME: is this really needed now that we no longer append the code
# to change the machine ID number? Needs testing on Wiliboard.
define Build/wbd-nops
mv $@ $@.tmp
echo -en "\x00\x00\xa0\xe1\x00\x00\xa0\xe1\x00\x00\xa0\xe1\x00\x00\xa0\xe1" > $@
cat $@.tmp >> $@
rm -f $@.tmp
endef
# All DTB files are prefixed with "gemini-"
define Device/Default
DEVICE_DTS := $(patsubst %.dtb,%,$(notdir $(wildcard $(if $(IB),$(KDIR),$(DTS_DIR))/*-$(1).dtb)))
KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
KERNEL_NAME := zImage
KERNEL := kernel-bin | append-dtb
FILESYSTEMS := squashfs
IMAGE_NAME := $$(IMAGE_PREFIX)-$$(1).$$(2)
BLOCKSIZE := 128k
PAGESIZE := 2048
endef
# A reasonable set of default packages handling the NAS type
# of devices out of the box (former NAS42x0 IcyBox defaults)
GEMINI_NAS_PACKAGES:=kmod-md-mod kmod-md-linear kmod-md-multipath \
kmod-md-raid0 kmod-md-raid1 kmod-md-raid10 kmod-md-raid456 \
kmod-fs-btrfs kmod-fs-cifs kmod-fs-nfs \
kmod-fs-nfsd kmod-fs-ntfs kmod-fs-reiserfs kmod-fs-vfat \
kmod-nls-utf8 kmod-usb-storage-extras \
samba36-server mdadm cfdisk fdisk e2fsprogs badblocks
define Device/dlink-dir-685
DEVICE_TITLE := D-Link DIR-685 Xtreme N Storage Router
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES) \
kmod-switch-rtl8366rb swconfig
IMAGES += dir685-image
IMAGE/dir685-image := dir685-images
endef
TARGET_DEVICES += dlink-dir-685
define Device/dlink-dns-313
DEVICE_TITLE := D-Link DNS-313 1-Bay Network Storage Enclosure
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES)
IMAGES += dns313-image
IMAGE/dns313-image := dns313-images
endef
TARGET_DEVICES += dlink-dns-313
define Device/nas4220b
DEVICE_TITLE := Raidsonic NAS IB-4220-B
IMAGES += nas4220b-image
IMAGE/nas4220b-image := nas4220b-images
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES)
endef
TARGET_DEVICES += nas4220b
define Device/rut1xx
DEVICE_TITLE := Teltonika RUT1xx
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES)
endef
TARGET_DEVICES += rut1xx
define Device/sq201
DEVICE_TITLE := ITian Square One SQ201
DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES) rt61-pci-firmware
endef
TARGET_DEVICES += sq201
define Device/wbd111
DEVICE_TITLE := Wiliboard WBD-111
KERNEL := kernel-bin | append-dtb | wbd-nops
endef
TARGET_DEVICES += wbd111
define Device/wbd222
DEVICE_TITLE := Wiliboard WBD-222
KERNEL := kernel-bin | append-dtb | wbd-nops
endef
TARGET_DEVICES += wbd222
$(eval $(call BuildImage))

9
target/linux/gemini/patches-4.4/060-cache-fa.patch → target/linux/gemini/patches-4.14/0001-cache-patch-from-OpenWRT.patch
View File

@ -1,3 +1,12 @@
From 57615e112aba6ae4c831d50e769c2c102f013686 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Tue, 7 Jun 2016 22:53:24 +0200
Subject: [PATCH 01/31] cache patch from OpenWRT
---
arch/arm/mm/cache-fa.S | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
--- a/arch/arm/mm/cache-fa.S
+++ b/arch/arm/mm/cache-fa.S
@@ -24,7 +24,8 @@

33
target/linux/gemini/patches-4.14/0002-pinctrl-gemini-Add-missing-functions.patch Normal file
View File

@ -0,0 +1,33 @@
From fd7823e6993f440930e9cb85e56375be5823485c Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sat, 14 Oct 2017 17:13:03 +0200
Subject: [PATCH 02/31] pinctrl: gemini: Add missing functions
Some two functions were missing from the Gemini pin control
driver. Noticed when trying to use ethernet. Fix it up by
adding them.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/pinctrl-gemini.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -2074,6 +2074,16 @@ static const struct gemini_pmx_func gemi
.num_groups = ARRAY_SIZE(satagrps),
},
{
+ .name = "usb",
+ .groups = usbgrps,
+ .num_groups = ARRAY_SIZE(usbgrps),
+ },
+ {
+ .name = "gmii",
+ .groups = gmiigrps,
+ .num_groups = ARRAY_SIZE(gmiigrps),
+ },
+ {
.name = "pci",
.groups = pcigrps,
.num_groups = ARRAY_SIZE(pcigrps),

51
target/linux/gemini/patches-4.14/0003-ARM-dts-Add-TVE200-to-the-Gemini-SoC-DTSI.patch Normal file
View File

@ -0,0 +1,51 @@
From 00e53d08bbe92051765c5bb94223b6f628cd3740 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Wed, 11 Oct 2017 19:45:19 +0200
Subject: [PATCH 03/31] ARM: dts: Add TVE200 to the Gemini SoC DTSI
The Faraday TVE200 is present in the Gemini SoC, sometimes
under the name "TVC". Add it to the SoC DTSI file along with
its resources.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/boot/dts/gemini.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -142,6 +142,12 @@
groups = "idegrp";
};
};
+ tvc_default_pins: pinctrl-tvc {
+ mux {
+ function = "tvc";
+ groups = "tvcgrp";
+ };
+ };
};
};
@@ -348,5 +354,20 @@
memcpy-bus-width = <32>;
#dma-cells = <2>;
};
+
+ display-controller@6a000000 {
+ compatible = "cortina,gemini-tvc", "faraday,tve200";
+ reg = <0x6a000000 0x1000>;
+ interrupts = <13 IRQ_TYPE_EDGE_RISING>;
+ resets = <&syscon GEMINI_RESET_TVC>;
+ clocks = <&syscon GEMINI_CLK_GATE_TVC>,
+ <&syscon GEMINI_CLK_TVC>;
+ clock-names = "PCLK", "TVE";
+ pinctrl-names = "default";
+ pinctrl-0 = <&tvc_default_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
};

73
target/linux/gemini/patches-4.14/0004-pinctrl-Add-skew-delay-pin-config-and-bindings.patch Normal file
View File

@ -0,0 +1,73 @@
From eb3742c4250c6a79e7080bdb6286e5df50c7f26a Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sat, 28 Oct 2017 15:37:17 +0200
Subject: [PATCH 04/31] pinctrl: Add skew-delay pin config and bindings
Some pin controllers (such as the Gemini) can control the
expected clock skew and output delay on certain pins with a
sub-nanosecond granularity. This is typically done by shunting
in a number of double inverters in front of or behind the pin.
Make it possible to configure this with a generic binding.
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | 4 ++++
drivers/pinctrl/pinconf-generic.c | 2 ++
include/linux/pinctrl/pinconf-generic.h | 5 +++++
3 files changed, 11 insertions(+)
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
@@ -271,6 +271,10 @@ output-high - set the pin to output mod
sleep-hardware-state - indicate this is sleep related state which will be programmed
into the registers for the sleep state.
slew-rate - set the slew rate
+skew-delay - this affects the expected clock skew on input pins
+ and the delay before latching a value to an output
+ pin. Typically indicates how many double-inverters are
+ used to delay the signal.
For example:
--- a/drivers/pinctrl/pinconf-generic.c
+++ b/drivers/pinctrl/pinconf-generic.c
@@ -49,6 +49,7 @@ static const struct pin_config_item conf
PCONFDUMP(PIN_CONFIG_POWER_SOURCE, "pin power source", "selector", true),
PCONFDUMP(PIN_CONFIG_SLEEP_HARDWARE_STATE, "sleep hardware state", NULL, false),
PCONFDUMP(PIN_CONFIG_SLEW_RATE, "slew rate", NULL, true),
+ PCONFDUMP(PIN_CONFIG_SKEW_DELAY, "skew delay", NULL, true),
};
static void pinconf_generic_dump_one(struct pinctrl_dev *pctldev,
@@ -181,6 +182,7 @@ static const struct pinconf_generic_para
{ "power-source", PIN_CONFIG_POWER_SOURCE, 0 },
{ "sleep-hardware-state", PIN_CONFIG_SLEEP_HARDWARE_STATE, 0 },
{ "slew-rate", PIN_CONFIG_SLEW_RATE, 0 },
+ { "skew-delay", PIN_CONFIG_SKEW_DELAY, 0 },
};
/**
--- a/include/linux/pinctrl/pinconf-generic.h
+++ b/include/linux/pinctrl/pinconf-generic.h
@@ -90,6 +90,10 @@
* @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
* this parameter (on a custom format) tells the driver which alternative
* slew rate to use.
+ * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs)
+ * or latch delay (on outputs) this parameter (in a custom format)
+ * specifies the clock skew or latch delay. It typically controls how
+ * many double inverters are put in front of the line.
* @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
* you need to pass in custom configurations to the pin controller, use
* PIN_CONFIG_END+1 as the base offset.
@@ -117,6 +121,7 @@ enum pin_config_param {
PIN_CONFIG_POWER_SOURCE,
PIN_CONFIG_SLEEP_HARDWARE_STATE,
PIN_CONFIG_SLEW_RATE,
+ PIN_CONFIG_SKEW_DELAY,
PIN_CONFIG_END = 0x7F,
PIN_CONFIG_MAX = 0xFF,
};

112
target/linux/gemini/patches-4.14/0005-pinctrl-gemini-Use-generic-DT-parser.patch Normal file
View File

@ -0,0 +1,112 @@
From 09240ae27ffca65518f7b9d2360c020c1b1ddabe Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sat, 28 Oct 2017 15:37:18 +0200
Subject: [PATCH 05/31] pinctrl: gemini: Use generic DT parser
We can just use the generic Device Tree parser code
in this driver and save some code.
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/Kconfig | 1 +
drivers/pinctrl/pinctrl-gemini.c | 66 +++-------------------------------------
2 files changed, 5 insertions(+), 62 deletions(-)
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -153,6 +153,7 @@ config PINCTRL_GEMINI
depends on ARCH_GEMINI
default ARCH_GEMINI
select PINMUX
+ select GENERIC_PINCONF
select MFD_SYSCON
config PINCTRL_MCP23S08
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -13,6 +13,8 @@
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/regmap.h>
@@ -1918,73 +1920,13 @@ static void gemini_pin_dbg_show(struct p
seq_printf(s, " " DRIVER_NAME);
}
-static int gemini_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
- struct device_node *np,
- struct pinctrl_map **map,
- unsigned int *reserved_maps,
- unsigned int *num_maps)
-{
- int ret;
- const char *function = NULL;
- const char *group;
- struct property *prop;
-
- ret = of_property_read_string(np, "function", &function);
- if (ret < 0)
- return ret;
-
- ret = of_property_count_strings(np, "groups");
- if (ret < 0)
- return ret;
-
- ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
- num_maps, ret);
- if (ret < 0)
- return ret;
-
- of_property_for_each_string(np, "groups", prop, group) {
- ret = pinctrl_utils_add_map_mux(pctldev, map, reserved_maps,
- num_maps, group, function);
- if (ret < 0)
- return ret;
- pr_debug("ADDED FUNCTION %s <-> GROUP %s\n",
- function, group);
- }
-
- return 0;
-}
-
-static int gemini_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
- struct device_node *np_config,
- struct pinctrl_map **map,
- unsigned int *num_maps)
-{
- unsigned int reserved_maps = 0;
- struct device_node *np;
- int ret;
-
- *map = NULL;
- *num_maps = 0;
-
- for_each_child_of_node(np_config, np) {
- ret = gemini_pinctrl_dt_subnode_to_map(pctldev, np, map,
- &reserved_maps, num_maps);
- if (ret < 0) {
- pinctrl_utils_free_map(pctldev, *map, *num_maps);
- return ret;
- }
- }
-
- return 0;
-};
-
static const struct pinctrl_ops gemini_pctrl_ops = {
.get_groups_count = gemini_get_groups_count,
.get_group_name = gemini_get_group_name,
.get_group_pins = gemini_get_group_pins,
.pin_dbg_show = gemini_pin_dbg_show,
- .dt_node_to_map = gemini_pinctrl_dt_node_to_map,
- .dt_free_map = pinctrl_utils_free_map,
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
+ .dt_free_map = pinconf_generic_dt_free_map,
};
/**

280
target/linux/gemini/patches-4.14/0006-pinctrl-gemini-Implement-clock-skew-delay-config.patch Normal file
View File

@ -0,0 +1,280 @@
From 43e8f011ddbb293e0a3394d0f39819ea2ead4a1b Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sat, 28 Oct 2017 15:37:19 +0200
Subject: [PATCH 06/31] pinctrl: gemini: Implement clock skew/delay config
This enabled pin config on the Gemini driver and implements
pin skew/delay so that the ethernet pins clocking can be
properly configured.
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
.../bindings/pinctrl/cortina,gemini-pinctrl.txt | 10 +-
drivers/pinctrl/pinctrl-gemini.c | 178 ++++++++++++++++++++-
2 files changed, 182 insertions(+), 6 deletions(-)
--- a/Documentation/devicetree/bindings/pinctrl/cortina,gemini-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/cortina,gemini-pinctrl.txt
@@ -9,8 +9,14 @@ The pin controller node must be a subnod
Required properties:
- compatible: "cortina,gemini-pinctrl"
-Subnodes of the pin controller contain pin control multiplexing set-up.
-Please refer to pinctrl-bindings.txt for generic pin multiplexing nodes.
+Subnodes of the pin controller contain pin control multiplexing set-up
+and pin configuration of individual pins.
+
+Please refer to pinctrl-bindings.txt for generic pin multiplexing nodes
+and generic pin config nodes.
+
+Supported configurations:
+- skew-delay is supported on the Ethernet pins
Example:
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -24,6 +24,19 @@
#define DRIVER_NAME "pinctrl-gemini"
/**
+ * struct gemini_pin_conf - information about configuring a pin
+ * @pin: the pin number
+ * @reg: config register
+ * @mask: the bits affecting the configuration of the pin
+ */
+struct gemini_pin_conf {
+ unsigned int pin;
+ u32 reg;
+ u32 mask;
+};
+
+/**
+ * struct gemini_pmx - state holder for the gemini pin controller
* @dev: a pointer back to containing device
* @virtbase: the offset to the controller in virtual memory
* @map: regmap to access registers
@@ -31,6 +44,8 @@
* @is_3516: whether the SoC/package is the 3516 variant
* @flash_pin: whether the flash pin (extended pins for parallel
* flash) is set
+ * @confs: pin config information
+ * @nconfs: number of pin config information items
*/
struct gemini_pmx {
struct device *dev;
@@ -39,6 +54,8 @@ struct gemini_pmx {
bool is_3512;
bool is_3516;
bool flash_pin;
+ const struct gemini_pin_conf *confs;
+ unsigned int nconfs;
};
/**
@@ -59,6 +76,13 @@ struct gemini_pin_group {
u32 value;
};
+/* Some straight-forward control registers */
+#define GLOBAL_WORD_ID 0x00
+#define GLOBAL_STATUS 0x04
+#define GLOBAL_STATUS_FLPIN BIT(20)
+#define GLOBAL_GMAC_CTRL_SKEW 0x1c
+#define GLOBAL_GMAC0_DATA_SKEW 0x20
+#define GLOBAL_GMAC1_DATA_SKEW 0x24
/*
* Global Miscellaneous Control Register
* This register controls all Gemini pad/pin multiplexing
@@ -71,9 +95,6 @@ struct gemini_pin_group {
* DISABLED again. So you select a flash configuration once, and then
* you are stuck with it.
*/
-#define GLOBAL_WORD_ID 0x00
-#define GLOBAL_STATUS 0x04
-#define GLOBAL_STATUS_FLPIN BIT(20)
#define GLOBAL_MISC_CTRL 0x30
#define TVC_CLK_PAD_ENABLE BIT(20)
#define PCI_CLK_PAD_ENABLE BIT(17)
@@ -1925,7 +1946,7 @@ static const struct pinctrl_ops gemini_p
.get_group_name = gemini_get_group_name,
.get_group_pins = gemini_get_group_pins,
.pin_dbg_show = gemini_pin_dbg_show,
- .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
.dt_free_map = pinconf_generic_dt_free_map,
};
@@ -2203,10 +2224,155 @@ static const struct pinmux_ops gemini_pm
.set_mux = gemini_pmx_set_mux,
};
+#define GEMINI_CFGPIN(_n, _r, _lb, _hb) { \
+ .pin = _n, \
+ .reg = _r, \
+ .mask = GENMASK(_hb, _lb) \
+}
+
+static const struct gemini_pin_conf gemini_confs_3512[] = {
+ GEMINI_CFGPIN(259, GLOBAL_GMAC_CTRL_SKEW, 0, 3), /* GMAC0 RXDV */
+ GEMINI_CFGPIN(277, GLOBAL_GMAC_CTRL_SKEW, 4, 7), /* GMAC0 RXC */
+ GEMINI_CFGPIN(241, GLOBAL_GMAC_CTRL_SKEW, 8, 11), /* GMAC0 TXEN */
+ GEMINI_CFGPIN(312, GLOBAL_GMAC_CTRL_SKEW, 12, 15), /* GMAC0 TXC */
+ GEMINI_CFGPIN(298, GLOBAL_GMAC_CTRL_SKEW, 16, 19), /* GMAC1 RXDV */
+ GEMINI_CFGPIN(280, GLOBAL_GMAC_CTRL_SKEW, 20, 23), /* GMAC1 RXC */
+ GEMINI_CFGPIN(316, GLOBAL_GMAC_CTRL_SKEW, 24, 27), /* GMAC1 TXEN */
+ GEMINI_CFGPIN(243, GLOBAL_GMAC_CTRL_SKEW, 28, 31), /* GMAC1 TXC */
+ GEMINI_CFGPIN(295, GLOBAL_GMAC0_DATA_SKEW, 0, 3), /* GMAC0 RXD0 */
+ GEMINI_CFGPIN(313, GLOBAL_GMAC0_DATA_SKEW, 4, 7), /* GMAC0 RXD1 */
+ GEMINI_CFGPIN(242, GLOBAL_GMAC0_DATA_SKEW, 8, 11), /* GMAC0 RXD2 */
+ GEMINI_CFGPIN(260, GLOBAL_GMAC0_DATA_SKEW, 12, 15), /* GMAC0 RXD3 */
+ GEMINI_CFGPIN(294, GLOBAL_GMAC0_DATA_SKEW, 16, 19), /* GMAC0 TXD0 */
+ GEMINI_CFGPIN(276, GLOBAL_GMAC0_DATA_SKEW, 20, 23), /* GMAC0 TXD1 */
+ GEMINI_CFGPIN(258, GLOBAL_GMAC0_DATA_SKEW, 24, 27), /* GMAC0 TXD2 */
+ GEMINI_CFGPIN(240, GLOBAL_GMAC0_DATA_SKEW, 28, 31), /* GMAC0 TXD3 */
+ GEMINI_CFGPIN(262, GLOBAL_GMAC1_DATA_SKEW, 0, 3), /* GMAC1 RXD0 */
+ GEMINI_CFGPIN(244, GLOBAL_GMAC1_DATA_SKEW, 4, 7), /* GMAC1 RXD1 */
+ GEMINI_CFGPIN(317, GLOBAL_GMAC1_DATA_SKEW, 8, 11), /* GMAC1 RXD2 */
+ GEMINI_CFGPIN(299, GLOBAL_GMAC1_DATA_SKEW, 12, 15), /* GMAC1 RXD3 */
+ GEMINI_CFGPIN(261, GLOBAL_GMAC1_DATA_SKEW, 16, 19), /* GMAC1 TXD0 */
+ GEMINI_CFGPIN(279, GLOBAL_GMAC1_DATA_SKEW, 20, 23), /* GMAC1 TXD1 */
+ GEMINI_CFGPIN(297, GLOBAL_GMAC1_DATA_SKEW, 24, 27), /* GMAC1 TXD2 */
+ GEMINI_CFGPIN(315, GLOBAL_GMAC1_DATA_SKEW, 28, 31), /* GMAC1 TXD3 */
+};
+
+static const struct gemini_pin_conf gemini_confs_3516[] = {
+ GEMINI_CFGPIN(347, GLOBAL_GMAC_CTRL_SKEW, 0, 3), /* GMAC0 RXDV */
+ GEMINI_CFGPIN(386, GLOBAL_GMAC_CTRL_SKEW, 4, 7), /* GMAC0 RXC */
+ GEMINI_CFGPIN(307, GLOBAL_GMAC_CTRL_SKEW, 8, 11), /* GMAC0 TXEN */
+ GEMINI_CFGPIN(327, GLOBAL_GMAC_CTRL_SKEW, 12, 15), /* GMAC0 TXC */
+ GEMINI_CFGPIN(309, GLOBAL_GMAC_CTRL_SKEW, 16, 19), /* GMAC1 RXDV */
+ GEMINI_CFGPIN(390, GLOBAL_GMAC_CTRL_SKEW, 20, 23), /* GMAC1 RXC */
+ GEMINI_CFGPIN(370, GLOBAL_GMAC_CTRL_SKEW, 24, 27), /* GMAC1 TXEN */
+ GEMINI_CFGPIN(350, GLOBAL_GMAC_CTRL_SKEW, 28, 31), /* GMAC1 TXC */
+ GEMINI_CFGPIN(367, GLOBAL_GMAC0_DATA_SKEW, 0, 3), /* GMAC0 RXD0 */
+ GEMINI_CFGPIN(348, GLOBAL_GMAC0_DATA_SKEW, 4, 7), /* GMAC0 RXD1 */
+ GEMINI_CFGPIN(387, GLOBAL_GMAC0_DATA_SKEW, 8, 11), /* GMAC0 RXD2 */
+ GEMINI_CFGPIN(328, GLOBAL_GMAC0_DATA_SKEW, 12, 15), /* GMAC0 RXD3 */
+ GEMINI_CFGPIN(306, GLOBAL_GMAC0_DATA_SKEW, 16, 19), /* GMAC0 TXD0 */
+ GEMINI_CFGPIN(325, GLOBAL_GMAC0_DATA_SKEW, 20, 23), /* GMAC0 TXD1 */
+ GEMINI_CFGPIN(346, GLOBAL_GMAC0_DATA_SKEW, 24, 27), /* GMAC0 TXD2 */
+ GEMINI_CFGPIN(326, GLOBAL_GMAC0_DATA_SKEW, 28, 31), /* GMAC0 TXD3 */
+ GEMINI_CFGPIN(391, GLOBAL_GMAC1_DATA_SKEW, 0, 3), /* GMAC1 RXD0 */
+ GEMINI_CFGPIN(351, GLOBAL_GMAC1_DATA_SKEW, 4, 7), /* GMAC1 RXD1 */
+ GEMINI_CFGPIN(310, GLOBAL_GMAC1_DATA_SKEW, 8, 11), /* GMAC1 RXD2 */
+ GEMINI_CFGPIN(371, GLOBAL_GMAC1_DATA_SKEW, 12, 15), /* GMAC1 RXD3 */
+ GEMINI_CFGPIN(329, GLOBAL_GMAC1_DATA_SKEW, 16, 19), /* GMAC1 TXD0 */
+ GEMINI_CFGPIN(389, GLOBAL_GMAC1_DATA_SKEW, 20, 23), /* GMAC1 TXD1 */
+ GEMINI_CFGPIN(369, GLOBAL_GMAC1_DATA_SKEW, 24, 27), /* GMAC1 TXD2 */
+ GEMINI_CFGPIN(308, GLOBAL_GMAC1_DATA_SKEW, 28, 31), /* GMAC1 TXD3 */
+};
+
+static const struct gemini_pin_conf *gemini_get_pin_conf(struct gemini_pmx *pmx,
+ unsigned int pin)
+{
+ const struct gemini_pin_conf *retconf;
+ int i;
+
+ for (i = 0; i < pmx->nconfs; i++) {
+ retconf = &gemini_confs_3516[i];
+ if (retconf->pin == pin)
+ return retconf;
+ }
+ return NULL;
+}
+
+static int gemini_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
+ unsigned long *config)
+{
+ struct gemini_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
+ enum pin_config_param param = pinconf_to_config_param(*config);
+ const struct gemini_pin_conf *conf;
+ u32 val;
+
+ switch (param) {
+ case PIN_CONFIG_SKEW_DELAY:
+ conf = gemini_get_pin_conf(pmx, pin);
+ if (!conf)
+ return -ENOTSUPP;
+ regmap_read(pmx->map, conf->reg, &val);
+ val &= conf->mask;
+ val >>= (ffs(conf->mask) - 1);
+ *config = pinconf_to_config_packed(PIN_CONFIG_SKEW_DELAY, val);
+ break;
+ default:
+ return -ENOTSUPP;
+ }
+
+ return 0;
+}
+
+static int gemini_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
+ unsigned long *configs, unsigned int num_configs)
+{
+ struct gemini_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
+ const struct gemini_pin_conf *conf;
+ enum pin_config_param param;
+ u32 arg;
+ int ret = 0;
+ int i;
+
+ for (i = 0; i < num_configs; i++) {
+ param = pinconf_to_config_param(configs[i]);
+ arg = pinconf_to_config_argument(configs[i]);
+
+ switch (param) {
+ case PIN_CONFIG_SKEW_DELAY:
+ if (arg > 0xf)
+ return -EINVAL;
+ conf = gemini_get_pin_conf(pmx, pin);
+ if (!conf) {
+ dev_err(pmx->dev,
+ "invalid pin for skew delay %d\n", pin);
+ return -ENOTSUPP;
+ }
+ arg <<= (ffs(conf->mask) - 1);
+ dev_dbg(pmx->dev,
+ "set pin %d to skew delay mask %08x, val %08x\n",
+ pin, conf->mask, arg);
+ regmap_update_bits(pmx->map, conf->reg, conf->mask, arg);
+ break;
+ default:
+ dev_err(pmx->dev, "Invalid config param %04x\n", param);
+ return -ENOTSUPP;
+ }
+ }
+
+ return ret;
+}
+
+static const struct pinconf_ops gemini_pinconf_ops = {
+ .pin_config_get = gemini_pinconf_get,
+ .pin_config_set = gemini_pinconf_set,
+ .is_generic = true,
+};
+
static struct pinctrl_desc gemini_pmx_desc = {
.name = DRIVER_NAME,
.pctlops = &gemini_pctrl_ops,
.pmxops = &gemini_pmx_ops,
+ .confops = &gemini_pinconf_ops,
.owner = THIS_MODULE,
};
@@ -2249,11 +2415,15 @@ static int gemini_pmx_probe(struct platf
val &= 0xffff;
if (val == 0x3512) {
pmx->is_3512 = true;
+ pmx->confs = gemini_confs_3512;
+ pmx->nconfs = ARRAY_SIZE(gemini_confs_3512);
gemini_pmx_desc.pins = gemini_3512_pins;
gemini_pmx_desc.npins = ARRAY_SIZE(gemini_3512_pins);
dev_info(dev, "detected 3512 chip variant\n");
} else if (val == 0x3516) {
pmx->is_3516 = true;
+ pmx->confs = gemini_confs_3516;
+ pmx->nconfs = ARRAY_SIZE(gemini_confs_3516);
gemini_pmx_desc.pins = gemini_3516_pins;
gemini_pmx_desc.npins = ARRAY_SIZE(gemini_3516_pins);
dev_info(dev, "detected 3516 chip variant\n");

186
target/linux/gemini/patches-4.14/0007-pinctrl-gemini-Fix-GMAC-groups.patch Normal file
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@ -0,0 +1,186 @@
From e7759c44e0c20dd6b5a259300acdc7350ea6dd32 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 6 Nov 2017 21:27:34 +0100
Subject: [PATCH 07/31] pinctrl: gemini: Fix GMAC groups
The GMII groups need to be split across GMAC0 and GMAC1 since
GMAC0 is always available but GMAC1 masks GPIO2 lines 0-7
so we might want just one interface out.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/pinctrl-gemini.c | 79 +++++++++++++++++++++++++++-------------
1 file changed, 54 insertions(+), 25 deletions(-)
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -96,6 +96,13 @@ struct gemini_pin_group {
* you are stuck with it.
*/
#define GLOBAL_MISC_CTRL 0x30
+#define GEMINI_GMAC_IOSEL_MASK GENMASK(28, 27)
+/* Not really used */
+#define GEMINI_GMAC_IOSEL_GMAC0_GMII BIT(28)
+/* Activated with GMAC1 */
+#define GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII BIT(27)
+/* This will be the default */
+#define GEMINI_GMAC_IOSEL_GMAC0_RGMII_GMAC1_GPIO2 0
#define TVC_CLK_PAD_ENABLE BIT(20)
#define PCI_CLK_PAD_ENABLE BIT(17)
#define LPC_CLK_PAD_ENABLE BIT(16)
@@ -109,8 +116,8 @@ struct gemini_pin_group {
#define NAND_PADS_DISABLE BIT(2)
#define PFLASH_PADS_DISABLE BIT(1)
#define SFLASH_PADS_DISABLE BIT(0)
-#define PADS_MASK (GENMASK(9, 0) | BIT(16) | BIT(17) | BIT(20))
-#define PADS_MAXBIT 20
+#define PADS_MASK (GENMASK(9, 0) | BIT(16) | BIT(17) | BIT(20) | BIT(27))
+#define PADS_MAXBIT 27
/* Ordered by bit index */
static const char * const gemini_padgroups[] = {
@@ -516,9 +523,12 @@ static const unsigned int usb_3512_pins[
};
/* GMII, ethernet pins */
-static const unsigned int gmii_3512_pins[] = {
- 311, 240, 258, 276, 294, 312, 241, 259, 277, 295, 313, 242, 260, 278, 296,
- 315, 297, 279, 261, 243, 316, 298, 280, 262, 244, 317, 299, 281
+static const unsigned int gmii_gmac0_3512_pins[] = {
+ 240, 241, 242, 258, 259, 260, 276, 277, 278, 294, 295, 311, 312, 313
+};
+
+static const unsigned int gmii_gmac1_3512_pins[] = {
+ 243, 244, 261, 262, 279, 280, 281, 296, 297, 298, 299, 315, 316, 317
};
static const unsigned int pci_3512_pins[] = {
@@ -668,10 +678,10 @@ static const unsigned int gpio1c_3512_pi
/* The GPIO1D (28-31) pins overlap with LCD and TVC */
static const unsigned int gpio1d_3512_pins[] = { 246, 319, 301, 283 };
-/* The GPIO2A (0-3) pins overlap with GMII and extended parallel flash */
+/* The GPIO2A (0-3) pins overlap with GMII GMAC1 and extended parallel flash */
static const unsigned int gpio2a_3512_pins[] = { 315, 297, 279, 261 };
-/* The GPIO2B (4-7) pins overlap with GMII, extended parallel flash and LCD */
+/* The GPIO2B (4-7) pins overlap with GMII GMAC1, extended parallel flash and LCD */
static const unsigned int gpio2b_3512_pins[] = { 262, 244, 317, 299 };
/* The GPIO2C (8-31) pins overlap with PCI */
@@ -738,9 +748,16 @@ static const struct gemini_pin_group gem
.num_pins = ARRAY_SIZE(usb_3512_pins),
},
{
- .name = "gmiigrp",
- .pins = gmii_3512_pins,
- .num_pins = ARRAY_SIZE(gmii_3512_pins),
+ .name = "gmii_gmac0_grp",
+ .pins = gmii_gmac0_3512_pins,
+ .num_pins = ARRAY_SIZE(gmii_gmac0_3512_pins),
+ },
+ {
+ .name = "gmii_gmac1_grp",
+ .pins = gmii_gmac1_3512_pins,
+ .num_pins = ARRAY_SIZE(gmii_gmac1_3512_pins),
+ /* Bring out RGMII on the GMAC1 pins */
+ .value = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
},
{
.name = "pcigrp",
@@ -954,14 +971,15 @@ static const struct gemini_pin_group gem
.name = "gpio2agrp",
.pins = gpio2a_3512_pins,
.num_pins = ARRAY_SIZE(gpio2a_3512_pins),
- /* Conflict with GMII and extended parallel flash */
+ .mask = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
+ /* Conflict with GMII GMAC1 and extended parallel flash */
},
{
.name = "gpio2bgrp",
.pins = gpio2b_3512_pins,
.num_pins = ARRAY_SIZE(gpio2b_3512_pins),
- /* Conflict with GMII, extended parallel flash and LCD */
- .mask = LCD_PADS_ENABLE,
+ /* Conflict with GMII GMAC1, extended parallel flash and LCD */
+ .mask = LCD_PADS_ENABLE | GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
},
{
.name = "gpio2cgrp",
@@ -1441,9 +1459,12 @@ static const unsigned int usb_3516_pins[
};
/* GMII, ethernet pins */
-static const unsigned int gmii_3516_pins[] = {
- 306, 307, 308, 309, 310, 325, 326, 327, 328, 329, 330, 345, 346, 347,
- 348, 349, 350, 351, 367, 368, 369, 370, 371, 386, 387, 389, 390, 391
+static const unsigned int gmii_gmac0_3516_pins[] = {
+ 306, 307, 325, 326, 327, 328, 345, 346, 347, 348, 367, 368, 386, 387
+};
+
+static const unsigned int gmii_gmac1_3516_pins[] = {
+ 308, 309, 310, 329, 330, 349, 350, 351, 369, 370, 371, 389, 390, 391
};
static const unsigned int pci_3516_pins[] = {
@@ -1585,10 +1606,10 @@ static const unsigned int gpio1c_3516_pi
/* The GPIO1D (28-31) pins overlap with TVC */
static const unsigned int gpio1d_3516_pins[] = { 353, 311, 394, 374 };
-/* The GPIO2A (0-3) pins overlap with GMII and extended parallel flash */
+/* The GPIO2A (0-3) pins overlap with GMII GMAC1 and extended parallel flash */
static const unsigned int gpio2a_3516_pins[] = { 308, 369, 389, 329 };
-/* The GPIO2B (4-7) pins overlap with GMII, extended parallel flash and LCD */
+/* The GPIO2B (4-7) pins overlap with GMII GMAC1, extended parallel flash and LCD */
static const unsigned int gpio2b_3516_pins[] = { 391, 351, 310, 371 };
/* The GPIO2C (8-31) pins overlap with PCI */
@@ -1660,9 +1681,16 @@ static const struct gemini_pin_group gem
.num_pins = ARRAY_SIZE(usb_3516_pins),
},
{
- .name = "gmiigrp",
- .pins = gmii_3516_pins,
- .num_pins = ARRAY_SIZE(gmii_3516_pins),
+ .name = "gmii_gmac0_grp",
+ .pins = gmii_gmac0_3516_pins,
+ .num_pins = ARRAY_SIZE(gmii_gmac0_3516_pins),
+ },
+ {
+ .name = "gmii_gmac1_grp",
+ .pins = gmii_gmac1_3516_pins,
+ .num_pins = ARRAY_SIZE(gmii_gmac1_3516_pins),
+ /* Bring out RGMII on the GMAC1 pins */
+ .value = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
},
{
.name = "pcigrp",
@@ -1861,14 +1889,15 @@ static const struct gemini_pin_group gem
.name = "gpio2agrp",
.pins = gpio2a_3516_pins,
.num_pins = ARRAY_SIZE(gpio2a_3516_pins),
- /* Conflict with GMII and extended parallel flash */
+ .mask = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
+ /* Conflict with GMII GMAC1 and extended parallel flash */
},
{
.name = "gpio2bgrp",
.pins = gpio2b_3516_pins,
.num_pins = ARRAY_SIZE(gpio2b_3516_pins),
- /* Conflict with GMII, extended parallel flash and LCD */
- .mask = LCD_PADS_ENABLE,
+ /* Conflict with GMII GMAC1, extended parallel flash and LCD */
+ .mask = LCD_PADS_ENABLE | GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
},
{
.name = "gpio2cgrp",
@@ -1971,7 +2000,7 @@ static const char * const icegrps[] = {
static const char * const idegrps[] = { "idegrp" };
static const char * const satagrps[] = { "satagrp" };
static const char * const usbgrps[] = { "usbgrp" };
-static const char * const gmiigrps[] = { "gmiigrp" };
+static const char * const gmiigrps[] = { "gmii_gmac0_grp", "gmii_gmac1_grp" };
static const char * const pcigrps[] = { "pcigrp" };
static const char * const lpcgrps[] = { "lpcgrp" };
static const char * const lcdgrps[] = { "lcdgrp" };

27
target/linux/gemini/patches-4.14/0008-pinctrl-gemini-Fix-missing-pad-descriptions.patch Normal file
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@ -0,0 +1,27 @@
From 3f2941cb12a6d6a0ef4e53e0ecb8d2431d352964 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 13 Nov 2017 22:36:12 +0100
Subject: [PATCH 08/31] pinctrl: gemini: Fix missing pad descriptions
A pretty clever static checker found a bug in my patch: I added more
bits to a bitmask but didn't extend the array indexed to the same
bitmask.
Fixes: 756a024f3983 ("pinctrl: gemini: Fix GMAC groups")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/pinctrl-gemini.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -136,6 +136,8 @@ static const char * const gemini_padgrou
"PCI CLK",
NULL, NULL,
"TVC CLK",
+ NULL, NULL, NULL, NULL, NULL,
+ "GMAC1",
};
static const struct pinctrl_pin_desc gemini_3512_pins[] = {

25
target/linux/gemini/patches-4.14/0009-pinctrl-gemini-Add-two-missing-GPIO-groups.patch Normal file
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@ -0,0 +1,25 @@
From c25653d045ce86c5ae472258fdaa39a6baaf75eb Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sun, 19 Nov 2017 10:57:27 +0100
Subject: [PATCH 09/31] pinctrl: gemini: Add two missing GPIO groups
The 3512 has two more GPIO groups on GPIO area 0, so let's
make it possible to combine these with the function.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/pinctrl-gemini.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -2015,7 +2015,8 @@ static const char * const sflashgrps[] =
static const char * const gpio0grps[] = { "gpio0agrp", "gpio0bgrp", "gpio0cgrp",
"gpio0dgrp", "gpio0egrp", "gpio0fgrp",
"gpio0ggrp", "gpio0hgrp", "gpio0igrp",
- "gpio0jgrp", "gpio0kgrp" };
+ "gpio0jgrp", "gpio0kgrp", "gpio0lgrp",
+ "gpio0mgrp" };
static const char * const gpio1grps[] = { "gpio1agrp", "gpio1bgrp", "gpio1cgrp",
"gpio1dgrp" };
static const char * const gpio2grps[] = { "gpio2agrp", "gpio2bgrp", "gpio2cgrp" };

25
target/linux/gemini/patches-4.14/0010-pinctrl-gemini-Fix-usage-of-3512-groups.patch Normal file
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@ -0,0 +1,25 @@
From 88a5c6ad311588f178c5a88e4eeacc6d40b8ede3 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Wed, 22 Nov 2017 21:04:14 +0100
Subject: [PATCH 10/31] pinctrl: gemini: Fix usage of 3512 groups
The pin config lookup function was still hardcoding the
3516 pin set, which is obviously wrong. Use the pointer
in the state container.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/pinctrl-gemini.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -2323,7 +2323,7 @@ static const struct gemini_pin_conf *gem
int i;
for (i = 0; i < pmx->nconfs; i++) {
- retconf = &gemini_confs_3516[i];
+ retconf = &pmx->confs[i];
if (retconf->pin == pin)
return retconf;
}

198
target/linux/gemini/patches-4.14/0011-pinctrl-gemini-Support-drive-strength-setting.patch Normal file
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@ -0,0 +1,198 @@
From f147cf49ef39f5e87d5df9ef1fab52683bc75c63 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sat, 2 Dec 2017 12:23:09 +0100
Subject: [PATCH 11/31] pinctrl: gemini: Support drive strength setting
The Gemini pin controller can set drive strength for a few
select groups of pins (not individually). Implement this
for GMAC0 and 1 (ethernet ports), IDE and PCI.
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
.../bindings/pinctrl/cortina,gemini-pinctrl.txt | 3 +
drivers/pinctrl/pinctrl-gemini.c | 81 ++++++++++++++++++++++
2 files changed, 84 insertions(+)
--- a/Documentation/devicetree/bindings/pinctrl/cortina,gemini-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/cortina,gemini-pinctrl.txt
@@ -17,6 +17,9 @@ and generic pin config nodes.
Supported configurations:
- skew-delay is supported on the Ethernet pins
+- drive-strength with 4, 8, 12 or 16 mA as argument is supported for
+ entire groups on the groups "idegrp", "gmii_gmac0_grp", "gmii_gmac1_grp"
+ and "pcigrp".
Example:
--- a/drivers/pinctrl/pinctrl-gemini.c
+++ b/drivers/pinctrl/pinctrl-gemini.c
@@ -67,6 +67,9 @@ struct gemini_pmx {
* elements in .pins so we can iterate over that array
* @mask: bits to clear to enable this when doing pin muxing
* @value: bits to set to enable this when doing pin muxing
+ * @driving_mask: bitmask for the IO Pad driving register for this
+ * group, if it supports altering the driving strength of
+ * its lines.
*/
struct gemini_pin_group {
const char *name;
@@ -74,12 +77,14 @@ struct gemini_pin_group {
const unsigned int num_pins;
u32 mask;
u32 value;
+ u32 driving_mask;
};
/* Some straight-forward control registers */
#define GLOBAL_WORD_ID 0x00
#define GLOBAL_STATUS 0x04
#define GLOBAL_STATUS_FLPIN BIT(20)
+#define GLOBAL_IODRIVE 0x10
#define GLOBAL_GMAC_CTRL_SKEW 0x1c
#define GLOBAL_GMAC0_DATA_SKEW 0x20
#define GLOBAL_GMAC1_DATA_SKEW 0x24
@@ -738,6 +743,7 @@ static const struct gemini_pin_group gem
/* Conflict with all flash usage */
.value = IDE_PADS_ENABLE | NAND_PADS_DISABLE |
PFLASH_PADS_DISABLE | SFLASH_PADS_DISABLE,
+ .driving_mask = GENMASK(21, 20),
},
{
.name = "satagrp",
@@ -753,6 +759,7 @@ static const struct gemini_pin_group gem
.name = "gmii_gmac0_grp",
.pins = gmii_gmac0_3512_pins,
.num_pins = ARRAY_SIZE(gmii_gmac0_3512_pins),
+ .driving_mask = GENMASK(17, 16),
},
{
.name = "gmii_gmac1_grp",
@@ -760,6 +767,7 @@ static const struct gemini_pin_group gem
.num_pins = ARRAY_SIZE(gmii_gmac1_3512_pins),
/* Bring out RGMII on the GMAC1 pins */
.value = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
+ .driving_mask = GENMASK(19, 18),
},
{
.name = "pcigrp",
@@ -767,6 +775,7 @@ static const struct gemini_pin_group gem
.num_pins = ARRAY_SIZE(pci_3512_pins),
/* Conflict only with GPIO2 */
.value = PCI_PADS_ENABLE | PCI_CLK_PAD_ENABLE,
+ .driving_mask = GENMASK(23, 22),
},
{
.name = "lpcgrp",
@@ -1671,6 +1680,7 @@ static const struct gemini_pin_group gem
/* Conflict with all flash usage */
.value = IDE_PADS_ENABLE | NAND_PADS_DISABLE |
PFLASH_PADS_DISABLE | SFLASH_PADS_DISABLE,
+ .driving_mask = GENMASK(21, 20),
},
{
.name = "satagrp",
@@ -1686,6 +1696,7 @@ static const struct gemini_pin_group gem
.name = "gmii_gmac0_grp",
.pins = gmii_gmac0_3516_pins,
.num_pins = ARRAY_SIZE(gmii_gmac0_3516_pins),
+ .driving_mask = GENMASK(17, 16),
},
{
.name = "gmii_gmac1_grp",
@@ -1693,6 +1704,7 @@ static const struct gemini_pin_group gem
.num_pins = ARRAY_SIZE(gmii_gmac1_3516_pins),
/* Bring out RGMII on the GMAC1 pins */
.value = GEMINI_GMAC_IOSEL_GMAC0_GMAC1_RGMII,
+ .driving_mask = GENMASK(19, 18),
},
{
.name = "pcigrp",
@@ -1700,6 +1712,7 @@ static const struct gemini_pin_group gem
.num_pins = ARRAY_SIZE(pci_3516_pins),
/* Conflict only with GPIO2 */
.value = PCI_PADS_ENABLE | PCI_CLK_PAD_ENABLE,
+ .driving_mask = GENMASK(23, 22),
},
{
.name = "lpcgrp",
@@ -2394,9 +2407,77 @@ static int gemini_pinconf_set(struct pin
return ret;
}
+static int gemini_pinconf_group_set(struct pinctrl_dev *pctldev,
+ unsigned selector,
+ unsigned long *configs,
+ unsigned num_configs)
+{
+ struct gemini_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
+ const struct gemini_pin_group *grp = NULL;
+ enum pin_config_param param;
+ u32 arg;
+ u32 val;
+ int i;
+
+ if (pmx->is_3512)
+ grp = &gemini_3512_pin_groups[selector];
+ if (pmx->is_3516)
+ grp = &gemini_3516_pin_groups[selector];
+
+ /* First figure out if this group supports configs */
+ if (!grp->driving_mask) {
+ dev_err(pmx->dev, "pin config group \"%s\" does "
+ "not support drive strength setting\n",
+ grp->name);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < num_configs; i++) {
+ param = pinconf_to_config_param(configs[i]);
+ arg = pinconf_to_config_argument(configs[i]);
+
+ switch (param) {
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ switch (arg) {
+ case 4:
+ val = 0;
+ break;
+ case 8:
+ val = 1;
+ break;
+ case 12:
+ val = 2;
+ break;
+ case 16:
+ val = 3;
+ break;
+ default:
+ dev_err(pmx->dev,
+ "invalid drive strength %d mA\n",
+ arg);
+ return -ENOTSUPP;
+ }
+ val <<= (ffs(grp->driving_mask) - 1);
+ regmap_update_bits(pmx->map, GLOBAL_IODRIVE,
+ grp->driving_mask,
+ val);
+ dev_info(pmx->dev,
+ "set group %s to %d mA drive strength mask %08x val %08x\n",
+ grp->name, arg, grp->driving_mask, val);
+ break;
+ default:
+ dev_err(pmx->dev, "invalid config param %04x\n", param);
+ return -ENOTSUPP;
+ }
+ }
+
+ return 0;
+}
+
static const struct pinconf_ops gemini_pinconf_ops = {
.pin_config_get = gemini_pinconf_get,
.pin_config_set = gemini_pinconf_set,
+ .pin_config_group_set = gemini_pinconf_group_set,
.is_generic = true,
};

113
target/linux/gemini/patches-4.14/0012-ARM-dts-Add-ethernet-PHYs-to-the-a-bunch-of-Geminis.patch Normal file
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@ -0,0 +1,113 @@
From f0674df220f3da81c173025636a904b395cf8f8b Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sun, 19 Nov 2017 10:46:16 +0100
Subject: [PATCH 12/31] ARM: dts: Add ethernet PHYs to the a bunch of Geminis
These Gemini boards have Ethernet PHY on GPIO bit-banged
MDIO, clearly defined in the corresponding OpenWRT
ethernet patches since ages. Add them in accordance with
the OpenWRT patch so we can use them when we add ethernet
support.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-nas4220b.dts | 13 +++++++++++++
arch/arm/boot/dts/gemini-rut1xx.dts | 13 +++++++++++++
arch/arm/boot/dts/gemini-wbd111.dts | 13 +++++++++++++
arch/arm/boot/dts/gemini-wbd222.dts | 18 ++++++++++++++++++
4 files changed, 57 insertions(+)
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -64,6 +64,19 @@
};
};
+ mdio0: ethernet-phy {
+ compatible = "virtual,mdio-gpio";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
soc {
flash@30000000 {
status = "okay";
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -58,6 +58,19 @@
};
};
+ mdio0: ethernet-phy {
+ compatible = "virtual,mdio-gpio";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
soc {
flash@30000000 {
status = "okay";
--- a/arch/arm/boot/dts/gemini-wbd111.dts
+++ b/arch/arm/boot/dts/gemini-wbd111.dts
@@ -69,6 +69,19 @@
};
};
+ mdio0: ethernet-phy {
+ compatible = "virtual,mdio-gpio";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
soc {
flash@30000000 {
status = "okay";
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -69,6 +69,24 @@
};
};
+ mdio0: ethernet-phy {
+ compatible = "virtual,mdio-gpio";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+
+ phy1: ethernet-phy@3 {
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
soc {
flash@30000000 {
status = "okay";

272
target/linux/gemini/patches-4.14/0013-ARM-dts-Add-basic-devicetree-for-D-Link-DNS-313.patch Normal file
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@ -0,0 +1,272 @@
From 2f08de94f207a4347053e1faa22c9a310c9c61b0 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 17 Nov 2017 16:36:32 +0100
Subject: [PATCH 13/31] ARM: dts: Add basic devicetree for D-Link DNS-313
This adds a basic device tree for the D-Link DNS-313
NAS enclosure. This device has a thermal sensor and a
fan so we add a thermal zone for the chassis in the
device tree based on information from the product.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 241 +++++++++++++++++++++++++++++
2 files changed, 242 insertions(+)
create mode 100644 arch/arm/boot/dts/gemini-dlink-dns-313.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -185,6 +185,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5800-peach-pi.dtb
dtb-$(CONFIG_ARCH_GEMINI) += \
gemini-dlink-dir-685.dtb \
+ gemini-dlink-dns-313.dtb \
gemini-nas4220b.dtb \
gemini-rut1xx.dtb \
gemini-sq201.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -0,0 +1,241 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure
+ */
+
+/dts-v1/;
+
+#include "gemini.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/thermal/thermal.h>
+
+/ {
+ model = "D-Link DNS-313 1-Bay Network Storage Enclosure";
+ compatible = "dlink,dir-313", "cortina,gemini";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory {
+ /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */
+ device_type = "memory";
+ reg = <0x00000000 0x4000000>;
+ };
+
+ aliases {
+ mdio-gpio0 = &mdio0;
+ };
+
+ chosen {
+ stdout-path = "uart0:19200n8";
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ button-esc {
+ debounce_interval = <50>;
+ wakeup-source;
+ linux,code = <KEY_ESC>;
+ label = "reset";
+ gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-power {
+ label = "dns313:blue:power";
+ gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+ led-disk-blue {
+ label = "dns313:blue:disk";
+ gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ led-disk-green {
+ label = "dns313:green:disk";
+ gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ linux,default-trigger = "ide-disk";
+ /* Ideally should activate while reading */
+ };
+ led-disk-red {
+ label = "dns313:red:disk";
+ gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ /* Ideally should activate while writing */
+ };
+ };
+
+ /*
+ * This is a ADDA AD0405GB-G73 fan @3000 and 6000 RPM.
+ */
+ fan0: gpio-fan {
+ compatible = "gpio-fan";
+ gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>,
+ <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ gpio-fan,speed-map = <0 0>, <3000 1>, <6000 2>;
+ cooling-min-level = <0>;
+ cooling-max-level = <2>;
+ #cooling-cells = <2>;
+ };
+
+
+ /* Global Mixed-Mode Technology G751 mounted on GPIO I2C */
+ gpio-i2c {
+ compatible = "i2c-gpio";
+ sda-gpios = <&gpio0 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio0 16 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ g751: temperature-sensor@48 {
+ compatible = "gmt,g751";
+ reg = <0x48>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
+
+ thermal-zones {
+ chassis-thermal {
+ /* Poll every 20 seconds */
+ polling-delay = <20000>;
+ /* Poll every 2nd second when cooling */
+ polling-delay-passive = <2000>;
+
+ thermal-sensors = <&g751>;
+
+ /* Tripping points from the fan.script in the rootfs */
+ trips {
+ chassis_alert0: chassis-alert0 {
+ /* At 43 degrees turn on low speed */
+ temperature = <43000>;
+ hysteresis = <3000>;
+ type = "active";
+ };
+ chassis_alert1: chassis-alert1 {
+ /* At 47 degrees turn on high speed */
+ temperature = <47000>;
+ hysteresis = <3000>;
+ type = "active";
+ };
+ chassis_crit: chassis-crit {
+ /* Just shut down at 60 degrees */
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&chassis_alert0>;
+ cooling-device = <&fan0 1 1>;
+ };
+ map1 {
+ trip = <&chassis_alert1>;
+ cooling-device = <&fan0 2 2>;
+ };
+ };
+ };
+ };
+
+ mdio0: ethernet-phy {
+ compatible = "virtual,mdio-gpio";
+ /* Uses MDC and MDIO */
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* This is a Realtek RTL8211B Gigabit ethernet transceiver */
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ soc {
+ flash@30000000 {
+ status = "okay";
+ /* 512KB of flash */
+ reg = <0x30000000 0x00080000>;
+
+ /*
+ * This "RedBoot" is the Storlink derivative.
+ */
+ partition@0 {
+ label = "RedBoot";
+ reg = <0x00000000 0x00040000>;
+ read-only;
+ };
+ partition@40000 {
+ label = "MTD1";
+ reg = <0x00040000 0x00020000>;
+ read-only;
+ };
+ partition@60000 {
+ label = "MTD2";
+ reg = <0x00060000 0x00020000>;
+ read-only;
+ };
+ };
+
+ syscon: syscon@40000000 {
+ pinctrl {
+ /*
+ */
+ gpio0_default_pins: pinctrl-gpio0 {
+ mux {
+ function = "gpio0";
+ groups =
+ /* Used by LEDs conflicts ICE */
+ "gpio0bgrp",
+ /* Used by ? conflicts ICE */
+ "gpio0cgrp",
+ /*
+ * Used by fan & G751, conflicts LPC,
+ * UART modem lines, SSP
+ */
+ "gpio0egrp",
+ /* Used by G751 */
+ "gpio0fgrp",
+ /* Used by MDIO */
+ "gpio0igrp";
+ };
+ };
+ gpio1_default_pins: pinctrl-gpio1 {
+ mux {
+ function = "gpio1";
+ /* Used by "reset" button */
+ groups = "gpio1dgrp";
+ };
+ };
+ };
+ };
+
+ sata: sata@46000000 {
+ /* The ROM uses this muxmode */
+ cortina,gemini-ata-muxmode = <3>;
+ cortina,gemini-enable-sata-bridge;
+ status = "okay";
+ };
+
+ gpio0: gpio@4d000000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio0_default_pins>;
+ };
+
+ gpio1: gpio@4e000000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio1_default_pins>;
+ };
+
+ ata@63000000 {
+ status = "okay";
+ };
+ };
+};

27
target/linux/gemini/patches-4.14/0014-ARM-dts-Flags-D-Link-DIR-685-I2C-bus-gpios.patch Normal file
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@ -0,0 +1,27 @@
From eed839dc713fdb7b2579dbfea41d676386b8259b Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sun, 10 Sep 2017 20:02:33 +0200
Subject: [PATCH 14/31] ARM: dts: Flags D-Link DIR-685 I2C bus gpios
These GPIOs are used in open drain mode, so make sure to
flag them as such. Use the new separate scl/sda line
GPIO bindings.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -99,8 +99,8 @@
gpio-i2c {
compatible = "i2c-gpio";
/* Collides with ICE */
- gpios = <&gpio0 5 0>, /* SDA */
- <&gpio0 6 0>; /* SCL */
+ sda-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
#address-cells = <1>;
#size-cells = <0>;

74
target/linux/gemini/patches-4.14/0015-ARM-dts-Add-PCI-to-WBD111-and-WBD222.patch Normal file
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@ -0,0 +1,74 @@
From dec551d2301f71a692ed1729a323c8259d36f849 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Wed, 11 Oct 2017 19:49:13 +0200
Subject: [PATCH 15/31] ARM: dts: Add PCI to WBD111 and WBD222
These two boards have mini-PCI card slots, so enable PCI
on both of them.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-wbd111.dts | 22 ++++++++++++++++++++++
arch/arm/boot/dts/gemini-wbd222.dts | 22 ++++++++++++++++++++++
2 files changed, 44 insertions(+)
--- a/arch/arm/boot/dts/gemini-wbd111.dts
+++ b/arch/arm/boot/dts/gemini-wbd111.dts
@@ -138,5 +138,27 @@
pinctrl-names = "default";
pinctrl-0 = <&gpio0_default_pins>;
};
+
+ pci@50000000 {
+ status = "okay";
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map =
+ <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
+ <0x4800 0 0 2 &pci_intc 1>,
+ <0x4800 0 0 3 &pci_intc 2>,
+ <0x4800 0 0 4 &pci_intc 3>,
+ <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
+ <0x5000 0 0 2 &pci_intc 2>,
+ <0x5000 0 0 3 &pci_intc 3>,
+ <0x5000 0 0 4 &pci_intc 0>,
+ <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
+ <0x5800 0 0 2 &pci_intc 3>,
+ <0x5800 0 0 3 &pci_intc 0>,
+ <0x5800 0 0 4 &pci_intc 1>,
+ <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
+ <0x6000 0 0 2 &pci_intc 0>,
+ <0x6000 0 0 3 &pci_intc 1>,
+ <0x6000 0 0 4 &pci_intc 2>;
+ };
};
};
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -143,5 +143,27 @@
pinctrl-names = "default";
pinctrl-0 = <&gpio0_default_pins>;
};
+
+ pci@50000000 {
+ status = "okay";
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map =
+ <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
+ <0x4800 0 0 2 &pci_intc 1>,
+ <0x4800 0 0 3 &pci_intc 2>,
+ <0x4800 0 0 4 &pci_intc 3>,
+ <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
+ <0x5000 0 0 2 &pci_intc 2>,
+ <0x5000 0 0 3 &pci_intc 3>,
+ <0x5000 0 0 4 &pci_intc 0>,
+ <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
+ <0x5800 0 0 2 &pci_intc 3>,
+ <0x5800 0 0 3 &pci_intc 0>,
+ <0x5800 0 0 4 &pci_intc 1>,
+ <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
+ <0x6000 0 0 2 &pci_intc 0>,
+ <0x6000 0 0 3 &pci_intc 1>,
+ <0x6000 0 0 4 &pci_intc 2>;
+ };
};
};

113
target/linux/gemini/patches-4.14/0016-ARM-dts-Add-TVE-TVC-and-ILI9322-panel-to-DIR-685.patch Normal file
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@ -0,0 +1,113 @@
From 9d3b968d13ba1eecaf22d5824cf8fd270c061534 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sat, 15 Jul 2017 21:02:06 +0200
Subject: [PATCH 16/31] ARM: dts: Add TVE/TVC and ILI9322 panel to DIR-685
This adds the TVE200/TVC TV-encoder and the Ilitek ILI9322 panel
to the DIR-685 device tree.
This brings graphics to this funky router and it is possible to
even run a console on its tiny screen.
Incidentally this requires us to disable the access to the
parallel (NOR) flash, as the communication pins to the panel
are shared with the flash memory.
To access the flash, a separate kernel with the panel disabled
and the flash enabled should be booted. The pin control selecting
whether to use the lines cannot be altered at runtime due to
hardware constraints.
Cc: David Lechner <david@lechnology.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 63 +++++++++++++++++++++++++++++-
1 file changed, 62 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -45,6 +45,47 @@
};
};
+ vdisp: regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "display-power";
+ regulator-min-microvolt = <3600000>;
+ regulator-max-microvolt = <3600000>;
+ /* Collides with LCD E */
+ gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ spi {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Collides with IDE pins, that's cool (we do not use them) */
+ gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+ /* Collides with pflash CE1, not so cool */
+ cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+
+ panel: display@0 {
+ compatible = "dlink,dir-685-panel", "ilitek,ili9322";
+ reg = <0>;
+ /* 50 ns min period = 20 MHz */
+ spi-max-frequency = <20000000>;
+ spi-cpol; /* Clock active low */
+ vcc-supply = <&vdisp>;
+ iovcc-supply = <&vdisp>;
+ vci-supply = <&vdisp>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&display_out>;
+ };
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
led-wps {
@@ -115,7 +156,16 @@
soc {
flash@30000000 {
- status = "okay";
+ /*
+ * Flash access is by default disabled, because it
+ * collides with the Chip Enable signal for the display
+ * panel, that reuse the parallel flash Chip Select 1
+ * (CS1). Enabling flash makes graphics stop working.
+ *
+ * We might be able to hack around this by letting
+ * GPIO poke around in the flash controller registers.
+ */
+ /* status = "okay"; */
/* 32MB of flash */
reg = <0x30000000 0x02000000>;
@@ -242,5 +292,16 @@
ata@63000000 {
status = "okay";
};
+
+ display-controller@6a000000 {
+ status = "okay";
+
+ port@0 {
+ reg = <0>;
+ display_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
};
};

88
target/linux/gemini/patches-4.14/0017-watchdog-gemini-ftwdt010-rename-DT-bindings.patch Normal file
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@ -0,0 +1,88 @@
From d73f6cc09bcbe258a72c06899215d1a3e8a7686d Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 16 Oct 2017 22:54:23 +0200
Subject: [PATCH 17/31] watchdog: gemini/ftwdt010: rename DT bindings
The device tree bindings are in two copies and also should be
consolidated into a single Faraday Technology FTWDT010
binding since we uncovered that this IP part is a standard
IP from Faraday.
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
---
.../bindings/watchdog/cortina,gemini-watchdog.txt | 17 -----------------
...{cortina,gemin-watchdog.txt => faraday,ftwdt010.txt} | 11 ++++++++---
2 files changed, 8 insertions(+), 20 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/watchdog/cortina,gemini-watchdog.txt
rename Documentation/devicetree/bindings/watchdog/{cortina,gemin-watchdog.txt => faraday,ftwdt010.txt} (55%)
--- a/Documentation/devicetree/bindings/watchdog/cortina,gemini-watchdog.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-Cortina Systems Gemini SoC Watchdog
-
-Required properties:
-- compatible : must be "cortina,gemini-watchdog"
-- reg : shall contain base register location and length
-- interrupts : shall contain the interrupt for the watchdog
-
-Optional properties:
-- timeout-sec : the default watchdog timeout in seconds.
-
-Example:
-
-watchdog@41000000 {
- compatible = "cortina,gemini-watchdog";
- reg = <0x41000000 0x1000>;
- interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
-};
--- a/Documentation/devicetree/bindings/watchdog/cortina,gemin-watchdog.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-Cortina Systems Gemini SoC Watchdog
-
-Required properties:
-- compatible : must be "cortina,gemini-watchdog"
-- reg : shall contain base register location and length
-- interrupts : shall contain the interrupt for the watchdog
-
-Optional properties:
-- timeout-sec : the default watchdog timeout in seconds.
-
-Example:
-
-watchdog@41000000 {
- compatible = "cortina,gemini-watchdog";
- reg = <0x41000000 0x1000>;
- interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
-};
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.txt
@@ -0,0 +1,22 @@
+Faraday Technology FTWDT010 watchdog
+
+This is an IP part from Faraday Technology found in the Gemini
+SoCs and others.
+
+Required properties:
+- compatible : must be one of
+ "faraday,ftwdt010"
+ "cortina,gemini-watchdog", "faraday,ftwdt010"
+- reg : shall contain base register location and length
+- interrupts : shall contain the interrupt for the watchdog
+
+Optional properties:
+- timeout-sec : the default watchdog timeout in seconds.
+
+Example:
+
+watchdog@41000000 {
+ compatible = "faraday,ftwdt010";
+ reg = <0x41000000 0x1000>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+};

527
target/linux/gemini/patches-4.14/0018-watchdog-gemini-ftwdt010-rename-driver-and-symbols.patch Normal file
View File

@ -0,0 +1,527 @@
From c197a5a04d658da490de08636066a6bdbebf16c5 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 16 Oct 2017 22:54:24 +0200
Subject: [PATCH 18/31] watchdog: gemini/ftwdt010: rename driver and symbols
This renames all the driver files and symbols for the Gemini
watchdog to FTWDT010 as it has been revealed that this IP block
is a generic watchdog timer from Faraday Technology used in
several SoC designs.
Select this driver by default for the Gemini, it is a sensible
driver to always have enabled.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
---
drivers/watchdog/Kconfig | 14 +--
drivers/watchdog/Makefile | 2 +-
drivers/watchdog/{gemini_wdt.c => ftwdt010_wdt.c} | 117 +++++++++++-----------
3 files changed, 68 insertions(+), 65 deletions(-)
rename drivers/watchdog/{gemini_wdt.c => ftwdt010_wdt.c} (50%)
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -321,16 +321,18 @@ config 977_WATCHDOG
Not sure? It's safe to say N.
-config GEMINI_WATCHDOG
- tristate "Gemini watchdog"
- depends on ARCH_GEMINI
+config FTWDT010_WATCHDOG
+ tristate "Faraday Technology FTWDT010 watchdog"
+ depends on ARM || COMPILE_TEST
select WATCHDOG_CORE
+ default ARCH_GEMINI
help
- Say Y here if to include support for the watchdog timer
- embedded in the Cortina Systems Gemini family of devices.
+ Say Y here if to include support for the Faraday Technology
+ FTWDT010 watchdog timer embedded in the Cortina Systems Gemini
+ family of devices.
To compile this driver as a module, choose M here: the
- module will be called gemini_wdt.
+ module will be called ftwdt010_wdt.
config IXP4XX_WATCHDOG
tristate "IXP4xx Watchdog"
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -46,7 +46,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.
obj-$(CONFIG_TWL4030_WATCHDOG) += twl4030_wdt.o
obj-$(CONFIG_21285_WATCHDOG) += wdt285.o
obj-$(CONFIG_977_WATCHDOG) += wdt977.o
-obj-$(CONFIG_GEMINI_WATCHDOG) += gemini_wdt.o
+obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
obj-$(CONFIG_IXP4XX_WATCHDOG) += ixp4xx_wdt.o
obj-$(CONFIG_KS8695_WATCHDOG) += ks8695_wdt.o
obj-$(CONFIG_S3C2410_WATCHDOG) += s3c2410_wdt.o
--- a/drivers/watchdog/gemini_wdt.c
+++ /dev/null
@@ -1,229 +0,0 @@
-/*
- * Watchdog driver for Cortina Systems Gemini SoC
- *
- * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
- *
- * Inspired by the out-of-tree drivers from OpenWRT:
- * Copyright (C) 2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/bitops.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/watchdog.h>
-
-#define GEMINI_WDCOUNTER 0x0
-#define GEMINI_WDLOAD 0x4
-#define GEMINI_WDRESTART 0x8
-#define GEMINI_WDCR 0xC
-
-#define WDRESTART_MAGIC 0x5AB9
-
-#define WDCR_CLOCK_5MHZ BIT(4)
-#define WDCR_SYS_RST BIT(1)
-#define WDCR_ENABLE BIT(0)
-
-#define WDT_CLOCK 5000000 /* 5 MHz */
-
-struct gemini_wdt {
- struct watchdog_device wdd;
- struct device *dev;
- void __iomem *base;
-};
-
-static inline
-struct gemini_wdt *to_gemini_wdt(struct watchdog_device *wdd)
-{
- return container_of(wdd, struct gemini_wdt, wdd);
-}
-
-static int gemini_wdt_start(struct watchdog_device *wdd)
-{
- struct gemini_wdt *gwdt = to_gemini_wdt(wdd);
-
- writel(wdd->timeout * WDT_CLOCK, gwdt->base + GEMINI_WDLOAD);
- writel(WDRESTART_MAGIC, gwdt->base + GEMINI_WDRESTART);
- /* set clock before enabling */
- writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST,
- gwdt->base + GEMINI_WDCR);
- writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST | WDCR_ENABLE,
- gwdt->base + GEMINI_WDCR);
-
- return 0;
-}
-
-static int gemini_wdt_stop(struct watchdog_device *wdd)
-{
- struct gemini_wdt *gwdt = to_gemini_wdt(wdd);
-
- writel(0, gwdt->base + GEMINI_WDCR);
-
- return 0;
-}
-
-static int gemini_wdt_ping(struct watchdog_device *wdd)
-{
- struct gemini_wdt *gwdt = to_gemini_wdt(wdd);
-
- writel(WDRESTART_MAGIC, gwdt->base + GEMINI_WDRESTART);
-
- return 0;
-}
-
-static int gemini_wdt_set_timeout(struct watchdog_device *wdd,
- unsigned int timeout)
-{
- wdd->timeout = timeout;
- if (watchdog_active(wdd))
- gemini_wdt_start(wdd);
-
- return 0;
-}
-
-static irqreturn_t gemini_wdt_interrupt(int irq, void *data)
-{
- struct gemini_wdt *gwdt = data;
-
- watchdog_notify_pretimeout(&gwdt->wdd);
-
- return IRQ_HANDLED;
-}
-
-static const struct watchdog_ops gemini_wdt_ops = {
- .start = gemini_wdt_start,
- .stop = gemini_wdt_stop,
- .ping = gemini_wdt_ping,
- .set_timeout = gemini_wdt_set_timeout,
- .owner = THIS_MODULE,
-};
-
-static const struct watchdog_info gemini_wdt_info = {
- .options = WDIOF_KEEPALIVEPING
- | WDIOF_MAGICCLOSE
- | WDIOF_SETTIMEOUT,
- .identity = KBUILD_MODNAME,
-};
-
-
-static int gemini_wdt_probe(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
- struct resource *res;
- struct gemini_wdt *gwdt;
- unsigned int reg;
- int irq;
- int ret;
-
- gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL);
- if (!gwdt)
- return -ENOMEM;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- gwdt->base = devm_ioremap_resource(dev, res);
- if (IS_ERR(gwdt->base))
- return PTR_ERR(gwdt->base);
-
- irq = platform_get_irq(pdev, 0);
- if (!irq)
- return -EINVAL;
-
- gwdt->dev = dev;
- gwdt->wdd.info = &gemini_wdt_info;
- gwdt->wdd.ops = &gemini_wdt_ops;
- gwdt->wdd.min_timeout = 1;
- gwdt->wdd.max_timeout = 0xFFFFFFFF / WDT_CLOCK;
- gwdt->wdd.parent = dev;
-
- /*
- * If 'timeout-sec' unspecified in devicetree, assume a 13 second
- * default.
- */
- gwdt->wdd.timeout = 13U;
- watchdog_init_timeout(&gwdt->wdd, 0, dev);
-
- reg = readw(gwdt->base + GEMINI_WDCR);
- if (reg & WDCR_ENABLE) {
- /* Watchdog was enabled by the bootloader, disable it. */
- reg &= ~WDCR_ENABLE;
- writel(reg, gwdt->base + GEMINI_WDCR);
- }
-
- ret = devm_request_irq(dev, irq, gemini_wdt_interrupt, 0,
- "watchdog bark", gwdt);
- if (ret)
- return ret;
-
- ret = devm_watchdog_register_device(dev, &gwdt->wdd);
- if (ret) {
- dev_err(&pdev->dev, "failed to register watchdog\n");
- return ret;
- }
-
- /* Set up platform driver data */
- platform_set_drvdata(pdev, gwdt);
- dev_info(dev, "Gemini watchdog driver enabled\n");
-
- return 0;
-}
-
-static int __maybe_unused gemini_wdt_suspend(struct device *dev)
-{
- struct gemini_wdt *gwdt = dev_get_drvdata(dev);
- unsigned int reg;
-
- reg = readw(gwdt->base + GEMINI_WDCR);
- reg &= ~WDCR_ENABLE;
- writel(reg, gwdt->base + GEMINI_WDCR);
-
- return 0;
-}
-
-static int __maybe_unused gemini_wdt_resume(struct device *dev)
-{
- struct gemini_wdt *gwdt = dev_get_drvdata(dev);
- unsigned int reg;
-
- if (watchdog_active(&gwdt->wdd)) {
- reg = readw(gwdt->base + GEMINI_WDCR);
- reg |= WDCR_ENABLE;
- writel(reg, gwdt->base + GEMINI_WDCR);
- }
-
- return 0;
-}
-
-static const struct dev_pm_ops gemini_wdt_dev_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OPS(gemini_wdt_suspend,
- gemini_wdt_resume)
-};
-
-#ifdef CONFIG_OF
-static const struct of_device_id gemini_wdt_match[] = {
- { .compatible = "cortina,gemini-watchdog" },
- {},
-};
-MODULE_DEVICE_TABLE(of, gemini_wdt_match);
-#endif
-
-static struct platform_driver gemini_wdt_driver = {
- .probe = gemini_wdt_probe,
- .driver = {
- .name = "gemini-wdt",
- .of_match_table = of_match_ptr(gemini_wdt_match),
- .pm = &gemini_wdt_dev_pm_ops,
- },
-};
-module_platform_driver(gemini_wdt_driver);
-MODULE_AUTHOR("Linus Walleij");
-MODULE_DESCRIPTION("Watchdog driver for Gemini");
-MODULE_LICENSE("GPL");
--- /dev/null
+++ b/drivers/watchdog/ftwdt010_wdt.c
@@ -0,0 +1,230 @@
+/*
+ * Watchdog driver for Faraday Technology FTWDT010
+ *
+ * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
+ *
+ * Inspired by the out-of-tree drivers from OpenWRT:
+ * Copyright (C) 2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/bitops.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/watchdog.h>
+
+#define FTWDT010_WDCOUNTER 0x0
+#define FTWDT010_WDLOAD 0x4
+#define FTWDT010_WDRESTART 0x8
+#define FTWDT010_WDCR 0xC
+
+#define WDRESTART_MAGIC 0x5AB9
+
+#define WDCR_CLOCK_5MHZ BIT(4)
+#define WDCR_SYS_RST BIT(1)
+#define WDCR_ENABLE BIT(0)
+
+#define WDT_CLOCK 5000000 /* 5 MHz */
+
+struct ftwdt010_wdt {
+ struct watchdog_device wdd;
+ struct device *dev;
+ void __iomem *base;
+};
+
+static inline
+struct ftwdt010_wdt *to_ftwdt010_wdt(struct watchdog_device *wdd)
+{
+ return container_of(wdd, struct ftwdt010_wdt, wdd);
+}
+
+static int ftwdt010_wdt_start(struct watchdog_device *wdd)
+{
+ struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
+
+ writel(wdd->timeout * WDT_CLOCK, gwdt->base + FTWDT010_WDLOAD);
+ writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
+ /* set clock before enabling */
+ writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST,
+ gwdt->base + FTWDT010_WDCR);
+ writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST | WDCR_ENABLE,
+ gwdt->base + FTWDT010_WDCR);
+
+ return 0;
+}
+
+static int ftwdt010_wdt_stop(struct watchdog_device *wdd)
+{
+ struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
+
+ writel(0, gwdt->base + FTWDT010_WDCR);
+
+ return 0;
+}
+
+static int ftwdt010_wdt_ping(struct watchdog_device *wdd)
+{
+ struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
+
+ writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
+
+ return 0;
+}
+
+static int ftwdt010_wdt_set_timeout(struct watchdog_device *wdd,
+ unsigned int timeout)
+{
+ wdd->timeout = timeout;
+ if (watchdog_active(wdd))
+ ftwdt010_wdt_start(wdd);
+
+ return 0;
+}
+
+static irqreturn_t ftwdt010_wdt_interrupt(int irq, void *data)
+{
+ struct ftwdt010_wdt *gwdt = data;
+
+ watchdog_notify_pretimeout(&gwdt->wdd);
+
+ return IRQ_HANDLED;
+}
+
+static const struct watchdog_ops ftwdt010_wdt_ops = {
+ .start = ftwdt010_wdt_start,
+ .stop = ftwdt010_wdt_stop,
+ .ping = ftwdt010_wdt_ping,
+ .set_timeout = ftwdt010_wdt_set_timeout,
+ .owner = THIS_MODULE,
+};
+
+static const struct watchdog_info ftwdt010_wdt_info = {
+ .options = WDIOF_KEEPALIVEPING
+ | WDIOF_MAGICCLOSE
+ | WDIOF_SETTIMEOUT,
+ .identity = KBUILD_MODNAME,
+};
+
+
+static int ftwdt010_wdt_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ struct ftwdt010_wdt *gwdt;
+ unsigned int reg;
+ int irq;
+ int ret;
+
+ gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL);
+ if (!gwdt)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ gwdt->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(gwdt->base))
+ return PTR_ERR(gwdt->base);
+
+ irq = platform_get_irq(pdev, 0);
+ if (!irq)
+ return -EINVAL;
+
+ gwdt->dev = dev;
+ gwdt->wdd.info = &ftwdt010_wdt_info;
+ gwdt->wdd.ops = &ftwdt010_wdt_ops;
+ gwdt->wdd.min_timeout = 1;
+ gwdt->wdd.max_timeout = 0xFFFFFFFF / WDT_CLOCK;
+ gwdt->wdd.parent = dev;
+
+ /*
+ * If 'timeout-sec' unspecified in devicetree, assume a 13 second
+ * default.
+ */
+ gwdt->wdd.timeout = 13U;
+ watchdog_init_timeout(&gwdt->wdd, 0, dev);
+
+ reg = readw(gwdt->base + FTWDT010_WDCR);
+ if (reg & WDCR_ENABLE) {
+ /* Watchdog was enabled by the bootloader, disable it. */
+ reg &= ~WDCR_ENABLE;
+ writel(reg, gwdt->base + FTWDT010_WDCR);
+ }
+
+ ret = devm_request_irq(dev, irq, ftwdt010_wdt_interrupt, 0,
+ "watchdog bark", gwdt);
+ if (ret)
+ return ret;
+
+ ret = devm_watchdog_register_device(dev, &gwdt->wdd);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to register watchdog\n");
+ return ret;
+ }
+
+ /* Set up platform driver data */
+ platform_set_drvdata(pdev, gwdt);
+ dev_info(dev, "FTWDT010 watchdog driver enabled\n");
+
+ return 0;
+}
+
+static int __maybe_unused ftwdt010_wdt_suspend(struct device *dev)
+{
+ struct ftwdt010_wdt *gwdt = dev_get_drvdata(dev);
+ unsigned int reg;
+
+ reg = readw(gwdt->base + FTWDT010_WDCR);
+ reg &= ~WDCR_ENABLE;
+ writel(reg, gwdt->base + FTWDT010_WDCR);
+
+ return 0;
+}
+
+static int __maybe_unused ftwdt010_wdt_resume(struct device *dev)
+{
+ struct ftwdt010_wdt *gwdt = dev_get_drvdata(dev);
+ unsigned int reg;
+
+ if (watchdog_active(&gwdt->wdd)) {
+ reg = readw(gwdt->base + FTWDT010_WDCR);
+ reg |= WDCR_ENABLE;
+ writel(reg, gwdt->base + FTWDT010_WDCR);
+ }
+
+ return 0;
+}
+
+static const struct dev_pm_ops ftwdt010_wdt_dev_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(ftwdt010_wdt_suspend,
+ ftwdt010_wdt_resume)
+};
+
+#ifdef CONFIG_OF
+static const struct of_device_id ftwdt010_wdt_match[] = {
+ { .compatible = "faraday,ftwdt010" },
+ { .compatible = "cortina,gemini-watchdog" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, ftwdt010_wdt_match);
+#endif
+
+static struct platform_driver ftwdt010_wdt_driver = {
+ .probe = ftwdt010_wdt_probe,
+ .driver = {
+ .name = "ftwdt010-wdt",
+ .of_match_table = of_match_ptr(ftwdt010_wdt_match),
+ .pm = &ftwdt010_wdt_dev_pm_ops,
+ },
+};
+module_platform_driver(ftwdt010_wdt_driver);
+MODULE_AUTHOR("Linus Walleij");
+MODULE_DESCRIPTION("Watchdog driver for Faraday Technology FTWDT010");
+MODULE_LICENSE("GPL");

93
target/linux/gemini/patches-4.14/0019-watchdog-ftwdt010-Make-interrupt-optional.patch Normal file
View File

@ -0,0 +1,93 @@
From 4347a0b0699989b889857c9d4ccfbce339859f13 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 16 Oct 2017 22:54:25 +0200
Subject: [PATCH 19/31] watchdog: ftwdt010: Make interrupt optional
The Moxart does not appear to be using the interrupt from the
watchdog timer, maybe it's not even routed, so as to support
more architectures with this driver, make the interrupt
optional.
While we are at it: actually enable the use of the interrupt
if present by setting the right bit in the control register
and define the missing control register bits.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
---
drivers/watchdog/ftwdt010_wdt.c | 30 ++++++++++++++++++------------
1 file changed, 18 insertions(+), 12 deletions(-)
--- a/drivers/watchdog/ftwdt010_wdt.c
+++ b/drivers/watchdog/ftwdt010_wdt.c
@@ -30,6 +30,8 @@
#define WDRESTART_MAGIC 0x5AB9
#define WDCR_CLOCK_5MHZ BIT(4)
+#define WDCR_WDEXT BIT(3)
+#define WDCR_WDINTR BIT(2)
#define WDCR_SYS_RST BIT(1)
#define WDCR_ENABLE BIT(0)
@@ -39,6 +41,7 @@ struct ftwdt010_wdt {
struct watchdog_device wdd;
struct device *dev;
void __iomem *base;
+ bool has_irq;
};
static inline
@@ -50,14 +53,17 @@ struct ftwdt010_wdt *to_ftwdt010_wdt(str
static int ftwdt010_wdt_start(struct watchdog_device *wdd)
{
struct ftwdt010_wdt *gwdt = to_ftwdt010_wdt(wdd);
+ u32 enable;
writel(wdd->timeout * WDT_CLOCK, gwdt->base + FTWDT010_WDLOAD);
writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART);
/* set clock before enabling */
- writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST,
- gwdt->base + FTWDT010_WDCR);
- writel(WDCR_CLOCK_5MHZ | WDCR_SYS_RST | WDCR_ENABLE,
- gwdt->base + FTWDT010_WDCR);
+ enable = WDCR_CLOCK_5MHZ | WDCR_SYS_RST;
+ writel(enable, gwdt->base + FTWDT010_WDCR);
+ if (gwdt->has_irq)
+ enable |= WDCR_WDINTR;
+ enable |= WDCR_ENABLE;
+ writel(enable, gwdt->base + FTWDT010_WDCR);
return 0;
}
@@ -133,10 +139,6 @@ static int ftwdt010_wdt_probe(struct pla
if (IS_ERR(gwdt->base))
return PTR_ERR(gwdt->base);
- irq = platform_get_irq(pdev, 0);
- if (!irq)
- return -EINVAL;
-
gwdt->dev = dev;
gwdt->wdd.info = &ftwdt010_wdt_info;
gwdt->wdd.ops = &ftwdt010_wdt_ops;
@@ -158,10 +160,14 @@ static int ftwdt010_wdt_probe(struct pla
writel(reg, gwdt->base + FTWDT010_WDCR);
}
- ret = devm_request_irq(dev, irq, ftwdt010_wdt_interrupt, 0,
- "watchdog bark", gwdt);
- if (ret)
- return ret;
+ irq = platform_get_irq(pdev, 0);
+ if (irq) {
+ ret = devm_request_irq(dev, irq, ftwdt010_wdt_interrupt, 0,
+ "watchdog bark", gwdt);
+ if (ret)
+ return ret;
+ gwdt->has_irq = true;
+ }
ret = devm_watchdog_register_device(dev, &gwdt->wdd);
if (ret) {

113
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@ -0,0 +1,113 @@
From b0a88a861b036124ef2d6acfe6dd87cfde63e750 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 22 Dec 2017 00:19:08 +0100
Subject: [PATCH 20/31] soc: Add SoC driver for Gemini
This adds an SoC driver for the Gemini. Currently there
is only one thing not fitting into any other framework,
and that is the bus arbitration setting.
All Gemini vendor trees seem to be setting this register to
exactly the same arbitration so we just add a small code
snippet to do this at subsys_init() time before any other
drivers kick in.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/soc/Makefile | 1 +
drivers/soc/gemini/Makefile | 2 ++
drivers/soc/gemini/soc-gemini.c | 71 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 74 insertions(+)
create mode 100644 drivers/soc/gemini/Makefile
create mode 100644 drivers/soc/gemini/soc-gemini.c
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -9,6 +9,7 @@ obj-y += bcm/
obj-$(CONFIG_ARCH_DOVE) += dove/
obj-$(CONFIG_MACH_DOVE) += dove/
obj-y += fsl/
+obj-$(CONFIG_ARCH_GEMINI) += gemini/
obj-$(CONFIG_ARCH_MXC) += imx/
obj-$(CONFIG_SOC_XWAY) += lantiq/
obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
--- /dev/null
+++ b/drivers/soc/gemini/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-y += soc-gemini.o
--- /dev/null
+++ b/drivers/soc/gemini/soc-gemini.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 Linaro Ltd.
+ *
+ * Author: Linus Walleij <linus.walleij@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+#include <linux/of.h>
+
+#define GLOBAL_WORD_ID 0x00
+#define GEMINI_GLOBAL_ARB1_CTRL 0x2c
+#define GEMINI_ARB1_BURST_MASK GENMASK(21, 16)
+#define GEMINI_ARB1_BURST_SHIFT 16
+/* These all define the priority on the BUS2 backplane */
+#define GEMINI_ARB1_PRIO_MASK GENMASK(9, 0)
+#define GEMINI_ARB1_DMAC_HIGH_PRIO BIT(0)
+#define GEMINI_ARB1_IDE_HIGH_PRIO BIT(1)
+#define GEMINI_ARB1_RAID_HIGH_PRIO BIT(2)
+#define GEMINI_ARB1_SECURITY_HIGH_PRIO BIT(3)
+#define GEMINI_ARB1_GMAC0_HIGH_PRIO BIT(4)
+#define GEMINI_ARB1_GMAC1_HIGH_PRIO BIT(5)
+#define GEMINI_ARB1_USB0_HIGH_PRIO BIT(6)
+#define GEMINI_ARB1_USB1_HIGH_PRIO BIT(7)
+#define GEMINI_ARB1_PCI_HIGH_PRIO BIT(8)
+#define GEMINI_ARB1_TVE_HIGH_PRIO BIT(9)
+
+#define GEMINI_DEFAULT_BURST_SIZE 0x20
+#define GEMINI_DEFAULT_PRIO (GEMINI_ARB1_GMAC0_HIGH_PRIO | \
+ GEMINI_ARB1_GMAC1_HIGH_PRIO)
+
+static int __init gemini_soc_init(void)
+{
+ struct regmap *map;
+ u32 rev;
+ u32 val;
+ int ret;
+
+ /* Multiplatform guard, only proceed on Gemini */
+ if (!of_machine_is_compatible("cortina,gemini"))
+ return 0;
+
+ map = syscon_regmap_lookup_by_compatible("cortina,gemini-syscon");
+ if (IS_ERR(map))
+ return PTR_ERR(map);
+ ret = regmap_read(map, GLOBAL_WORD_ID, &rev);
+ if (ret)
+ return ret;
+
+ val = (GEMINI_DEFAULT_BURST_SIZE << GEMINI_ARB1_BURST_SHIFT) |
+ GEMINI_DEFAULT_PRIO;
+
+ /* Set up system arbitration */
+ regmap_update_bits(map,
+ GEMINI_GLOBAL_ARB1_CTRL,
+ GEMINI_ARB1_BURST_MASK | GEMINI_ARB1_PRIO_MASK,
+ val);
+
+ pr_info("Gemini SoC %04x revision %02x, set arbitration %08x\n",
+ rev >> 8, rev & 0xff, val);
+
+ return 0;
+}
+subsys_initcall(gemini_soc_init);

119
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@ -0,0 +1,119 @@
From 49bc597009f52ec8970269f6201d3ed415a844ee Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 12 Jan 2018 22:34:23 +0100
Subject: [PATCH 21/31] net: ethernet: Add DT bindings for the Gemini ethernet
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This adds the device tree bindings for the Gemini ethernet
controller. It is pretty straight-forward, using standard
bindings and modelling the two child ports as child devices
under the parent ethernet controller device.
Cc: devicetree@vger.kernel.org
Cc: Tobias Waldvogel <tobias.waldvogel@gmail.com>
Cc: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
.../bindings/net/cortina,gemini-ethernet.txt | 92 ++++++++++++++++++++++
1 file changed, 92 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
@@ -0,0 +1,92 @@
+Cortina Systems Gemini Ethernet Controller
+==========================================
+
+This ethernet controller is found in the Gemini SoC family:
+StorLink SL3512 and SL3516, also known as Cortina Systems
+CS3512 and CS3516.
+
+Required properties:
+- compatible: must be "cortina,gemini-ethernet"
+- reg: must contain the global registers and the V-bit and A-bit
+ memory areas, in total three register sets.
+- syscon: a phandle to the system controller
+- #address-cells: must be specified, must be <1>
+- #size-cells: must be specified, must be <1>
+- ranges: should be state like this giving a 1:1 address translation
+ for the subnodes
+
+The subnodes represents the two ethernet ports in this device.
+They are not independent of each other since they share resources
+in the parent node, and are thus children.
+
+Required subnodes:
+- port0: contains the resources for ethernet port 0
+- port1: contains the resources for ethernet port 1
+
+Required subnode properties:
+- compatible: must be "cortina,gemini-ethernet-port"
+- reg: must contain two register areas: the DMA/TOE memory and
+ the GMAC memory area of the port
+- interrupts: should contain the interrupt line of the port.
+ this is nominally a level interrupt active high.
+- resets: this must provide an SoC-integrated reset line for
+ the port.
+- clocks: this should contain a handle to the PCLK clock for
+ clocking the silicon in this port
+- clock-names: must be "PCLK"
+
+Optional subnode properties:
+- phy-mode: see ethernet.txt
+- phy-handle: see ethernet.txt
+
+Example:
+
+mdio-bus {
+ (...)
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ phy1: ethernet-phy@3 {
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+};
+
+
+ethernet@60000000 {
+ compatible = "cortina,gemini-ethernet";
+ reg = <0x60000000 0x4000>, /* Global registers, queue */
+ <0x60004000 0x2000>, /* V-bit */
+ <0x60006000 0x2000>; /* A-bit */
+ syscon = <&syscon>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gmac0: ethernet-port@0 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */
+ <0x6000a000 0x2000>; /* Port 0 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC0>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC0>;
+ clock-names = "PCLK";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+
+ gmac1: ethernet-port@1 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */
+ <0x6000e000 0x2000>; /* Port 1 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC1>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC1>;
+ clock-names = "PCLK";
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+};

3661
target/linux/gemini/patches-4.14/0022-net-ethernet-Add-a-driver-for-Gemini-gigabit-etherne.patch Normal file
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File diff suppressed because it is too large Load Diff

74
target/linux/gemini/patches-4.14/0023-ARM-dts-Add-ethernet-to-the-Gemini-SoC.patch Normal file
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@ -0,0 +1,74 @@
From 860005c1a2f16aaa33458a7d80c9728b710ae292 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 6 Nov 2017 00:05:28 +0100
Subject: [PATCH 23/31] ARM: dts: Add ethernet to the Gemini SoC
This adds the Gemini ethernet node to the Gemini SoC.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 43 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -114,9 +114,16 @@
};
};
gmii_default_pins: pinctrl-gmii {
+ /*
+ * Only activate GMAC0 by default since
+ * GMAC1 will overlap with 8 GPIO lines
+ * gpio2a, gpio2b. Overlay groups with
+ * "gmii_gmac0_grp", "gmii_gmac1_grp" for
+ * both ethernet interfaces.
+ */
mux {
function = "gmii";
- groups = "gmiigrp";
+ groups = "gmii_gmac0_grp";
};
};
pci_default_pins: pinctrl-pci {
@@ -316,6 +323,41 @@
};
};
+ ethernet@60000000 {
+ compatible = "cortina,gemini-ethernet";
+ reg = <0x60000000 0x4000>, /* Global registers, queue */
+ <0x60004000 0x2000>, /* V-bit */
+ <0x60006000 0x2000>; /* A-bit */
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmii_default_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gmac0: ethernet-port@0 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */
+ <0x6000a000 0x2000>; /* Port 0 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC0>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC0>;
+ clock-names = "PCLK";
+ };
+
+ gmac1: ethernet-port@1 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */
+ <0x6000e000 0x2000>; /* Port 1 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC1>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC1>;
+ clock-names = "PCLK";
+ };
+ };
+
ata@63000000 {
compatible = "cortina,gemini-pata", "faraday,ftide010";
reg = <0x63000000 0x1000>;

30
target/linux/gemini/patches-4.14/0024-net-gemini-Depend-on-HAS_IOMEM.patch Normal file
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@ -0,0 +1,30 @@
From e0a7c7762e3a81e908bcca4176139ea9755d0985 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sun, 21 Jan 2018 14:15:41 +0100
Subject: [PATCH 24/31] net: gemini: Depend on HAS_IOMEM
The zeroday builder notices that since Usermode Linux does not
have IO memory, the build fails for them when selecting everything
it can enable.
As the driver is clearly using memory-mapped registers to access
the network adapter, we add depends on HAS_IOMEM to solve this
problem.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/cortina/Kconfig | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/ethernet/cortina/Kconfig
+++ b/drivers/net/ethernet/cortina/Kconfig
@@ -14,6 +14,7 @@ if NET_VENDOR_CORTINA
config GEMINI_ETHERNET
tristate "Gemini Gigabit Ethernet support"
depends on OF
+ depends on HAS_IOMEM
select PHYLIB
select CRC32
---help---

36
target/linux/gemini/patches-4.14/0025-ARM-dts-Set-D-Link-DNS-313-SATA-to-muxmode-0.patch Normal file
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@ -0,0 +1,36 @@
From f30cc6acdeb834be1a6ae54d47c84b2f8012b83d Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Thu, 18 Jan 2018 14:36:21 +0100
Subject: [PATCH 25/31] ARM: dts: Set D-Link DNS-313 SATA to muxmode 0
This stops the driver from trying to probe the ATA slave
interface. The vendor code enables the slave interface
but the driver in the vendor tree does not make use of
it.
Setting it to muxmode 0 disables the slave interface:
the hardware only has the master interface connected
to the one harddrive slot anyways.
Without this change booting takes excessive time, so it
is very annoying to end users.
Fixes: dd5c0561db75 ("ARM: dts: Add basic devicetree for D-Link DNS-313")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ARM SoC folks: please apply this for fixes for v4.16.
---
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -219,7 +219,7 @@
sata: sata@46000000 {
/* The ROM uses this muxmode */
- cortina,gemini-ata-muxmode = <3>;
+ cortina,gemini-ata-muxmode = <0>;
cortina,gemini-enable-sata-bridge;
status = "okay";
};

80
target/linux/gemini/patches-4.14/0026-power-gemini-poweroff-Avoid-spurious-poweroff.patch Normal file
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@ -0,0 +1,80 @@
From da443bc125265cae24a0e5f7d1c7bba196a9319f Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Thu, 22 Feb 2018 08:34:35 +0100
Subject: [PATCH 26/31] power: gemini-poweroff: Avoid spurious poweroff
On the D-Link DIR-685 we get spurious poweroff from
infrared. Since that block (CIR) doesn't even have a
driver this can be safely ignored, we can revisit this
code once we have a device supporting CIR.
On the D-Link DNS-313 we get spurious poweroff from
the power button. This appears to be an initialization
issue: we need to enable the block (start the state
machine) before we clear any dangling IRQ.
This patch fixes both issues.
Fixes: f7a388d6cd1c ("power: reset: Add a driver for the Gemini poweroff")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Fix both issues and rename the patch.
- Proper commit message with specifics.
---
drivers/power/reset/gemini-poweroff.c | 30 +++++++++++++++++-------------
1 file changed, 17 insertions(+), 13 deletions(-)
--- a/drivers/power/reset/gemini-poweroff.c
+++ b/drivers/power/reset/gemini-poweroff.c
@@ -47,8 +47,12 @@ static irqreturn_t gemini_powerbutton_in
val &= 0x70U;
switch (val) {
case GEMINI_STAT_CIR:
- dev_info(gpw->dev, "infrared poweroff\n");
- orderly_poweroff(true);
+ /*
+ * We do not yet have a driver for the infrared
+ * controller so it can cause spurious poweroff
+ * events. Ignore those for now.
+ */
+ dev_info(gpw->dev, "infrared poweroff - ignored\n");
break;
case GEMINI_STAT_RTC:
dev_info(gpw->dev, "RTC poweroff\n");
@@ -116,7 +120,17 @@ static int gemini_poweroff_probe(struct
return -ENODEV;
}
- /* Clear the power management IRQ */
+ /*
+ * Enable the power controller. This is crucial on Gemini
+ * systems: if this is not done, pressing the power button
+ * will result in unconditional poweroff without any warning.
+ * This makes the kernel handle the poweroff.
+ */
+ val = readl(gpw->base + GEMINI_PWC_CTRLREG);
+ val |= GEMINI_CTRL_ENABLE;
+ writel(val, gpw->base + GEMINI_PWC_CTRLREG);
+
+ /* Now that the state machine is active, clear the IRQ */
val = readl(gpw->base + GEMINI_PWC_CTRLREG);
val |= GEMINI_CTRL_IRQ_CLR;
writel(val, gpw->base + GEMINI_PWC_CTRLREG);
@@ -129,16 +143,6 @@ static int gemini_poweroff_probe(struct
pm_power_off = gemini_poweroff;
gpw_poweroff = gpw;
- /*
- * Enable the power controller. This is crucial on Gemini
- * systems: if this is not done, pressing the power button
- * will result in unconditional poweroff without any warning.
- * This makes the kernel handle the poweroff.
- */
- val = readl(gpw->base + GEMINI_PWC_CTRLREG);
- val |= GEMINI_CTRL_ENABLE;
- writel(val, gpw->base + GEMINI_PWC_CTRLREG);
-
dev_info(dev, "Gemini poweroff driver registered\n");
return 0;

65
target/linux/gemini/patches-4.14/0027-usb-host-add-DT-bindings-for-faraday-fotg2.patch Normal file
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@ -0,0 +1,65 @@
From 3699f119ff8da021fe7a1759e98e38ca88fa6766 Mon Sep 17 00:00:00 2001
From: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Date: Wed, 8 Feb 2017 21:00:09 +0100
Subject: [PATCH 27/31] usb: host: add DT bindings for faraday fotg2
This adds device tree bindings for the Faraday FOTG2
dual-mode host controller.
Cc: devicetree@vger.kernel.org
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v3:
- Change compatible to "faraday,fotg210" as the name of the
hardware block.
- Add an elaborate SoC-specific compatible string for the
Cortina Systems Gemini so that SoC-specific features can
be enabled.
- Add cortina,gemini-mini-b to indicate a Gemini PHY with
a Mini-B adapter connected.
- Indicated that the Gemini version can handle "wakeup-source".
- Add optional IP block clock.
---
.../devicetree/bindings/usb/faraday,fotg210.txt | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/faraday,fotg210.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/faraday,fotg210.txt
@@ -0,0 +1,35 @@
+Faraday FOTG Host controller
+
+This OTG-capable USB host controller is found in Cortina Systems
+Gemini and other SoC products.
+
+Required properties:
+- compatible: should be one of:
+ "faraday,fotg210"
+ "cortina,gemini-usb", "faraday,fotg210"
+- reg: should contain one register range i.e. start and length
+- interrupts: description of the interrupt line
+
+Optional properties:
+- clocks: should contain the IP block clock
+- clock-names: should be "PCLK" for the IP block clock
+
+Required properties for "cortina,gemini-usb" compatible:
+- syscon: a phandle to the system controller to access PHY registers
+
+Optional properties for "cortina,gemini-usb" compatible:
+- cortina,gemini-mini-b: boolean property that indicates that a Mini-B
+ OTH connector is in use
+- wakeup-source: see power/wakeup-source.txt
+
+Example for Gemini:
+
+usb@68000000 {
+ compatible = "cortina,gemini-usb", "faraday,fotg210";
+ reg = <0x68000000 0x1000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cc 12>;
+ clock-names = "PCLK";
+ syscon = <&syscon>;
+ wakeup-source;
+};

61
target/linux/gemini/patches-4.14/0028-usb-host-fotg2-add-device-tree-probing.patch Normal file
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@ -0,0 +1,61 @@
From 5662c553e89ac4179ec2a7a94a342ba3e5d78cf7 Mon Sep 17 00:00:00 2001
From: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Date: Thu, 9 Feb 2017 15:20:49 +0100
Subject: [PATCH 28/31] usb: host: fotg2: add device tree probing
Add device tree probing to the fotg2 driver.
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v2->v3:
- Change compatible to "faraday,fotg210" simply.
---
drivers/usb/host/fotg210-hcd.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -23,6 +23,7 @@
* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/module.h>
+#include <linux/of.h>
#include <linux/device.h>
#include <linux/dmapool.h>
#include <linux/kernel.h>
@@ -5600,6 +5601,15 @@ static int fotg210_hcd_probe(struct plat
if (usb_disabled())
return -ENODEV;
+ /* Right now device-tree probed devices don't get dma_mask set.
+ * Since shared usb code relies on it, set it here for now.
+ * Once we have dma capability bindings this can go away.
+ */
+
+ retval = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
+ if (retval)
+ goto fail_create_hcd;
+
pdev->dev.power.power_state = PMSG_ON;
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@@ -5676,9 +5686,18 @@ static int fotg210_hcd_remove(struct pla
return 0;
}
+#ifdef CONFIG_OF
+static const struct of_device_id fotg210_of_match[] = {
+ { .compatible = "faraday,fotg210" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, fotg210_of_match);
+#endif
+
static struct platform_driver fotg210_hcd_driver = {
.driver = {
.name = "fotg210-hcd",
+ .of_match_table = of_match_ptr(fotg210_of_match),
},
.probe = fotg210_hcd_probe,
.remove = fotg210_hcd_remove,

99
target/linux/gemini/patches-4.14/0029-usb-host-fotg2-add-silicon-clock-handling.patch Normal file
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@ -0,0 +1,99 @@
From acd19633751f14607ccd76f9dfde5bde7935766c Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 21 Apr 2017 20:46:12 +0200
Subject: [PATCH 29/31] usb: host: fotg2: add silicon clock handling
When used in a system with software-controller silicon clocks,
the FOTG210 needs to grab, prepare and enable the clock.
This is needed on for example the Cortina Gemini, where the
platform will by default gate off the clock unless the
peripheral (in this case the USB driver) grabs and enables
the clock.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/usb/host/fotg210-hcd.c | 26 ++++++++++++++++++++++----
drivers/usb/host/fotg210.h | 3 +++
2 files changed, 25 insertions(+), 4 deletions(-)
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -45,6 +45,7 @@
#include <linux/uaccess.h>
#include <linux/platform_device.h>
#include <linux/io.h>
+#include <linux/clk.h>
#include <asm/byteorder.h>
#include <asm/irq.h>
@@ -5635,7 +5636,7 @@ static int fotg210_hcd_probe(struct plat
hcd->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(hcd->regs)) {
retval = PTR_ERR(hcd->regs);
- goto failed;
+ goto failed_put_hcd;
}
hcd->rsrc_start = res->start;
@@ -5645,22 +5646,35 @@ static int fotg210_hcd_probe(struct plat
fotg210->caps = hcd->regs;
+ /* It's OK not to supply this clock */
+ fotg210->pclk = clk_get(dev, "PCLK");
+ if (!IS_ERR(fotg210->pclk)) {
+ retval = clk_prepare_enable(fotg210->pclk);
+ if (retval) {
+ dev_err(dev, "failed to enable PCLK\n");
+ goto failed_dis_clk;
+ }
+ }
+
retval = fotg210_setup(hcd);
if (retval)
- goto failed;
+ goto failed_dis_clk;
fotg210_init(fotg210);
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (retval) {
dev_err(dev, "failed to add hcd with err %d\n", retval);
- goto failed;
+ goto failed_dis_clk;
}
device_wakeup_enable(hcd->self.controller);
return retval;
-failed:
+failed_dis_clk:
+ if (!IS_ERR(fotg210->pclk))
+ clk_disable_unprepare(fotg210->pclk);
+failed_put_hcd:
usb_put_hcd(hcd);
fail_create_hcd:
dev_err(dev, "init %s fail, %d\n", dev_name(dev), retval);
@@ -5676,6 +5690,10 @@ static int fotg210_hcd_remove(struct pla
{
struct device *dev = &pdev->dev;
struct usb_hcd *hcd = dev_get_drvdata(dev);
+ struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
+
+ if (!IS_ERR(fotg210->pclk))
+ clk_disable_unprepare(fotg210->pclk);
if (!hcd)
return 0;
--- a/drivers/usb/host/fotg210.h
+++ b/drivers/usb/host/fotg210.h
@@ -182,6 +182,9 @@ struct fotg210_hcd { /* one per contro
# define COUNT(x)
#endif
+ /* silicon clock */
+ struct clk *pclk;
+
/* debug files */
struct dentry *debug_dir;
};

131
target/linux/gemini/patches-4.14/0030-usb-host-fotg2-add-Gemini-specific-handling.patch Normal file
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@ -0,0 +1,131 @@
From e8ede0f62b39a3d3b06ae3dc04a74680a1f0a64b Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 21 Apr 2017 22:19:00 +0200
Subject: [PATCH 30/31] usb: host: fotg2: add Gemini-specific handling
The Cortina Systems Gemini has bolted on a PHY inside the
silicon that can be handled by six bits in a MISC register in
the system controller.
If we are running on Gemini, look up a syscon regmap through
a phandle and enable VBUS and optionally the Mini-B connector.
If the device is flagged as "wakeup-source" using the standard
DT bindings, we also enable this in the global controller for
respective port.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/usb/host/Kconfig | 1 +
drivers/usb/host/fotg210-hcd.c | 76 ++++++++++++++++++++++++++++++++++++++++++
2 files changed, 77 insertions(+)
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -375,6 +375,7 @@ config USB_ISP1362_HCD
config USB_FOTG210_HCD
tristate "FOTG210 HCD support"
depends on USB && HAS_DMA && HAS_IOMEM
+ select MFD_SYSCON
---help---
Faraday FOTG210 is an OTG controller which can be configured as
an USB2.0 host. It is designed to meet USB2.0 EHCI specification
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -46,6 +46,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/clk.h>
+#include <linux/bitops.h>
+/* For Cortina Gemini */
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
#include <asm/byteorder.h>
#include <asm/irq.h>
@@ -5583,6 +5587,72 @@ static void fotg210_init(struct fotg210_
iowrite32(value, &fotg210->regs->otgcsr);
}
+/*
+ * Gemini-specific initialization function, only executed on the
+ * Gemini SoC using the global misc control register.
+ */
+#define GEMINI_GLOBAL_MISC_CTRL 0x30
+#define GEMINI_MISC_USB0_WAKEUP BIT(14)
+#define GEMINI_MISC_USB1_WAKEUP BIT(15)
+#define GEMINI_MISC_USB0_VBUS_ON BIT(22)
+#define GEMINI_MISC_USB1_VBUS_ON BIT(23)
+#define GEMINI_MISC_USB0_MINI_B BIT(29)
+#define GEMINI_MISC_USB1_MINI_B BIT(30)
+
+static int fotg210_gemini_init(struct device *dev, struct usb_hcd *hcd)
+{
+ struct device_node *np = dev->of_node;
+ struct regmap *map;
+ bool mini_b;
+ bool wakeup;
+ u32 mask, val;
+ int ret;
+
+ map = syscon_regmap_lookup_by_phandle(np, "syscon");
+ if (IS_ERR(map)) {
+ dev_err(dev, "no syscon\n");
+ return PTR_ERR(map);
+ }
+ mini_b = of_property_read_bool(np, "cortina,gemini-mini-b");
+ wakeup = of_property_read_bool(np, "wakeup-source");
+
+ /*
+ * Figure out if this is USB0 or USB1 by simply checking the
+ * physical base address.
+ */
+ mask = 0;
+ if (hcd->rsrc_start == 0x69000000) {
+ val = GEMINI_MISC_USB1_VBUS_ON;
+ if (mini_b)
+ val |= GEMINI_MISC_USB1_MINI_B;
+ else
+ mask |= GEMINI_MISC_USB1_MINI_B;
+ if (wakeup)
+ val |= GEMINI_MISC_USB1_WAKEUP;
+ else
+ mask |= GEMINI_MISC_USB1_WAKEUP;
+ } else {
+ val = GEMINI_MISC_USB0_VBUS_ON;
+ if (mini_b)
+ val |= GEMINI_MISC_USB0_MINI_B;
+ else
+ mask |= GEMINI_MISC_USB0_MINI_B;
+ if (wakeup)
+ val |= GEMINI_MISC_USB0_WAKEUP;
+ else
+ mask |= GEMINI_MISC_USB0_WAKEUP;
+ }
+
+ ret = regmap_update_bits(map, GEMINI_GLOBAL_MISC_CTRL, mask, val);
+ if (ret) {
+ dev_err(dev, "failed to initialize Gemini PHY\n");
+ return ret;
+ }
+
+ dev_info(dev, "initialized Gemini PHY\n");
+ return 0;
+}
+
/**
* fotg210_hcd_probe - initialize faraday FOTG210 HCDs
*
@@ -5662,6 +5732,12 @@ static int fotg210_hcd_probe(struct plat
fotg210_init(fotg210);
+ if (of_device_is_compatible(dev->of_node, "cortina,gemini-usb")) {
+ retval = fotg210_gemini_init(dev, hcd);
+ if (retval)
+ goto failed_dis_clk;
+ }
+
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (retval) {
dev_err(dev, "failed to add hcd with err %d\n", retval);

178
target/linux/gemini/patches-4.14/0031-ARM-dts-Add-the-FOTG210-USB-host-to-Gemini.patch Normal file
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@ -0,0 +1,178 @@
From dd62aee5d2d24199e71e745544e49a1a8b3c6f7a Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 21 Apr 2017 20:50:22 +0200
Subject: [PATCH 31/31] ARM: dts: Add the FOTG210 USB host to Gemini
This adds the FOTG210 USB host controller to the Gemini
device trees. In the main SoC DTSI it is flagged as disabled
and then it is selectively enabled on the devices that utilize
it (these per-platform enablements are done on the out-of-tree
OpenWrt patch set). It is not enabled on the Itian SquareOne
NAS/router since this instead has a VIA host controller
soldered on the PCI port, and can gate off these USB host
controllers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
USB maintainers: I will merge this through the ARM SoC tree,
the patch is only included in the series for context.
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 8 ++++++++
arch/arm/boot/dts/gemini-nas4220b.dts | 8 ++++++++
arch/arm/boot/dts/gemini-rut1xx.dts | 20 ++++++++++++++++++++
arch/arm/boot/dts/gemini-wbd111.dts | 20 ++++++++++++++++++++
arch/arm/boot/dts/gemini-wbd222.dts | 21 +++++++++++++++++++++
arch/arm/boot/dts/gemini.dtsi | 26 ++++++++++++++++++++++++++
6 files changed, 103 insertions(+)
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -303,5 +303,13 @@
};
};
};
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -146,5 +146,13 @@
ata@63000000 {
status = "okay";
};
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -114,5 +114,25 @@
pinctrl-names = "default";
pinctrl-0 = <&gpio1_default_pins>;
};
+
+ ethernet@60000000 {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet-port@1 {
+ /* Not used in this platform */
+ };
+ };
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-wbd111.dts
+++ b/arch/arm/boot/dts/gemini-wbd111.dts
@@ -160,5 +160,25 @@
<0x6000 0 0 3 &pci_intc 1>,
<0x6000 0 0 4 &pci_intc 2>;
};
+
+ ethernet@60000000 {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet-port@1 {
+ /* Not used in this platform */
+ };
+ };
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -165,5 +165,26 @@
<0x6000 0 0 3 &pci_intc 1>,
<0x6000 0 0 4 &pci_intc 2>;
};
+
+ ethernet@60000000 {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet-port@1 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+ };
+
+ usb@68000000 {
+ status = "okay";
+ };
+
+ usb@69000000 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -411,5 +411,31 @@
#size-cells = <0>;
status = "disabled";
};
+
+ usb@68000000 {
+ compatible = "cortina,gemini-usb", "faraday,fotg210";
+ reg = <0x68000000 0x1000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_USB0>;
+ clocks = <&syscon GEMINI_CLK_GATE_USB0>;
+ clock-names = "PCLK";
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_default_pins>;
+ syscon = <&syscon>;
+ status = "disabled";
+ };
+
+ usb@69000000 {
+ compatible = "cortina,gemini-usb", "faraday,fotg210";
+ reg = <0x69000000 0x1000>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_USB1>;
+ clocks = <&syscon GEMINI_CLK_GATE_USB1>;
+ clock-names = "PCLK";
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_default_pins>;
+ syscon = <&syscon>;
+ status = "disabled";
+ };
};
};

26
target/linux/gemini/patches-4.14/0032-usb-host-fotg2-restart-hcd-after-port-reset.patch Normal file
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@ -0,0 +1,26 @@
From 731a2896e11b4e6a8d252e6c14edb1b09dbfcd46 Mon Sep 17 00:00:00 2001
From: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Date: Sat, 14 Apr 2018 18:49:57 +0200
Subject: [PATCH 1/2] usb: host: fotg2: restart hcd after port reset
on Gemini SoC FOTG2 stalls after port reset
rerstart the hcd.
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
---
drivers/usb/host/fotg210-hcd.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -1658,6 +1658,10 @@ static int fotg210_hub_control(struct us
/* see what we found out */
temp = check_reset_complete(fotg210, wIndex, status_reg,
fotg210_readl(fotg210, status_reg));
+
+ /* restart schedule */
+ fotg210->command |= CMD_RUN;
+ fotg210_writel(fotg210, fotg210->command, &fotg210->regs->command);
}
if (!(temp & (PORT_RESUME|PORT_RESET))) {

38
target/linux/gemini/patches-4.14/0033-ARM-dts-Fix-bootargs-for-Gemini-D-Link-devices.patch Normal file
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@ -0,0 +1,38 @@
From 5813b729eb9fe91fcf895a5c2f30bf34fbd46379 Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Wed, 2 May 2018 09:17:25 +0200
Subject: [PATCH] ARM: dts: Fix bootargs for Gemini D-Link devices
These machines need to be booted from very specific harddisk
partitions (as the D-Link DNS-313 boots specifically from
partition 4). Add the proper bootargs so that everything works
smoothly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 3 ++-
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -20,7 +20,8 @@
};
chosen {
- stdout-path = "uart0:115200n8";
+ bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
+ stdout-path = "uart0:19200n8";
};
gpio_keys {
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -26,6 +26,7 @@
};
chosen {
+ bootargs = "console=ttyS0,19200n8 root=/dev/sda4 rw rootwait";
stdout-path = "uart0:19200n8";
};

116
target/linux/gemini/patches-4.14/0034-ARM-dts-Add-ethernet-to-a-bunch-of-platforms.patch Normal file
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@ -0,0 +1,116 @@
From 6d5af7093aea4f18e040e73db2ad99aaa0c0f77e Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sun, 19 Nov 2017 11:04:23 +0100
Subject: [PATCH] ARM: dts: Add ethernet to a bunch of platforms
These platforms have the PHY defined already so we just
need to add a single device node to each of them to activate
the ethernet device.
The PHY skew/delay settings for pin control is known from a
few vendor trees and old OpenWRT patch sets.
This is a modified version of upstream commit
95220046a62c00b5afb1aa7c1971989d427db977,
just dropping the NAS4220B changes.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/gemini-dlink-dns-313.dts | 62 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/gemini-wbd222.dts | 7 ++++
2 files changed, 69 insertions(+)
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -215,6 +215,56 @@
groups = "gpio1dgrp";
};
};
+ pinctrl-gmii {
+ mux {
+ function = "gmii";
+ groups = "gmii_gmac0_grp";
+ };
+ /*
+ * In the vendor Linux tree, these values are set for the C3
+ * version of the SL3512 ASIC with the comment "benson suggest"
+ */
+ conf0 {
+ pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
+ skew-delay = <0>;
+ };
+ conf1 {
+ pins = "T8 GMAC0 RXC";
+ skew-delay = <10>;
+ };
+ conf2 {
+ pins = "T11 GMAC1 RXC";
+ skew-delay = <15>;
+ };
+ conf3 {
+ pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
+ skew-delay = <7>;
+ };
+ conf4 {
+ pins = "V7 GMAC0 TXC", "P10 GMAC1 TXC";
+ skew-delay = <10>;
+ };
+ conf5 {
+ /* The data lines all have default skew */
+ pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
+ "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
+ "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
+ "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
+ "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
+ "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
+ skew-delay = <7>;
+ };
+ conf6 {
+ pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
+ "R7 GMAC0 TXD2", "P7 GMAC0 TXD3";
+ skew-delay = <5>;
+ };
+ /* Set up drive strength on GMAC0 to 16 mA */
+ conf7 {
+ groups = "gmii_gmac0_grp";
+ drive-strength = <16>;
+ };
+ };
};
};
@@ -235,6 +285,18 @@
pinctrl-0 = <&gpio1_default_pins>;
};
+ ethernet@60000000 {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet-port@1 {
+ /* Not used in this platform */
+ };
+ };
+
ata@63000000 {
status = "okay";
};
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -136,6 +136,13 @@
"gpio0bgrp";
};
};
+ pinctrl-gmii {
+ /* This platform use both the ethernet ports */
+ mux {
+ function = "gmii";
+ groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
+ };
+ };
};
};

17
target/linux/gemini/patches-4.14/0900-arm-dts-gemini-add-openwrt-partitions-for-nas4220b.patch Normal file
View File

@ -0,0 +1,17 @@
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -115,6 +115,14 @@
reg = <0x00fe0000 0x00020000>;
read-only;
};
+ firmware@20000 {
+ label = "firmware";
+ reg = <0x00020000 0x00f00000>;
+ };
+ rootfs@320000 {
+ label = "rootfs";
+ reg = <0x00320000 0x00c00000>;
+ };
};
syscon: syscon@40000000 {

69
target/linux/gemini/patches-4.14/0901-arm-dts-gemini-fix-ethernet-for-nas4220b.patch Normal file
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@ -0,0 +1,69 @@
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -137,6 +137,47 @@
groups = "gpio1dgrp";
};
};
+ pinctrl-gmii {
+ mux {
+ function = "gmii";
+ groups = "gmii_gmac0_grp";
+ };
+ conf0 {
+ pins = "V8 GMAC0 RXDV", "T10 GMAC1 RXDV";
+ skew-delay = <0>;
+ };
+ conf1 {
+ pins = "Y7 GMAC0 RXC", "Y11 GMAC1 RXC";
+ skew-delay = <15>;
+ };
+ conf2 {
+ pins = "T8 GMAC0 TXEN", "W11 GMAC1 TXEN";
+ skew-delay = <7>;
+ };
+ conf3 {
+ pins = "U8 GMAC0 TXC";
+ skew-delay = <11>;
+ };
+ conf4 {
+ pins = "V11 GMAC1 TXC";
+ skew-delay = <10>;
+ };
+ conf5 {
+ pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
+ "Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
+ "T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
+ "V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
+ "Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
+ "T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
+ "U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
+ "W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
+ skew-delay = <7>;
+ };
+ conf6 {
+ groups = "gmii_gmac0_grp";
+ drive-strength = <16>;
+ };
+ };
};
};
@@ -151,6 +192,18 @@
pinctrl-0 = <&gpio1_default_pins>;
};
+ ethernet@60000000 {
+ status = "okay";
+
+ gmac0: ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ gmac1: ethernet-port@1 {
+ status = "disabled";
+ };
+ };
+
ata@63000000 {
status = "okay";
};

13
target/linux/gemini/patches-4.14/0902-arm-dts-gemini-add-second-ata-for-nas4220b.patch Normal file
View File

@ -0,0 +1,13 @@
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -208,6 +208,10 @@
status = "okay";
};
+ ata@63400000 {
+ status = "okay";
+ };
+
usb@68000000 {
status = "okay";
};

11
target/linux/gemini/patches-4.14/0903-arm-dts-gemini-disable-usb-port-1-until-fixed.patch Normal file
View File

@ -0,0 +1,11 @@
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -217,7 +217,7 @@
};
usb@69000000 {
- status = "okay";
+ status = "disabled";
};
};
};

23
target/linux/gemini/patches-4.14/0904-net-cortina-fix-uninitialized-struct-member-usage.patch Normal file
View File

@ -0,0 +1,23 @@
--- a/drivers/net/ethernet/cortina/gemini.c
+++ b/drivers/net/ethernet/cortina/gemini.c
@@ -1013,9 +1013,9 @@ static int geth_resize_freeq(struct gemi
int ret;
if (netdev->dev_id == 0)
- other_netdev = geth->port1->netdev;
+ other_netdev = (geth->port1)? geth->port1->netdev : NULL;
else
- other_netdev = geth->port0->netdev;
+ other_netdev = (geth->port0)? geth->port0->netdev : NULL;
if (other_netdev && netif_running(other_netdev))
return -EBUSY;
@@ -2510,6 +2510,8 @@ static int gemini_ethernet_probe(struct
if (IS_ERR(geth->base))
return PTR_ERR(geth->base);
geth->dev = dev;
+ geth->port0 = NULL;
+ geth->port1 = NULL;
/* Wait for ports to stabilize */
do {

82
target/linux/gemini/patches-4.14/0905-arm-dts-gemini-dlink-dir-685-add-rtl8366rb.patch Normal file
View File

@ -0,0 +1,82 @@
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -87,6 +87,12 @@
};
};
+ rtl8366rb {
+ compatible = "realtek,rtl8366rb";
+ gpio-sda = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+ gpio-sck = <&gpio0 21 GPIO_ACTIVE_HIGH>;
+ };
+
leds {
compatible = "gpio-leds";
led-wps {
@@ -249,6 +255,47 @@
groups = "gpio1bgrp";
};
};
+ pinctrl-gmii {
+ mux {
+ function = "gmii";
+ groups = "gmii_gmac0_grp";
+ };
+ conf0 {
+ pins = "V8 GMAC0 RXDV", "T10 GMAC1 RXDV";
+ skew-delay = <0>;
+ };
+ conf1 {
+ pins = "Y7 GMAC0 RXC", "Y11 GMAC1 RXC";
+ skew-delay = <15>;
+ };
+ conf2 {
+ pins = "T8 GMAC0 TXEN", "W11 GMAC1 TXEN";
+ skew-delay = <7>;
+ };
+ conf3 {
+ pins = "U8 GMAC0 TXC";
+ skew-delay = <11>;
+ };
+ conf4 {
+ pins = "V11 GMAC1 TXC";
+ skew-delay = <10>;
+ };
+ conf5 {
+ pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
+ "Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
+ "T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
+ "V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
+ "Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
+ "T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
+ "U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
+ "W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
+ skew-delay = <7>;
+ };
+ conf6 {
+ groups = "gmii_gmac0_grp";
+ drive-strength = <16>;
+ };
+ };
};
};
@@ -290,6 +337,18 @@
<0x6000 0 0 4 &pci_intc 2>;
};
+ ethernet@60000000 {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ // phy-handle = <&phy0>;
+ };
+ ethernet-port@1 {
+ /* Not used in this platform */
+ };
+ };
+
ata@63000000 {
status = "okay";
};

21
target/linux/gemini/patches-4.4/050-gpio-to-irq.patch
View File

@ -1,21 +0,0 @@
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -196,12 +196,18 @@ static int gemini_gpio_direction_output(
return 0;
}
+static int gemini_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
+{
+ return gpio + GPIO_IRQ_BASE;
+}
+
static struct gpio_chip gemini_gpio_chip = {
.label = "Gemini",
.direction_input = gemini_gpio_direction_input,
.get = gemini_gpio_get,
.direction_output = gemini_gpio_direction_output,
.set = gemini_gpio_set,
+ .to_irq = gemini_gpio_to_irq,
.base = 0,
.ngpio = GPIO_PORT_NUM * 32,
};

29
target/linux/gemini/patches-4.4/110-watchdog-add-gemini_wdt-driver.patch
View File

@ -1,29 +0,0 @@
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -229,6 +229,16 @@ config 977_WATCHDOG
Not sure? It's safe to say N.
+config GEMINI_WATCHDOG
+ tristate "Gemini watchdog"
+ depends on ARCH_GEMINI
+ help
+ Say Y here if to include support for the watchdog timer
+ embedded in the Cortina Systems Gemini family of devices.
+
+ To compile this driver as a module, choose M here: the
+ module will be called gemini_wdt.
+
config IXP4XX_WATCHDOG
tristate "IXP4xx Watchdog"
depends on ARCH_IXP4XX
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.
obj-$(CONFIG_TWL4030_WATCHDOG) += twl4030_wdt.o
obj-$(CONFIG_21285_WATCHDOG) += wdt285.o
obj-$(CONFIG_977_WATCHDOG) += wdt977.o
+obj-$(CONFIG_GEMINI_WATCHDOG) += gemini_wdt.o
obj-$(CONFIG_IXP4XX_WATCHDOG) += ixp4xx_wdt.o
obj-$(CONFIG_KS8695_WATCHDOG) += ks8695_wdt.o
obj-$(CONFIG_S3C2410_WATCHDOG) += s3c2410_wdt.o

33
target/linux/gemini/patches-4.4/111-arm-gemini-add-watchdog-device.patch
View File

@ -1,33 +0,0 @@
--- a/arch/arm/mach-gemini/devices.c
+++ b/arch/arm/mach-gemini/devices.c
@@ -116,3 +116,20 @@ int __init platform_register_rtc(void)
return platform_device_register(&gemini_rtc_device);
}
+static struct resource wdt_resource = {
+ .start = GEMINI_WAQTCHDOG_BASE,
+ .end = GEMINI_WAQTCHDOG_BASE + 0x18,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device wdt_device = {
+ .name = "gemini-wdt",
+ .id = 0,
+ .resource = &wdt_resource,
+ .num_resources = 1,
+};
+
+int __init platform_register_watchdog(void)
+{
+ return platform_device_register(&wdt_device);
+}
--- a/arch/arm/mach-gemini/common.h
+++ b/arch/arm/mach-gemini/common.h
@@ -27,6 +27,7 @@ extern int platform_register_uart(void);
extern int platform_register_pflash(unsigned int size,
struct mtd_partition *parts,
unsigned int nr_parts);
+extern int platform_register_watchdog(void);
extern void gemini_restart(enum reboot_mode mode, const char *cmd);

40
target/linux/gemini/patches-4.4/112-arm-gemini-register-watchdog-devices.patch
View File

@ -1,40 +0,0 @@
--- a/arch/arm/mach-gemini/board-nas4220b.c
+++ b/arch/arm/mach-gemini/board-nas4220b.c
@@ -94,6 +94,7 @@ static void __init ib4220b_init(void)
platform_device_register(&ib4220b_led_device);
platform_device_register(&ib4220b_key_device);
platform_register_rtc();
+ platform_register_watchdog();
}
MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")
--- a/arch/arm/mach-gemini/board-wbd111.c
+++ b/arch/arm/mach-gemini/board-wbd111.c
@@ -121,6 +121,7 @@ static void __init wbd111_init(void)
platform_device_register(&wbd111_leds_device);
platform_device_register(&wbd111_keys_device);
platform_register_rtc();
+ platform_register_watchdog();
}
MACHINE_START(WBD111, "Wiliboard WBD-111")
--- a/arch/arm/mach-gemini/board-wbd222.c
+++ b/arch/arm/mach-gemini/board-wbd222.c
@@ -121,6 +121,7 @@ static void __init wbd222_init(void)
platform_device_register(&wbd222_leds_device);
platform_device_register(&wbd222_keys_device);
platform_register_rtc();
+ platform_register_watchdog();
}
MACHINE_START(WBD222, "Wiliboard WBD-222")
--- a/arch/arm/mach-gemini/board-rut1xx.c
+++ b/arch/arm/mach-gemini/board-rut1xx.c
@@ -80,6 +80,7 @@ static void __init rut1xx_init(void)
platform_device_register(&rut1xx_leds);
platform_device_register(&rut1xx_keys_device);
platform_register_rtc();
+ platform_register_watchdog();
}
MACHINE_START(RUT100, "Teltonika RUT100")

20
target/linux/gemini/patches-4.4/120-net-add-gemini-gmac-driver.patch
View File

@ -1,20 +0,0 @@
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -73,6 +73,7 @@ source "drivers/net/ethernet/neterion/Kc
source "drivers/net/ethernet/faraday/Kconfig"
source "drivers/net/ethernet/freescale/Kconfig"
source "drivers/net/ethernet/fujitsu/Kconfig"
+source "drivers/net/ethernet/gemini/Kconfig"
source "drivers/net/ethernet/hisilicon/Kconfig"
source "drivers/net/ethernet/hp/Kconfig"
source "drivers/net/ethernet/ibm/Kconfig"
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_NET_VENDOR_EXAR) += neterio
obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
obj-$(CONFIG_NET_VENDOR_FUJITSU) += fujitsu/
+obj-$(CONFIG_NET_VENDOR_GEMINI) += gemini/
obj-$(CONFIG_NET_VENDOR_HISILICON) += hisilicon/
obj-$(CONFIG_NET_VENDOR_HP) += hp/
obj-$(CONFIG_NET_VENDOR_IBM) += ibm/

85
target/linux/gemini/patches-4.4/121-arm-gemini-add-gmac-device.patch
View File

@ -1,85 +0,0 @@
--- a/arch/arm/mach-gemini/common.h
+++ b/arch/arm/mach-gemini/common.h
@@ -15,6 +15,7 @@
#include <linux/reboot.h>
struct mtd_partition;
+struct gemini_gmac_platform_data;
extern void gemini_map_io(void);
extern void gemini_init_irq(void);
@@ -28,6 +29,7 @@ extern int platform_register_pflash(unsi
struct mtd_partition *parts,
unsigned int nr_parts);
extern int platform_register_watchdog(void);
+extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
extern void gemini_restart(enum reboot_mode mode, const char *cmd);
--- a/arch/arm/mach-gemini/devices.c
+++ b/arch/arm/mach-gemini/devices.c
@@ -17,6 +17,7 @@
#include <mach/irqs.h>
#include <mach/hardware.h>
#include <mach/global_reg.h>
+#include <mach/gmac.h>
static struct plat_serial8250_port serial_platform_data[] = {
{
@@ -133,3 +134,56 @@ int __init platform_register_watchdog(vo
{
return platform_device_register(&wdt_device);
}
+
+static struct resource gmac_resources[] = {
+ {
+ .start = GEMINI_TOE_BASE,
+ .end = GEMINI_TOE_BASE + 0xffff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_GMAC0,
+ .end = IRQ_GMAC0,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = IRQ_GMAC1,
+ .end = IRQ_GMAC1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 gmac_dmamask = 0xffffffffUL;
+
+static struct platform_device ethernet_device = {
+ .name = "gmac-gemini",
+ .id = 0,
+ .dev = {
+ .dma_mask = &gmac_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(gmac_resources),
+ .resource = gmac_resources,
+};
+
+int platform_register_ethernet(struct gemini_gmac_platform_data *pdata)
+{
+ unsigned int reg;
+
+ reg = readl((void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_MISC_CTRL));
+
+ reg &= ~(GMAC_GMII | GMAC_1_ENABLE);
+
+ if (pdata->bus_id[1])
+ reg |= GMAC_1_ENABLE;
+ else if (pdata->interface[0] == PHY_INTERFACE_MODE_GMII)
+ reg |= GMAC_GMII;
+
+ writel(reg, (void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_MISC_CTRL));
+
+ ethernet_device.dev.platform_data = pdata;
+
+ return platform_device_register(&ethernet_device);
+}

227
target/linux/gemini/patches-4.4/122-arm-gemini-register-ethernet.patch
View File

@ -1,227 +0,0 @@
--- a/arch/arm/mach-gemini/board-nas4220b.c
+++ b/arch/arm/mach-gemini/board-nas4220b.c
@@ -19,6 +19,7 @@
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/io.h>
+#include <linux/platform_data/mdio-gpio.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
@@ -27,9 +28,27 @@
#include <mach/hardware.h>
#include <mach/global_reg.h>
+#include <mach/gmac.h>
#include "common.h"
+static struct mdio_gpio_platform_data ib4220b_mdio = {
+ .mdc = 22,
+ .mdio = 21,
+ .phy_mask = ~(1 << 1),
+};
+
+static struct platform_device ib4220b_phy_device = {
+ .name = "mdio-gpio",
+ .id = 0,
+ .dev = { .platform_data = &ib4220b_mdio, },
+};
+
+static struct gemini_gmac_platform_data ib4220b_gmac_data = {
+ .bus_id[0] = "gpio-0:01",
+ .interface[0] = PHY_INTERFACE_MODE_RGMII,
+};
+
static struct gpio_led ib4220b_leds[] = {
{
.name = "nas4220b:orange:hdd",
@@ -86,15 +105,47 @@ static struct platform_device ib4220b_ke
},
};
+static void __init ib4220b_gmac_init(void)
+{
+ unsigned int val;
+
+ val = readl((void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_IO_DRIVING_CTRL));
+ val |= (0x3 << GMAC0_PADS_SHIFT) | (0x3 << GMAC1_PADS_SHIFT);
+ writel(val, (void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_IO_DRIVING_CTRL));
+
+ val = (0x0 << GMAC0_RXDV_SKEW_SHIFT) | (0xf << GMAC0_RXC_SKEW_SHIFT) |
+ (0x7 << GMAC0_TXEN_SKEW_SHIFT) | (0xb << GMAC0_TXC_SKEW_SHIFT) |
+ (0x0 << GMAC1_RXDV_SKEW_SHIFT) | (0xf << GMAC1_RXC_SKEW_SHIFT) |
+ (0x7 << GMAC1_TXEN_SKEW_SHIFT) | (0xa << GMAC1_TXC_SKEW_SHIFT);
+ writel(val, (void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_GMAC_CTRL_SKEW_CTRL));
+
+ writel(0x77777777, (void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_GMAC0_DATA_SKEW_CTRL));
+ writel(0x77777777, (void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_GMAC1_DATA_SKEW_CTRL));
+
+ val = readl((void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_ARBITRATION1_CTRL)) & ~BURST_LENGTH_MASK;
+ val |= (0x20 << BURST_LENGTH_SHIFT) | GMAC0_HIGH_PRIO | GMAC1_HIGH_PRIO;
+ writel(val, (void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_ARBITRATION1_CTRL));
+}
+
static void __init ib4220b_init(void)
{
gemini_gpio_init();
+ ib4220b_gmac_init();
platform_register_uart();
platform_register_pflash(SZ_16M, NULL, 0);
platform_device_register(&ib4220b_led_device);
platform_device_register(&ib4220b_key_device);
platform_register_rtc();
platform_register_watchdog();
+ platform_device_register(&ib4220b_phy_device);
+ platform_register_ethernet(&ib4220b_gmac_data);
}
MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")
--- a/arch/arm/mach-gemini/board-wbd111.c
+++ b/arch/arm/mach-gemini/board-wbd111.c
@@ -17,13 +17,34 @@
#include <linux/gpio_keys.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
+#include <linux/platform_data/mdio-gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <mach/gmac.h>
#include "common.h"
+static struct mdio_gpio_platform_data wbd111_mdio = {
+ .mdc = 22,
+ .mdio = 21,
+ .phy_mask = ~(1 << 1),
+};
+
+static struct platform_device wbd111_phy_device = {
+ .name = "mdio-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &wbd111_mdio,
+ },
+};
+
+static struct gemini_gmac_platform_data gmac_data = {
+ .bus_id[0] = "gpio-0:01",
+ .interface[0] = PHY_INTERFACE_MODE_MII,
+};
+
static struct gpio_keys_button wbd111_keys[] = {
{
.code = KEY_SETUP,
@@ -122,6 +143,8 @@ static void __init wbd111_init(void)
platform_device_register(&wbd111_keys_device);
platform_register_rtc();
platform_register_watchdog();
+ platform_device_register(&wbd111_phy_device);
+ platform_register_ethernet(&gmac_data);
}
MACHINE_START(WBD111, "Wiliboard WBD-111")
--- a/arch/arm/mach-gemini/board-wbd222.c
+++ b/arch/arm/mach-gemini/board-wbd222.c
@@ -17,13 +17,36 @@
#include <linux/gpio_keys.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
+#include <linux/platform_data/mdio-gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <mach/gmac.h>
#include "common.h"
+static struct mdio_gpio_platform_data wbd222_mdio = {
+ .mdc = 22,
+ .mdio = 21,
+ .phy_mask = ~((1 << 1) | (1 << 3)),
+};
+
+static struct platform_device wbd222_phy_device = {
+ .name = "mdio-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &wbd222_mdio,
+ },
+};
+
+static struct gemini_gmac_platform_data gmac_data = {
+ .bus_id[0] = "gpio-0:01",
+ .interface[0] = PHY_INTERFACE_MODE_MII,
+ .bus_id[1] = "gpio-0:03",
+ .interface[1] = PHY_INTERFACE_MODE_MII,
+};
+
static struct gpio_keys_button wbd222_keys[] = {
{
.code = KEY_SETUP,
@@ -122,6 +145,8 @@ static void __init wbd222_init(void)
platform_device_register(&wbd222_keys_device);
platform_register_rtc();
platform_register_watchdog();
+ platform_device_register(&wbd222_phy_device);
+ platform_register_ethernet(&gmac_data);
}
MACHINE_START(WBD222, "Wiliboard WBD-222")
--- a/arch/arm/mach-gemini/board-rut1xx.c
+++ b/arch/arm/mach-gemini/board-rut1xx.c
@@ -15,13 +15,35 @@
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/sizes.h>
+#include <linux/platform_data/mdio-gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <mach/gmac.h>
+
#include "common.h"
+static struct mdio_gpio_platform_data rut1xx_mdio = {
+ .mdc = 22,
+ .mdio = 21,
+ .phy_mask = ~(1 << 1),
+};
+
+static struct platform_device rut1xx_phy_device = {
+ .name = "mdio-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &rut1xx_mdio,
+ },
+};
+
+static struct gemini_gmac_platform_data gmac_data = {
+ .bus_id[0] = "gpio-0:01",
+ .interface[0] = PHY_INTERFACE_MODE_MII,
+};
+
static struct gpio_keys_button rut1xx_keys[] = {
{
.code = KEY_SETUP,
@@ -81,6 +103,8 @@ static void __init rut1xx_init(void)
platform_device_register(&rut1xx_keys_device);
platform_register_rtc();
platform_register_watchdog();
+ platform_device_register(&rut1xx_phy_device);
+ platform_register_ethernet(&gmac_data);
}
MACHINE_START(RUT100, "Teltonika RUT100")

133
target/linux/gemini/patches-4.4/130-usb-ehci-add-fot2g-driver.patch
View File

@ -1,133 +0,0 @@
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -352,11 +352,13 @@ static void ehci_silence_controller(stru
ehci->rh_state = EHCI_RH_HALTED;
ehci_turn_off_all_ports(ehci);
+#ifndef CONFIG_ARCH_GEMINI
/* make BIOS/etc use companion controller during reboot */
ehci_writel(ehci, 0, &ehci->regs->configured_flag);
/* unblock posted writes */
ehci_readl(ehci, &ehci->regs->configured_flag);
+#endif
spin_unlock_irq(&ehci->lock);
}
@@ -608,7 +610,9 @@ static int ehci_run (struct usb_hcd *hcd
// Philips, Intel, and maybe others need CMD_RUN before the
// root hub will detect new devices (why?); NEC doesn't
ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
+#ifndef CONFIG_ARCH_GEMINI
ehci->command |= CMD_RUN;
+#endif
ehci_writel(ehci, ehci->command, &ehci->regs->command);
dbg_cmd (ehci, "init", ehci->command);
@@ -628,9 +632,11 @@ static int ehci_run (struct usb_hcd *hcd
*/
down_write(&ehci_cf_port_reset_rwsem);
ehci->rh_state = EHCI_RH_RUNNING;
+#ifndef CONFIG_ARCH_GEMINI
ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
msleep(5);
+#endif
up_write(&ehci_cf_port_reset_rwsem);
ehci->last_periodic_enable = ktime_get_real();
@@ -768,9 +774,10 @@ static irqreturn_t ehci_irq (struct usb_
pcd_status = status;
/* resume root hub? */
+#ifndef CONFIG_ARCH_GEMINI
if (ehci->rh_state == EHCI_RH_SUSPENDED)
usb_hcd_resume_root_hub(hcd);
-
+#endif
/* get per-port change detect bits */
if (ehci->has_ppcd)
ppcd = status >> 16;
@@ -1296,6 +1303,11 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ehci_hcd_sead3_driver
#endif
+#ifdef CONFIG_ARCH_GEMINI
+#include "ehci-fotg2.c"
+#define PLATFORM_DRIVER ehci_fotg2_driver
+#endif
+
static int __init ehci_hcd_init(void)
{
int retval = 0;
--- a/drivers/usb/host/ehci-timer.c
+++ b/drivers/usb/host/ehci-timer.c
@@ -208,7 +208,9 @@ static void ehci_handle_controller_death
/* Clean up the mess */
ehci->rh_state = EHCI_RH_HALTED;
+#ifndef CONFIG_ARCH_GEMINI
ehci_writel(ehci, 0, &ehci->regs->configured_flag);
+#endif
ehci_writel(ehci, 0, &ehci->regs->intr_enable);
ehci_work(ehci);
end_unlink_async(ehci);
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -657,7 +657,12 @@ static inline unsigned int
ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
{
if (ehci_is_TDI(ehci)) {
- switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
+#ifdef CONFIG_ARCH_GEMINI
+ portsc = readl(ehci_to_hcd(ehci)->regs + 0x80);
+ switch ((portsc>>22)&3) {
+#else
+ switch ((portsc>>26)&3) {
+#endif
case 0:
return 0;
case 1:
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -1076,6 +1076,11 @@ int ehci_hub_control(
/* see what we found out */
temp = check_reset_complete (ehci, wIndex, status_reg,
ehci_readl(ehci, status_reg));
+#ifdef CONFIG_ARCH_GEMINI
+ /* restart schedule */
+ ehci->command |= CMD_RUN;
+ ehci_writel(ehci, ehci->command, &ehci->regs->command);
+#endif
}
/* transfer dedicated ports to the companion hc */
--- a/include/linux/usb/ehci_def.h
+++ b/include/linux/usb/ehci_def.h
@@ -112,8 +112,13 @@ struct ehci_regs {
u32 frame_list; /* points to periodic list */
/* ASYNCLISTADDR: offset 0x18 */
u32 async_next; /* address of next async queue head */
-
+#ifndef CONFIG_ARCH_GEMINI
u32 reserved1[2];
+#else
+ u32 reserved1;
+ /* PORTSC: offset 0x20 for Faraday OTG */
+ u32 port_status[1];
+#endif
/* TXFILLTUNING: offset 0x24 */
u32 txfill_tuning; /* TX FIFO Tuning register */
@@ -125,8 +130,11 @@ struct ehci_regs {
u32 configured_flag;
#define FLAG_CF (1<<0) /* true: we'll support "high speed" */
+#ifndef CONFIG_ARCH_GEMINI
/* PORTSC: offset 0x44 */
u32 port_status[0]; /* up to N_PORTS */
+#endif
+
/* EHCI 1.1 addendum */
#define PORTSC_SUSPEND_STS_ACK 0
#define PORTSC_SUSPEND_STS_NYET 1

77
target/linux/gemini/patches-4.4/131-arm-gemini-add-usb-device.patch
View File

@ -1,77 +0,0 @@
--- a/arch/arm/mach-gemini/devices.c
+++ b/arch/arm/mach-gemini/devices.c
@@ -187,3 +187,64 @@ int platform_register_ethernet(struct ge
return platform_device_register(&ethernet_device);
}
+
+static struct resource usb0_resources[] = {
+ {
+ .start = GEMINI_USB0_BASE,
+ .end = GEMINI_USB0_BASE + 0xfff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_USB0,
+ .end = IRQ_USB0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct resource usb1_resources[] = {
+ {
+ .start = GEMINI_USB1_BASE,
+ .end = GEMINI_USB1_BASE + 0xfff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IRQ_USB1,
+ .end = IRQ_USB1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 usb0_dmamask = 0xffffffffUL;
+static u64 usb1_dmamask = 0xffffffffUL;
+
+static struct platform_device usb_device[] = {
+ {
+ .name = "ehci-fotg2",
+ .id = 0,
+ .dev = {
+ .dma_mask = &usb0_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(usb0_resources),
+ .resource = usb0_resources,
+ },
+ {
+ .name = "ehci-fotg2",
+ .id = 1,
+ .dev = {
+ .dma_mask = &usb1_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(usb1_resources),
+ .resource = usb1_resources,
+ },
+};
+
+int __init platform_register_usb(unsigned int id)
+{
+ if (id > 1)
+ return -EINVAL;
+
+ return platform_device_register(&usb_device[id]);
+}
+
--- a/arch/arm/mach-gemini/common.h
+++ b/arch/arm/mach-gemini/common.h
@@ -30,6 +30,7 @@ extern int platform_register_pflash(unsi
unsigned int nr_parts);
extern int platform_register_watchdog(void);
extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
+extern int platform_register_usb(unsigned int id);
extern void gemini_restart(enum reboot_mode mode, const char *cmd);

65
target/linux/gemini/patches-4.4/132-arm-gemini-register-usb.patch
View File

@ -1,65 +0,0 @@
--- a/arch/arm/mach-gemini/board-wbd111.c
+++ b/arch/arm/mach-gemini/board-wbd111.c
@@ -145,6 +145,7 @@ static void __init wbd111_init(void)
platform_register_watchdog();
platform_device_register(&wbd111_phy_device);
platform_register_ethernet(&gmac_data);
+ platform_register_usb(0);
}
MACHINE_START(WBD111, "Wiliboard WBD-111")
--- a/arch/arm/mach-gemini/board-wbd222.c
+++ b/arch/arm/mach-gemini/board-wbd222.c
@@ -147,6 +147,7 @@ static void __init wbd222_init(void)
platform_register_watchdog();
platform_device_register(&wbd222_phy_device);
platform_register_ethernet(&gmac_data);
+ platform_register_usb(0);
}
MACHINE_START(WBD222, "Wiliboard WBD-222")
--- a/arch/arm/mach-gemini/board-rut1xx.c
+++ b/arch/arm/mach-gemini/board-rut1xx.c
@@ -105,6 +105,7 @@ static void __init rut1xx_init(void)
platform_register_watchdog();
platform_device_register(&rut1xx_phy_device);
platform_register_ethernet(&gmac_data);
+ platform_register_usb(0);
}
MACHINE_START(RUT100, "Teltonika RUT100")
--- a/arch/arm/mach-gemini/board-nas4220b.c
+++ b/arch/arm/mach-gemini/board-nas4220b.c
@@ -134,10 +134,23 @@ static void __init ib4220b_gmac_init(voi
GLOBAL_ARBITRATION1_CTRL));
}
+static void __init usb_ib4220b_init(void)
+{
+ unsigned int val;
+
+ val = readl((void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_MISC_CTRL));
+ val &= ~(USB0_PLUG_MINIB | USB1_PLUG_MINIB);
+ val |= USB0_VBUS_ON | USB1_VBUS_ON;
+ writel(val, (void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_MISC_CTRL));
+}
+
static void __init ib4220b_init(void)
{
gemini_gpio_init();
ib4220b_gmac_init();
+ usb_ib4220b_init();
platform_register_uart();
platform_register_pflash(SZ_16M, NULL, 0);
platform_device_register(&ib4220b_led_device);
@@ -146,6 +159,8 @@ static void __init ib4220b_init(void)
platform_register_watchdog();
platform_device_register(&ib4220b_phy_device);
platform_register_ethernet(&ib4220b_gmac_data);
+ platform_register_usb(0);
+ platform_register_usb(1);
}
MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")

66
target/linux/gemini/patches-4.4/140-arm-gemini-add-pci-support.patch
View File

@ -1,66 +0,0 @@
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -399,6 +399,7 @@ config ARCH_GEMINI
select CLKSRC_MMIO
select CPU_FA526
select GENERIC_CLOCKEVENTS
+ select MIGHT_HAVE_PCI
help
Support for the Cortina Systems Gemini family SoCs
--- a/arch/arm/mach-gemini/include/mach/hardware.h
+++ b/arch/arm/mach-gemini/include/mach/hardware.h
@@ -68,4 +68,9 @@
*/
#define IO_ADDRESS(x) IOMEM((((x) & 0xFFF00000) >> 4) | ((x) & 0x000FFFFF) | 0xF0000000)
+/*
+ * PCI subsystem macros
+ */
+#define pcibios_assign_all_busses() 1
+
#endif
--- a/arch/arm/mach-gemini/include/mach/irqs.h
+++ b/arch/arm/mach-gemini/include/mach/irqs.h
@@ -43,11 +43,14 @@
#define NORMAL_IRQ_NUM 32
-#define GPIO_IRQ_BASE NORMAL_IRQ_NUM
+#define PCI_IRQ_BASE NORMAL_IRQ_NUM
+#define PCI_IRQ_NUM 4
+
+#define GPIO_IRQ_BASE (NORMAL_IRQ_NUM + PCI_IRQ_NUM)
#define GPIO_IRQ_NUM (3 * 32)
#define ARCH_TIMER_IRQ IRQ_TIMER2
-#define NR_IRQS (NORMAL_IRQ_NUM + GPIO_IRQ_NUM)
+#define NR_IRQS (NORMAL_IRQ_NUM + PCI_IRQ_NUM + GPIO_IRQ_NUM)
#endif /* __MACH_IRQS_H__ */
--- a/arch/arm/mach-gemini/Makefile
+++ b/arch/arm/mach-gemini/Makefile
@@ -6,6 +6,8 @@
obj-y := irq.o mm.o time.o devices.o gpio.o idle.o reset.o
+obj-$(CONFIG_PCI) += pci.o
+
# Board-specific support
obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o
obj-$(CONFIG_MACH_RUT100) += board-rut1xx.o
--- a/arch/arm/mach-gemini/mm.c
+++ b/arch/arm/mach-gemini/mm.c
@@ -59,6 +59,11 @@ static struct map_desc gemini_io_desc[]
.length = SZ_512K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)IO_ADDRESS(GEMINI_PCI_IO_BASE),
+ .pfn = __phys_to_pfn(GEMINI_PCI_IO_BASE),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)IO_ADDRESS(GEMINI_FLASH_CTRL_BASE),
.pfn = __phys_to_pfn(GEMINI_FLASH_CTRL_BASE),
.length = SZ_512K,

192
target/linux/gemini/patches-4.4/150-gemini-pata.patch
View File

@ -1,192 +0,0 @@
--- a/arch/arm/mach-gemini/include/mach/global_reg.h
+++ b/arch/arm/mach-gemini/include/mach/global_reg.h
@@ -227,7 +227,13 @@
#define USB0_PLUG_MINIB (1 << 29)
#define GMAC_GMII (1 << 28)
#define GMAC_1_ENABLE (1 << 27)
-/* TODO: define ATA/SATA bits */
+/* 011 - ata0 <-> sata0, sata1; bring out ata1
+ * 010 - ata1 <-> sata1, sata0; bring out ata0
+ * 001 - ata0 <-> sata0, ata1 <-> sata1; bring out ata1
+ * 000 - ata0 <-> sata0, ata1 <-> sata1; bring out ata0 */
+#define IDE_IOMUX_MASK (7 << 24)
+#define IDE_IOMUX_SATA1_SATA0 (2 << 24)
+#define IDE_IOMUX_SATA0_SATA1 (3 << 24)
#define USB1_VBUS_ON (1 << 23)
#define USB0_VBUS_ON (1 << 22)
#define APB_CLKOUT_ENABLE (1 << 21)
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -89,6 +89,9 @@ void __init gemini_init_irq(void)
irq_set_handler(i, handle_edge_irq);
mode |= 1 << i;
level |= 1 << i;
+ } else if (i >= IRQ_IDE0 && i <= IRQ_IDE1) {
+ irq_set_handler(i, handle_edge_irq);
+ mode |= 1 << i;
} else {
irq_set_handler(i, handle_level_irq);
}
--- a/arch/arm/mach-gemini/common.h
+++ b/arch/arm/mach-gemini/common.h
@@ -31,6 +31,7 @@ extern int platform_register_pflash(unsi
extern int platform_register_watchdog(void);
extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
extern int platform_register_usb(unsigned int id);
+extern int platform_register_pata(unsigned int id);
extern void gemini_restart(enum reboot_mode mode, const char *cmd);
--- a/arch/arm/mach-gemini/devices.c
+++ b/arch/arm/mach-gemini/devices.c
@@ -248,3 +248,67 @@ int __init platform_register_usb(unsigne
return platform_device_register(&usb_device[id]);
}
+static u64 pata_gemini_dmamask0 = 0xffffffffUL;
+static u64 pata_gemini_dmamask1 = 0xffffffffUL;
+
+static struct resource pata_gemini_resources0[] =
+{
+ [0] = {
+ .start = GEMINI_IDE0_BASE,
+ .end = GEMINI_IDE0_BASE + 0x40,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IDE0,
+ .end = IRQ_IDE0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct resource pata_gemini_resources1[] =
+{
+ [0] = {
+ .start = GEMINI_IDE1_BASE,
+ .end = GEMINI_IDE1_BASE + 0x40,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IDE1,
+ .end = IRQ_IDE1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device pata_gemini_devices[] =
+{
+ {
+ .name = "pata-gemini",
+ .id = 0,
+ .dev =
+ {
+ .dma_mask = &pata_gemini_dmamask0,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(pata_gemini_resources0),
+ .resource = pata_gemini_resources0,
+ },
+ {
+ .name = "pata-gemini",
+ .id = 1,
+ .dev =
+ {
+ .dma_mask = &pata_gemini_dmamask1,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(pata_gemini_resources1),
+ .resource = pata_gemini_resources1,
+ },
+};
+
+int __init platform_register_pata(unsigned int id)
+{
+ if (id > 1)
+ return -EINVAL;
+
+ return platform_device_register(&pata_gemini_devices[id]);
+}
--- a/arch/arm/mach-gemini/mm.c
+++ b/arch/arm/mach-gemini/mm.c
@@ -24,6 +24,11 @@ static struct map_desc gemini_io_desc[]
.length = SZ_512K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)IO_ADDRESS(GEMINI_SATA_BASE),
+ .pfn = __phys_to_pfn(GEMINI_SATA_BASE),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)IO_ADDRESS(GEMINI_UART_BASE),
.pfn = __phys_to_pfn(GEMINI_UART_BASE),
.length = SZ_512K,
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -567,6 +567,16 @@ config PATA_EP93XX
If unsure, say N.
+config PATA_GEMINI
+ tristate "Gemini PATA support (Experimental)"
+ depends on ARCH_GEMINI
+ help
+ This option enables support for the Gemini PATA-Controller.
+ Note that the Gemini SoC has no native SATA-Controller but an
+ onboard PATA-SATA bridge.
+
+ If unsure, say N.
+
config PATA_HPT366
tristate "HPT 366/368 PATA support"
depends on PCI
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_PATA_CS5536) += pata_cs5536
obj-$(CONFIG_PATA_CYPRESS) += pata_cypress.o
obj-$(CONFIG_PATA_EFAR) += pata_efar.o
obj-$(CONFIG_PATA_EP93XX) += pata_ep93xx.o
+obj-$(CONFIG_PATA_GEMINI) += pata_gemini.o
obj-$(CONFIG_PATA_HPT366) += pata_hpt366.o
obj-$(CONFIG_PATA_HPT37X) += pata_hpt37x.o
obj-$(CONFIG_PATA_HPT3X2N) += pata_hpt3x2n.o
--- a/arch/arm/mach-gemini/board-nas4220b.c
+++ b/arch/arm/mach-gemini/board-nas4220b.c
@@ -146,11 +146,28 @@ static void __init usb_ib4220b_init(void
GLOBAL_MISC_CTRL));
}
+static void __init sata_ib4220b_init(void)
+{
+ unsigned val;
+
+ val = readl((void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_MISC_CTRL));
+ val &= ~(IDE_IOMUX_MASK | PFLASH_PADS_DISABLE);
+ val |= IDE_PADS_ENABLE;
+ writel(val, (void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
+ GLOBAL_MISC_CTRL));
+
+ /* enabling ports for presence detection, master only */
+ writel(0x00000001, (void __iomem*)(IO_ADDRESS(GEMINI_SATA_BASE) + 0x18));
+ writel(0x00000001, (void __iomem*)(IO_ADDRESS(GEMINI_SATA_BASE) + 0x1c));
+}
+
static void __init ib4220b_init(void)
{
gemini_gpio_init();
ib4220b_gmac_init();
usb_ib4220b_init();
+ sata_ib4220b_init();
platform_register_uart();
platform_register_pflash(SZ_16M, NULL, 0);
platform_device_register(&ib4220b_led_device);
@@ -161,6 +178,8 @@ static void __init ib4220b_init(void)
platform_register_ethernet(&ib4220b_gmac_data);
platform_register_usb(0);
platform_register_usb(1);
+ platform_register_pata(0);
+ platform_register_pata(1);
}
MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")

5
target/linux/gemini/raidsonic/config-default
View File

@ -1,5 +0,0 @@
CONFIG_CMDLINE="rootfstype=squashfs,jffs2 noinitrd console=ttyS0,19200 mem=128M mtdparts=physmap-flash.0:128k(BOOT),3072k(Kern),6144k(Ramdisk),6144k(Application),128k(VCTL),640k(CurConf),128k(FIS-directory),12288k@0x320000(rootfs),15360k@0x20000(firmware) root=/dev/mtdblock7"
CONFIG_MACH_NAS4220B=y
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_SPLIT_FIRMWARE=y

17
target/linux/gemini/raidsonic/target.mk
View File

@ -1,17 +0,0 @@
#
# Copyright (C) 2014 OpenWrt.org
#
SUBTARGET:=raidsonic
BOARDNAME:=Raidsonic NAS42x0
FEATURES+=usb
DEFAULT_PACKAGES+=kmod-usb2 kmod-md-mod kmod-md-linear kmod-md-multipath \
kmod-md-raid0 kmod-md-raid1 kmod-md-raid10 kmod-md-raid456 \
kmod-fs-btrfs kmod-fs-cifs kmod-fs-ext4 kmod-fs-nfs \
kmod-fs-nfsd kmod-fs-ntfs kmod-fs-reiserfs kmod-fs-vfat \
kmod-nls-utf8 kmod-usb-storage-extras \
samba36-server mdadm cfdisk fdisk e2fsprogs badblocks
define Target/Description
Build firmware images for Raidsonic NAS4220.
endef

10
target/linux/gemini/wiligear/target.mk
View File

@ -1,10 +0,0 @@
#
# Copyright (C) 2014 OpenWrt.org
#
SUBTARGET:=wiligear
BOARDNAME:=Wiligear WBD-222/111
define Target/Description
Build firmware images for Wiligear WBD-222 and WBD-111 boards.
endef

42
target/linux/generic/backport-4.14/030-USB-serial-option-fix-dwm-158-3g-modem-interface.patch Normal file
View File

@ -0,0 +1,42 @@
From 4d304a6fe93538ce356b4593dc43476b50c023e7 Mon Sep 17 00:00:00 2001
From: Giuseppe Lippolis <giu.lippolis@gmail.com>
Date: Mon, 23 Apr 2018 09:03:06 +0200
Subject: USB: serial: option: blacklist unused dwm-158 interfaces
The dwm-158 interface 4 and 5 doesn't answer to the AT commands
and doesn't appears a option interface.
Tested on openwrt distribution (kernel 4.14 using the old blacklist
definitions).
Lars Melin also writes:
Blacklisting interface 4 and 5 is correct because:
MI_00 D-Link Mobile Broadband Device (cdc_ether)
MI_02 D-Link HSPA+DataCard Diagnostics Interface (also ppp modem)
MI_03 D-Link HSPA+DataCard NMEA Device
MI_04 D-Link HSPA+DataCard Speech Port
MI_05 D-Link HSPA+DataCard Debug Port
MI_06 USB Mass Storage Device
Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
[ johan: add Lars's comment on the interface layout and reword summary ]
Cc: Lars Melin <larsm17@gmail.com>
Cc: Dan Williams <dcbw@redhat.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
---
drivers/usb/serial/option.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -1919,7 +1919,8 @@ static const struct usb_device_id option
{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d01, 0xff) }, /* D-Link DWM-156 (variant) */
{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d02, 0xff) },
{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d03, 0xff) },
- { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d04, 0xff) }, /* D-Link DWM-158 */
+ { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d04, 0xff), /* D-Link DWM-158 */
+ .driver_info = RSVD(4) | RSVD(5) },
{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d0e, 0xff) }, /* D-Link DWM-157 C1 */
{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e19, 0xff), /* D-Link DWM-221 B1 */
.driver_info = RSVD(4) },

109
target/linux/generic/backport-4.14/030-v4.17-0001-usb-dwc2-add-support-for-host-mode-external-vbus-sup.patch Normal file
View File

@ -0,0 +1,109 @@
From 531ef5ebea96394ddb7f554d4d88e017dde30a59 Mon Sep 17 00:00:00 2001
From: Amelie Delaunay <amelie.delaunay@st.com>
Date: Tue, 13 Feb 2018 09:28:12 +0100
Subject: [PATCH] usb: dwc2: add support for host mode external vbus supply
This patch adds a way to enable an external vbus supply in host mode,
when dwc2 drvvbus signal is not used.
This patch is very similar to the one done in U-Boot dwc2 driver [1]. It
also adds dynamic vbus supply management depending on the role and state
of the core.
[1] https://lists.denx.de/pipermail/u-boot/2017-March/283434.html
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
---
drivers/usb/dwc2/core.h | 2 ++
drivers/usb/dwc2/hcd.c | 26 ++++++++++++++++++++++++++
2 files changed, 28 insertions(+)
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -777,6 +777,7 @@ struct dwc2_hregs_backup {
* @plat: The platform specific configuration data. This can be
* removed once all SoCs support usb transceiver.
* @supplies: Definition of USB power supplies
+ * @vbus_supply: Regulator supplying vbus.
* @phyif: PHY interface width
* @lock: Spinlock that protects all the driver data structures
* @priv: Stores a pointer to the struct usb_hcd
@@ -913,6 +914,7 @@ struct dwc2_hsotg {
struct usb_phy *uphy;
struct dwc2_hsotg_plat *plat;
struct regulator_bulk_data supplies[DWC2_NUM_SUPPLIES];
+ struct regulator *vbus_supply;
u32 phyif;
spinlock_t lock;
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -359,6 +359,23 @@ static void dwc2_gusbcfg_init(struct dwc
dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
}
+static int dwc2_vbus_supply_init(struct dwc2_hsotg *hsotg)
+{
+ hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
+ if (IS_ERR(hsotg->vbus_supply))
+ return 0;
+
+ return regulator_enable(hsotg->vbus_supply);
+}
+
+static int dwc2_vbus_supply_exit(struct dwc2_hsotg *hsotg)
+{
+ if (hsotg->vbus_supply)
+ return regulator_disable(hsotg->vbus_supply);
+
+ return 0;
+}
+
/**
* dwc2_enable_host_interrupts() - Enables the Host mode interrupts
*
@@ -3246,6 +3263,7 @@ static void dwc2_conn_id_status_change(s
/* B-Device connector (Device Mode) */
if (gotgctl & GOTGCTL_CONID_B) {
+ dwc2_vbus_supply_exit(hsotg);
/* Wait for switch to device mode */
dev_dbg(hsotg->dev, "connId B\n");
if (hsotg->bus_suspended) {
@@ -4352,6 +4370,9 @@ static int _dwc2_hcd_start(struct usb_hc
}
spin_unlock_irqrestore(&hsotg->lock, flags);
+
+ dwc2_vbus_supply_init(hsotg);
+
return 0;
}
@@ -4379,6 +4400,8 @@ static void _dwc2_hcd_stop(struct usb_hc
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
spin_unlock_irqrestore(&hsotg->lock, flags);
+ dwc2_vbus_supply_exit(hsotg);
+
usleep_range(1000, 3000);
}
@@ -4415,6 +4438,7 @@ static int _dwc2_hcd_suspend(struct usb_
hprt0 |= HPRT0_SUSP;
hprt0 &= ~HPRT0_PWR;
dwc2_writel(hprt0, hsotg->regs + HPRT0);
+ dwc2_vbus_supply_exit(hsotg);
}
/* Enter hibernation */
@@ -4495,6 +4519,8 @@ static int _dwc2_hcd_resume(struct usb_h
spin_unlock_irqrestore(&hsotg->lock, flags);
dwc2_port_resume(hsotg);
} else {
+ dwc2_vbus_supply_init(hsotg);
+
/* Wait for controller to correctly update D+/D- level */
usleep_range(3000, 5000);

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