rockchip: add support for LYT T68M

This commit is contained in:
AmadeusGhost 2023-05-30 23:20:21 +08:00
parent fa7f6dd960
commit e00aa77d0e
7 changed files with 1167 additions and 20 deletions

View File

@ -170,6 +170,17 @@ endef
# RK3568 boards # RK3568 boards
define U-Boot/lyt-t68m-rk3568
BUILD_SUBTARGET:=armv8
NAME:=LYT T68M
BUILD_DEVICES:= \
lyt_t68m
DEPENDS:=+PACKAGE_u-boot-lyt-t68m-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.34.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/mrkaio-m68s-rk3568 define U-Boot/mrkaio-m68s-rk3568
BUILD_SUBTARGET:=armv8 BUILD_SUBTARGET:=armv8
NAME:=Mrkaio M68S NAME:=Mrkaio M68S
@ -264,6 +275,7 @@ define U-Boot/station-p2-rk3568
endef endef
UBOOT_TARGETS := \ UBOOT_TARGETS := \
lyt-t68m-rk3568 \
mrkaio-m68s-rk3568 \ mrkaio-m68s-rk3568 \
opc-h68k-rk3568 \ opc-h68k-rk3568 \
photonicat-rk3568 \ photonicat-rk3568 \

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@ -0,0 +1,403 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -175,6 +175,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3568-evb.dtb \
rk3568-r66s.dtb \
+ rk3568-lyt-t68m.dtb \
rk3568-opc-h68k.dtb \
rk3568-mrkaio-m68s.dtb \
rk3568-nanopi-r5s.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3568-lyt-t68m-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
+ };
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ u-boot,spl-fifo-mode;
+};
+
+&uart2 {
+ u-boot,dm-spl;
+ clock-frequency = <24000000>;
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-lyt-t68m.dts
@@ -0,0 +1,272 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3568-evb.dts"
+
+/ {
+ model = "LYT T68M";
+ compatible = "lyt,t68m", "rockchip,rk3568";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ vdd_cpu: regulator@1c {
+ compatible = "tcs,tcs4525";
+ reg = <0x1c>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
+ #clock-cells = <1>;
+ clock-names = "mclk";
+ clocks = <&cru I2S1_MCLKOUT_TX>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
+ rockchip,system-power-controller;
+ #sound-dai-cells = <0>;
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-name = "vdd_gpu";
+ regulator-always-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_npu: DCDC_REG4 {
+ regulator-name = "vdd_npu";
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG5 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_image: LDO_REG1 {
+ regulator-name = "vdda0v9_image";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v9: LDO_REG2 {
+ regulator-name = "vdda_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_pmu: LDO_REG3 {
+ regulator-name = "vdda0v9_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vccio_acodec: LDO_REG4 {
+ regulator-name = "vccio_acodec";
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG7 {
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pmu: LDO_REG8 {
+ regulator-name = "vcca1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca1v8_image: LDO_REG9 {
+ regulator-name = "vcca1v8_image";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3: SWITCH_REG1 {
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: SWITCH_REG2 {
+ regulator-name = "vcc3v3_sd";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+
+ codec {
+ mic-in-differential;
+ };
+ };
+};
+
+&pinctrl {
+ pmic {
+ pmic_int: pmic_int {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
--- /dev/null
+++ b/configs/lyt-t68m-rk3568_defconfig
@@ -0,0 +1,91 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-lyt-t68m"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-lyt-t68m.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ADC=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_RESET_SCMI=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y

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@ -34,7 +34,8 @@ rockchip_setup_interfaces()
radxa,e25) radxa,e25)
ucidef_set_interfaces_lan_wan 'eth0' 'eth1' ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
;; ;;
fastrhino,r68s) fastrhino,r68s|\
lyt,t68m)
ucidef_set_interfaces_lan_wan 'eth0 eth2 eth3' 'eth1' ucidef_set_interfaces_lan_wan 'eth0 eth2 eth3' 'eth1'
;; ;;
friendlyarm,nanopi-r5s) friendlyarm,nanopi-r5s)
@ -46,13 +47,6 @@ rockchip_setup_interfaces()
esac esac
} }
generate_mac_from_mmc_cid()
{
local sd_hash=$(sha256sum /sys/class/block/mmcblk*/device/cid | head -n 1)
local mac_base=$(macaddr_canonicalize "$(echo "${sd_hash}" | dd bs=1 count=12 2>/dev/null)")
echo "$(macaddr_unsetbit_mc "$(macaddr_setbit_la "${mac_base}")")"
}
nanopi_r4s_get_mac() nanopi_r4s_get_mac()
{ {
local interface=$1 local interface=$1
@ -65,7 +59,7 @@ nanopi_r4s_get_mac()
address=$(macaddr_setbit_la "$address") address=$(macaddr_setbit_la "$address")
fi fi
else else
address=$(generate_mac_from_mmc_cid) address=$(macaddr_generate_from_mmc_cid mmcblk1)
if [ "$interface" = "lan" ]; then if [ "$interface" = "lan" ]; then
address=$(macaddr_add "$address" 1) address=$(macaddr_add "$address" 1)
fi fi
@ -86,20 +80,17 @@ rockchip_setup_macs()
dilusense,dlfr100|\ dilusense,dlfr100|\
ezpro,mrkaio-m68s|\ ezpro,mrkaio-m68s|\
ezpro,mrkaio-m68s-plus|\ ezpro,mrkaio-m68s-plus|\
hinlink,opc-h66k|\
hinlink,opc-h68k|\
hinlink,opc-h69k|\
fastrhino,r66s|\ fastrhino,r66s|\
fastrhino,r68s|\ fastrhino,r68s|\
firefly,rk3568-roc-pc|\ firefly,rk3568-roc-pc|\
friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2c|\
friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r2s|\
friendlyarm,nanopi-r5s|\ hinlink,opc-h66k|\
friendlyarm,nanopi-r5c|\ hinlink,opc-h68k|\
sharevdi,h3399pc|\ hinlink,opc-h69k|\
sharevdi,guangmiao-g4c|\ rocktech,mpc1903|\
rocktech,mpc1903) sharevdi,h3399pc)
wan_mac=$(generate_mac_from_mmc_cid) wan_mac=$(macaddr_generate_from_mmc_cid mmcblk0)
lan_mac=$(macaddr_add "$wan_mac" +1) lan_mac=$(macaddr_add "$wan_mac" +1)
;; ;;
friendlyarm,nanopi-r4s|\ friendlyarm,nanopi-r4s|\
@ -107,6 +98,17 @@ rockchip_setup_macs()
wan_mac=$(nanopi_r4s_get_mac wan) wan_mac=$(nanopi_r4s_get_mac wan)
lan_mac=$(nanopi_r4s_get_mac lan) lan_mac=$(nanopi_r4s_get_mac lan)
;; ;;
friendlyarm,nanopi-r5c|\
friendlyarm,nanopi-r5s|\
sharevdi,guangmiao-g4c)
wan_mac=$(macaddr_generate_from_mmc_cid mmcblk1)
lan_mac=$(macaddr_add "$wan_mac" +1)
;;
lyt,t68m)
addr=$(cat /sys/class/net/eth2/address)
ip link set dev eth0 address $(macaddr_add $addr -2)
ip link set dev eth1 address $(macaddr_add $addr -1)
;;
xunlong,orangepi-r1-plus|\ xunlong,orangepi-r1-plus|\
xunlong,orangepi-r1-plus-lts) xunlong,orangepi-r1-plus-lts)
lan_mac=$(cat /sys/class/net/eth1/address) lan_mac=$(cat /sys/class/net/eth1/address)

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@ -0,0 +1,718 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3568.dtsi"
/ {
model = "LYT T68M";
compatible = "lyt,t68m", "rockchip,rk3568";
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
mmc0 = &sdhci;
mmc1 = &sdmmc0;
led-boot = &led_state;
led-failsafe = &led_state;
led-running = &led_state;
led-upgrade = &led_state;
};
chosen: chosen {
stdout-path = "serial2:1500000n8";
};
#ifdef DTS_NO_LEGACY
hdmi-con {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
#endif
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_power_en>, <&led_state_en>;
led_state: state {
label = "red:state";
gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_power: power {
label = "green:power";
gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
vcc12v_dcin: vcc12v-dcin {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-name = "vcc12v_dcin";
};
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_usb: vcc5v0-usb {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_usb_host: vcc5v0-usb-host {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb_host_en>;
regulator-name = "vcc5v0_usb_host";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_usb>;
};
vcc5v0_usb_otg: vcc5v0-usb-otg {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb_otg_en>;
regulator-name = "vcc5v0_usb_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_usb>;
};
pcie30_avdd0v9: pcie30-avdd0v9 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc3v3_sys>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc3v3_sys>;
};
vcc3v3_pcie: vcc3v3-pcie {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_enable_h>;
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc12v_dcin>;
};
/* actually fed by vcc12v_dcin */
vcc3v3_minipcie: vcc3v3-minipcie {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&minipcie_enable_h>;
regulator-name = "vcc3v3_minipcie";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc3v3_pcie>;
};
};
&combphy0 {
status = "okay";
};
&combphy1 {
status = "okay";
};
&combphy2 {
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&cpu1 {
cpu-supply = <&vdd_cpu>;
};
&cpu2 {
cpu-supply = <&vdd_cpu>;
};
&cpu3 {
cpu-supply = <&vdd_cpu>;
};
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
tx_delay = <0x3c>;
rx_delay = <0x2f>;
phy-handle = <&rgmii_phy0>;
status = "okay";
};
&gmac1 {
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim
&gmac1m1_tx_bus2
&gmac1m1_rx_bus2
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus>;
snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
tx_delay = <0x42>;
rx_delay = <0x28>;
phy-handle = <&rgmii_phy1>;
status = "okay";
};
#ifdef DTS_NO_LEGACY
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&hdmi {
avdd-0v9-supply = <&vdda0v9_image>;
avdd-1v8-supply = <&vcca1v8_image>;
status = "okay";
};
&hdmi_in {
hdmi_in_vp0: endpoint {
remote-endpoint = <&vp0_out_hdmi>;
};
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&hdmi_sound {
status = "okay";
};
#endif
&i2c0 {
status = "okay";
vdd_cpu: regulator@1c {
compatible = "tcs,tcs4525";
reg = <0x1c>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1150000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
#clock-cells = <1>;
clock-names = "mclk";
clocks = <&cru I2S1_MCLKOUT_TX>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
rockchip,system-power-controller;
#sound-dai-cells = <0>;
wakeup-source;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
regulators {
vdd_logic: DCDC_REG1 {
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
regulator-init-microvolt = <900000>;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-name = "vdd_gpu";
regulator-always-on;
regulator-init-microvolt = <900000>;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_npu: DCDC_REG4 {
regulator-name = "vdd_npu";
regulator-init-microvolt = <900000>;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: DCDC_REG5 {
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_image: LDO_REG1 {
regulator-name = "vdda0v9_image";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v9: LDO_REG2 {
regulator-name = "vdda_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-name = "vdda0v9_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_acodec: LDO_REG4 {
regulator-name = "vccio_acodec";
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-name = "vcc3v3_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcca_1v8: LDO_REG7 {
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG8 {
regulator-name = "vcca1v8_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca1v8_image: LDO_REG9 {
regulator-name = "vcca1v8_image";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3: SWITCH_REG1 {
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_sd: SWITCH_REG2 {
regulator-name = "vcc3v3_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&i2s1_8ch {
rockchip,trcm-sync-tx-only;
status = "okay";
};
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
realtek,led-data = <0x6d60>;
};
};
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
realtek,led-data = <0x6d60>;
};
};
&pcie2x1 {
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_minipcie>;
status = "okay";
};
&pcie30phy {
data-lanes = <1 2>;
status = "okay";
};
&pcie3x1 {
num-lanes = <1>;
reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pcie3x2 {
num-lanes = <1>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pinctrl {
leds {
led_power_en: led_power_en {
rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
led_state_en: led_state_en {
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
minipcie_enable_h: minipcie-enable-h {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_enable_h: pcie-enable-h {
rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic_int {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
vcc5v0_usb_host_en: vcc5v0_usb_host_en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pmu_io_domains {
pmuio1-supply = <&vcc3v3_pmu>;
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
status = "okay";
};
&rng {
status = "okay";
};
&saradc {
vref-supply = <&vcca_1v8>;
status = "okay";
};
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};
&sdmmc0 {
bus-width = <4>;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
sd-uhs-sdr50;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <0>;
status = "okay";
};
&uart2 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host0_xhci {
extcon = <&usb2phy0>;
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usb_host1_xhci {
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy0_host {
phy-supply = <&vcc5v0_usb_host>;
status = "okay";
};
&usb2phy0_otg {
phy-supply = <&vcc5v0_usb_otg>;
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb2phy1_host {
phy-supply = <&vcc5v0_usb_host>;
status = "okay";
};
&usb2phy1_otg {
phy-supply = <&vcc5v0_usb_host>;
status = "okay";
};
#ifdef DTS_NO_LEGACY
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
status = "okay";
};
&vop_mmu {
status = "okay";
};
&vp0 {
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
remote-endpoint = <&hdmi_in_vp0>;
};
};
#endif

View File

@ -170,6 +170,16 @@ define Device/firefly_station-p2
endef endef
TARGET_DEVICES += firefly_station-p2 TARGET_DEVICES += firefly_station-p2
define Device/lyt_t68m
DEVICE_VENDOR := LYT
DEVICE_MODEL := T68M
SOC := rk3568
UBOOT_DEVICE_NAME := lyt-t68m-rk3568
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata
DEVICE_PACKAGES := kmod-r8125
endef
TARGET_DEVICES += lyt_t68m
define Device/pine64_rockpro64 define Device/pine64_rockpro64
DEVICE_VENDOR := Pine64 DEVICE_VENDOR := Pine64
DEVICE_MODEL := RockPro64 DEVICE_MODEL := RockPro64

View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile --- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -59,3 +59,16 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa @@ -59,3 +59,17 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
@ -17,3 +17,4 @@
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r68s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-t68m.dtb

View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile --- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -79,3 +79,15 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so @@ -79,3 +79,16 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
@ -16,3 +16,4 @@
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r68s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-t68m.dtb