ipq40xx: switch to kernel 4.19

This commit is contained in:
LEAN-ESX 2019-12-02 07:28:28 -08:00
parent beeab913da
commit dda1262dd2
26 changed files with 2322 additions and 332 deletions

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@ -9,13 +9,13 @@ CPU_SUBTYPE:=neon-vfpv4
MAINTAINER:=John Crispin <john@phrozen.org>
# TODO: drop kmod-usb-dwc3-of-simple when migrating to 4.19
KERNEL_PATCHVER:=4.14
KERNEL_PATCHVER:=4.19
KERNELNAME:=zImage Image dtbs
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
kmod-usb-dwc3-of-simple \
kmod-usb-dwc3-qcom \
kmod-leds-gpio kmod-gpio-button-hotplug swconfig \
kmod-ath10k wpad-openssl \
kmod-usb3 kmod-usb-dwc3 ath10k-firmware-qca4019 \

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@ -66,6 +66,7 @@ CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOUNCE=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CC_HAS_ASM_GOTO=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_QCOM=y
CONFIG_CLONE_BACKWARDS=y
@ -283,6 +284,14 @@ CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGHT_HAVE_PCI=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_MSM=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
# CONFIG_MMC_TIFM_SD is not set
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MSM_GCC_8660 is not set
# CONFIG_MSM_GCC_8916 is not set
@ -317,7 +326,6 @@ CONFIG_NEON=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_QCA8K=y
CONFIG_NET_DSA_TAG_QCA=y
# CONFIG_NET_DSA_VITESSE_VSC73XX is not set
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SWITCHDEV=y
@ -425,6 +433,7 @@ CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_QCOM_SPMI is not set
CONFIG_REGULATOR_VCTRL=y
CONFIG_REGULATOR_VQMMC_IPQ4019=y
CONFIG_RESET_CONTROLLER=y
# CONFIG_RESET_QCOM_AOSS is not set
CONFIG_RFS_ACCEL=y

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@ -43,6 +43,12 @@
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
@ -55,6 +61,14 @@
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
};
usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};

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@ -0,0 +1,45 @@
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2018, David Bauer <mail@david-bauer.net>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4018-ex61x0v2.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Netgear EX6200v2";
compatible = "netgear,ex6200v2";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
qcom,ath10k-calibration-variant = "Netgear-EX6150v2";
};
&wifi1 {
qcom,ath10k-calibration-variant = "Netgear-EX6150v2";
};

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@ -1,266 +1,9 @@
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
// Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
#include "qcom-ipq4018-jalapeno.dtsi"
/ {
model = "8devices Jalapeno";
compatible = "8dev,jalapeno";
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
ess-psgmii@98000 {
status = "okay";
};
counter@4a1000 {
compatible = "qcom,qca-gcnt";
reg = <0x4a1000 0x4>;
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
switch_lan_bmp = <0x10>; /* lan port bitmap */
};
edma@c080000 {
status = "okay";
};
};
};
&tlmm {
mdio_pins: mdio_pinmux {
pinmux_1 {
pins = "gpio53";
function = "mdio";
};
pinmux_2 {
pins = "gpio52";
function = "mdc";
};
pinconf {
pins = "gpio52", "gpio53";
bias-pull-up;
};
};
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <2>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54", "gpio59";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
status = "okay";
m25p80@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition1@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition2@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition3@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition4@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition5@e0000 {
label = "APPSBLENV"; /* uboot env*/
reg = <0x000e0000 0x00010000>;
read-only;
};
partition5@f0000 {
label = "APPSBL"; /* uboot */
reg = <0x000f0000 0x00080000>;
read-only;
};
partition5@170000 {
label = "ART";
reg = <0x00170000 0x00010000>;
read-only;
};
};
};
spi-nand@1 {
status = "okay";
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "ubi";
reg = <0x00000000 0x08000000>;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&gmac0 {
qcom,poll_required = <1>;
qcom,poll_required_dynamic = <1>;
qcom,phy_mdio_addr = <3>;
vlan_tag = <1 0x10>;
};
&gmac1 {
qcom,poll_required = <1>;
qcom,poll_required_dynamic = <1>;
qcom,phy_mdio_addr = <4>;
vlan_tag = <2 0x20>;
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "8devices-Jalapeno";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "8devices-Jalapeno";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};

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@ -0,0 +1,269 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
// Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
ess-psgmii@98000 {
status = "okay";
};
counter@4a1000 {
compatible = "qcom,qca-gcnt";
reg = <0x4a1000 0x4>;
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
status = "okay";
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
switch_lan_bmp = <0x10>; /* lan port bitmap */
};
edma@c080000 {
status = "okay";
};
};
};
&tlmm {
mdio_pins: mdio_pinmux {
pinmux_1 {
pins = "gpio53";
function = "mdio";
};
pinmux_2 {
pins = "gpio52";
function = "mdc";
};
pinconf {
pins = "gpio52", "gpio53";
bias-pull-up;
};
};
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <2>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54", "gpio59";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
status = "okay";
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
flash@0 {
status = "okay";
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition@e0000 {
label = "APPSBLENV"; /* uboot env*/
reg = <0x000e0000 0x00010000>;
read-only;
};
partition@f0000 {
label = "APPSBL"; /* uboot */
reg = <0x000f0000 0x00080000>;
read-only;
};
partition@170000 {
label = "ART";
reg = <0x00170000 0x00010000>;
read-only;
};
};
};
spi-nand@1 {
status = "okay";
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "ubi";
reg = <0x00000000 0x08000000>;
};
};
};
};
&blsp1_uart1 {
status = "okay";
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
};
&cryptobam {
status = "okay";
};
&gmac0 {
qcom,poll_required = <1>;
qcom,poll_required_dynamic = <1>;
qcom,phy_mdio_addr = <3>;
vlan_tag = <1 0x10>;
};
&gmac1 {
qcom,poll_required = <1>;
qcom,poll_required_dynamic = <1>;
qcom,phy_mdio_addr = <4>;
vlan_tag = <2 0x20>;
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "8devices-Jalapeno";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "8devices-Jalapeno";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};

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@ -0,0 +1,81 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2019, CRISIS INNOVATION LAB d.o.o.
* Author: Robert Marko <robert@meshpoint.me>
*/
#include "qcom-ipq4018-jalapeno.dtsi"
/ {
model = "Crisis Innovation Lab MeshPoint.One";
compatible = "cilab,meshpoint-one";
aliases {
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
};
soc {
i2c-gpio {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
gpios = <&tlmm 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
&tlmm 4 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */
>;
bme280@76 {
status = "okay";
compatible = "bosch,bme280";
reg = <0x76>;
};
pcf2129@51 {
status = "okay";
compatible = "nxp,pcf2129";
reg = <0x51>;
};
ina230@40 {
status = "okay";
compatible = "ti,ina230";
reg = <0x40>;
shunt-resistor = <2000>;
};
ina230@44 {
status = "okay";
compatible = "ti,ina230";
reg = <0x44>;
shunt-resistor = <2000>;
};
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART >;
};
};
leds {
compatible = "gpio-leds";
led_status: status {
label = "meshpoint-one:blue:status";
gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
};
};
};

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@ -0,0 +1,78 @@
/*
* Copyright (c) 2019 Hugo Yuan <hugolxq@gmail.com>
*/
#include "qcom-ipq4019-hugo-ac1200.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Hugo AC1200";
compatible = "hugo,ac1200", "qcom,ipq4019";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "0:SBL1";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "0:MIBIB";
reg = <0x40000 0x20000>;
read-only;
};
partition@60000 {
label = "0:QSEE";
reg = <0x60000 0x60000>;
read-only;
};
partition@c0000 {
label = "0:CDT";
reg = <0xc0000 0x10000>;
read-only;
};
partition@d0000 {
label = "0:DDRPARAMS";
reg = <0xd0000 0x10000>;
read-only;
};
partition@e0000 {
label = "0:APPSBLENV";
reg = <0xe0000 0x10000>;
read-only;
};
partition@f0000 {
label = "0:APPSBL";
reg = <0xf0000 0x80000>;
read-only;
};
partition@170000 {
label = "0:ART";
reg = <0x170000 0x10000>;
read-only;
};
partition@180000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x180000 0x1e80000>;
};
};
};
};

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@ -0,0 +1,250 @@
/*
* Copyright (c) 2019 Hugo Yuan <hugolxq@gmail.com>
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Hugo AC1200";
compatible = "qcom,ipq4019";
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256MB */
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
soc {
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
dwc3@6000000 {
#address-cells = <1>;
#size-cells = <0>;
usb2_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
serial@78af000 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
serial@78b0000 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "okay";
};
i2c@78b7000 { /* BLSP1 QUP2 */
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
dwc3@8a00000 {
#address-cells = <1>;
#size-cells = <0>;
usb3_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
usb3_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
leds {
compatible = "gpio-leds";
led1 {
label = "ac1200:green:ctrl1";
gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
};
led2 {
label = "ac1200:red:ctrl2";
gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
};
power: led3 {
label = "ac1200:blue:ctrl3";
gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
};
&blsp_dma {
status = "okay";
};
&cryptobam {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&tlmm {
i2c_0_pins: i2c-0-pinmux {
mux {
pins = "gpio20", "gpio21";
function = "blsp_i2c0";
bias-disable;
};
};
mdio_pins: mdio_pinmux {
mux_1 {
pins = "gpio6";
function = "mdio";
bias-pull-up;
};
mux_2 {
pins = "gpio7";
function = "mdc";
bias-pull-up;
};
};
serial_0_pins: serial0-pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
serial_1_pins: serial1_pinmux {
mux {
pins = "gpio8", "gpio9";
function = "blsp_uart1";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pinmux {
function = "blsp_spi0";
pins = "gpio13", "gpio14", "gpio15";
drive-strength = <12>;
bias-disable;
};
pinmux_cs {
function = "gpio";
pins = "gpio12";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "hugo_ac1200";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "hugo_ac1200";
};

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@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019-r619ac.dtsi"
/ {
model = "P&W R619AC 128M";
compatible = "p2w,r619ac-128m";
chosen {
bootargs-append = " root=/dev/ubiblock0_1 rootfstype=squashfs";
};
};
&rootfs_part1 {
reg = <0x0 0x8000000>;
};
/delete-node/ &rootfs_part2;

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@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019-r619ac.dtsi"
/ {
model = "P&W R619AC";
compatible = "p2w,r619ac";
chosen {
bootargs-append = " root=/dev/ubiblock0_1 rootfstype=squashfs";
};
};

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@ -0,0 +1,279 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
aliases {
led-boot = &led_sys;
led-failsafe = &led_sys;
led-running = &led_sys;
led-upgrade = &led_sys;
label-mac-device = &gmac0;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
};
usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led_sys: sys {
label = "r619ac:blue:sys";
gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
};
wlan2g {
label = "r619ac:blue:wlan2g";
gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tpt";
};
wlan5g {
label = "r619ac:blue:wlan5g";
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
status = "okay";
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@1 {
label = "Bootloader";
reg = <0x0 0x170000>;
};
partition@170000 {
label = "ART";
reg = <0x170000 0x10000>;
};
partition@180000 {
label = "unused";
reg = <0x180000 0xe80000>;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&nand {
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
rootfs_part1: partition@0 {
label = "rootfs";
reg = <0x0 0x4000000>;
};
rootfs_part2: partition@4000000 {
label = "unused1";
reg = <0x4000000 0x4000000>;
};
};
};
};
&qpic_bam {
status = "okay";
};
&sdhci {
pinctrl-0 = <&sd_0_pins>;
pinctrl-names = "default";
cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
vqmmc-supply = <&vqmmc>;
status = "okay";
};
&tlmm {
mdio_pins: mdio_pinmux {
mux_1 {
pins = "gpio6";
function = "mdio";
bias-pull-up;
};
mux_2 {
pins = "gpio7";
function = "mdc";
bias-pull-up;
};
};
sd_0_pins: sd_0_pinmux {
mux_1 {
pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio28";
function = "sdio";
drive-strength = <10>;
};
mux_2 {
pins = "gpio27";
function = "sdio";
drive-strength = <16>;
};
};
serial_0_pins: serial0-pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
led_pins: led_pinmux {
mux {
pins = "gpio32", "gpio39", "gpio50";
function = "gpio";
bias-pull-up;
output-low;
};
mux_1 {
pins = "gpio52";
function = "gpio";
bias-pull-up;
output-high;
};
mux_2 {
pins = "gpio61";
function = "gpio";
bias-pull-down;
output-high;
};
};
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&vqmmc {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "R619AC";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "R619AC";
};

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@ -0,0 +1,276 @@
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (C) 2019 X-WRT <dev@x-wrt.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "ASUS RT-ACRH17";
compatible = "asus,rt-acrh17";
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
chosen {
bootargs-append = " ubi.mtd=UBI_DEV";
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
};
usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
power: status {
label = "rt-acrh17:blue:status";
gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "rt-acrh17:blue:lan1";
gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "rt-acrh17:blue:lan2";
gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "rt-acrh17:blue:lan3";
gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "rt-acrh17:blue:lan4";
gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
};
wan_blue {
label = "rt-acrh17:blue:wan";
gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>;
};
wan_red {
label = "rt-acrh17:red:wan";
gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>;
};
wlan2g {
label = "rt-acrh17:blue:wlan2g";
gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
};
wlan5g {
label = "rt-acrh17:blue:wlan5g";
gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
};
};
};
&cryptobam {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Bootloader";
reg = <0x000000000000 0x000000400000>;
read-only;
};
partition@400000 {
label = "UBI_DEV";
reg = <0x000000400000 0x000007C00000>;
};
};
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
nand_pins: nand_pins {
pullups {
pins = "gpio53", "gpio58",
"gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio55", "gpio56",
"gpio57", "gpio60",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio69";
function = "qpic";
bias-pull-down;
};
};
};
&pcie0 {
status = "okay";
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi2: wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
};
};
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "RT-ACRH17";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};

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@ -17,7 +17,8 @@
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 47 0>;
reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
reset-delay-us = <2000>;
};
ess-psgmii@98000 {

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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2019, Nguyen Dinh Phi <phi_nguyen@compex.com.sg>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Compex WPJ419";
compatible = "compex,wpj419", "qcom,ipq4019";
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
reserved-memory {
ranges;
rsvd1@87000000 {
/* Reserved for other subsystem */
reg = <0x87000000 0x500000>;
no-map;
};
wifi_dump@87500000 {
reg = <0x87500000 0x600000>;
no-map;
};
rsvd2@87B00000 {
/* Reserved for other subsystem */
reg = <0x87B00000 0x500000>;
no-map;
};
};
chosen {
bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1 clk_ignore_unused";
};
soc {
pinctrl@1000000 {
mdio_pins: mdio_pinmux {
mux_1 {
pins = "gpio6";
function = "mdio";
bias-pull-up;
};
mux_2 {
pins = "gpio7";
function = "mdc";
bias-pull-up;
};
};
serial_0_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
serial_1_pins: serial1_pinmux {
mux {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "blsp_uart1";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pinmux {
function = "blsp_spi0";
pins = "gpio13", "gpio14", "gpio15";
bias-disable;
};
pinmux_cs {
function = "gpio";
pins = "gpio12";
bias-disable;
output-high;
};
};
i2c_0_pins: i2c_0_pinmux {
mux {
pins = "gpio20", "gpio21";
function = "blsp_i2c0";
bias-disable;
};
};
nand_pins: nand_pins {
pullups {
pins = "gpio52", "gpio53", "gpio58", "gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio54", "gpio55", "gpio56",
"gpio57", "gpio60", "gpio61",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio68", "gpio69";
function = "qpic";
bias-pull-down;
};
};
led_0_pins: led0_pinmux {
mux_1 {
pins = "gpio36";
function = "led0";
bias-pull-down;
};
mux_2 {
pins = "gpio40";
function = "led4";
bias-pull-down;
};
};
};
blsp_dma: dma@7884000 {
status = "okay";
};
spi_0: spi@78b5000 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 41 GPIO_ACTIVE_HIGH>;
num-cs = <2>;
flash0@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <24000000>;
broken-flash-reset;
partitions {
compatible = "fixed-partitions";
partition@0 {
label = "0:SBL1";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "0:MIBIB";
reg = <0x040000 0x020000>;
read-only;
};
partition@60000 {
label = "0:QSEE";
reg = <0x060000 0x060000>;
read-only;
};
partition@c0000 {
label = "0:CDT";
reg = <0x0c0000 0x010000>;
read-only;
};
partition@d0000 {
label = "0:DDRPARAMS";
reg = <0x0d0000 0x010000>;
read-only;
};
partition@e0000 {
label = "u-boot-env";
reg = <0x0e0000 0x010000>;
};
partition@f0000 {
label = "u-boot";
reg = <0x0f0000 0x080000>;
read-only;
};
partition@170000 {
label = "0:ART";
reg = <0x170000 0x010000>;
read-only;
};
};
};
nand@1 {
reg = <1>;
status = "okay";
compatible = "spi-nand";
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* The device has 128MB, but we can only address
* 64MB because of the bootloader's default settings.
* This is due to the old mt29f driver,
* which detected the deivce with only 64MB
*/
partition@0 {
label = "ubi";
reg = <0x0000000 0x4000000>;
};
};
};
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
reset-delay-us = <5000>;
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
i2c_0: i2c@78b7000 {
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "ok";
};
serial@78af000 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
serial@78b0000 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "okay";
};
usb3_ss_phy: ssphy@9a000 {
status = "okay";
};
usb3_hs_phy: hsphy@a6000 {
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
};
usb2_hs_phy: hsphy@a8000 {
status = "okay";
};
usb2: usb2@60f8800 {
status = "okay";
};
cryptobam: dma@8e04000 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
switch_lan_bmp = <0x1e>;
switch_wan_bmp = <0x20>;
status = "okay";
};
edma@c080000 {
status = "okay";
};
qpic_bam: dma@7984000 {
status = "okay";
};
pcie0: pci@40000000 {
status = "okay";
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
};
};
};
&gmac0 {
qcom,phy_mdio_addr = <4>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <2 0x20>;
};
&gmac1 {
qcom,phy_mdio_addr = <3>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <1 0x10>;
};
&wifi0 {
status = "okay";
};
&wifi1 {
status = "okay";
};

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@ -0,0 +1,111 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (c) 2019 Mantas Pucka <mantas@8devices.com>
// Copyright (c) 2019 Robert Marko <robimarko@gmail.com>
//
// Driver for IPQ4019 SD/MMC controller's I/O LDO voltage regulator
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/of_regulator.h>
static const unsigned int ipq4019_vmmc_voltages[] = {
1500000, 1800000, 2500000, 3000000,
};
static struct regulator_ops ipq4019_regulator_voltage_ops = {
.list_voltage = regulator_list_voltage_table,
.get_voltage_sel = regulator_get_voltage_sel_regmap,
.set_voltage_sel = regulator_set_voltage_sel_regmap,
};
static struct regulator_desc vmmc_regulator = {
.name = "vmmcq",
.ops = &ipq4019_regulator_voltage_ops,
.type = REGULATOR_VOLTAGE,
.owner = THIS_MODULE,
.volt_table = ipq4019_vmmc_voltages,
.n_voltages = ARRAY_SIZE(ipq4019_vmmc_voltages),
.vsel_reg = 0,
.vsel_mask = 0x3,
};
const struct regmap_config ipq4019_vmmcq_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
};
static int ipq4019_regulator_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct regulator_init_data *init_data;
struct regulator_config cfg = {};
struct regulator_dev *rdev;
struct resource *res;
struct regmap *rmap;
void __iomem *base;
init_data = of_get_regulator_init_data(dev, dev->of_node,
&vmmc_regulator);
if (!init_data)
return -EINVAL;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(dev, res);
if (IS_ERR(base))
return PTR_ERR(base);
rmap = devm_regmap_init_mmio(dev, base, &ipq4019_vmmcq_regmap_config);
if (IS_ERR(rmap))
return PTR_ERR(rmap);
cfg.dev = dev;
cfg.init_data = init_data;
cfg.of_node = dev->of_node;
cfg.regmap = rmap;
rdev = devm_regulator_register(dev, &vmmc_regulator, &cfg);
if (IS_ERR(rdev)) {
dev_err(dev, "Failed to register regulator: %ld\n",
PTR_ERR(rdev));
return PTR_ERR(rdev);
}
platform_set_drvdata(pdev, rdev);
return 0;
}
static int ipq4019_regulator_remove(struct platform_device *pdev)
{
struct regulator_dev *rdev = platform_get_drvdata(pdev);
regulator_unregister(rdev);
return 0;
}
static const struct of_device_id regulator_ipq4019_of_match[] = {
{ .compatible = "qcom,ipq4019-vqmmc-regulator", },
{},
};
static struct platform_driver ipq4019_regulator_driver = {
.probe = ipq4019_regulator_probe,
.remove = ipq4019_regulator_remove,
.driver = {
.name = "regulator-vqmmc-ipq4019",
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(regulator_ipq4019_of_match),
},
};
module_platform_driver(ipq4019_regulator_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Mantas Pucka <mantas@8devices.com>");
MODULE_DESCRIPTION("IPQ4019 VQMMC voltage regulator");

View File

@ -0,0 +1,11 @@
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -1681,7 +1681,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
static const struct sdhci_ops sdhci_msm_ops = {
.reset = sdhci_reset,
- .set_clock = sdhci_msm_set_clock,
+ .set_clock = sdhci_set_clock,
.get_min_clock = sdhci_msm_get_min_clock,
.get_max_clock = sdhci_msm_get_max_clock,
.set_bus_width = sdhci_set_bus_width,

View File

@ -1,15 +1,3 @@
From 234d6f40fb4b771b396b45a9492aab463771bd0b Mon Sep 17 00:00:00 2001
From: Kristian Evensen <kristian.evensen@gmail.com>
Date: Tue, 6 Aug 2019 11:42:57 +0200
Subject: [PATCH] phy: Add ipq40xx mdio driver
---
drivers/net/phy/Kconfig | 7 +
drivers/net/phy/Makefile | 1 +
drivers/net/phy/mdio-ipq40xx.c | 247 +++++++++++++++++++++++++++++++++
3 files changed, 255 insertions(+)
create mode 100644 drivers/net/phy/mdio-ipq40xx.c
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -519,6 +519,13 @@ config XILINX_GMII2RGMII
@ -38,7 +26,7 @@ Subject: [PATCH] phy: Add ipq40xx mdio driver
obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o
--- /dev/null
+++ b/drivers/net/phy/mdio-ipq40xx.c
@@ -0,0 +1,247 @@
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+ *
@ -61,10 +49,8 @@ Subject: [PATCH] phy: Add ipq40xx mdio driver
+#include <linux/io.h>
+#include <linux/of_address.h>
+#include <linux/of_mdio.h>
+#include <linux/of_gpio.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#define MDIO_CTRL_0_REG 0x40
+#define MDIO_CTRL_1_REG 0x44
@ -164,60 +150,11 @@ Subject: [PATCH] phy: Add ipq40xx mdio driver
+ return 0;
+}
+
+static int ipq40xx_phy_reset(struct platform_device *pdev)
+{
+ struct device_node *mdio_node;
+ int phy_reset_gpio_number;
+ int ret;
+
+ mdio_node = of_find_node_by_name(NULL, "mdio");
+ if (!mdio_node) {
+ dev_err(&pdev->dev, "Could not find mdio node\n");
+ return 0;
+ }
+
+ ret = of_get_named_gpio(mdio_node, "phy-reset-gpio", 0);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "Could not find phy-reset-gpio\n");
+ return 0;
+ }
+
+ phy_reset_gpio_number = ret;
+
+ ret = gpio_request(phy_reset_gpio_number, "phy-reset-gpio");
+ if (ret) {
+ dev_err(&pdev->dev, "Can't get phy-reset-gpio %d\n", ret);
+ return ret;
+ }
+
+ ret = gpio_direction_output(phy_reset_gpio_number, 0x0);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "Can't set direction for phy-reset-gpio %d\n", ret);
+ goto phy_reset_out;
+ }
+
+ usleep_range(1000, 10005);
+
+ gpio_set_value(phy_reset_gpio_number, 0x01);
+
+phy_reset_out:
+ gpio_free(phy_reset_gpio_number);
+
+ return ret;
+}
+
+static int ipq40xx_mdio_probe(struct platform_device *pdev)
+{
+ struct ipq40xx_mdio_data *am;
+ struct resource *res;
+ int i, ret;
+
+ ret = ipq40xx_phy_reset(pdev);
+ if (ret) {
+ dev_err(&pdev->dev, "Could not find qca8075 reset gpio\n");
+ return -ENODEV;
+ }
+ int i;
+
+ am = devm_kzalloc(&pdev->dev, sizeof(*am), GFP_KERNEL);
+ if (!am)

View File

@ -26,7 +26,7 @@
obj-$(CONFIG_BCM63XX_PHY) += bcm63xx.o
--- /dev/null
+++ b/drivers/net/phy/ar40xx.c
@@ -0,0 +1,2090 @@
@@ -0,0 +1,2122 @@
+/*
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
@ -799,6 +799,37 @@
+ return 0;
+}
+
+static int
+ar40xx_sw_get_port_stats(struct switch_dev *dev, int port,
+ struct switch_port_stats *stats)
+{
+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
+ u32 num_mibs = ARRAY_SIZE(ar40xx_mibs);
+ u64 *mib_stats;
+ int ret = 0;
+ static int last_port = AR40XX_NUM_PORTS - 1;
+
+ mutex_lock(&priv->mib_lock);
+
+ /* Avoid unnecessary capture */
+ if (last_port >= port) {
+ ret = ar40xx_mib_capture(priv);
+ if (ret)
+ goto unlock;
+ }
+ last_port = port;
+
+ ar40xx_mib_fetch_port_stat(priv, port, false);
+
+ mib_stats = &priv->mib_stats[port * num_mibs];
+ /* 15: TXBYTE, 31: RXGOODBYTE */
+ stats->tx_bytes = mib_stats[15];
+ stats->rx_bytes = mib_stats[31];
+unlock:
+ mutex_unlock(&priv->mib_lock);
+ return ret;
+}
+
+static const struct switch_attr ar40xx_sw_attr_globals[] = {
+ {
+ .type = SWITCH_TYPE_INT,
@ -1177,6 +1208,7 @@
+ /* disable phy internal loopback */
+ mdiobus_write(bus, 0x1f, 0x10, 0x6860);
+ mdiobus_write(bus, 0x1f, 0x0, 0x9040);
+ ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8076, 0x0670); /* 1000_LED_n */
+
+ for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) {
+ /* disable mac loop back */
@ -1788,6 +1820,7 @@
+ .apply_config = ar40xx_sw_hw_apply,
+ .reset_switch = ar40xx_sw_reset_switch,
+ .get_port_link = ar40xx_sw_get_port_link,
+ .get_port_stats = ar40xx_sw_get_port_stats,
+};
+
+/* Start of phy driver support */

View File

@ -0,0 +1,205 @@
diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.c b/drivers/net/ethernet/qualcomm/essedma/edma.c
index 724f355..7a16236 100644
--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
@@ -22,14 +22,6 @@ extern struct net_device *edma_netdev[EDMA_MAX_PORTID_SUPPORTED];
bool edma_stp_rstp;
u16 edma_ath_eth_type;
-/* edma_skb_priority_offset()
- * get edma skb priority
- */
-static unsigned int edma_skb_priority_offset(struct sk_buff *skb)
-{
- return (skb->priority >> 2) & 1;
-}
-
/* edma_alloc_tx_ring()
* Allocate Tx descriptors ring
*/
@@ -1014,13 +1006,14 @@ static inline u16 edma_tpd_available(struct edma_common_info *edma_cinfo,
/* edma_tx_queue_get()
* Get the starting number of the queue
*/
-static inline int edma_tx_queue_get(struct edma_adapter *adapter,
+static inline int edma_tx_queue_get(struct edma_common_info *edma_cinfo, struct edma_adapter *adapter,
struct sk_buff *skb, int txq_id)
{
/* skb->priority is used as an index to skb priority table
* and based on packet priority, correspong queue is assigned.
+ * FIXME we just simple use jiffies for time base balance
*/
- return adapter->tx_start_offset[txq_id] + edma_skb_priority_offset(skb);
+ return adapter->tx_start_offset[txq_id] + (smp_processor_id() % edma_cinfo->num_txq_per_core_netdev);
}
/* edma_tx_update_hw_idx()
@@ -1389,8 +1382,9 @@ netdev_tx_t edma_xmit(struct sk_buff *skb,
}
/* this will be one of the 4 TX queues exposed to linux kernel */
- txq_id = skb_get_queue_mapping(skb);
- queue_id = edma_tx_queue_get(adapter, skb, txq_id);
+ /* XXX what if num_online_cpus() > EDMA_CPU_CORES_SUPPORTED */
+ txq_id = ((jiffies >> 5) % (EDMA_CPU_CORES_SUPPORTED - 1) + smp_processor_id() + 1) % EDMA_CPU_CORES_SUPPORTED;
+ queue_id = edma_tx_queue_get(edma_cinfo, adapter, skb, txq_id);
etdr = edma_cinfo->tpd_ring[queue_id];
nq = netdev_get_tx_queue(net_dev, txq_id);
@@ -1871,8 +1865,8 @@ void edma_free_irqs(struct edma_adapter *adapter)
int i, j;
int k = ((edma_cinfo->num_rx_queues == 4) ? 1 : 2);
- for (i = 0; i < CONFIG_NR_CPUS; i++) {
- for (j = edma_cinfo->edma_percpu_info[i].tx_start; j < (edma_cinfo->edma_percpu_info[i].tx_start + 4); j++)
+ for (i = 0; i < num_online_cpus() && i < EDMA_CPU_CORES_SUPPORTED; i++) {
+ for (j = edma_cinfo->edma_percpu_info[i].tx_start; j < (edma_cinfo->edma_percpu_info[i].tx_start + edma_cinfo->num_txq_per_core); j++)
free_irq(edma_cinfo->tx_irq[j], &edma_cinfo->edma_percpu_info[i]);
for (j = edma_cinfo->edma_percpu_info[i].rx_start; j < (edma_cinfo->edma_percpu_info[i].rx_start + k); j++)
diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.h b/drivers/net/ethernet/qualcomm/essedma/edma.h
index 015e5f5..abb0bd5 100644
--- a/drivers/net/ethernet/qualcomm/essedma/edma.h
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.h
@@ -324,6 +324,7 @@ struct edma_common_info {
u32 from_cpu; /* from CPU TPD field */
u32 num_rxq_per_core; /* Rx queues per core */
u32 num_txq_per_core; /* Tx queues per core */
+ u32 num_txq_per_core_netdev; /* Tx queues per core per netdev */
u16 tx_ring_count; /* Tx ring count */
u16 rx_ring_count; /* Rx ring*/
u16 rx_head_buffer_len; /* rx buffer length */
@@ -331,7 +332,7 @@ struct edma_common_info {
u32 page_mode; /* Jumbo frame supported flag */
u32 fraglist_mode; /* fraglist supported flag */
struct edma_hw hw; /* edma hw specific structure */
- struct edma_per_cpu_queues_info edma_percpu_info[CONFIG_NR_CPUS]; /* per cpu information */
+ struct edma_per_cpu_queues_info edma_percpu_info[EDMA_CPU_CORES_SUPPORTED]; /* per cpu information */
spinlock_t stats_lock; /* protect edma stats area for updation */
struct timer_list edma_stats_timer;
bool is_single_phy;
@@ -401,7 +402,7 @@ struct edma_adapter {
u32 link_state; /* phy link state */
u32 phy_mdio_addr; /* PHY device address on MII interface */
u32 poll_required; /* check if link polling is required */
- u32 tx_start_offset[CONFIG_NR_CPUS]; /* tx queue start */
+ u32 tx_start_offset[EDMA_CPU_CORES_SUPPORTED]; /* tx queue start */
u32 default_vlan_tag; /* vlan tag */
u32 dp_bitmap;
uint8_t phy_id[MII_BUS_ID_SIZE + 3];
diff --git a/drivers/net/ethernet/qualcomm/essedma/edma_axi.c b/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
index d53c63b..2d4770c 100644
--- a/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
@@ -719,11 +719,7 @@ static int edma_axi_probe(struct platform_device *pdev)
int i, j, k, err = 0;
int portid_bmp;
int idx = 0, idx_mac = 0;
-
- if (CONFIG_NR_CPUS != EDMA_CPU_CORES_SUPPORTED) {
- dev_err(&pdev->dev, "Invalid CPU Cores\n");
- return -EINVAL;
- }
+ int netdev_group = 2;
if ((num_rxq != 4) && (num_rxq != 8)) {
dev_err(&pdev->dev, "Invalid RX queue, edma probe failed\n");
@@ -747,7 +743,7 @@ static int edma_axi_probe(struct platform_device *pdev)
/* Initialize the netdev array before allocation
* to avoid double free
*/
- for (i = 0 ; i < edma_cinfo->num_gmac ; i++)
+ for (i = 0 ; i < EDMA_MAX_PORTID_SUPPORTED; i++)
edma_netdev[i] = NULL;
for (i = 0 ; i < edma_cinfo->num_gmac ; i++) {
@@ -768,8 +764,11 @@ static int edma_axi_probe(struct platform_device *pdev)
/* Fill ring details */
edma_cinfo->num_tx_queues = EDMA_MAX_TRANSMIT_QUEUE;
- edma_cinfo->num_txq_per_core = (EDMA_MAX_TRANSMIT_QUEUE / 4);
+ edma_cinfo->num_txq_per_core = (EDMA_MAX_TRANSMIT_QUEUE / num_online_cpus());
+ edma_cinfo->num_txq_per_core_netdev = (EDMA_MAX_TRANSMIT_QUEUE / netdev_group / num_online_cpus());
edma_cinfo->tx_ring_count = EDMA_TX_RING_SIZE;
+ if (edma_cinfo->num_txq_per_core == 0)
+ edma_cinfo->num_txq_per_core = 1;
/* Update num rx queues based on module parameter */
edma_cinfo->num_rx_queues = num_rxq;
@@ -939,6 +938,13 @@ static int edma_axi_probe(struct platform_device *pdev)
idx_mac++;
}
+ if (edma_cinfo->num_gmac == 1) {
+ netdev_group = 1;
+ edma_cinfo->num_txq_per_core_netdev = (EDMA_MAX_TRANSMIT_QUEUE / netdev_group / num_online_cpus());
+ }
+ if (edma_cinfo->num_txq_per_core_netdev == 0)
+ edma_cinfo->num_txq_per_core_netdev = 1;
+
/* Populate the adapter structure register the netdevice */
for (i = 0; i < edma_cinfo->num_gmac; i++) {
int k, m;
@@ -946,17 +952,16 @@ static int edma_axi_probe(struct platform_device *pdev)
adapter[i] = netdev_priv(edma_netdev[i]);
adapter[i]->netdev = edma_netdev[i];
adapter[i]->pdev = pdev;
- for (j = 0; j < CONFIG_NR_CPUS; j++) {
- m = i % 2;
- adapter[i]->tx_start_offset[j] =
- ((j << EDMA_TX_CPU_START_SHIFT) + (m << 1));
+ for (j = 0; j < num_online_cpus() && j < EDMA_CPU_CORES_SUPPORTED; j++) {
+ m = i % netdev_group;
+ adapter[i]->tx_start_offset[j] = j * edma_cinfo->num_txq_per_core + m * edma_cinfo->num_txq_per_core_netdev;
/* Share the queues with available net-devices.
* For instance , with 5 net-devices
* eth0/eth2/eth4 will share q0,q1,q4,q5,q8,q9,q12,q13
* and eth1/eth3 will get the remaining.
*/
for (k = adapter[i]->tx_start_offset[j]; k <
- (adapter[i]->tx_start_offset[j] + 2); k++) {
+ (adapter[i]->tx_start_offset[j] + edma_cinfo->num_txq_per_core_netdev); k++) {
if (edma_fill_netdev(edma_cinfo, k, i, j)) {
pr_err("Netdev overflow Error\n");
goto err_register;
@@ -1109,9 +1114,12 @@ static int edma_axi_probe(struct platform_device *pdev)
/* populate per_core_info, do a napi_Add, request 16 TX irqs,
* 8 RX irqs, do a napi enable
*/
- for (i = 0; i < CONFIG_NR_CPUS; i++) {
+ for (i = 0; i < num_online_cpus() && i < EDMA_CPU_CORES_SUPPORTED; i++) {
u8 rx_start;
+ tx_mask[i] = (0xFFFF >> (16 - edma_cinfo->num_txq_per_core)) << (i * edma_cinfo->num_txq_per_core);
+ tx_start[i] = i * edma_cinfo->num_txq_per_core;
+
edma_cinfo->edma_percpu_info[i].napi.state = 0;
netif_napi_add(edma_netdev[0],
@@ -1131,7 +1139,7 @@ static int edma_axi_probe(struct platform_device *pdev)
/* Request irq per core */
for (j = edma_cinfo->edma_percpu_info[i].tx_start;
- j < tx_start[i] + 4; j++) {
+ j < tx_start[i] + edma_cinfo->num_txq_per_core; j++) {
sprintf(&edma_tx_irq[j][0], "edma_eth_tx%d", j);
err = request_irq(edma_cinfo->tx_irq[j],
edma_interrupt,
@@ -1253,7 +1261,7 @@ static int edma_axi_probe(struct platform_device *pdev)
#endif
err_rmap_add_fail:
edma_free_irqs(adapter[0]);
- for (i = 0; i < CONFIG_NR_CPUS; i++)
+ for (i = 0; i < num_online_cpus() && i < EDMA_CPU_CORES_SUPPORTED; i++)
napi_disable(&edma_cinfo->edma_percpu_info[i].napi);
err_reset:
err_unregister_sysctl_tbl:
@@ -1301,7 +1309,7 @@ static int edma_axi_remove(struct platform_device *pdev)
unregister_netdev(edma_netdev[i]);
edma_stop_rx_tx(hw);
- for (i = 0; i < CONFIG_NR_CPUS; i++)
+ for (i = 0; i < num_online_cpus() && i < EDMA_CPU_CORES_SUPPORTED; i++)
napi_disable(&edma_cinfo->edma_percpu_info[i].napi);
edma_irq_disable(edma_cinfo);

View File

@ -0,0 +1,54 @@
diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.c b/drivers/net/ethernet/qualcomm/essedma/edma.c
index fc274c8..e9d12a4 100644
--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
@@ -2075,15 +2075,13 @@ int edma_poll(struct napi_struct *napi, int budget)
int i, work_done = 0;
u16 rx_pending_fill;
- /* Store the Rx/Tx status by ANDing it with
- * appropriate CPU RX?TX mask
+ /* Store the Tx status by ANDing it with
+ * appropriate CPU TX mask
*/
- edma_read_reg(EDMA_REG_RX_ISR, &reg_data);
- edma_percpu_info->rx_status |= reg_data & edma_percpu_info->rx_mask;
- shadow_rx_status = edma_percpu_info->rx_status;
edma_read_reg(EDMA_REG_TX_ISR, &reg_data);
edma_percpu_info->tx_status |= reg_data & edma_percpu_info->tx_mask;
shadow_tx_status = edma_percpu_info->tx_status;
+ edma_write_reg(EDMA_REG_TX_ISR, shadow_tx_status);
/* Every core will have a start, which will be computed
* in probe and stored in edma_percpu_info->tx_start variable.
@@ -2098,6 +2096,14 @@ int edma_poll(struct napi_struct *napi, int budget)
edma_percpu_info->tx_status &= ~(1 << queue_id);
}
+ /* Store the Rx status by ANDing it with
+ * appropriate CPU RX mask
+ */
+ edma_read_reg(EDMA_REG_RX_ISR, &reg_data);
+ edma_percpu_info->rx_status |= reg_data & edma_percpu_info->rx_mask;
+ shadow_rx_status = edma_percpu_info->rx_status;
+ edma_write_reg(EDMA_REG_RX_ISR, shadow_rx_status);
+
/* Every core will have a start, which will be computed
* in probe and stored in edma_percpu_info->tx_start variable.
* We will shift the status bit by tx_start to obtain
@@ -2122,15 +2128,6 @@ int edma_poll(struct napi_struct *napi, int budget)
}
}
- /* Clear the status register, to avoid the interrupts to
- * reoccur.This clearing of interrupt status register is
- * done here as writing to status register only takes place
- * once the producer/consumer index has been updated to
- * reflect that the packet transmission/reception went fine.
- */
- edma_write_reg(EDMA_REG_RX_ISR, shadow_rx_status);
- edma_write_reg(EDMA_REG_TX_ISR, shadow_tx_status);
-
/* If budget not fully consumed, exit the polling mode */
if (likely(work_done < budget)) {
napi_complete(napi);

View File

@ -0,0 +1,26 @@
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -334,6 +334,13 @@ config REGULATOR_HI655X
This driver provides support for the voltage regulators of the
Hisilicon Hi655x PMIC device.
+config REGULATOR_VQMMC_IPQ4019
+ tristate "IPQ4019 VQMMC SD LDO regulator support"
+ depends on ARCH_QCOM
+ help
+ This driver provides support for the VQMMC LDO I/0
+ voltage regulator of the IPQ4019 SD/EMMC controller.
+
config REGULATOR_ISL9305
tristate "Intersil ISL9305 regulator"
depends on I2C
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_REGULATOR_GPIO) += gpio-reg
obj-$(CONFIG_REGULATOR_HI6421) += hi6421-regulator.o
obj-$(CONFIG_REGULATOR_HI6421V530) += hi6421v530-regulator.o
obj-$(CONFIG_REGULATOR_HI655X) += hi655x-regulator.o
+obj-$(CONFIG_REGULATOR_VQMMC_IPQ4019) += ipq4019-vqmmc-regulator.o
obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o
obj-$(CONFIG_REGULATOR_ISL9305) += isl9305.o
obj-$(CONFIG_REGULATOR_LM363X) += lm363x-regulator.o

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@ -0,0 +1,33 @@
From beae4078c07d3cdc90473a2b35eb0d2b4f3c922c Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sat, 14 Sep 2019 23:13:17 +0200
Subject: [PATCH] ARM: dts: qcom: ipq4019: Add SDHCI VQMMC LDO regulator node
IPQ4019 has a built in SD/eMMC controller which depends on
VQMMC LDO regulator working.
Since we have a driver for it lets add the appropriate node for it.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -216,6 +216,16 @@
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
};
+ vqmmc: regulator@1948000 {
+ compatible = "qcom,ipq4019-vqmmc-regulator";
+ reg = <0x01948000 0x4>;
+ regulator-name = "vqmmc";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ status = "disabled";
+ };
+
blsp_dma: dma@7884000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x07884000 0x23000>;

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@ -0,0 +1,41 @@
Subject: [PATCH] ARM: dts: qcom: ipq4019: Add SDHCI controller node
Date: Thu, 15 Aug 2019 19:28:23 +0200
Message-Id: <20190815172823.12028-1-robimarko@gmail.com>
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IPQ4019 has a built in SD/eMMC controller which is supported by the
SDHCI MSM driver, by the "qcom,sdhci-msm-v4" binding.
So lets add the appropriate node for it.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -226,6 +226,18 @@
status = "disabled";
};
+ sdhci: sdhci@7824900 {
+ compatible = "qcom,sdhci-msm-v4";
+ reg = <0x7824900 0x11c>, <0x7824000 0x800>;
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+ bus-width = <8>;
+ clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>,
+ <&gcc GCC_DCD_XO_CLK>;
+ clock-names = "core", "iface", "xo";
+ status = "disabled";
+ };
+
blsp_dma: dma@7884000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x07884000 0x23000>;

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@ -1,6 +1,6 @@
From a10fab12a927e60b7141a602e740d70cb4d09e4a Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Thu, 9 Mar 2017 11:03:18 +0100
Date: Thu, 9 Mar 2019 11:03:18 +0100
Subject: [PATCH] arm: boot: add dts files
Signed-off-by: John Crispin <john@phrozen.org>
@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -785,11 +785,35 @@ dtb-$(CONFIG_ARCH_QCOM) += \
@@ -785,11 +785,42 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8074-dragonboard.dtb \
qcom-apq8084-ifc6540.dtb \
qcom-apq8084-mtp.dtb \
@ -21,8 +21,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
+ qcom-ipq4018-ens620ext.dtb \
+ qcom-ipq4018-ex6100v2.dtb \
+ qcom-ipq4018-ex6150v2.dtb \
+ qcom-ipq4018-ex6200v2.dtb \
+ qcom-ipq4018-fritz4040.dtb \
+ qcom-ipq4018-jalapeno.dtb \
+ qcom-ipq4018-meshpoint-one.dtb \
+ qcom-ipq4018-nbg6617.dtb \
+ qcom-ipq4018-rt-ac58u.dtb \
+ qcom-ipq4018-wre6606.dtb \
@ -37,9 +39,14 @@ Signed-off-by: John Crispin <john@phrozen.org>
+ qcom-ipq4019-fritzrepeater-3000.dtb \
+ qcom-ipq4019-linksys_ea8300.dtb \
+ qcom-ipq4019-map-ac2200.dtb \
+ qcom-ipq4019-r619ac.dtb \
+ qcom-ipq4019-r619ac-128m.dtb \
+ qcom-ipq4019-hugo-ac1200.dtb \
+ qcom-ipq4019-qxwlan-e2600ac-c1.dtb \
+ qcom-ipq4019-qxwlan-e2600ac-c2.dtb \
+ qcom-ipq4019-unielec-u4019-32m.dtb \
+ qcom-ipq4019-rt-acrh17.dtb \
+ qcom-ipq4019-wpj419.dtb \
+ qcom-ipq4028-wpj428.dtb \
+ qcom-ipq4029-gl-b1300.dtb \
+ qcom-ipq4029-mr33.dtb \

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@ -0,0 +1,82 @@
From 42b508d91b7f51b054f383e3aa42089ccab9300d Mon Sep 17 00:00:00 2001
From: Chen Minqiang <ptpt52@gmail.com>
Date: Thu, 15 Mar 2018 05:33:46 +0800
Subject: [PATCH] essedma: disable default vlan tagging
The essedma driver has its own unique take on VLAN management
and its configuration. In the original SDK, each VLAN is
assigned one virtual ethernet netdev.
However, this is non-standard. So, this patch does away
with the default_vlan_tag property the driver is using
and therefore forces the user to use the kernel's vlan
feature.
This patch also removes the "qcom,poll_required = <1>;" from
the essedma node.
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 5 ++---
drivers/net/ethernet/qualcomm/essedma/edma.c | 14 +++++---------
2 files changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 3c4617f..7c3af8e 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -598,8 +598,7 @@
qcom,page-mode = <0>;
qcom,rx_head_buf_size = <1540>;
qcom,mdio_supported;
- qcom,poll_required = <1>;
- qcom,num_gmac = <2>;
+ qcom,num_gmac = <1>;
interrupts = <0 65 IRQ_TYPE_EDGE_RISING
0 66 IRQ_TYPE_EDGE_RISING
0 67 IRQ_TYPE_EDGE_RISING
@@ -637,7 +636,7 @@
gmac0: gmac0 {
local-mac-address = [00 00 00 00 00 00];
- vlan_tag = <1 0x1f>;
+ vlan_tag = <1 0x3f>;
};
gmac1: gmac1 {
diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.c b/drivers/net/ethernet/qualcomm/essedma/edma.c
index 05f9ce9..a3c0d66 100644
--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
@@ -750,13 +750,11 @@ static void edma_rx_complete(struct edma_common_info *edma_cinfo,
edma_receive_checksum(rd, skb);
/* Process VLAN HW acceleration indication provided by HW */
- if (unlikely(adapter->default_vlan_tag != rd->rrd4)) {
- vlan = rd->rrd4;
- if (likely(rd->rrd7 & EDMA_RRD_CVLAN))
- __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
- else if (rd->rrd1 & EDMA_RRD_SVLAN)
- __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan);
- }
+ vlan = rd->rrd4;
+ if (likely(rd->rrd7 & EDMA_RRD_CVLAN))
+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
+ else if (rd->rrd1 & EDMA_RRD_SVLAN)
+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan);
/* Update rx statistics */
adapter->stats.rx_packets++;
@@ -1434,8 +1432,6 @@ netdev_tx_t edma_xmit(struct sk_buff *skb,
if (!adapter->edma_cinfo->is_single_phy) {
if (unlikely(skb_vlan_tag_present(skb)))
flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_FLAG;
- else if (adapter->default_vlan_tag)
- flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG;
}
/* Check and mark checksum offload */
--
2.7.4