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kernel: bump to 4.9.198, 4.14.151, 4.19.81

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This commit is contained in:
LEAN-ESX 2019-11-01 06:54:04 -07:00
parent 9f169a17d3
commit db7a92c009
75 changed files with 17039 additions and 51 deletions
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12
include/kernel-version.mk
View File

@ -6,13 +6,13 @@ ifdef CONFIG_TESTING_KERNEL
KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
endif
LINUX_VERSION-4.9 = .196
LINUX_VERSION-4.14 = .149
LINUX_VERSION-4.19 = .79
LINUX_VERSION-4.9 = .198
LINUX_VERSION-4.14 = .151
LINUX_VERSION-4.19 = .81
LINUX_KERNEL_HASH-4.9.196 = e0ab12b04a975630ece2142a1ac15cfe45140b8c3359226b035c15ca7c92c6ef
LINUX_KERNEL_HASH-4.14.149 = e69dabd2368440ce1650cda0cf043e1ba3f3343f940a43b68e761739fcb3f296
LINUX_KERNEL_HASH-4.19.79 = f1143564364f278ba0893a7813afc02da6ecef6d5de147bd5011aa3cc1634b34
LINUX_KERNEL_HASH-4.9.198 = 9572ebfa6ba0efcf9f1ec7b62c7b89baa36a621ab9fd4c5ad025196c549605ac
LINUX_KERNEL_HASH-4.14.151 = ff519c428ee9bbb513a84db5ec32a7e3705cd8c23a57104b25b944cb79583fae
LINUX_KERNEL_HASH-4.19.81 = 293ec1ae0f6b3b4be83a217224b51d137f2163cf2d9d294eecf5d0a354e4e29d
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

4
package/kernel/linux/modules/usb.mk
View File

@ -936,6 +936,7 @@ define KernelPackage/usb-serial-wwan
TITLE:=Support for GSM and CDMA modems
KCONFIG:=CONFIG_USB_SERIAL_WWAN
FILES:=$(LINUX_DIR)/drivers/usb/serial/usb_wwan.ko
HIDDEN:=1
AUTOLOAD:=$(call AutoProbe,usb_wwan)
$(call AddDepends/usb-serial)
endef
@ -949,11 +950,10 @@ $(eval $(call KernelPackage,usb-serial-wwan))
define KernelPackage/usb-serial-option
TITLE:=Support for Option HSDPA modems
DEPENDS:=+kmod-usb-serial-wwan
KCONFIG:=CONFIG_USB_SERIAL_OPTION
FILES:=$(LINUX_DIR)/drivers/usb/serial/option.ko
AUTOLOAD:=$(call AutoProbe,option)
$(call AddDepends/usb-serial)
$(call AddDepends/usb-serial,+kmod-usb-serial-wwan)
endef
define KernelPackage/usb-serial-option/description

2
target/linux/brcm2708/patches-4.19/950-0129-gpiolib-Don-t-prevent-IRQ-usage-of-output-GPIOs.patch
View File

@ -35,7 +35,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
gpiod_err(desc,
"%s: tried to set a GPIO tied to an IRQ as output\n",
__func__);
@@ -3322,7 +3324,7 @@ int gpiochip_lock_as_irq(struct gpio_chi
@@ -3333,7 +3335,7 @@ int gpiochip_lock_as_irq(struct gpio_chi
}
}

9
target/linux/brcm2708/patches-4.19/950-0542-net-genet-enable-link-energy-detect-powerdown-for-ex.patch
View File

@ -20,13 +20,10 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c
@@ -280,7 +280,10 @@ int bcmgenet_mii_probe(struct net_device
int ret;
@@ -286,6 +286,8 @@ int bcmgenet_mii_probe(struct net_device
/* Communicate the integrated PHY revision */
- phy_flags = priv->gphy_rev;
+ if (priv->internal_phy)
+ phy_flags = priv->gphy_rev;
if (priv->internal_phy)
phy_flags = priv->gphy_rev;
+ else
+ phy_flags = PHY_BRCM_AUTO_PWRDWN_ENABLE;

4
target/linux/brcm2708/patches-4.19/950-0548-usb-xhci-hack-xhci_urb_enqueue-to-support-hid.mousep.patch
View File

@ -20,7 +20,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1416,6 +1416,87 @@ command_cleanup:
@@ -1428,6 +1428,87 @@ command_cleanup:
}
/*
@ -108,7 +108,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
* non-error returns are a promise to giveback() the urb later
* we drop ownership so next owner (or urb unlink) can get it
*/
@@ -1483,6 +1564,11 @@ static int xhci_urb_enqueue(struct usb_h
@@ -1495,6 +1576,11 @@ static int xhci_urb_enqueue(struct usb_h
}
}

4
target/linux/brcm2708/patches-4.19/950-0652-Revert-usb-xhci-hack-xhci_urb_enqueue-to-support-hid.patch
View File

@ -11,7 +11,7 @@ This reverts commit 1cf1071a79f320bc4497a3ade77431f04442eb17.
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1416,87 +1416,6 @@ command_cleanup:
@@ -1428,87 +1428,6 @@ command_cleanup:
}
/*
@ -99,7 +99,7 @@ This reverts commit 1cf1071a79f320bc4497a3ade77431f04442eb17.
* non-error returns are a promise to giveback() the urb later
* we drop ownership so next owner (or urb unlink) can get it
*/
@@ -1564,11 +1483,6 @@ static int xhci_urb_enqueue(struct usb_h
@@ -1576,11 +1495,6 @@ static int xhci_urb_enqueue(struct usb_h
}
}

4
target/linux/brcm2708/patches-4.19/950-0654-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1416,6 +1416,103 @@ command_cleanup:
@@ -1428,6 +1428,103 @@ command_cleanup:
}
/*
@ -119,7 +119,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
* non-error returns are a promise to giveback() the urb later
* we drop ownership so next owner (or urb unlink) can get it
*/
@@ -5180,6 +5277,7 @@ static const struct hc_driver xhci_hc_dr
@@ -5220,6 +5317,7 @@ static const struct hc_driver xhci_hc_dr
.endpoint_reset = xhci_endpoint_reset,
.check_bandwidth = xhci_check_bandwidth,
.reset_bandwidth = xhci_reset_bandwidth,

2
target/linux/brcm2708/patches-4.19/950-0802-regulator-gpio-Allow-nonexclusive-GPIO-access.patch
View File

@ -41,7 +41,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -3948,8 +3948,23 @@ struct gpio_desc *__must_check gpiod_get
@@ -3959,8 +3959,23 @@ struct gpio_desc *__must_check gpiod_get
* the device name as label
*/
status = gpiod_request(desc, con_id ? con_id : devname);

2
target/linux/brcm2708/patches-4.19/950-0803-gpio-Enable-nonexclusive-gpiods-from-DT-nodes.patch
View File

@ -23,7 +23,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -4022,6 +4022,8 @@ struct gpio_desc *gpiod_get_from_of_node
@@ -4033,6 +4033,8 @@ struct gpio_desc *gpiod_get_from_of_node
transitory = flags & OF_GPIO_TRANSITORY;
ret = gpiod_request(desc, label);

10
target/linux/brcm47xx/patches-4.14/159-cpu_fixes.patch
View File

@ -458,7 +458,7 @@
/*
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -976,6 +976,9 @@ void build_get_pgde32(u32 **p, unsigned
@@ -983,6 +983,9 @@ void build_get_pgde32(u32 **p, unsigned
uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT);
uasm_i_addu(p, ptr, tmp, ptr);
#else
@ -468,7 +468,7 @@
UASM_i_LA_mostly(p, ptr, pgdc);
#endif
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -1337,6 +1340,9 @@ static void build_r4000_tlb_refill_handl
@@ -1344,6 +1347,9 @@ static void build_r4000_tlb_refill_handl
#ifdef CONFIG_64BIT
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
#else
@ -478,7 +478,7 @@
build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
#endif
@@ -1348,6 +1354,9 @@ static void build_r4000_tlb_refill_handl
@@ -1355,6 +1361,9 @@ static void build_r4000_tlb_refill_handl
build_update_entries(&p, K0, K1);
build_tlb_write_entry(&p, &l, &r, tlb_random);
uasm_l_leave(&l, p);
@ -488,7 +488,7 @@
uasm_i_eret(&p); /* return from trap */
}
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
@@ -2057,6 +2066,9 @@ build_r4000_tlbchange_handler_head(u32 *
@@ -2064,6 +2073,9 @@ build_r4000_tlbchange_handler_head(u32 *
#ifdef CONFIG_64BIT
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
#else
@ -498,7 +498,7 @@
build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
#endif
@@ -2103,6 +2115,9 @@ build_r4000_tlbchange_handler_tail(u32 *
@@ -2110,6 +2122,9 @@ build_r4000_tlbchange_handler_tail(u32 *
build_tlb_write_entry(p, l, r, tlb_indexed);
uasm_l_leave(l, *p);
build_restore_work_registers(p);

10
target/linux/brcm47xx/patches-4.19/159-cpu_fixes.patch
View File

@ -458,7 +458,7 @@
/*
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -972,6 +972,9 @@ void build_get_pgde32(u32 **p, unsigned
@@ -979,6 +979,9 @@ void build_get_pgde32(u32 **p, unsigned
uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT);
uasm_i_addu(p, ptr, tmp, ptr);
#else
@ -468,7 +468,7 @@
UASM_i_LA_mostly(p, ptr, pgdc);
#endif
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -1333,6 +1336,9 @@ static void build_r4000_tlb_refill_handl
@@ -1340,6 +1343,9 @@ static void build_r4000_tlb_refill_handl
#ifdef CONFIG_64BIT
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
#else
@ -478,7 +478,7 @@
build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
#endif
@@ -1344,6 +1350,9 @@ static void build_r4000_tlb_refill_handl
@@ -1351,6 +1357,9 @@ static void build_r4000_tlb_refill_handl
build_update_entries(&p, K0, K1);
build_tlb_write_entry(&p, &l, &r, tlb_random);
uasm_l_leave(&l, p);
@ -488,7 +488,7 @@
uasm_i_eret(&p); /* return from trap */
}
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
@@ -2039,6 +2048,9 @@ build_r4000_tlbchange_handler_head(u32 *
@@ -2046,6 +2055,9 @@ build_r4000_tlbchange_handler_head(u32 *
#ifdef CONFIG_64BIT
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
#else
@ -498,7 +498,7 @@
build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
#endif
@@ -2085,6 +2097,9 @@ build_r4000_tlbchange_handler_tail(u32 *
@@ -2092,6 +2104,9 @@ build_r4000_tlbchange_handler_tail(u32 *
build_tlb_write_entry(p, l, r, tlb_indexed);
uasm_l_leave(l, *p);
build_restore_work_registers(p);

2
target/linux/generic/backport-4.14/030-USB-serial-option-fix-dwm-158-3g-modem-interface.patch
View File

@ -30,7 +30,7 @@ Signed-off-by: Johan Hovold <johan@kernel.org>
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -1954,7 +1954,8 @@ static const struct usb_device_id option
@@ -1965,7 +1965,8 @@ static const struct usb_device_id option
{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d01, 0xff) }, /* D-Link DWM-156 (variant) */
{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d02, 0xff) },
{ USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d03, 0xff) },

4
target/linux/generic/pending-4.14/220-optimize_inlining.patch
View File

@ -11,7 +11,7 @@
early_print("no ATAGS support: can't continue\n");
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -126,7 +126,7 @@ static inline bool cpu_have_feature(unsi
@@ -347,7 +347,7 @@ static inline bool cpu_have_feature(unsi
}
/* System capability check for constant caps */
@ -20,7 +20,7 @@
{
if (num >= ARM64_NCAPS)
return false;
@@ -140,7 +140,7 @@ static inline bool cpus_have_cap(unsigne
@@ -361,7 +361,7 @@ static inline bool cpus_have_cap(unsigne
return test_bit(num, cpu_hwcaps);
}

497
target/linux/ipq40xx/config-4.19 Normal file
View File

@ -0,0 +1,497 @@
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_APQ_GCC_8084 is not set
# CONFIG_APQ_MMCC_8084 is not set
CONFIG_AR40XX_PHY=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_ARCH_HAS_KCOV=y
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
CONFIG_ARCH_HAS_SET_MEMORY=y
CONFIG_ARCH_HAS_SG_CHAIN=y
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_IPQ40XX=y
# CONFIG_ARCH_MDM9615 is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_ARCH_MSM8960 is not set
# CONFIG_ARCH_MSM8974 is not set
# CONFIG_ARCH_MSM8X60 is not set
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
CONFIG_ARM_CPUIDLE=y
CONFIG_ARM_CPU_SUSPEND=y
# CONFIG_ARM_CPU_TOPOLOGY is not set
CONFIG_ARM_GIC=y
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_L1_CACHE_SHIFT_6=y
# CONFIG_ARM_LPAE is not set
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_SMMU is not set
# CONFIG_ARM_SP805_WATCHDOG is not set
CONFIG_ARM_THUMB=y
# CONFIG_ARM_THUMBEE is not set
CONFIG_ARM_UNWIND=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_AT803X_PHY=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOUNCE=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_QCOM=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_QCOM=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_HAS_ASID=y
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SPECTRE=y
CONFIG_CPU_THERMAL=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CRYPTO_ACOMP2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CTR=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_QCE=y
CONFIG_CRYPTO_DEV_QCOM_RNG=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CRYPTO_XTS=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
# CONFIG_DEBUG_USER is not set
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DTC=y
CONFIG_DT_IDLE_STATES=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_AT24=y
CONFIG_ESSEDMA=y
CONFIG_EXTCON=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_WATCHDOG=y
# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_HAVE_ARCH_BITREVERSE=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_HAVE_EBPF_JIT=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_SMP=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HIGHMEM=y
# CONFIG_HIGHPTE is not set
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_HW_RANDOM=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_QUP=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IPQ_GCC_4019=y
# CONFIG_IPQ_GCC_806X is not set
# CONFIG_IPQ_GCC_8074 is not set
# CONFIG_IPQ_LCC_806X is not set
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_LP5562=y
CONFIG_LEDS_LP55XX_COMMON=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_GPIO=y
CONFIG_MDIO_IPQ40XX=y
# CONFIG_MDM_GCC_9615 is not set
# CONFIG_MDM_LCC_9615 is not set
CONFIG_MEMFD_CREATE=y
# CONFIG_MFD_QCOM_RPM is not set
# CONFIG_MFD_SPMI_PMIC is not set
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGHT_HAVE_PCI=y
CONFIG_MIGRATION=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MSM_GCC_8660 is not set
# CONFIG_MSM_GCC_8916 is not set
# CONFIG_MSM_GCC_8960 is not set
# CONFIG_MSM_GCC_8974 is not set
# CONFIG_MSM_GCC_8994 is not set
# CONFIG_MSM_GCC_8996 is not set
# CONFIG_MSM_GCC_8998 is not set
# CONFIG_MSM_LCC_8960 is not set
# CONFIG_MSM_MMCC_8960 is not set
# CONFIG_MSM_MMCC_8974 is not set
# CONFIG_MSM_MMCC_8996 is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_QCOM=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIT_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
# CONFIG_MTD_UBI_FASTMAP is not set
# CONFIG_MTD_UBI_GLUEBI is not set
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEON=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_QCA8K=y
CONFIG_NET_DSA_TAG_QCA=y
# CONFIG_NET_DSA_VITESSE_VSC73XX is not set
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NLS=y
CONFIG_NO_BOOTMEM=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OF_RESERVED_MEM=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OPTEE=y
CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y
CONFIG_PCIE_QCOM=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
# CONFIG_PCI_V3_SEMI is not set
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
# CONFIG_PHY_QCOM_APQ8064_SATA is not set
CONFIG_PHY_QCOM_IPQ4019_USB=y
# CONFIG_PHY_QCOM_IPQ806X_SATA is not set
# CONFIG_PHY_QCOM_QMP is not set
# CONFIG_PHY_QCOM_QUSB2 is not set
# CONFIG_PHY_QCOM_UFS is not set
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_APQ8064 is not set
# CONFIG_PINCTRL_APQ8084 is not set
CONFIG_PINCTRL_IPQ4019=y
# CONFIG_PINCTRL_IPQ8064 is not set
# CONFIG_PINCTRL_IPQ8074 is not set
# CONFIG_PINCTRL_MDM9615 is not set
CONFIG_PINCTRL_MSM=y
# CONFIG_PINCTRL_MSM8660 is not set
# CONFIG_PINCTRL_MSM8916 is not set
# CONFIG_PINCTRL_MSM8960 is not set
# CONFIG_PINCTRL_MSM8994 is not set
# CONFIG_PINCTRL_MSM8996 is not set
# CONFIG_PINCTRL_MSM8998 is not set
# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set
# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
# CONFIG_PINCTRL_SDM845 is not set
CONFIG_PM_OPP=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_MSM=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PRINTK_TIME=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_QCOM_A53PLL=y
CONFIG_QCOM_BAM_DMA=y
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EBI2 is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GSBI is not set
# CONFIG_QCOM_IOMMU is not set
# CONFIG_QCOM_LLCC is not set
# CONFIG_QCOM_PDC is not set
CONFIG_QCOM_PM=y
CONFIG_QCOM_QFPROM=y
# CONFIG_QCOM_RMTFS_MEM is not set
CONFIG_QCOM_SCM=y
CONFIG_QCOM_SCM_32=y
# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
CONFIG_QCOM_SMEM=y
# CONFIG_QCOM_SMSM is not set
CONFIG_QCOM_TCSR=y
# CONFIG_QCOM_TSENS is not set
CONFIG_QCOM_WDT=y
# CONFIG_QRTR is not set
CONFIG_RAS=y
CONFIG_RATIONAL=y
CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_RCU_NEED_SEGCBLIST=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_REFCOUNT_FULL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_QCOM_SPMI is not set
CONFIG_REGULATOR_VCTRL=y
CONFIG_RESET_CONTROLLER=y
# CONFIG_RESET_QCOM_AOSS is not set
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_DRV_CMOS is not set
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
# CONFIG_SDM_DISPCC_845 is not set
# CONFIG_SDM_GCC_845 is not set
# CONFIG_SDM_VIDEOCC_845 is not set
CONFIG_SERIAL_8250_FSL=y
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y
# CONFIG_SFP is not set
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_QUP=y
CONFIG_SPMI=y
CONFIG_SPMI_MSM_PMIC_ARB=y
# CONFIG_SPMI_PMIC_CLKDIV is not set
CONFIG_SRCU=y
CONFIG_SWCONFIG=y
CONFIG_SWCONFIG_LEDS=y
CONFIG_SWPHY=y
CONFIG_SWP_EMULATE=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TEE=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
# CONFIG_THUMB2_KERNEL is not set
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_ZLIB=y
CONFIG_UEVENT_HELPER_PATH=""
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_USB=y
CONFIG_USB_COMMON=y
# CONFIG_USB_EHCI_HCD is not set
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
CONFIG_VDSO=y
CONFIG_VFP=y
CONFIG_VFPv3=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y

219
target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-a42.dts Normal file
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2017, Sven Eckelmann <sven.eckelmann@openmesh.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "OpenMesh A42";
compatible = "openmesh,a42";
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
leds {
compatible = "gpio-leds";
red {
label = "a42:red:status";
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
power: green {
label = "a42:green:status";
gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
};
blue {
label = "a42:blue:status";
gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
/* hw_margin_ms is actually 300s but driver limits it to 60s */
hw_margin_ms = <60000>;
always-running;
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
/* partitions are passed via bootloader */
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&gmac0 {
qcom,phy_mdio_addr = <4>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <2 0x20>;
};
&gmac1 {
qcom,phy_mdio_addr = <3>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <1 0x10>;
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "OM-A42";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "OM-A42";
};

348
target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "ALFA Network AP120C-AC";
compatible = "alfa-network,ap120c-ac";
aliases {
led-boot = &status;
led-failsafe = &status;
led-running = &status;
led-upgrade = &status;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
status: status {
label = "ap120c-ac:blue:status";
gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
wan {
label = "ap120c-ac:amber:wan";
gpios = <&qca8075 19 GPIO_ACTIVE_HIGH>;
};
wlan2g {
label = "ap120c-ac:green:wlan2g";
gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tpt";
};
wlan5g {
label = "ap120c-ac:red:wlan5g";
gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy1tpt";
};
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
ess-psgmii@98000 {
status = "okay";
};
counter@4a1000 {
compatible = "qcom,qca-gcnt";
reg = <0x4a1000 0x4>;
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
};
usb3@8af8800 {
status = "okay";
dwc3@8a00000 {
phys = <&usb3_hs_phy>;
phy-names = "usb2-phy";
};
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
qca8075: ess-switch@c000000 {
status = "okay";
switch_lan_bmp = <0x10>;
switch_wan_bmp = <0x20>;
#gpio-cells = <2>;
gpio-controller;
};
edma@c080000 {
status = "okay";
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_i2c3 {
status = "okay";
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
tpm@29 {
compatible = "atmel,at97sc3204t";
reg = <0x29>;
};
};
&blsp1_spi1 {
status = "okay";
pinctrl-0 = <&spi0_pins>;
pinctrl-names = "default";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
<&tlmm 4 GPIO_ACTIVE_HIGH>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition@e0000 {
label = "APPSBLENV";
reg = <0x000e0000 0x00010000>;
};
partition@f0000 {
label = "APPSBL";
reg = <0x000f0000 0x00080000>;
read-only;
};
partition@170000 {
label = "ART";
reg = <0x00170000 0x00010000>;
read-only;
};
partition@180000 {
label = "priv_data1";
reg = <0x00180000 0x00010000>;
read-only;
};
partition@190000 {
label = "priv_data2";
reg = <0x00190000 0x00010000>;
read-only;
};
};
};
nand@1 {
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "rootfs1";
reg = <0x00000000 0x04000000>;
};
partition@4000000 {
label = "rootfs2";
reg = <0x04000000 0x04000000>;
};
};
};
};
&blsp1_uart1 {
status = "okay";
pinctrl-0 = <&serial0_pins>;
pinctrl-names = "default";
};
&cryptobam {
status = "okay";
};
&gmac0 {
qcom,forced_duplex = <1>;
qcom,forced_speed = <1000>;
qcom,phy_mdio_addr = <3>;
qcom,poll_required = <1>;
vlan_tag = <1 0x10>;
};
&gmac1 {
qcom,forced_duplex = <1>;
qcom,forced_speed = <1000>;
qcom,phy_mdio_addr = <4>;
qcom,poll_required = <1>;
vlan_tag = <2 0x20>;
};
&tlmm {
i2c0_pins: i2c0_pinmux {
mux_i2c {
function = "blsp_i2c0";
pins = "gpio58", "gpio59";
drive-strength = <16>;
bias-disable;
};
};
mdio_pins: mdio_pinmux {
mux_mdio {
pins = "gpio53";
function = "mdio";
bias-pull-up;
};
mux_mdc {
pins = "gpio52";
function = "mdc";
bias-pull-up;
};
};
serial0_pins: serial0_pinmux {
mux_uart {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi0_pins: spi0_pinmux {
mux_spi {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
mux_cs {
function = "gpio";
pins = "gpio54", "gpio4";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&usb2_hs_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
};

277
target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Linksys EA6350v3";
compatible = "linksys,ea6350v3";
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
};
usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
power: status {
label = "EA6350v3:green:status";
gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "linksys-ea6350v3";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "linksys-ea6350v3";
};
&blsp_dma {
status = "okay";
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
mux {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
mux_cs {
function = "gpio";
pins = "gpio54", "gpio59";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp1_spi1 { /* BLSP1 QUP1 */
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
<&tlmm 59 GPIO_ACTIVE_HIGH>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
SBL1@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
MBIB@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
QSEE@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
CDT@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
APPSBLENV@d0000 {
label = "APPSBLENV";
reg = <0x000d0000 0x00010000>;
read-only;
};
APPSBL@e0000 {
label = "APPSBL"; /* uboot */
reg = <0x000e0000 0x00080000>;
read-only;
};
ART@160000 {
label = "ART";
reg = <0x00160000 0x00010000>;
read-only;
};
u_env@170000 {
label = "u_env";
reg = <0x00170000 0x00020000>;
};
s_env@190000 {
label = "s_env";
reg = <0x00190000 0x00020000>;
};
devinfo@1b0000 {
label = "devinfo";
reg = <0x001b0000 0x00010000>;
};
/* 0x001c0000 - 0x00200000 unused */
};
};
flash@1 {
status = "okay";
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
kernel@0 {
label = "kernel";
reg = <0x00000000 0x02800000>;
};
rootfs@300000 {
label = "rootfs";
reg = <0x00300000 0x02500000>;
};
alt_kernel@2800000 {
label = "alt_kernel";
reg = <0x02800000 0x02800000>;
};
alt_rootfs@2b00000 {
label = "alt_rootfs";
reg = <0x02b00000 0x02500000>;
};
sysdiag@5000000 {
label = "sysdiag";
reg = <0x05000000 0x00100000>;
};
syscfg@5100000 {
label = "syscfg";
reg = <0x05100000 0x02F00000>;
};
/* 0x00000000 - 0x08000000: 128 MiB */
};
};
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0-or-later
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "EnGenius EAP1300";
compatible = "engenius,eap1300";
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RESTART>;
};
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
leds {
compatible = "gpio-leds";
power: orange {
label = "eap1300:orange:power";
gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
};
lan {
label = "eap1300:blue:lan";
gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
};
mesh {
label = "eap1300:blue:mesh";
gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
};
wlan2g {
label = "eap1300:blue:wlan2g";
gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
};
wlan5g {
label = "eap1300:yellow:wlan5g";
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
};
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio54", "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "0:SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition1@40000 {
label = "0:MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition2@60000 {
label = "0:QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition3@c0000 {
label = "0:CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition4@d0000 {
label = "0:DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition5@e0000 {
label = "0:APPSBLENV";
reg = <0x000e0000 0x00010000>;
read-only;
};
partition6@f0000 {
label = "0:APPSBL";
reg = <0x000f0000 0x00090000>;
read-only;
};
partition7@180000 {
label = "0:ART";
reg = <0x00180000 0x00010000>;
read-only;
};
partition8@190000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x190000 0x1dc0000>;
};
partition9@1f50000 {
label = "u-boot-env";
reg = <0x01f50000 0x00010000>;
};
partition10@1f60000 {
label = "userconfig";
reg = <0x01f60000 0x000a0000>;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&gmac0 {
vlan_tag = <2 0x20>;
};
&gmac1 {
vlan_tag = <1 0x10>;
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "EnGenius-EAP1300";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "EnGenius-EAP1300";
};

265
target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "EnGenius ENS620EXT";
compatible = "engenius,ens620ext";
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
/*
* Disable the broken restart as a workaround for the buggy
* 3.0.0/3.0.1 U-boots that ship with the device.
* Note: The watchdog is now used to restart this device.
*/
restart@4ab000 {
status = "disabled";
};
};
buttons {
compatible = "gpio-keys";
wps {
label = "wps";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
power: power {
label = "ens620ext:amber:power";
gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "ens620ext:green:lan1";
gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "ens620ext:green:lan2";
gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
};
wlan2G {
label = "ens620ext:green:wlan2G";
gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
};
wlan5G {
label = "ens620ext:green:wlan5G";
gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
};
};
};
&cryptobam {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
mux {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
mux_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp1_spi1 { /* BLSP1 QUP1 */
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
flash@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition@e0000 {
label = "APPSBLENV"; /* uboot env*/
reg = <0x000e0000 0x00010000>;
read-only;
};
partition@f0000 {
label = "APPSBL"; /* uboot */
reg = <0x000f0000 0x00090000>;
read-only;
};
partition@180000 {
label = "ART";
reg = <0x00180000 0x00010000>;
read-only;
};
partition@190000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x00190000 0x14d0000>;
};
partition@1660000 {
label = "failsafe";
reg = <0x01660000 0x008F0000>;
read-only;
};
partition@1f50000 {
label = "u-boot-env";
reg = <0x01f50000 0x00010000>;
read-only;
};
partition@1f60000 {
label = "userconfig";
reg = <0x01f60000 0x000a0000>;
read-only;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "EnGenius-ENS620EXT";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "EnGenius-ENS620EXT";
};

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target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts Normal file
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2018, David Bauer <mail@david-bauer.net>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4018-ex61x0v2.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Netgear EX6100v2";
compatible = "netgear,ex6100v2";
};
&wifi0 {
qcom,ath10k-calibration-variant = "Netgear-EX6100v2";
};
&wifi1 {
qcom,ath10k-calibration-variant = "Netgear-EX6100v2";
};

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target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts Normal file
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2018, David Bauer <mail@david-bauer.net>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4018-ex61x0v2.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Netgear EX6150v2";
compatible = "netgear,ex6150v2";
};
&wifi0 {
qcom,ath10k-calibration-variant = "Netgear-EX6150v2";
};
&wifi1 {
qcom,ath10k-calibration-variant = "Netgear-EX6150v2";
};

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target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi Normal file
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2018, David Bauer <mail@david-bauer.net>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Netgear EX61X0v2";
compatible = "netgear,ex61x0v2";
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
qcom,num_gmac = <1>;
};
};
aliases {
led-boot = &power_amber;
led-failsafe = &power_amber;
led-running = &power_green;
led-upgrade = &power_amber;
label-mac-device = &gmac0;
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
reset {
label = "reset";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
num-chipselects = <0>;
led_gpio: led_gpio@0 {
compatible = "fairchild,74hc595";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <1>;
spi-max-frequency = <1000000>;
};
};
leds {
compatible = "gpio-leds";
power_amber: power_amber {
label = "ex61x0v2:amber:power";
gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
};
power_green: power_green {
label = "ex61x0v2:green:power";
gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
};
right {
label = "ex61x0v2:blue:right";
gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
};
left {
label = "ex61x0v2:blue:left";
gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
};
client_green {
label = "ex61x0v2:green:client";
gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
};
client_red {
label = "ex61x0v2:red:client";
gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
};
router_green {
label = "ex61x0v2:green:router";
gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
};
router_red {
label = "ex61x0v2:red:router";
gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
};
wps {
label = "ex61x0v2:green:wps";
gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
};
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
mx25l12805d@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition1@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition2@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition3@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition4@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition5@E0000 {
label = "APPSBLENV";
reg = <0x000e0000 0x00010000>;
read-only;
};
partition6@F0000 {
label = "APPSBL";
reg = <0x000f0000 0x00080000>;
read-only;
};
partition7@170000 {
label = "ART";
reg = <0x00170000 0x00010000>;
read-only;
};
partition8@180000 {
label = "config";
reg = <0x00180000 0x00010000>;
read-only;
};
partition9@190000 {
label = "pot";
reg = <0x00190000 0x00010000>;
read-only;
};
partition10@1a0000 {
label = "dnidata";
reg = <0x001a0000 0x00010000>;
read-only;
};
partition11@1b0000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x001b0000 0x00e10000>;
};
partition12@fc0000 {
label = "language";
reg = <0x00fc0000 0x00040000>;
read-only;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp_dma {
status = "okay";
};
&cryptobam {
status = "okay";
};
&wifi0 {
status = "okay";
};
&wifi1 {
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "AVM FRITZ!Box 4040";
compatible = "avm,fritzbox-4040";
aliases {
led-boot = &power;
led-failsafe = &flash;
led-running = &power;
led-upgrade = &flash;
label-mac-device = &gmac0;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
};
usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
qca8075: ess-switch@c000000 {
status = "okay";
#gpio-cells = <2>;
gpio-controller;
enable-usb-power {
gpio-hog;
line-name = "enable USB3 power";
gpios = <7 GPIO_ACTIVE_HIGH>;
output-high;
};
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
wlan {
label = "wlan";
gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
wps {
label = "wps";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
switch-leds {
compatible = "gpio-leds";
wlan {
label = "fritz4040:green:wlan";
gpios = <&qca8075 1 GPIO_ACTIVE_HIGH>;
};
panic: info_red {
label = "fritz4040:red:info";
gpios = <&qca8075 3 GPIO_ACTIVE_HIGH>;
panic-indicator;
};
wan {
label = "fritz4040:green:wan";
gpios = <&qca8075 5 GPIO_ACTIVE_HIGH>;
};
power: power {
label = "fritz4040:green:power";
gpios = <&qca8075 11 GPIO_ACTIVE_HIGH>;
};
lan {
label = "fritz4040:green:lan";
gpios = <&qca8075 13 GPIO_ACTIVE_HIGH>;
};
flash: info_amber {
label = "fritz4040:amber:info";
gpios = <&qca8075 15 GPIO_ACTIVE_HIGH>;
};
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
mux {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
mux_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&cryptobam {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 { /* BLSP1 QUP1 */
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
status = "okay";
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition1@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition2@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition3@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition4@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition5@e0000 {
label = "APPSBLENV"; /* uboot env - empty */
reg = <0x000e0000 0x00010000>;
read-only;
};
partition6@f0000 {
label = "urlader"; /* APPSBL */
reg = <0x000f0000 0x0002dc000>;
read-only;
};
partition7@11dc00 {
/* make a backup of this partition! */
label = "urlader_config";
reg = <0x0011dc00 0x00002400>;
read-only;
};
partition8@120000 {
label = "tffs1";
reg = <0x00120000 0x00080000>;
read-only;
};
partition9@1a0000 {
label = "tffs2";
reg = <0x001a0000 0x00080000>;
read-only;
};
partition10@220000 {
label = "uboot";
reg = <0x00220000 0x00080000>;
read-only;
};
partition11@2A0000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x002a0000 0x01c60000>;
};
partition12@1f00000 {
label = "jffs2";
reg = <0x01f00000 0x00100000>;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "AVM-FRITZBox-4040";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "AVM-FRITZBox-4040";
};

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target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts Normal file
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "8devices Jalapeno";
compatible = "8dev,jalapeno";
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
ess-psgmii@98000 {
status = "okay";
};
counter@4a1000 {
compatible = "qcom,qca-gcnt";
reg = <0x4a1000 0x4>;
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
switch_lan_bmp = <0x10>; /* lan port bitmap */
};
edma@c080000 {
status = "okay";
};
};
};
&tlmm {
mdio_pins: mdio_pinmux {
pinmux_1 {
pins = "gpio53";
function = "mdio";
};
pinmux_2 {
pins = "gpio52";
function = "mdc";
};
pinconf {
pins = "gpio52", "gpio53";
bias-pull-up;
};
};
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <2>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54", "gpio59";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
status = "okay";
m25p80@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition1@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition2@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition3@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition4@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition5@e0000 {
label = "APPSBLENV"; /* uboot env*/
reg = <0x000e0000 0x00010000>;
read-only;
};
partition5@f0000 {
label = "APPSBL"; /* uboot */
reg = <0x000f0000 0x00080000>;
read-only;
};
partition5@170000 {
label = "ART";
reg = <0x00170000 0x00010000>;
read-only;
};
};
};
spi-nand@1 {
status = "okay";
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "ubi";
reg = <0x00000000 0x08000000>;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&gmac0 {
qcom,poll_required = <1>;
qcom,poll_required_dynamic = <1>;
qcom,phy_mdio_addr = <3>;
vlan_tag = <1 0x10>;
};
&gmac1 {
qcom,poll_required = <1>;
qcom,poll_required_dynamic = <1>;
qcom,phy_mdio_addr = <4>;
vlan_tag = <2 0x20>;
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "8devices-Jalapeno";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "8devices-Jalapeno";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "ZyXEL NBG6617";
compatible = "zyxel,nbg6617";
chosen {
/*
* the vendor u-boot adds root and mtdparts cmdline parameters
* which we don't want... but we have to overwrite them or else
* the kernel will take them at face value.
*/
bootargs-append = " mtdparts= root=31:13";
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
dwc3@6000000 {
#address-cells = <1>;
#size-cells = <0>;
usb2_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
usb3@8af8800 {
status = "okay";
dwc3@8a00000 {
#address-cells = <1>;
#size-cells = <0>;
usb3_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
usb3_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
wlan {
label = "wlan";
gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RFKILL>;
linux,input-type = <EV_SW>;
};
wps {
label = "wps";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
reset {
label = "reset";
gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
power: power {
label = "nbg6617:green:power";
gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
};
usb {
label = "nbg6617:green:usb";
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
trigger-sources = <&usb2_port1>, <&usb3_port1>, <&usb3_port2>;
linux,default-trigger = "usbport";
};
wlan2G {
label = "nbg6617:green:wlan2G";
gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
};
wlan5G {
label = "nbg6617:green:wlan5G";
gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
};
wps {
label = "nbg6617:green:wps";
gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
};
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
mux {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
mux_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-low;
};
};
led_pins: led_pinmux {
mux {
pins = "gpio0", "gpio1", "gpio3", "gpio5", "gpio58";
drive-strength = <0x8>;
bias-disable;
output-low;
};
};
};
&blsp1_spi1 { /* BLSP1 QUP1 */
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
mx25l25635f@0 {
compatible = "mx25l25635f", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
status = "okay";
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition1@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition2@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition3@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition4@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition5@e0000 {
label = "APPSBL"; /* u-boot */
reg = <0x000e0000 0x00080000>;
/* U-Boot Standalone App "zloader" is located at 0x64000 */
read-only;
};
partition6@160000 {
label = "APPSBLENV"; /* u-boot env */
reg = <0x00160000 0x00010000>;
};
partition7@170000 {
/* make a backup of this partition! */
label = "ART";
reg = <0x00170000 0x00010000>;
read-only;
};
partition8@180000 {
label = "kernel";
reg = <0x00180000 0x00400000>;
};
partition9@580000 {
label = "dualflag";
reg = <0x00580000 0x00010000>;
read-only;
};
partition10@590000 {
label = "header";
reg = <0x00590000 0x00010000>;
};
partition11@5a0000 {
label = "romd";
reg = <0x005a0000 0x00100000>;
read-only;
};
partition12@6a0000 {
label = "not_root_data";
/*
* for some strange reason, someone at ZyXEL
* had the "great" idea to put the rootfs_data
* in front of rootfs... Don't do that!
* As a result this one, full MebiByte remains
* unused.
*/
reg = <0x006a0000 0x00100000>;
};
partition13@7a0000 {
label = "rootfs";
reg = <0x007a0000 0x01860000>;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "ZyXEL-NBG6617";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "ZyXEL-NBG6617";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "ASUS RT-AC58U";
compatible = "asus,rt-ac58u";
memory {
device_type = "memory";
reg = <0x80000000 0x8000000>;
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
chosen {
bootargs-append = " ubi.mtd=UBI_DEV";
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
dwc3@6000000 {
#address-cells = <1>;
#size-cells = <0>;
usb2_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
usb3@8af8800 {
status = "okay";
dwc3@8a00000 {
#address-cells = <1>;
#size-cells = <0>;
usb3_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
usb3_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
power: status {
label = "rt-ac58u:blue:status";
gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
};
wan {
label = "rt-ac58u:blue:wan";
gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
};
wlan2G {
label = "rt-ac58u:blue:wlan2G";
gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
};
wan5G {
label = "rt-ac58u:blue:wlan5G";
gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
};
usb {
label = "rt-ac58u:blue:usb";
gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
linux,default-trigger = "usbport";
};
lan {
label = "rt-ac58u:blue:lan";
gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
};
};
};
&cryptobam {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
mux {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
mux_cs {
function = "gpio";
pins = "gpio54", "gpio59";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp1_spi1 { /* BLSP1 QUP1 */
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
<&tlmm 59 GPIO_ACTIVE_HIGH>;
flash@0 {
/*
* U-boot looks for "n25q128a11" node,
* if we don't have it, it will spit out the following warning:
* "ipq: fdt fixup unable to find compatible node".
*/
compatible = "jedec,spi-nor";
reg = <0>;
linux,modalias = "m25p80", "mx25l1606e", "n25q128a11";
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition@e0000 {
label = "APPSBLENV"; /* uboot env*/
reg = <0x000e0000 0x00010000>;
read-only;
};
partition@f0000 {
label = "APPSBL"; /* uboot */
reg = <0x000f0000 0x00080000>;
read-only;
};
partition@170000 {
label = "ART";
reg = <0x00170000 0x00010000>;
read-only;
};
/* 0x00180000 - 0x00200000 unused */
};
};
spi-nand@1 {
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <24000000>;
/*
* U-boot looks for "spinand,mt29f" node,
* if we don't have it, it will spit out the following warning:
* "ipq: fdt fixup unable to find compatible node".
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
/*
* TODO: change to label = "ubi" once we drop 4.14.
* also drop the bootargs-append and all the
* userspace CI_UBIPART="UBI_DEV" remains.
*/
label = "UBI_DEV";
reg = <0x00000000 0x08000000>;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "RT-AC58U";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "RT-AC58U";
};

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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2018, David Bauer <mail@david-bauer.net>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "ZyXEL WRE6606";
compatible = "zyxel,wre6606";
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
chosen {
bootargs-append = " mtdparts=";
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
qcom,num_gmac = <1>;
};
};
leds {
compatible = "gpio-leds";
wps {
label = "wre6606:green:wps";
gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
};
wlan5g_green {
label = "wre6606:green:wlan5g";
gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
};
power: power {
label = "wre6606:green:power";
gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
};
wlan5g_red {
label = "wre6606:red:wlan5g";
gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
};
wlan2g_red {
label = "wre6606:red:wlan2g";
gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
};
wlan2g_green {
label = "wre6606:green:wlan2g";
gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
mx25l12805d@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition1@40000 {
label = "MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition2@60000 {
label = "QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition3@c0000 {
label = "CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition4@d0000 {
label = "DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition5@E0000 {
label = "APPSBLENV";
reg = <0x000e0000 0x00010000>;
read-only;
};
partition6@F0000 {
label = "APPSBL";
reg = <0x000f0000 0x00080000>;
read-only;
};
partition7@170000 {
label = "ART";
reg = <0x00170000 0x00010000>;
read-only;
};
partition8@180000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x00180000 0x00ce0000>;
};
partition9@e60000 {
label = "manufacture";
reg = <0x00e60000 0x00050000>;
read-only;
};
partition10@eb0000 {
label = "storage";
reg = <0x00eb0000 0x00150000>;
read-only;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "ZyXEL-WRE6606";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "ZyXEL-WRE6606";
};

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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "OpenMesh A62";
compatible = "openmesh,a62";
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
switch_lan_bmp = <0x10>;
switch_wan_bmp = <0x20>;
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART >;
};
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
leds {
compatible = "gpio-leds";
red {
label = "a62:red:status";
gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
power: green {
label = "a62:green:status";
gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
};
blue {
label = "a62:blue:status";
gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
/* hw_margin_ms is actually 300s but driver limits it to 60s */
hw_margin_ms = <60000>;
always-running;
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio13", "gpio14", "gpio15";
drive-strength = <12>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio12";
drive-strength = <2>;
bias-disable;
output-high;
};
};
enable-usb-power {
gpio-hog;
gpios = <58 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "enable USB2 power";
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
/* partitions are passed via bootloader */
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&gmac0 {
qcom,phy_mdio_addr = <3>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <1 0x10>;
};
&usb2_hs_phy {
status = "okay";
};
&pcie0 {
status = "okay";
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi2: wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "OM-A62";
ieee80211-freq-limit = <5170000 5350000>;
};
};
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "OM-A62";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "OM-A62";
ieee80211-freq-limit = <5470000 5875000>;
};

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target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts Normal file
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019-ap.dk04.1.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK04.1-C1";
};

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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
compatible = "qcom,ipq4019";
soc {
rng@22000 {
status = "okay";
};
pinctrl@1000000 {
serial_0_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
serial_1_pins: serial1_pinmux {
mux {
pins = "gpio8", "gpio9";
function = "blsp_uart1";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pinmux {
function = "blsp_spi0";
pins = "gpio13", "gpio14", "gpio15";
};
pinmux_cs {
function = "gpio";
pins = "gpio12";
};
pinconf {
pins = "gpio13", "gpio14", "gpio15";
drive-strength = <12>;
bias-disable;
};
pinconf_cs {
pins = "gpio12";
drive-strength = <2>;
bias-disable;
output-high;
};
};
i2c_0_pins: i2c_0_pinmux {
pinmux {
function = "blsp_i2c0";
pins = "gpio10", "gpio11";
};
pinconf {
pins = "gpio10", "gpio11";
drive-strength = <16>;
bias-disable;
};
};
nand_pins: nand_pins {
pullups {
pins = "gpio52", "gpio53", "gpio58",
"gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio54", "gpio55", "gpio56",
"gpio57", "gpio60", "gpio61",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio68", "gpio69";
function = "qpic";
bias-pull-down;
};
};
};
blsp_dma: dma@7884000 {
status = "okay";
};
spi0: spi@78b5000 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
mx25l25635e@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "mx25l25635e";
spi-max-frequency = <24000000>;
};
};
i2c0: i2c@78b7000 { /* BLSP1 QUP2 */
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "okay";
};
serial@78af000 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
serial@78b0000 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "okay";
};
usb3_ss_phy: ssphy@9a000 {
status = "okay";
};
usb3_hs_phy: hsphy@a6000 {
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
};
usb2_hs_phy: hsphy@a8000 {
status = "okay";
};
usb2: usb2@60f8800 {
status = "okay";
};
cryptobam: dma@8e04000 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
qpic_bam: dma@7984000 {
status = "okay";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
};
};
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "AVM FRITZ!Box 7530";
compatible = "avm,fritzbox-7530";
aliases {
led-boot = &power_green;
led-failsafe = &info_red;
led-running = &power_green;
led-upgrade = &info_green;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
qcom,num_gmac = <1>;
};
};
keys {
compatible = "gpio-keys";
wlan {
label = "wlan";
gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
wps {
label = "wps";
gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
dect {
label = "dect";
gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
linux,code = <KEY_PHONE>;
};
};
leds {
compatible = "gpio-leds";
info_red: info_red {
label = "fritzbox-7530:red:info";
gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
};
info_green: info {
label = "fritzbox-7530:green:info";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
};
wlan {
label = "fritzbox-7530:green:wlan";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
};
fon {
label = "fritzbox-7530:green:fon";
gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
};
power_green: power {
label = "fritzbox-7530:green:power";
gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
};
wps {
label = "fritzbox-7530:green:wps";
gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
};
};
};
&tlmm {
serial_0_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
nand_pins: nand_pins {
pullups {
pins = "gpio53", "gpio58", "gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio54", "gpio55", "gpio56",
"gpio57", "gpio60", "gpio61",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio68", "gpio69";
function = "qpic";
bias-pull-down;
};
};
usb-power {
line-name = "enable USB3 power";
gpios = <49 GPIO_ACTIVE_HIGH>;
gpio-hog;
output-high;
};
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x000000 0x80000>;
read-only;
};
partition@80000 {
label = "MIBIB";
reg = <0x080000 0x80000>;
read-only;
};
partition@100000 {
label = "QSEE";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "CDT";
reg = <0x180000 0x40000>;
read-only;
};
partition@1c0000 {
label = "QSEE_B";
reg = <0x1c0000 0x80000>;
read-only;
};
partition@240000 {
label = "urlader0";
reg = <0x240000 0x40000>;
read-only;
};
partition@280000 {
label = "urlader1";
reg = <0x280000 0x40000>;
read-only;
};
partition@2c0000 {
label = "nand-tffs";
reg = <0x2c0000 0x840000>;
read-only;
};
partition@b00000 {
/* 'kernel1' in AVM firmware */
label = "uboot0";
reg = <0xb00000 0x400000>;
};
partition@f00000 {
/* 'kernel2' in AVM firmware */
label = "uboot1";
reg = <0xf00000 0x400000>;
};
partition@1300000 {
label = "ubi";
reg = <0x1300000 0x6d00000>;
};
};
};
};
&cryptobam {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "AVM-FRITZBox-7530";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "AVM-FRITZBox-7530";
};
&pcie0 {
status = "okay";
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
dsl@1,0 {
compatible = "intel,vrx518";
status = "okay";
reg = <0x00010000 0 0 0 0>;
};
};
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "AVM FRITZ!Repeater 1200";
compatible = "avm,fritzrepeater-1200";
aliases {
led-boot = &power_green;
led-failsafe = &power_red;
led-running = &power_green;
led-upgrade = &power_red;
label-mac-device = &wifi0;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
switch_lan_bmp = <0x0>; /* lan port bitmap */
switch_wan_bmp = <0x10>; /* wan port bitmap */
};
edma@c080000 {
status = "okay";
phy-mode = "rgmii-rxid";
qcom,num_gmac = <1>;
qcom,single-phy;
};
};
key {
compatible = "gpio-keys";
wps {
label = "WPS button";
gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
power_red: power_red {
label = "fritzwlan-1200:red:power";
gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
};
power_green: power_green {
label = "fritzwlan-1200:green:power";
gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
};
power_yellow {
label = "fritzwlan-1200:yellow:power";
gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
};
};
};
&tlmm {
serial_0_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
nand_pins: nand_pins {
pullups {
pins = "gpio53", "gpio58", "gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio54", "gpio55", "gpio56",
"gpio57", "gpio60", "gpio61",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio68", "gpio69";
function = "qpic";
bias-pull-down;
};
};
mdio_pins: mdio_pinmux {
mux_1 {
pins = "gpio6";
function = "mdio";
bias-pull-up;
};
mux_2 {
pins = "gpio7";
function = "mdc";
bias-pull-up;
};
};
phy-reset {
line-name = "PHY-reset";
gpios = <19 GPIO_ACTIVE_HIGH>;
gpio-hog;
output-high;
};
phy-reset-2 {
line-name = "PHY-reset-2";
gpios = <47 GPIO_ACTIVE_HIGH>;
gpio-hog;
output-high;
};
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "MIBIB";
reg = <0x80000 0x80000>;
read-only;
};
partition@100000 {
label = "QSEE";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "CDT";
reg = <0x180000 0x40000>;
read-only;
};
partition@1c0000 {
label = "QSEE_B";
reg = <0x1c0000 0x80000>;
read-only;
};
partition@240000 {
label = "urlader0";
reg = <0x240000 0x40000>;
read-only;
};
partition@280000 {
label = "urlader1";
reg = <0x280000 0x40000>;
read-only;
};
partition@2c0000 {
label = "nand-tffs";
reg = <0x2c0000 0x840000>;
read-only;
};
partition@b00000 {
/* 'kernel1' in AVM firmware */
label = "uboot0";
reg = <0xb00000 0x400000>;
};
partition@f00000 {
/* 'kernel2' in AVM firmware */
label = "uboot1";
reg = <0xf00000 0x400000>;
};
partition@1300000 {
label = "ubi";
reg = <0x1300000 0x6d00000>;
};
};
};
};
&cryptobam {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&qpic_bam {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-1200";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-1200";
};
&gmac0 {
qcom,phy_mdio_addr = <0>;
qcom,poll_required = <1>;
vlan_tag = <0 0x20>;
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "AVM FRITZ!Repeater 3000";
compatible = "avm,fritzrepeater-3000";
aliases {
led-boot = &power_led;
led-failsafe = &power_led;
led-running = &power_led;
led-upgrade = &power_led;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
switch_lan_bmp = <0x10>;
switch_wan_bmp = <0x20>;
};
edma@c080000 {
status = "okay";
};
};
key {
compatible = "gpio-keys";
connect {
label = "Connect";
gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
connect_red {
label = "fritzwlan-3000:red:connect";
gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
};
connect_green {
label = "fritzwlan-3000:green:connect";
gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
};
connect_blue {
label = "fritzwlan-3000:blue:connect";
gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
};
power_led: power {
label = "fritzwlan-3000:green:power";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
};
};
};
&tlmm {
serial_0_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
nand_pins: nand_pins {
pullups {
pins = "gpio53", "gpio58", "gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio54", "gpio55", "gpio56",
"gpio57", "gpio60", "gpio61",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio68", "gpio69";
function = "qpic";
bias-pull-down;
};
};
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x000000 0x80000>;
read-only;
};
partition@80000 {
label = "MIBIB";
reg = <0x080000 0x80000>;
read-only;
};
partition@100000 {
label = "QSEE";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "CDT";
reg = <0x180000 0x40000>;
read-only;
};
partition@1c0000 {
label = "QSEE_B";
reg = <0x1c0000 0x80000>;
read-only;
};
partition@240000 {
label = "urlader0";
reg = <0x240000 0x40000>;
read-only;
};
partition@280000 {
label = "urlader1";
reg = <0x280000 0x40000>;
read-only;
};
partition@2c0000 {
label = "nand-tffs";
reg = <0x2c0000 0x840000>;
read-only;
};
partition@b00000 {
/* 'kernel1' in AVM firmware */
label = "uboot0";
reg = <0xb00000 0x400000>;
};
partition@f00000 {
/* 'kernel2' in AVM firmware */
label = "uboot1";
reg = <0xf00000 0x400000>;
};
partition@1300000 {
label = "ubi";
reg = <0x1300000 0x6d00000>;
};
};
};
};
&cryptobam {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&qpic_bam {
status = "okay";
};
&wifi0 {
status = "okay";
/* BDFs are identical for the FRITZ!Box 7530 and the FRITZ!Repeater 3000 */
qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-3000";
};
&wifi1 {
status = "okay";
ieee80211-freq-limit = <5170000 5350000>;
/* BDFs are identical for the FRITZ!Box 7530 and the FRITZ!Repeater 3000 */
qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-3000";
};
&pcie0 {
status = "okay";
perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
/* QCA9984 */
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
ieee80211-freq-limit = <5470000 5875000>;
/* Uses the reference BDF */
};
};
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Device Tree Source for Linksys EA8300 (Dallas)
*
* Copyright (C) 2019 Jeff Kletsky
*
*/
/dts-v1/;
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Linksys EA8300 (Dallas)";
compatible = "linksys,ea8300", "qcom,ipq4019";
aliases {
led-boot = &led_wps_amber;
led-failsafe = &led_wps;
led-running = &led_linksys;
led-upgrade = &led_world;
serial0 = &blsp1_uart1;
};
leds {
compatible = "gpio-leds";
// Retain node names from running OEM on EA8300
// Front panel LEDs, top to bottom
led_plug: diag {
label = "ea8300:amber:plug";
gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
};
led_world: internet {
label = "ea8300:amber:world";
gpios = <&tlmm 49 GPIO_ACTIVE_HIGH>;
};
led_wps: wps {
label = "ea8300:white:wps";
gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
};
led_wps_amber: wps_amber {
label = "ea8300:amber:wps";
gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
panic-indicator;
};
led_linksys: pwr {
label = "ea8300:white:linksys";
gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
};
// On back panel, above USB socket
led_usb: usb {
label = "ea8300:green:usb";
gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
trigger-sources = <&usb3_port1>, <&usb3_port2>,
<&usb2_port1>;
linux,default-trigger = "usbport";
};
};
keys {
compatible = "gpio-keys";
button@0 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
};
button@1 {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
};
//
// OEM U-Boot provides either
// init=/sbin/init rootfstype=ubifs ubi.mtd=11,2048 \
// root=ubi0:ubifs rootwait rw
// or the same with ubi.mtd=13,2048
//
chosen {
bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro";
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
dwc3@6000000 {
#address-cells = <1>;
#size-cells = <0>;
usb2_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
usb3@8af8800 {
status = "okay";
dwc3@8a00000 {
#address-cells = <1>;
#size-cells = <0>;
usb3_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
usb3_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_uart1 {
status = "okay";
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
};
&cryptobam {
status = "okay";
};
&nand {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "sbl1";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "mibib";
reg = <0x100000 0x100000>;
read-only;
};
partition@200000 {
label = "qsee";
reg = <0x200000 0x100000>;
read-only;
};
partition@300000 {
label = "cdt";
reg = <0x300000 0x80000>;
read-only;
};
partition@380000 {
label = "appsblenv";
reg = <0x380000 0x80000>;
read-only;
};
partition@400000 {
label = "ART";
reg = <0x400000 0x80000>;
read-only;
};
partition@480000 {
label = "appsbl";
reg = <0x480000 0x200000>;
read-only;
};
partition@680000 {
label = "u_env";
reg = <0x680000 0x80000>;
// writable -- U-Boot environment
};
partition@700000 {
label = "s_env";
reg = <0x700000 0x40000>;
// writable -- Boot counter records
};
partition@740000 {
label = "devinfo";
reg = <0x740000 0x40000>;
read-only;
};
partition@780000 {
label = "kernel";
reg = <0x780000 0x5800000>;
};
partition@a80000 {
label = "rootfs";
reg = <0xa80000 0x5500000>;
};
partition@5f80000 {
label = "alt_kernel";
reg = <0x5f80000 0x5800000>;
};
partition@6280000 {
label = "alt_rootfs";
reg = <0x6280000 0x5500000>;
};
partition@b780000 {
label = "sysdiag";
reg = <0xb780000 0x100000>;
read-only;
};
partition@b880000 {
label = "syscfg";
reg = <0xb880000 0x4680000>;
read-only;
};
};
};
};
&pcie0 {
status = "okay";
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi2: wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
};
};
&qpic_bam {
status = "okay";
};
&tlmm {
serial_0_pins: serial0-pinmux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
nand_pins: nand_pins {
pullups {
pins = "gpio53", "gpio58", "gpio59";
function = "qpic";
bias-pull-up;
};
// gpio61 controls led_usb
pulldowns {
pins = "gpio55", "gpio56", "gpio57",
"gpio60", "gpio62", "gpio63",
"gpio64", "gpio65", "gpio66",
"gpio67", "gpio68", "gpio69";
function = "qpic";
bias-pull-down;
};
};
};
&usb2_hs_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb3_ss_phy {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "linksys-ea8300-fcc";
};
&wifi1 {
status = "okay";
ieee80211-freq-limit = <5170000 5330000>;
qcom,ath10k-calibration-variant = "linksys-ea8300-fcc";
};
&wifi2 {
status = "okay";
ieee80211-freq-limit = <5490000 5835000>;
qcom,ath10k-calibration-variant = "linksys-ea8300-fcc";
};

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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/dts-v1/;
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "ASUS Lyra MAP-AC2200";
compatible = "asus,map-ac2200";
aliases {
led-boot = &led_blue0;
led-failsafe = &led_red0;
led-running = &led_blue0;
led-upgrade = &led_red0;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "MIBIB";
reg = <0x80000 0x80000>;
read-only;
};
partition@100000 {
label = "QSEE";
reg = <0x100000 0x100000>;
read-only;
};
partition@200000 {
label = "CDT";
reg = <0x200000 0x80000>;
read-only;
};
partition@280000 {
label = "APPSBL";
reg = <0x280000 0x140000>;
read-only;
};
partition@3c0000 {
label = "APPSBLENV";
reg = <0x3c0000 0x40000>;
read-only;
};
partition@400000 {
label = "ubi";
reg = <0x400000 0x7c00000>;
};
};
};
};
&tlmm {
i2c_0_pins: i2c_0_pinmux {
pinmux {
function = "blsp_i2c0";
pins = "gpio20", "gpio21";
drive-strength = <16>;
bias-disable;
};
};
serial_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
nand_pins: nand_pins {
pullups {
pins = "gpio52", "gpio53", "gpio58",
"gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio54", "gpio55", "gpio56",
"gpio57", "gpio60", "gpio61",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio68", "gpio69";
function = "qpic";
bias-pull-down;
};
};
};
&cryptobam {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "ASUS-MAP-AC2200";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "ASUS-MAP-AC2200";
ieee80211-freq-limit = <5470000 5875000>;
};
&pcie0 {
status = "okay";
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi2: wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "ASUS-MAP-AC2200";
ieee80211-freq-limit = <5170000 5350000>;
};
};
};
&usb2_hs_phy {
/* Bluetooth module attached via USB */
status = "okay";
};
&blsp1_i2c3 {
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "okay";
led-controller@32 {
/* 9-channel RGB LED controller */
compatible = "national,lp5523";
reg = <0x32>;
clock-mode = [01];
led_blue0: blue0 {
chan-name = "blue0";
label = "map-ac2200:blue:chan0";
led-cur = [fa];
max-cur = [ff];
};
blue1 {
chan-name = "blue1";
label = "map-ac2200:blue:chan1";
led-cur = [fa];
max-cur = [ff];
};
blue2 {
chan-name = "blue2";
label = "map-ac2200:blue:chan2";
led-cur = [fa];
max-cur = [ff];
};
led_green0: green0 {
chan-name = "green0";
label = "map-ac2200:green:chan0";
led-cur = [fa];
max-cur = [ff];
};
green1 {
chan-name = "green1";
label = "map-ac2200:green:chan1";
led-cur = [fa];
max-cur = [ff];
};
green2 {
chan-name = "green2";
label = "map-ac2200:green:chan2";
led-cur = [fa];
max-cur = [ff];
};
led_red0: red0 {
chan-name = "red0";
label = "map-ac2200:red:chan0";
led-cur = [fa];
max-cur = [ff];
};
red1 {
chan-name = "red1";
label = "map-ac2200:red:chan1";
led-cur = [fa];
max-cur = [ff];
};
red2 {
chan-name = "red2";
label = "map-ac2200:red:chan2";
led-cur = [fa];
max-cur = [ff];
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};

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/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
*
* Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
*
*/
#include "qcom-ipq4019-qxwlan-e2600ac.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Qxwlan E2600AC c1";
compatible = "qxwlan,e2600ac-c1";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "0:SBL1";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "0:MIBIB";
reg = <0x40000 0x20000>;
read-only;
};
partition@60000 {
label = "0:QSEE";
reg = <0x60000 0x60000>;
read-only;
};
partition@c0000 {
label = "0:CDT";
reg = <0xc0000 0x10000>;
read-only;
};
partition@d0000 {
label = "0:DDRPARAMS";
reg = <0xd0000 0x10000>;
read-only;
};
partition@e0000 {
label = "0:APPSBLENV";
reg = <0xe0000 0x10000>;
read-only;
};
partition@f0000 {
label = "0:APPSBL";
reg = <0xf0000 0x80000>;
read-only;
};
partition@170000 {
label = "0:ART";
reg = <0x170000 0x10000>;
read-only;
};
partition@180000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x180000 0x1e80000>;
};
};
};
};

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/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
*
* Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
*
*/
#include "qcom-ipq4019-qxwlan-e2600ac.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Qxwlan E2600AC c2";
compatible = "qxwlan,e2600ac-c2";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "0:SBL1";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "0:MIBIB";
reg = <0x40000 0x20000>;
read-only;
};
partition@60000 {
label = "0:QSEE";
reg = <0x60000 0x60000>;
read-only;
};
partition@c0000 {
label = "0:CDT";
reg = <0xc0000 0x10000>;
read-only;
};
partition@d0000 {
label = "0:DDRPARAMS";
reg = <0xd0000 0x10000>;
read-only;
};
partition@e0000 {
label = "0:APPSBLENV";
reg = <0xe0000 0x10000>;
read-only;
};
partition@f0000 {
label = "0:APPSBL";
reg = <0xf0000 0x80000>;
read-only;
};
partition@170000 {
label = "0:ART";
reg = <0x170000 0x10000>;
read-only;
};
};
};
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "ubi";
reg = <0x00000000 0x04000000>;
};
};
};
};
&tlmm {
nand_pins: nand-pins {
pullups {
pins = "gpio53", "gpio58", "gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio54", "gpio55", "gpio56",
"gpio57", "gpio60", "gpio61",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio68", "gpio69";
function = "qpic";
bias-pull-down;
};
};
};

266
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/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
*
* Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Qxwlan E2600AC";
compatible = "qcom,ipq4019";
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256MB */
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
dwc3@6000000 {
#address-cells = <1>;
#size-cells = <0>;
usb2_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
serial@78af000 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
serial@78b0000 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "okay";
};
i2c@78b7000 { /* BLSP1 QUP2 */
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
dwc3@8a00000 {
#address-cells = <1>;
#size-cells = <0>;
usb3_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
usb3_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
leds {
compatible = "gpio-leds";
led1 {
label = "e2600ac:green:wlan0";
gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
};
led2 {
label = "e2600ac:green:wlan1";
gpios = <&tlmm 36 GPIO_ACTIVE_LOW>;
};
led3 {
label = "e2600ac:green:usb";
gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
trigger-sources = <&usb2_port1>, <&usb3_port1>, <&usb3_port2>;
linux,default-trigger = "usbport";
};
led4 {
label = "e2600ac:green:ctrl1";
gpios = <&tlmm 51 GPIO_ACTIVE_LOW>;
};
led5 {
label = "e2600ac:green:ctrl2";
gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
};
led6 {
label = "e2600ac:green:ctrl3";
gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
};
&blsp_dma {
status = "okay";
};
&cryptobam {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&tlmm {
i2c_0_pins: i2c-0-pinmux {
mux {
pins = "gpio20", "gpio21";
function = "blsp_i2c0";
bias-disable;
};
};
mdio_pins: mdio_pinmux {
mux_1 {
pins = "gpio6";
function = "mdio";
bias-pull-up;
};
mux_2 {
pins = "gpio7";
function = "mdc";
bias-pull-up;
};
};
serial_0_pins: serial0-pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
serial_1_pins: serial1_pinmux {
mux {
pins = "gpio8", "gpio9";
function = "blsp_uart1";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pinmux {
function = "blsp_spi0";
pins = "gpio13", "gpio14", "gpio15";
drive-strength = <12>;
bias-disable;
};
pinmux_cs {
function = "gpio";
pins = "gpio12";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "Qxwlan-E2600AC";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "Qxwlan-E2600AC";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "qcom-ipq4019-unielec-u4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Unielec U4019 (32M)";
compatible = "unielec,u4019-32m","unielec,u4019","qcom,ipq4019";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <24000000>;
broken-flash-reset;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "0:SBL1";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "0:MIBIB";
reg = <0x40000 0x20000>;
read-only;
};
partition@60000 {
label = "0:QSEE";
reg = <0x60000 0x60000>;
read-only;
};
partition@c0000 {
label = "0:CDT";
reg = <0xc0000 0x10000>;
read-only;
};
partition@d0000 {
label = "0:DDRPARAMS";
reg = <0xd0000 0x10000>;
read-only;
};
partition@e0000 {
label = "0:APPSBLENV";
reg = <0xe0000 0x10000>;
read-only;
};
partition@f0000 {
label = "0:APPSBL";
reg = <0xf0000 0x80000>;
read-only;
};
partition@170000 {
label = "0:ART";
reg = <0x170000 0x10000>;
read-only;
};
partition@180000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x180000 0x1e80000>;
};
};
};
};

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target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4019-unielec-u4019.dtsi Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
compatible = "unielec,u4019","qcom,ipq4019";
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 47 0>;
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
dwc3@6000000 {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
usb3@8af8800 {
status = "okay";
dwc3@8a00000 {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
};
edma@c080000 {
status = "okay";
};
aliases {
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led_status: led2 {
label = "u4019:green:led2";
gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_uart2 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "okay";
};
&qpic_bam {
status = "okay";
};
&tlmm {
mdio_pins: mdio_pinmux {
mux_1 {
pins = "gpio6";
function = "mdio";
bias-pull-up;
};
mux_2 {
pins = "gpio7";
function = "mdc";
bias-pull-up;
};
};
serial_0_pins: serial0-pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
serial_1_pins: serial1_pinmux {
mux {
pins = "gpio8", "gpio9";
function = "blsp_uart1";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pinmux {
function = "blsp_spi0";
pins = "gpio13", "gpio14", "gpio15";
drive-strength = <12>;
bias-disable;
};
pinmux_cs {
function = "gpio";
pins = "gpio12";
drive-strength = <2>;
bias-disable;
output-high;
};
};
led_pins: led_pinmux {
mux {
function = "gpio";
pins = "gpio68";
bias-disabled;
output-low;
};
};
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
};
&wifi1 {
status = "okay";
};

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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2017, Christian Mehlis <christian@m3hlis.de>
* Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Compex WPJ428";
compatible = "compex,wpj428";
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
switch_lan_bmp = <0x10>;
switch_wan_bmp = <0x20>;
status = "okay";
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
aliases {
led-boot = &status;
led-failsafe = &status;
led-upgrade = &status;
};
leds {
compatible = "gpio-leds";
status: rss4 {
label = "wpj428:green:rss4";
gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
};
rss3 {
label = "wpj428:green:rss3";
gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
};
};
beeper: beeper {
compatible = "gpio-beeper";
gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
};
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pin {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
pin_cs {
function = "gpio";
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition0@0 {
label = "0:SBL1";
reg = <0x00000000 0x00040000>;
read-only;
};
partition1@40000 {
label = "0:MIBIB";
reg = <0x00040000 0x00020000>;
read-only;
};
partition2@60000 {
label = "0:QSEE";
reg = <0x00060000 0x00060000>;
read-only;
};
partition3@c0000 {
label = "0:CDT";
reg = <0x000c0000 0x00010000>;
read-only;
};
partition4@d0000 {
label = "0:DDRPARAMS";
reg = <0x000d0000 0x00010000>;
read-only;
};
partition5@e0000 {
label = "0:APPSBLENV"; /* uboot env*/
reg = <0x000e0000 0x00010000>;
read-only;
};
partition5@f0000 {
label = "0:APPSBL"; /* uboot */
reg = <0x000f0000 0x00080000>;
read-only;
};
partition5@170000 {
label = "0:ART";
reg = <0x00170000 0x00010000>;
read-only;
};
partition6@180000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x00180000 0x01e80000>;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&gmac0 {
qcom,phy_mdio_addr = <4>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <2 0x20>;
};
&gmac1 {
qcom,phy_mdio_addr = <3>;
qcom,poll_required = <1>;
qcom,forced_speed = <1000>;
qcom,forced_duplex = <1>;
vlan_tag = <1 0x10>;
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
};
&wifi1 {
status = "okay";
};

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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "GL.iNet GL-B1300";
compatible = "glinet,gl-b1300";
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
};
ess-psgmii@98000 {
status = "okay";
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
/* select hostmode */
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2@60f8800 {
status = "okay";
};
usb3@8af8800 {
status = "okay";
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
status = "okay";
switch_lan_bmp = <0x18>;
switch_wan_bmp = <0x20>;
};
edma@c080000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
reset {
label = "reset";
gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
power: power {
label = "gl-b1300:green:power";
gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
mesh {
label = "gl-b1300:green:mesh";
gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
};
wlan {
label = "gl-b1300:green:wlan";
gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
};
};
};
&blsp_dma {
status = "okay";
};
&cryptobam {
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
mx25l25635f@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
SBL1@0 {
label = "SBL1";
reg = <0x0 0x40000>;
read-only;
};
MIBIB@40000 {
label = "MIBIB";
reg = <0x40000 0x20000>;
read-only;
};
QSEE@60000 {
label = "QSEE";
reg = <0x60000 0x60000>;
read-only;
};
CDT@c0000 {
label = "CDT";
reg = <0xc0000 0x10000>;
read-only;
};
DDRPARAMS@d0000 {
label = "DDRPARAMS";
reg = <0xd0000 0x10000>;
read-only;
};
APPSBLENV@e0000 {
label = "APPSBLENV";
reg = <0xe0000 0x10000>;
read-only;
};
APPSBL@f0000 {
label = "APPSBL";
reg = <0xf0000 0x80000>;
read-only;
};
ART@170000 {
label = "ART";
reg = <0x170000 0x10000>;
read-only;
};
firmware@180000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x180000 0x1e80000>;
};
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&serial_pins>;
pinctrl-names = "default";
status = "okay";
};
&tlmm {
serial_pins: serial_pinmux {
mux {
pins = "gpio60", "gpio61";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pinmux {
function = "blsp_spi0";
pins = "gpio55", "gpio56", "gpio57";
};
pinmux_cs {
function = "gpio";
pins = "gpio54";
};
pinconf {
pins = "gpio55", "gpio56", "gpio57";
drive-strength = <12>;
bias-disable;
};
pinconf_cs {
pins = "gpio54";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
&usb2_hs_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb3_ss_phy {
status = "okay";
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "GL-B1300";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "GL-B1300";
};

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target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4029-mr33.dts Normal file
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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Meraki MR33 (Stinkbug)
*
* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
* Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
*
* Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*/
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Meraki MR33 Access Point";
compatible = "meraki,mr33";
aliases {
led-boot = &status_green;
led-failsafe = &status_red;
led-running = &status_green;
led-upgrade = &power_orange;
};
/* Do we really need this defined? */
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
soc {
rng@22000 {
status = "okay";
};
mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
};
/* It is a 56-bit counter that supplies the count to the ARM arch
timers and without upstream driver */
counter@4a1000 {
compatible = "qcom,qca-gcnt";
reg = <0x4a1000 0x4>;
};
ess_tcsr@1953000 {
compatible = "qcom,tcsr";
reg = <0x1953000 0x1000>;
qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
};
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
serial@78b0000 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "okay";
bluetooth {
compatible = "ti,cc2650";
enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
};
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
ess-switch@c000000 {
switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
switch_lan_bmp = <0x0>; /* lan port bitmap */
switch_wan_bmp = <0x10>; /* wan port bitmap */
};
edma@c080000 {
qcom,single-phy;
qcom,num_gmac = <1>;
phy-mode = "rgmii-rxid";
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
power_orange: power {
label = "mr33:orange:power";
gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
panic-indicator;
};
};
};
&blsp_dma {
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&cryptobam {
status = "okay";
};
&gmac0 {
qcom,phy_mdio_addr = <1>;
qcom,poll_required = <1>;
vlan_tag = <0 0x20>;
};
&blsp1_i2c3 {
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "okay";
at24@50 {
compatible = "atmel,24c64";
pagesize = <32>;
reg = <0x50>;
read-only; /* This holds our MAC & Meraki board-data */
};
};
&blsp1_i2c4 {
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "okay";
led-controller@30 {
compatible = "ti,lp5562";
reg = <0x30>;
clock-mode = /bits/8 <2>;
enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
/* RGB led */
status_red: chan0 {
chan-name = "mr33:red:status";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
};
status_green: chan1 {
chan-name = "mr33:green:status";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
};
chan2 {
chan-name = "mr33:blue:status";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
};
chan3 {
chan-name = "mr33:white:status";
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
};
};
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "sbl1";
reg = <0x00000000 0x00100000>;
read-only;
};
partition@100000 {
label = "mibib";
reg = <0x00100000 0x00100000>;
read-only;
};
partition@200000 {
label = "bootconfig";
reg = <0x00200000 0x00100000>;
read-only;
};
partition@300000 {
label = "qsee";
reg = <0x00300000 0x00100000>;
read-only;
};
partition@400000 {
label = "qsee_alt";
reg = <0x00400000 0x00100000>;
read-only;
};
partition@500000 {
label = "cdt";
reg = <0x00500000 0x00080000>;
read-only;
};
partition@580000 {
label = "cdt_alt";
reg = <0x00580000 0x00080000>;
read-only;
};
partition@600000 {
label = "ddrparams";
reg = <0x00600000 0x00080000>;
read-only;
};
partition@700000 {
label = "u-boot";
reg = <0x00700000 0x00200000>;
read-only;
};
partition@900000 {
label = "u-boot-backup";
reg = <0x00900000 0x00200000>;
read-only;
};
partition@b00000 {
label = "ART";
reg = <0x00b00000 0x00080000>;
read-only;
};
partition@c00000 {
label = "ubi";
reg = <0x00c00000 0x07000000>;
/*
* Do not try to allocate the remaining
* 4 MiB to this ubi partition. It will
* confuse the u-boot and it might not
* find the kernel partition anymore.
*/
};
};
};
};
&pcie0 {
status = "okay";
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi2: wifi@1,0 {
compatible = "qcom,ath10k";
status = "okay";
reg = <0x00010000 0 0 0 0>;
};
};
};
&qpic_bam {
status = "okay";
};
&tlmm {
/*
* GPIO43 should be 0/1 whenever the unit is
* powered through PoE or AC-Adapter.
* That said, playing with this seems to
* reset the AP.
*/
mdio_pins: mdio_pinmux {
mux_1 {
pins = "gpio6";
function = "mdio";
bias-pull-up;
};
mux_2 {
pins = "gpio7";
function = "mdc";
bias-pull-up;
};
};
serial_0_pins: serial_pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
serial_1_pins: serial1_pinmux {
mux {
/* We use the i2c-0 pins for serial_1 */
pins = "gpio8", "gpio9";
function = "blsp_uart1";
bias-disable;
};
};
i2c_0_pins: i2c_0_pinmux {
pinmux {
function = "blsp_i2c0";
pins = "gpio20", "gpio21";
};
pinconf {
pins = "gpio20", "gpio21";
drive-strength = <16>;
bias-disable;
};
};
i2c_1_pins: i2c_1_pinmux {
pinmux {
function = "blsp_i2c1";
pins = "gpio34", "gpio35";
};
pinconf {
pins = "gpio34", "gpio35";
drive-strength = <16>;
bias-disable;
};
};
nand_pins: nand_pins {
/*
* There are 18 pins. 15 pins are common between LCD and NAND.
* The QPIC controller arbitrates between LCD and NAND. Of the
* remaining 4, 2 are for NAND and 2 are for LCD exclusively.
*
* The meraki source hints that the bluetooth module claims
* pin 52 as well. But sadly, there's no data whenever this
* is a NAND or LCD exclusive pin or not.
*/
pullups {
pins = "gpio52", "gpio53", "gpio58",
"gpio59";
function = "qpic";
bias-pull-up;
};
pulldowns {
pins = "gpio54", "gpio55", "gpio56",
"gpio57", "gpio60", "gpio61",
"gpio62", "gpio63", "gpio64",
"gpio65", "gpio66", "gpio67",
"gpio68", "gpio69";
function = "qpic";
bias-pull-down;
};
};
};
&wifi0 {
status = "okay";
qcom,ath10k-calibration-variant = "Meraki-MR33";
};
&wifi1 {
status = "okay";
qcom,ath10k-calibration-variant = "Meraki-MR33";
};

27
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@ -0,0 +1,27 @@
From 61a3bd10082b0e861b4e1bc451a92e20181a52f5 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@nbd.name>
Date: Mon, 23 Jul 2018 16:17:35 +0200
Subject: [PATCH] soc: qcom: spm: add SCM probe dependency
Check for SCM availability before attempting to use SPM. SPM probe will
fail otherwise.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
---
drivers/soc/qcom/spm.c | 3 +++
1 file changed, 3 insertions(+)
--- a/drivers/soc/qcom/spm.c
+++ b/drivers/soc/qcom/spm.c
@@ -219,6 +219,9 @@ static int __init qcom_cpuidle_init(stru
cpumask_t mask;
bool use_scm_power_down = false;
+ if (!qcom_scm_is_available())
+ return -EPROBE_DEFER;
+
for (i = 0; ; i++) {
state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i);
if (!state_node)

97
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@ -0,0 +1,97 @@
From 233c77d4f1d12e4337fba1146d5197f4c0f9107d Mon Sep 17 00:00:00 2001
From: Matthew McClintock <mmcclint@codeaurora.org>
Date: Wed, 25 Jul 2018 10:37:45 +0200
Subject: [PATCH] ARM: dts: qcom: ipq4019: use v2 of the kpss bringup mechanism
v1 was the incorrect choice here and sometimes the board
would not come up properly.
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 25 +++++++++++++++++--------
1 file changed, 17 insertions(+), 8 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -52,7 +52,8 @@
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
- enable-method = "qcom,kpss-acc-v1";
+ enable-method = "qcom,kpss-acc-v2";
+ next-level-cache = <&L2>;
qcom,acc = <&acc0>;
qcom,saw = <&saw0>;
reg = <0x0>;
@@ -71,7 +72,8 @@
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
- enable-method = "qcom,kpss-acc-v1";
+ enable-method = "qcom,kpss-acc-v2";
+ next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
reg = <0x1>;
@@ -90,7 +92,8 @@
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
- enable-method = "qcom,kpss-acc-v1";
+ enable-method = "qcom,kpss-acc-v2";
+ next-level-cache = <&L2>;
qcom,acc = <&acc2>;
qcom,saw = <&saw2>;
reg = <0x2>;
@@ -109,7 +112,8 @@
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a7";
- enable-method = "qcom,kpss-acc-v1";
+ enable-method = "qcom,kpss-acc-v2";
+ next-level-cache = <&L2>;
qcom,acc = <&acc3>;
qcom,saw = <&saw3>;
reg = <0x3>;
@@ -124,6 +128,11 @@
>;
clock-latency = <256000>;
};
+
+ L2: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ };
};
pmu {
@@ -292,22 +301,22 @@
};
acc0: clock-controller@b088000 {
- compatible = "qcom,kpss-acc-v1";
+ compatible = "qcom,kpss-acc-v2";
reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
};
acc1: clock-controller@b098000 {
- compatible = "qcom,kpss-acc-v1";
+ compatible = "qcom,kpss-acc-v2";
reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
};
acc2: clock-controller@b0a8000 {
- compatible = "qcom,kpss-acc-v1";
+ compatible = "qcom,kpss-acc-v2";
reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
};
acc3: clock-controller@b0b8000 {
- compatible = "qcom,kpss-acc-v1";
+ compatible = "qcom,kpss-acc-v2";
reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
};

38
target/linux/ipq40xx/patches-4.19/071-02-ipq40xx-Fix-booting-secondary-cores.patch Normal file
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@ -0,0 +1,38 @@
From 8a4540321e8bcf7a5b485c332a2e78f3501c78ed Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 29 Nov 2018 22:29:36 +0100
Subject: [PATCH] ipq40xx: Fix booting secondary cores
Add the second part of old 071-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch
We dont modify the patch itself as its upstream and this change is not.
Originally added by Mantas Pucka Mantas Pucka <mantas@8devices.com>
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -132,6 +132,7 @@
L2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ qcom,saw = <&saw_l2>;
};
};
@@ -344,6 +345,12 @@
regulator;
};
+ saw_l2: regulator@b012000 {
+ compatible = "qcom,saw2";
+ reg = <0xb012000 0x1000>;
+ regulator;
+ };
+
blsp1_uart1: serial@78af000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78af000 0x200>;

114
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@ -0,0 +1,114 @@
From bcb9ab4c2917e92114d2f4c2b1da97cdf15b471b Mon Sep 17 00:00:00 2001
From: Matthew McClintock <mmcclint@codeaurora.org>
Date: Wed, 25 Jul 2018 10:37:46 +0200
Subject: [PATCH] ARM: dts: qcom: ipq4019: add cpu operating points for cpufreq
support
This adds some operating points for cpu frequeny scaling
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 58 ++++++++++++++---------------
1 file changed, 30 insertions(+), 28 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -59,14 +59,8 @@
reg = <0x0>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
- operating-points = <
- /* kHz uV (fixed) */
- 48000 1100000
- 200000 1100000
- 500000 1100000
- 716000 1100000
- >;
clock-latency = <256000>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu@1 {
@@ -79,14 +73,8 @@
reg = <0x1>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
- operating-points = <
- /* kHz uV (fixed) */
- 48000 1100000
- 200000 1100000
- 500000 1100000
- 666000 1100000
- >;
clock-latency = <256000>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu@2 {
@@ -99,14 +87,8 @@
reg = <0x2>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
- operating-points = <
- /* kHz uV (fixed) */
- 48000 1100000
- 200000 1100000
- 500000 1100000
- 666000 1100000
- >;
clock-latency = <256000>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu@3 {
@@ -119,14 +101,8 @@
reg = <0x3>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
- operating-points = <
- /* kHz uV (fixed) */
- 48000 1100000
- 200000 1100000
- 500000 1100000
- 666000 1100000
- >;
clock-latency = <256000>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
L2: l2-cache {
@@ -136,6 +112,32 @@
};
};
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-48000000 {
+ opp-hz = /bits/ 64 <48000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <256000>;
+ };
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <256000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <256000>;
+ };
+ opp-716000000 {
+ opp-hz = /bits/ 64 <716000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <256000>;
+ };
+ };
+
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |

34
target/linux/ipq40xx/patches-4.19/073-v4.20-ARM-dts-qcom-ipq4019-fix-cpu0-s-qcom-saw2-reg-value.patch Normal file
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@ -0,0 +1,34 @@
From bd73a3dd257fb838bd456a18eeee0ef0224b7a40 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Wed, 25 Jul 2018 10:37:47 +0200
Subject: [PATCH] ARM: dts: qcom: ipq4019: fix cpu0's qcom,saw2 reg value
while compiling an ipq4019 target, dtc will complain:
regulator@b089000 unit address format error, expected "2089000"
The saw0 regulator reg value seems to be
copied and pasted from qcom-ipq8064.dtsi.
This patch fixes the reg value to match that of the
unit address which in turn silences the warning.
(There is no driver for qcom,saw2 right now.
So this went unnoticed)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -325,7 +325,7 @@
saw0: regulator@b089000 {
compatible = "qcom,saw2";
- reg = <0x02089000 0x1000>, <0x0b009000 0x1000>;
+ reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
regulator;
};

36
target/linux/ipq40xx/patches-4.19/074-ARM-qcom-Add-IPQ4019-SoC-support.patch Normal file
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@ -0,0 +1,36 @@
From 89b43d59ec8c9cda588555eb1f2754dd19ef5144 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sun, 22 Jul 2018 12:07:57 +0200
Subject: [PATCH 8/8] ARM: qcom: Add IPQ4019 SoC support
Add support for the Qualcomm Atheros IPQ4019 SoC.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/arm/Makefile | 1 +
arch/arm/mach-qcom/Kconfig | 5 +++++
2 files changed, 6 insertions(+)
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -150,6 +150,7 @@ textofs-$(CONFIG_ARCH_MSM8X60) := 0x0020
textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
textofs-$(CONFIG_ARCH_MESON) := 0x00208000
textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
+textofs-$(CONFIG_ARCH_IPQ40XX) := 0x00208000
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
--- a/arch/arm/mach-qcom/Kconfig
+++ b/arch/arm/mach-qcom/Kconfig
@@ -27,4 +27,9 @@ config ARCH_MDM9615
bool "Enable support for MDM9615"
select CLKSRC_QCOM
+config ARCH_IPQ40XX
+ bool "Enable support for IPQ40XX"
+ select CLKSRC_QCOM
+ select HAVE_ARM_ARCH_TIMER
+
endif

38
target/linux/ipq40xx/patches-4.19/075-dt-bindings-phy-qcom-ipq4019-usb-add-binding-documen.patch Normal file
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@ -0,0 +1,38 @@
From 5f01733dc755dfadfa51b7b3c6c160e632fc6002 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 24 Jul 2018 15:09:36 +0200
Subject: [PATCH 1/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document
This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcom Dakota SoCs.
Signed-off-by: John Crispin <john@phrozen.org>
---
.../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt
@@ -0,0 +1,21 @@
+Qualcom Dakota HS/SS USB PHY
+
+Required properties:
+ - compatible: "qcom,usb-ss-ipq4019-phy",
+ "qcom,usb-hs-ipq4019-phy"
+ - reg: offset and length of the registers
+ - #phy-cells: should be 0
+ - resets: the reset controllers as listed below
+ - reset-names: the names of the reset controllers
+ "por_rst" - the POR reset line for SS and HS phys
+ "srif_rst" - the SRIF reset line for HS phys
+Example:
+
+hsphy@a8000 {
+ compatible = "qcom,usb-hs-ipq4019-phy";
+ phy-cells = <0>;
+ reg = <0xa8000 0x40>;
+ resets = <&gcc USB2_HSPHY_POR_ARES>,
+ <&gcc USB2_HSPHY_S_ARES>;
+ reset-names = "por_rst", "srif_rst";
+};

234
target/linux/ipq40xx/patches-4.19/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch Normal file
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@ -0,0 +1,234 @@
From 633f0e08498aebfdb932bd71319b4cb136709499 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 24 Jul 2018 14:45:49 +0200
Subject: [PATCH 2/3] phy: qcom-ipq4019-usb: add driver for QCOM/IPQ4019
Add a driver to setup the USB phy on Qualcom Dakota SoCs.
The driver sets up HS and SS phys. In case of HS some magic values need to
be written to magic offsets. These were taken from the SDK driver.
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/phy/qualcomm/Kconfig | 7 ++
drivers/phy/qualcomm/Makefile | 1 +
drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 188 ++++++++++++++++++++++++++++
3 files changed, 196 insertions(+)
create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
--- a/drivers/phy/qualcomm/Kconfig
+++ b/drivers/phy/qualcomm/Kconfig
@@ -17,6 +17,13 @@ config PHY_QCOM_APQ8064_SATA
depends on OF
select GENERIC_PHY
+config PHY_QCOM_IPQ4019_USB
+ tristate "Qualcomm IPQ4019 USB PHY module"
+ depends on OF && ARCH_QCOM
+ select GENERIC_PHY
+ help
+ Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
+
config PHY_QCOM_IPQ806X_SATA
tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
depends on ARCH_QCOM
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
@@ -0,0 +1,188 @@
+/*
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of_platform.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+/*
+ * Magic registers copied from the SDK driver code
+ */
+#define PHY_CTRL0_ADDR 0x000
+#define PHY_CTRL1_ADDR 0x004
+#define PHY_CTRL2_ADDR 0x008
+#define PHY_CTRL3_ADDR 0x00C
+#define PHY_CTRL4_ADDR 0x010
+#define PHY_MISC_ADDR 0x024
+#define PHY_IPG_ADDR 0x030
+
+#define PHY_CTRL0_VAL 0xA4600015
+#define PHY_CTRL1_VAL 0x09500000
+#define PHY_CTRL2_VAL 0x00058180
+#define PHY_CTRL3_VAL 0x6DB6DCD6
+#define PHY_CTRL4_VAL 0x836DB6DB
+#define PHY_MISC_VAL 0x3803FB0C
+#define PHY_IPG_VAL 0x47323232
+
+struct ipq4019_usb_phy {
+ struct device *dev;
+ struct phy *phy;
+ void __iomem *base;
+ struct reset_control *por_rst;
+ struct reset_control *srif_rst;
+};
+
+static int ipq4019_ss_phy_power_off(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+ reset_control_assert(phy->por_rst);
+ msleep(10);
+
+ return 0;
+}
+
+static int ipq4019_ss_phy_power_on(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+ ipq4019_ss_phy_power_off(_phy);
+
+ reset_control_deassert(phy->por_rst);
+
+ return 0;
+}
+
+static struct phy_ops ipq4019_usb_ss_phy_ops = {
+ .power_on = ipq4019_ss_phy_power_on,
+ .power_off = ipq4019_ss_phy_power_off,
+};
+
+static int ipq4019_hs_phy_power_off(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+ reset_control_assert(phy->por_rst);
+ msleep(10);
+
+ reset_control_assert(phy->srif_rst);
+ msleep(10);
+
+ return 0;
+}
+
+static int ipq4019_hs_phy_power_on(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+ ipq4019_hs_phy_power_off(_phy);
+
+ reset_control_deassert(phy->srif_rst);
+ msleep(10);
+
+ writel(PHY_CTRL0_VAL, phy->base + PHY_CTRL0_ADDR);
+ writel(PHY_CTRL1_VAL, phy->base + PHY_CTRL1_ADDR);
+ writel(PHY_CTRL2_VAL, phy->base + PHY_CTRL2_ADDR);
+ writel(PHY_CTRL3_VAL, phy->base + PHY_CTRL3_ADDR);
+ writel(PHY_CTRL4_VAL, phy->base + PHY_CTRL4_ADDR);
+ writel(PHY_MISC_VAL, phy->base + PHY_MISC_ADDR);
+ writel(PHY_IPG_VAL, phy->base + PHY_IPG_ADDR);
+ msleep(10);
+
+ reset_control_deassert(phy->por_rst);
+
+ return 0;
+}
+
+static struct phy_ops ipq4019_usb_hs_phy_ops = {
+ .power_on = ipq4019_hs_phy_power_on,
+ .power_off = ipq4019_hs_phy_power_off,
+};
+
+static const struct of_device_id ipq4019_usb_phy_of_match[] = {
+ { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
+ { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
+ { },
+};
+MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
+
+static int ipq4019_usb_phy_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ struct phy_provider *phy_provider;
+ struct ipq4019_usb_phy *phy;
+ const struct of_device_id *match;
+
+ match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
+ if (!match)
+ return -ENODEV;
+
+ phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
+ if (!phy)
+ return -ENOMEM;
+
+ phy->dev = &pdev->dev;
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ phy->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(phy->base)) {
+ dev_err(dev, "failed to remap register memory\n");
+ return PTR_ERR(phy->base);
+ }
+
+ phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
+ if (IS_ERR(phy->por_rst)) {
+ if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
+ dev_err(dev, "POR reset is missing\n");
+ return PTR_ERR(phy->por_rst);
+ }
+
+ phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
+ if (IS_ERR(phy->srif_rst))
+ return PTR_ERR(phy->srif_rst);
+
+ phy->phy = devm_phy_create(dev, NULL, match->data);
+ if (IS_ERR(phy->phy)) {
+ dev_err(dev, "failed to create PHY\n");
+ return PTR_ERR(phy->phy);
+ }
+ phy_set_drvdata(phy->phy, phy);
+
+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static struct platform_driver ipq4019_usb_phy_driver = {
+ .probe = ipq4019_usb_phy_probe,
+ .driver = {
+ .of_match_table = ipq4019_usb_phy_of_match,
+ .name = "ipq4019-usb-phy",
+ }
+};
+module_platform_driver(ipq4019_usb_phy_driver);
+
+MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
+MODULE_AUTHOR("John Crispin <john@phrozen.org>");
+MODULE_LICENSE("GPL v2");
--- a/drivers/phy/qualcomm/Makefile
+++ b/drivers/phy/qualcomm/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_PHY_ATH79_USB) += phy-ath79-usb.o
obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o
+obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o
obj-$(CONFIG_PHY_QCOM_QMP) += phy-qcom-qmp.o
obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o

123
target/linux/ipq40xx/patches-4.19/077-qcom-ipq4019-add-USB-devicetree-nodes.patch Normal file
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@ -0,0 +1,123 @@
From 1fc7d5523e21ed140fed43c4dde011a3b6d9ba08 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 24 Jul 2018 14:47:55 +0200
Subject: [PATCH 3/3] qcom: ipq4019: add USB devicetree nodes
This patch makes USB work on the Dakota EVB.
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 ++++++++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 74 +++++++++++++++++++++++++++
2 files changed, 94 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -109,5 +109,25 @@
wifi@a800000 {
status = "ok";
};
+
+ usb3_ss_phy: ssphy@9a000 {
+ status = "ok";
+ };
+
+ usb3_hs_phy: hsphy@a6000 {
+ status = "ok";
+ };
+
+ usb3: usb3@8af8800 {
+ status = "ok";
+ };
+
+ usb2_hs_phy: hsphy@a8000 {
+ status = "ok";
+ };
+
+ usb2: usb2@60f8800 {
+ status = "ok";
+ };
};
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -568,5 +568,79 @@
"legacy";
status = "disabled";
};
+
+ usb3_ss_phy: ssphy@9a000 {
+ compatible = "qcom,usb-ss-ipq4019-phy";
+ #phy-cells = <0>;
+ reg = <0x9a000 0x800>;
+ reg-names = "phy_base";
+ resets = <&gcc USB3_UNIPHY_PHY_ARES>;
+ reset-names = "por_rst";
+ status = "disabled";
+ };
+
+ usb3_hs_phy: hsphy@a6000 {
+ compatible = "qcom,usb-hs-ipq4019-phy";
+ #phy-cells = <0>;
+ reg = <0xa6000 0x40>;
+ reg-names = "phy_base";
+ resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
+ reset-names = "por_rst", "srif_rst";
+ status = "disabled";
+ };
+
+ usb3@8af8800 {
+ compatible = "qcom,dwc3";
+ reg = <0x8af8800 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&gcc GCC_USB3_MASTER_CLK>,
+ <&gcc GCC_USB3_SLEEP_CLK>,
+ <&gcc GCC_USB3_MOCK_UTMI_CLK>;
+ clock-names = "master", "sleep", "mock_utmi";
+ ranges;
+ status = "disabled";
+
+ dwc3@8a00000 {
+ compatible = "snps,dwc3";
+ reg = <0x8a00000 0xf8000>;
+ interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
+ phy-names = "usb2-phy", "usb3-phy";
+ dr_mode = "host";
+ };
+ };
+
+ usb2_hs_phy: hsphy@a8000 {
+ compatible = "qcom,usb-hs-ipq4019-phy";
+ #phy-cells = <0>;
+ reg = <0xa8000 0x40>;
+ reg-names = "phy_base";
+ resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
+ reset-names = "por_rst", "srif_rst";
+ status = "disabled";
+ };
+
+ usb2@60f8800 {
+ compatible = "qcom,dwc3";
+ reg = <0x60f8800 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&gcc GCC_USB2_MASTER_CLK>,
+ <&gcc GCC_USB2_SLEEP_CLK>,
+ <&gcc GCC_USB2_MOCK_UTMI_CLK>;
+ clock-names = "master", "sleep", "mock_utmi";
+ ranges;
+ status = "disabled";
+
+ dwc3@6000000 {
+ compatible = "snps,dwc3";
+ reg = <0x6000000 0xf8000>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb2_hs_phy>;
+ phy-names = "usb2-phy";
+ dr_mode = "host";
+ };
+ };
};
};

70
target/linux/ipq40xx/patches-4.19/080-ARM-dts-qcom-add-gpio-ranges-property.patch Normal file
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@ -0,0 +1,70 @@
From patchwork Mon May 21 20:57:38 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [v5,3/4] ARM: dts: qcom: add gpio-ranges property
X-Patchwork-Submitter: Christian Lamparter <chunkeey@gmail.com>
X-Patchwork-Id: 917856
Message-Id: <0ae3376606a89bcdf3fe753a5c967f7103699e09.1526935804.git.chunkeey@gmail.com>
To: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>,
Linus Walleij <linus.walleij@linaro.org>,
Stephen Boyd <sboyd@kernel.org>, David Brown <david.brown@linaro.org>,
Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
Andy Gross <andy.gross@linaro.org>,
Sven Eckelmann <sven.eckelmann@openmesh.com>
Date: Mon, 21 May 2018 22:57:38 +0200
From: Christian Lamparter <chunkeey@gmail.com>
List-Id: <linux-gpio.vger.kernel.org>
This patch adds the gpio-ranges property to almost all of
the Qualcomm ARM platforms that utilize the pinctrl-msm
framework.
The gpio-ranges property is part of the gpiolib subsystem.
As a result, the binding text is available in section
"2.1 gpio- and pin-controller interaction" of
Documentation/devicetree/bindings/gpio/gpio.txt
For more information please see the patch titled:
"pinctrl: msm: fix gpio-hog related boot issues" from
this series.
Reported-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Tested-by: Sven Eckelmann <sven.eckelmann@openmesh.com> [ipq4019]
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
To help with git bisect, the DT update patch has been intentionally
placed after the "pinctrl: msm: fix gpio-hog related boot issues".
Otherwise - if the order was reveresed - and bisect decides to split
between these two patches, the gpiochip_add_pin_ranges() function
will be executed twice with the same parameters for the same pinctrl.
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 1 +
arch/arm/boot/dts/qcom-apq8084.dtsi | 1 +
arch/arm/boot/dts/qcom-ipq4019.dtsi | 1 +
arch/arm/boot/dts/qcom-ipq8064.dtsi | 1 +
arch/arm/boot/dts/qcom-mdm9615.dtsi | 1 +
arch/arm/boot/dts/qcom-msm8660.dtsi | 1 +
arch/arm/boot/dts/qcom-msm8960.dtsi | 1 +
arch/arm/boot/dts/qcom-msm8974.dtsi | 1 +
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 3 ++-
arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 +
arch/arm64/boot/dts/qcom/msm8992.dtsi | 1 +
arch/arm64/boot/dts/qcom/msm8994.dtsi | 1 +
arch/arm64/boot/dts/qcom/msm8996.dtsi | 1 +
13 files changed, 14 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -206,6 +206,7 @@
compatible = "qcom,ipq4019-pinctrl";
reg = <0x01000000 0x300000>;
gpio-controller;
+ gpio-ranges = <&tlmm 0 0 100>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

115
target/linux/ipq40xx/patches-4.19/081-clk-fix-apss-cpu-overclocking.patch Normal file
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@ -0,0 +1,115 @@
From f2b87dc1028b710ec8ce25808b9d21f92b376184 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@googlemail.com>
Date: Sun, 11 Mar 2018 14:41:31 +0100
Subject: [PATCH 2/2] clk: fix apss cpu overclocking
There's an interaction issue between the clk changes:"
clk: qcom: ipq4019: Add the apss cpu pll divider clock node
clk: qcom: ipq4019: remove fixed clocks and add pll clocks
" and the cpufreq-dt.
cpufreq-dt is now spamming the kernel-log with the following:
[ 1099.190658] cpu cpu0: dev_pm_opp_set_rate: failed to find current OPP
for freq 761142857 (-34)
This only happens on certain devices like the Compex WPJ428
and AVM FritzBox!4040. However, other devices like the Asus
RT-AC58U and Meraki MR33 work just fine.
The issue stem from the fact that all higher CPU-Clocks
are achieved by switching the clock-parent to the P_DDRPLLAPSS
(ddrpllapss). Which is set by Qualcomm's proprietary bootcode
as part of the DDR calibration.
For example, the FB4040 uses 256 MiB Nanya NT5CC128M16IP clocked
at round 533 MHz (ddrpllsdcc = 190285714 Hz).
whereas the 128 MiB Nanya NT5CC64M16GP-DI in the ASUS RT-AC58U is
clocked at a slightly higher 537 MHz ( ddrpllsdcc = 192000000 Hz).
This patch attempts to fix the issue by modifying
clk_cpu_div_round_rate(), clk_cpu_div_set_rate(), clk_cpu_div_recalc_rate()
to use a new qcom_find_freq_close() function, which returns the closest
matching frequency, instead of the next higher. This way, the SoC in
the FB4040 (with its max clock speed of 710.4 MHz) will no longer
try to overclock to 761 MHz.
Fixes: d83dcacea18 ("clk: qcom: ipq4019: Add the apss cpu pll divider clock node")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/clk/qcom/gcc-ipq4019.c | 34 +++++++++++++++++++++++++++++++---
1 file changed, 31 insertions(+), 3 deletions(-)
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1251,6 +1251,29 @@ static const struct clk_fepll_vco gcc_fe
.reg = 0x2f020,
};
+
+const struct freq_tbl *qcom_find_freq_close(const struct freq_tbl *f,
+ unsigned long rate)
+{
+ const struct freq_tbl *last = NULL;
+
+ for ( ; f->freq; f++) {
+ if (rate == f->freq)
+ return f;
+
+ if (f->freq > rate) {
+ if (!last ||
+ (f->freq - rate) < (rate - last->freq))
+ return f;
+ else
+ return last;
+ }
+ last = f;
+ }
+
+ return last;
+}
+
/*
* Round rate function for APSS CPU PLL Clock divider.
* It looks up the frequency table and returns the next higher frequency
@@ -1263,7 +1286,7 @@ static long clk_cpu_div_round_rate(struc
struct clk_hw *p_hw;
const struct freq_tbl *f;
- f = qcom_find_freq(pll->freq_tbl, rate);
+ f = qcom_find_freq_close(pll->freq_tbl, rate);
if (!f)
return -EINVAL;
@@ -1286,7 +1309,7 @@ static int clk_cpu_div_set_rate(struct c
u32 mask;
int ret;
- f = qcom_find_freq(pll->freq_tbl, rate);
+ f = qcom_find_freq_close(pll->freq_tbl, rate);
if (!f)
return -EINVAL;
@@ -1313,6 +1336,7 @@ static unsigned long
clk_cpu_div_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
+ const struct freq_tbl *f;
struct clk_fepll *pll = to_clk_fepll(hw);
u32 cdiv, pre_div;
u64 rate;
@@ -1333,7 +1357,11 @@ clk_cpu_div_recalc_rate(struct clk_hw *h
rate = clk_fepll_vco_calc_rate(pll, parent_rate) * 2;
do_div(rate, pre_div);
- return rate;
+ f = qcom_find_freq_close(pll->freq_tbl, rate);
+ if (!f)
+ return rate;
+
+ return f->freq;
};
static const struct clk_ops clk_regmap_cpu_div_ops = {

29
target/linux/ipq40xx/patches-4.19/086-ipq40xx-fix-high-resolution-timer.patch Normal file
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@ -0,0 +1,29 @@
From 09f145f417a5d64d6b8d4476699dfb0eccc6c784 Mon Sep 17 00:00:00 2001
From: Abhishek Sahu <absahu@codeaurora.org>
Date: Tue, 7 May 2019 10:14:05 +0300
Subject: [PATCH] ipq40xx: fix high resolution timer
Cherry-picked from CAF QSDK repo.
Original commit message:
The kernel is failing in switching the timer for high resolution
mode and clock source operates in 10ms resolution. The always-on
property needs to be given for timer device tree node to make
clock source working in 1ns resolution.
Change-Id: I7c00b3c74d97c2a30ac9f05e18b511a0550fd459
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -171,6 +171,7 @@
<1 4 0xf08>,
<1 1 0xf08>;
clock-frequency = <48000000>;
+ always-on;
};
soc {

31
target/linux/ipq40xx/patches-4.19/181-crypto-qce-add-CRYPTO_ALG_KERN_DRIVER_ONLY-flag.patch Normal file
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@ -0,0 +1,31 @@
From: Eneas U de Queiroz <cotequeiroz@gmail.com>
Subject: [PATCH] crypto: qce - add CRYPTO_ALG_KERN_DRIVER_ONLY flag
Set the CRYPTO_ALG_KERN_DRIVER_ONLY flag to all algorithms exposed by
the qce driver, since they are all hardware accelerated, accessible
through a kernel driver only, and not available directly to userspace.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
--- a/drivers/crypto/qce/ablkcipher.c
+++ b/drivers/crypto/qce/ablkcipher.c
@@ -370,7 +370,7 @@ static int qce_ablkcipher_register_one(c
alg->cra_priority = 300;
alg->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
- CRYPTO_ALG_NEED_FALLBACK;
+ CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_KERN_DRIVER_ONLY;
alg->cra_ctxsize = sizeof(struct qce_cipher_ctx);
alg->cra_alignmask = 0;
alg->cra_type = &crypto_ablkcipher_type;
--- a/drivers/crypto/qce/sha.c
+++ b/drivers/crypto/qce/sha.c
@@ -503,7 +503,7 @@ static int qce_ahash_register_one(const
base = &alg->halg.base;
base->cra_blocksize = def->blocksize;
base->cra_priority = 300;
- base->cra_flags = CRYPTO_ALG_ASYNC;
+ base->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
base->cra_ctxsize = sizeof(struct qce_sha_ctx);
base->cra_alignmask = 0;
base->cra_module = THIS_MODULE;

62
target/linux/ipq40xx/patches-4.19/303-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch Normal file
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@ -0,0 +1,62 @@
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1094,6 +1094,7 @@ static const struct flash_info spi_nor_i
{ "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { "mx25l25635f", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
@@ -1276,11 +1277,12 @@ static const struct flash_info spi_nor_i
{ },
};
-static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
+static const struct flash_info *spi_nor_read_id(struct spi_nor *nor,
+ const char *name)
{
int tmp;
u8 id[SPI_NOR_MAX_ID_LEN];
- const struct flash_info *info;
+ const struct flash_info *info, *first_match = NULL;
tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
if (tmp < 0) {
@@ -1291,10 +1293,16 @@ static const struct flash_info *spi_nor_
for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) {
info = &spi_nor_ids[tmp];
if (info->id_len) {
- if (!memcmp(info->id, id, info->id_len))
- return &spi_nor_ids[tmp];
+ if (!memcmp(info->id, id, info->id_len)) {
+ if (!name || !strcmp(name, info->name))
+ return info;
+ if (!first_match)
+ first_match = info;
+ }
}
}
+ if (first_match)
+ return first_match;
dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
id[0], id[1], id[2]);
return ERR_PTR(-ENODEV);
@@ -2828,7 +2836,7 @@ int spi_nor_scan(struct spi_nor *nor, co
info = spi_nor_match_id(name);
/* Try to auto-detect if chip name wasn't specified or not found */
if (!info)
- info = spi_nor_read_id(nor);
+ info = spi_nor_read_id(nor, NULL);
if (IS_ERR_OR_NULL(info))
return -ENOENT;
@@ -2839,7 +2847,7 @@ int spi_nor_scan(struct spi_nor *nor, co
if (name && info->id_len) {
const struct flash_info *jinfo;
- jinfo = spi_nor_read_id(nor);
+ jinfo = spi_nor_read_id(nor, name);
if (IS_ERR(jinfo)) {
return PTR_ERR(jinfo);
} else if (jinfo != info) {

288
target/linux/ipq40xx/patches-4.19/700-net-add-qualcomm-mdio.patch Normal file
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@ -0,0 +1,288 @@
From 234d6f40fb4b771b396b45a9492aab463771bd0b Mon Sep 17 00:00:00 2001
From: Kristian Evensen <kristian.evensen@gmail.com>
Date: Tue, 6 Aug 2019 11:42:57 +0200
Subject: [PATCH] phy: Add ipq40xx mdio driver
---
drivers/net/phy/Kconfig | 7 +
drivers/net/phy/Makefile | 1 +
drivers/net/phy/mdio-ipq40xx.c | 247 +++++++++++++++++++++++++++++++++
3 files changed, 255 insertions(+)
create mode 100644 drivers/net/phy/mdio-ipq40xx.c
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -519,6 +519,13 @@ config XILINX_GMII2RGMII
the Reduced Gigabit Media Independent Interface(RGMII) between
Ethernet physical media devices and the Gigabit Ethernet controller.
+config MDIO_IPQ40XX
+ tristate "Qualcomm Atheros ipq40xx MDIO interface"
+ depends on HAS_IOMEM && OF
+ ---help---
+ This driver supports the MDIO interface found in Qualcomm
+ Atheros ipq40xx Soc chip.
+
endif # PHYLIB
config MICREL_KS8995MA
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium
obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o
obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o
+obj-$(CONFIG_MDIO_IPQ40XX) += mdio-ipq40xx.o
obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o
obj-$(CONFIG_MDIO_MSCC_MIIM) += mdio-mscc-miim.o
obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o
--- /dev/null
+++ b/drivers/net/phy/mdio-ipq40xx.c
@@ -0,0 +1,247 @@
+/*
+ * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all copies.
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/io.h>
+#include <linux/of_address.h>
+#include <linux/of_mdio.h>
+#include <linux/of_gpio.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#define MDIO_CTRL_0_REG 0x40
+#define MDIO_CTRL_1_REG 0x44
+#define MDIO_CTRL_2_REG 0x48
+#define MDIO_CTRL_3_REG 0x4c
+#define MDIO_CTRL_4_REG 0x50
+#define MDIO_CTRL_4_ACCESS_BUSY BIT(16)
+#define MDIO_CTRL_4_ACCESS_START BIT(8)
+#define MDIO_CTRL_4_ACCESS_CODE_READ 0
+#define MDIO_CTRL_4_ACCESS_CODE_WRITE 1
+#define CTRL_0_REG_DEFAULT_VALUE 0x150FF
+
+#define IPQ40XX_MDIO_RETRY 1000
+#define IPQ40XX_MDIO_DELAY 10
+
+struct ipq40xx_mdio_data {
+ struct mii_bus *mii_bus;
+ void __iomem *membase;
+ struct device *dev;
+};
+
+static int ipq40xx_mdio_wait_busy(struct ipq40xx_mdio_data *am)
+{
+ int i;
+
+ for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) {
+ unsigned int busy;
+
+ busy = readl(am->membase + MDIO_CTRL_4_REG) &
+ MDIO_CTRL_4_ACCESS_BUSY;
+ if (!busy)
+ return 0;
+
+ /* BUSY might take to be cleard by 15~20 times of loop */
+ udelay(IPQ40XX_MDIO_DELAY);
+ }
+
+ dev_err(am->dev, "%s: MDIO operation timed out\n", am->mii_bus->name);
+
+ return -ETIMEDOUT;
+}
+
+static int ipq40xx_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
+{
+ struct ipq40xx_mdio_data *am = bus->priv;
+ int value = 0;
+ unsigned int cmd = 0;
+
+ lockdep_assert_held(&bus->mdio_lock);
+
+ if (ipq40xx_mdio_wait_busy(am))
+ return -ETIMEDOUT;
+
+ /* issue the phy address and reg */
+ writel((mii_id << 8) | regnum, am->membase + MDIO_CTRL_1_REG);
+
+ cmd = MDIO_CTRL_4_ACCESS_START|MDIO_CTRL_4_ACCESS_CODE_READ;
+
+ /* issue read command */
+ writel(cmd, am->membase + MDIO_CTRL_4_REG);
+
+ /* Wait read complete */
+ if (ipq40xx_mdio_wait_busy(am))
+ return -ETIMEDOUT;
+
+ /* Read data */
+ value = readl(am->membase + MDIO_CTRL_3_REG);
+
+ return value;
+}
+
+static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
+ u16 value)
+{
+ struct ipq40xx_mdio_data *am = bus->priv;
+ unsigned int cmd = 0;
+
+ lockdep_assert_held(&bus->mdio_lock);
+
+ if (ipq40xx_mdio_wait_busy(am))
+ return -ETIMEDOUT;
+
+ /* issue the phy address and reg */
+ writel((mii_id << 8) | regnum, am->membase + MDIO_CTRL_1_REG);
+
+ /* issue write data */
+ writel(value, am->membase + MDIO_CTRL_2_REG);
+
+ cmd = MDIO_CTRL_4_ACCESS_START|MDIO_CTRL_4_ACCESS_CODE_WRITE;
+ /* issue write command */
+ writel(cmd, am->membase + MDIO_CTRL_4_REG);
+
+ /* Wait write complete */
+ if (ipq40xx_mdio_wait_busy(am))
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static int ipq40xx_phy_reset(struct platform_device *pdev)
+{
+ struct device_node *mdio_node;
+ int phy_reset_gpio_number;
+ int ret;
+
+ mdio_node = of_find_node_by_name(NULL, "mdio");
+ if (!mdio_node) {
+ dev_err(&pdev->dev, "Could not find mdio node\n");
+ return 0;
+ }
+
+ ret = of_get_named_gpio(mdio_node, "phy-reset-gpio", 0);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "Could not find phy-reset-gpio\n");
+ return 0;
+ }
+
+ phy_reset_gpio_number = ret;
+
+ ret = gpio_request(phy_reset_gpio_number, "phy-reset-gpio");
+ if (ret) {
+ dev_err(&pdev->dev, "Can't get phy-reset-gpio %d\n", ret);
+ return ret;
+ }
+
+ ret = gpio_direction_output(phy_reset_gpio_number, 0x0);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "Can't set direction for phy-reset-gpio %d\n", ret);
+ goto phy_reset_out;
+ }
+
+ usleep_range(1000, 10005);
+
+ gpio_set_value(phy_reset_gpio_number, 0x01);
+
+phy_reset_out:
+ gpio_free(phy_reset_gpio_number);
+
+ return ret;
+}
+
+static int ipq40xx_mdio_probe(struct platform_device *pdev)
+{
+ struct ipq40xx_mdio_data *am;
+ struct resource *res;
+ int i, ret;
+
+ ret = ipq40xx_phy_reset(pdev);
+ if (ret) {
+ dev_err(&pdev->dev, "Could not find qca8075 reset gpio\n");
+ return -ENODEV;
+ }
+
+ am = devm_kzalloc(&pdev->dev, sizeof(*am), GFP_KERNEL);
+ if (!am)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "no iomem resource found\n");
+ return -ENXIO;
+ }
+
+ am->membase = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(am->membase)) {
+ dev_err(&pdev->dev, "unable to ioremap registers\n");
+ return PTR_ERR(am->membase);
+ }
+
+ am->mii_bus = devm_mdiobus_alloc(&pdev->dev);
+ if (!am->mii_bus)
+ return -ENOMEM;
+
+ writel(CTRL_0_REG_DEFAULT_VALUE, am->membase + MDIO_CTRL_0_REG);
+
+ am->mii_bus->name = "ipq40xx_mdio";
+ am->mii_bus->read = ipq40xx_mdio_read;
+ am->mii_bus->write = ipq40xx_mdio_write;
+ am->mii_bus->priv = am;
+ am->mii_bus->parent = &pdev->dev;
+ snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev));
+
+ am->dev = &pdev->dev;
+ platform_set_drvdata(pdev, am);
+
+ return of_mdiobus_register(am->mii_bus, pdev->dev.of_node);
+}
+
+static int ipq40xx_mdio_remove(struct platform_device *pdev)
+{
+ struct ipq40xx_mdio_data *am = platform_get_drvdata(pdev);
+
+ mdiobus_unregister(am->mii_bus);
+
+ return 0;
+}
+
+static const struct of_device_id ipq40xx_mdio_dt_ids[] = {
+ { .compatible = "qcom,ipq4019-mdio" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ipq40xx_mdio_dt_ids);
+
+static struct platform_driver ipq40xx_mdio_driver = {
+ .probe = ipq40xx_mdio_probe,
+ .remove = ipq40xx_mdio_remove,
+ .driver = {
+ .name = "ipq40xx-mdio",
+ .of_match_table = ipq40xx_mdio_dt_ids,
+ },
+};
+
+module_platform_driver(ipq40xx_mdio_driver);
+
+#define DRV_VERSION "1.0"
+
+MODULE_DESCRIPTION("IPQ40XX MDIO interface driver");
+MODULE_AUTHOR("Qualcomm Atheros");
+MODULE_VERSION(DRV_VERSION);
+MODULE_LICENSE("Dual BSD/GPL");

52
target/linux/ipq40xx/patches-4.19/701-dts-ipq4019-add-mdio-node.patch Normal file
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@ -0,0 +1,52 @@
From 09ed737593f71bcca08a537a6c15264a1a6add08 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sun, 20 Nov 2016 01:10:33 +0100
Subject: [PATCH] dts: ipq4019: add mdio node for ethernet
This patch adds the mdio device-tree node.
This is where the switch is connected to, so it's needed
for the ethernet interfaces.
Note: The driver isn't anywhere close to be upstream,
so the info might change.
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -571,6 +571,34 @@
status = "disabled";
};
+ mdio: mdio@90000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "qcom,ipq4019-mdio";
+ reg = <0x90000 0x64>;
+ status = "disabled";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ ethphy2: ethernet-phy@2 {
+ reg = <2>;
+ };
+
+ ethphy3: ethernet-phy@3 {
+ reg = <3>;
+ };
+
+ ethphy4: ethernet-phy@4 {
+ reg = <4>;
+ };
+ };
+
usb3_ss_phy: ssphy@9a000 {
compatible = "qcom,usb-ss-ipq4019-phy";
#phy-cells = <0>;

46
target/linux/ipq40xx/patches-4.19/702-dts-ipq4019-add-PHY-switch-nodes.patch Normal file
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@ -0,0 +1,46 @@
From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sun, 20 Nov 2016 02:20:54 +0100
Subject: [PATCH] dts: ipq4019: add PHY/switch nodes
This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii"
nodes which are needed for the ar40xx.c driver to initialize the
switch.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -599,6 +599,29 @@
};
};
+ ess-switch@c000000 {
+ compatible = "qcom,ess-switch";
+ reg = <0xc000000 0x80000>;
+ switch_access_mode = "local bus";
+ resets = <&gcc ESS_RESET>;
+ reset-names = "ess_rst";
+ clocks = <&gcc GCC_ESS_CLK>;
+ clock-names = "ess_clk";
+ switch_cpu_bmp = <0x1>;
+ switch_lan_bmp = <0x1e>;
+ switch_wan_bmp = <0x20>;
+ switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */
+ switch_initvlas = <0x7c 0x54>;
+ status = "disabled";
+ };
+
+ ess-psgmii@98000 {
+ compatible = "qcom,ess-psgmii";
+ reg = <0x98000 0x800>;
+ psgmii_access_mode = "local bus";
+ status = "disabled";
+ };
+
usb3_ss_phy: ssphy@9a000 {
compatible = "qcom,usb-ss-ipq4019-phy";
#phy-cells = <0>;

53
target/linux/ipq40xx/patches-4.19/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch Normal file
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@ -0,0 +1,53 @@
From 7c129254adb1093d10a62ed7bf7b956fcc6ffe34 Mon Sep 17 00:00:00 2001
From: Rakesh Nair <ranair@codeaurora.org>
Date: Wed, 20 Jul 2016 15:02:01 +0530
Subject: [PATCH] net: IPQ4019 needs rfs/vlan_tag callbacks in
netdev_ops
Add callback support to get default vlan tag and register
receive flow steering filter.
Used by IPQ4019 ess-edma driver.
BUG=chrome-os-partner:33096
TEST=none
Change-Id: I266070e4a0fbe4a0d9966fe79a71e50ec4f26c75
Signed-off-by: Rakesh Nair <ranair@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/362203
Commit-Ready: Grant Grundler <grundler@chromium.org>
Tested-by: Grant Grundler <grundler@chromium.org>
Reviewed-by: Grant Grundler <grundler@chromium.org>
---
include/linux/netdevice.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -739,6 +739,16 @@ struct xps_map {
#define XPS_MIN_MAP_ALLOC ((L1_CACHE_ALIGN(offsetof(struct xps_map, queues[1])) \
- sizeof(struct xps_map)) / sizeof(u16))
+#ifdef CONFIG_RFS_ACCEL
+typedef int (*set_rfs_filter_callback_t)(struct net_device *dev,
+ __be32 src,
+ __be32 dst,
+ __be16 sport,
+ __be16 dport,
+ u8 proto,
+ u16 rxq_index,
+ u32 action);
+#endif
/*
* This structure holds all XPS maps for device. Maps are indexed by CPU.
*/
@@ -1353,6 +1363,9 @@ struct net_device_ops {
const struct sk_buff *skb,
u16 rxq_index,
u32 flow_id);
+ int (*ndo_register_rfs_filter)(struct net_device *dev,
+ set_rfs_filter_callback_t set_filter);
+ int (*ndo_get_default_vlan_tag)(struct net_device *net);
#endif
int (*ndo_add_slave)(struct net_device *dev,
struct net_device *slave_dev,

2459
target/linux/ipq40xx/patches-4.19/705-net-add-qualcomm-ar40xx-phy.patch Normal file
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File diff suppressed because it is too large Load Diff

23
target/linux/ipq40xx/patches-4.19/706-ar40xx-abort-probe-on-missig-phy.patch Normal file
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@ -0,0 +1,23 @@
--- a/drivers/net/phy/ar40xx.c
+++ b/drivers/net/phy/ar40xx.c
@@ -2021,6 +2021,12 @@ static int ar40xx_probe(struct platform_
/* register switch */
swdev = &priv->dev;
+ if (priv->mii_bus == NULL) {
+ dev_err(&pdev->dev, "Probe failed - Missing PHYs!\n");
+ ret = -ENODEV;
+ goto err_missing_phy;
+ }
+
swdev->alias = dev_name(&priv->mii_bus->dev);
swdev->cpu_port = AR40XX_PORT_CPU;
@@ -2052,6 +2058,7 @@ err_unregister_switch:
unregister_switch(&priv->dev);
err_unregister_phy:
phy_driver_unregister(&ar40xx_phy_driver);
+err_missing_phy:
platform_set_drvdata(pdev, NULL);
return ret;
}

4575
target/linux/ipq40xx/patches-4.19/710-net-add-qualcomm-essedma-ethernet-driver.patch Normal file
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File diff suppressed because it is too large Load Diff

92
target/linux/ipq40xx/patches-4.19/711-dts-ipq4019-add-ethernet-essedma-node.patch Normal file
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@ -0,0 +1,92 @@
From c611d3780fa101662a822d10acf8feb04ca97409 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sun, 20 Nov 2016 01:01:10 +0100
Subject: [PATCH] dts: ipq4019: add ethernet essedma node
This patch adds the device-tree node for the ethernet
interfaces.
Note: The driver isn't anywhere close to be upstream,
so the info might change.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 60 +++++++++++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -44,6 +44,8 @@
spi1 = &blsp1_spi2;
i2c0 = &blsp1_i2c3;
i2c1 = &blsp1_i2c4;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
};
cpus {
@@ -622,6 +624,64 @@
status = "disabled";
};
+ edma@c080000 {
+ compatible = "qcom,ess-edma";
+ reg = <0xc080000 0x8000>;
+ qcom,page-mode = <0>;
+ qcom,rx_head_buf_size = <1540>;
+ qcom,mdio_supported;
+ qcom,poll_required = <1>;
+ qcom,num_gmac = <2>;
+ interrupts = <0 65 IRQ_TYPE_EDGE_RISING
+ 0 66 IRQ_TYPE_EDGE_RISING
+ 0 67 IRQ_TYPE_EDGE_RISING
+ 0 68 IRQ_TYPE_EDGE_RISING
+ 0 69 IRQ_TYPE_EDGE_RISING
+ 0 70 IRQ_TYPE_EDGE_RISING
+ 0 71 IRQ_TYPE_EDGE_RISING
+ 0 72 IRQ_TYPE_EDGE_RISING
+ 0 73 IRQ_TYPE_EDGE_RISING
+ 0 74 IRQ_TYPE_EDGE_RISING
+ 0 75 IRQ_TYPE_EDGE_RISING
+ 0 76 IRQ_TYPE_EDGE_RISING
+ 0 77 IRQ_TYPE_EDGE_RISING
+ 0 78 IRQ_TYPE_EDGE_RISING
+ 0 79 IRQ_TYPE_EDGE_RISING
+ 0 80 IRQ_TYPE_EDGE_RISING
+ 0 240 IRQ_TYPE_EDGE_RISING
+ 0 241 IRQ_TYPE_EDGE_RISING
+ 0 242 IRQ_TYPE_EDGE_RISING
+ 0 243 IRQ_TYPE_EDGE_RISING
+ 0 244 IRQ_TYPE_EDGE_RISING
+ 0 245 IRQ_TYPE_EDGE_RISING
+ 0 246 IRQ_TYPE_EDGE_RISING
+ 0 247 IRQ_TYPE_EDGE_RISING
+ 0 248 IRQ_TYPE_EDGE_RISING
+ 0 249 IRQ_TYPE_EDGE_RISING
+ 0 250 IRQ_TYPE_EDGE_RISING
+ 0 251 IRQ_TYPE_EDGE_RISING
+ 0 252 IRQ_TYPE_EDGE_RISING
+ 0 253 IRQ_TYPE_EDGE_RISING
+ 0 254 IRQ_TYPE_EDGE_RISING
+ 0 255 IRQ_TYPE_EDGE_RISING>;
+
+ status = "disabled";
+
+ gmac0: gmac0 {
+ local-mac-address = [00 00 00 00 00 00];
+ vlan_tag = <1 0x1f>;
+ };
+
+ gmac1: gmac1 {
+ local-mac-address = [00 00 00 00 00 00];
+ qcom,phy_mdio_addr = <4>;
+ qcom,poll_required = <1>;
+ qcom,forced_speed = <1000>;
+ qcom,forced_duplex = <1>;
+ vlan_tag = <2 0x20>;
+ };
+ };
+
usb3_ss_phy: ssphy@9a000 {
compatible = "qcom,usb-ss-ipq4019-phy";
#phy-cells = <0>;

334
target/linux/ipq40xx/patches-4.19/712-mr33-essedma.patch Normal file
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@ -0,0 +1,334 @@
--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
@@ -161,8 +161,10 @@ static void edma_configure_rx(struct edm
/* Set Rx FIFO threshold to start to DMA data to host */
rxq_ctrl_data = EDMA_FIFO_THRESH_128_BYTE;
+ if (!edma_cinfo->is_single_phy) {
/* Set RX remove vlan bit */
rxq_ctrl_data |= EDMA_RXQ_CTRL_RMV_VLAN;
+ }
edma_write_reg(EDMA_REG_RXQ_CTRL, rxq_ctrl_data);
}
@@ -1293,6 +1295,10 @@ void edma_adjust_link(struct net_device
if (status == __EDMA_LINKUP && adapter->link_state == __EDMA_LINKDOWN) {
dev_info(&adapter->pdev->dev, "%s: GMAC Link is up with phy_speed=%d\n", netdev->name, phydev->speed);
adapter->link_state = __EDMA_LINKUP;
+ if (adapter->edma_cinfo->is_single_phy) {
+ ess_set_port_status_speed(adapter->edma_cinfo, phydev,
+ ffs(adapter->dp_bitmap) - 1);
+ }
netif_carrier_on(netdev);
if (netif_running(netdev))
netif_tx_wake_all_queues(netdev);
@@ -1386,10 +1392,12 @@ netdev_tx_t edma_xmit(struct sk_buff *sk
}
/* Check and mark VLAN tag offload */
- if (skb_vlan_tag_present(skb))
- flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_FLAG;
- else if (adapter->default_vlan_tag)
- flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG;
+ if (!adapter->edma_cinfo->is_single_phy) {
+ if (unlikely(skb_vlan_tag_present(skb)))
+ flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_FLAG;
+ else if (adapter->default_vlan_tag)
+ flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG;
+ }
/* Check and mark checksum offload */
if (likely(skb->ip_summed == CHECKSUM_PARTIAL))
--- a/drivers/net/ethernet/qualcomm/essedma/edma.h
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.h
@@ -31,6 +31,7 @@
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/clk.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/sysctl.h>
@@ -332,6 +333,9 @@ struct edma_common_info {
struct edma_per_cpu_queues_info edma_percpu_info[CONFIG_NR_CPUS]; /* per cpu information */
spinlock_t stats_lock; /* protect edma stats area for updation */
struct timer_list edma_stats_timer;
+ bool is_single_phy;
+ void __iomem *ess_hw_addr;
+ struct clk *ess_clk;
};
/* transimit packet descriptor (tpd) ring */
@@ -444,4 +448,6 @@ void edma_change_tx_coalesce(int usecs);
void edma_change_rx_coalesce(int usecs);
void edma_get_tx_rx_coalesce(u32 *reg_val);
void edma_clear_irq_status(void);
+void ess_set_port_status_speed(struct edma_common_info *edma_cinfo,
+ struct phy_device *phydev, uint8_t port_id);
#endif /* _EDMA_H_ */
--- a/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
@@ -17,6 +17,11 @@
#include <linux/of.h>
#include <linux/of_net.h>
#include <linux/timer.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/clk.h>
+#include <linux/string.h>
+#include <linux/reset.h>
#include "edma.h"
#include "ess_edma.h"
@@ -81,6 +86,101 @@ void edma_read_reg(u16 reg_addr, volatil
*reg_value = readl((void __iomem *)(edma_hw_addr + reg_addr));
}
+static void ess_write_reg(struct edma_common_info *edma, u16 reg_addr, u32 reg_value)
+{
+ writel(reg_value, ((void __iomem *)
+ ((unsigned long)edma->ess_hw_addr + reg_addr)));
+}
+
+static void ess_read_reg(struct edma_common_info *edma, u16 reg_addr,
+ volatile u32 *reg_value)
+{
+ *reg_value = readl((void __iomem *)
+ ((unsigned long)edma->ess_hw_addr + reg_addr));
+}
+
+static int ess_reset(struct edma_common_info *edma)
+{
+ struct device_node *switch_node = NULL;
+ struct reset_control *ess_rst;
+ u32 regval;
+
+ switch_node = of_find_node_by_name(NULL, "ess-switch");
+ if (!switch_node) {
+ pr_err("switch-node not found\n");
+ return -EINVAL;
+ }
+
+ ess_rst = of_reset_control_get(switch_node, "ess_rst");
+ of_node_put(switch_node);
+
+ if (IS_ERR(ess_rst)) {
+ pr_err("failed to find ess_rst!\n");
+ return -ENOENT;
+ }
+
+ reset_control_assert(ess_rst);
+ msleep(10);
+ reset_control_deassert(ess_rst);
+ msleep(100);
+ reset_control_put(ess_rst);
+
+ /* Enable only port 5 <--> port 0
+ * bits 0:6 bitmap of ports it can fwd to */
+#define SET_PORT_BMP(r,v) \
+ ess_read_reg(edma, r, &regval); \
+ ess_write_reg(edma, r, ((regval & ~0x3F) | v));
+
+ SET_PORT_BMP(ESS_PORT0_LOOKUP_CTRL,0x20);
+ SET_PORT_BMP(ESS_PORT1_LOOKUP_CTRL,0x00);
+ SET_PORT_BMP(ESS_PORT2_LOOKUP_CTRL,0x00);
+ SET_PORT_BMP(ESS_PORT3_LOOKUP_CTRL,0x00);
+ SET_PORT_BMP(ESS_PORT4_LOOKUP_CTRL,0x00);
+ SET_PORT_BMP(ESS_PORT5_LOOKUP_CTRL,0x01);
+ ess_write_reg(edma, ESS_RGMII_CTRL, 0x400);
+ ess_write_reg(edma, ESS_PORT0_STATUS, ESS_PORT_1G_FDX);
+ ess_write_reg(edma, ESS_PORT5_STATUS, ESS_PORT_1G_FDX);
+ ess_write_reg(edma, ESS_PORT0_HEADER_CTRL, 0);
+#undef SET_PORT_BMP
+
+ /* forward multicast and broadcast frames to CPU */
+ ess_write_reg(edma, ESS_FWD_CTRL1,
+ (ESS_PORTS_ALL << ESS_FWD_CTRL1_UC_FLOOD_S) |
+ (ESS_PORTS_ALL << ESS_FWD_CTRL1_MC_FLOOD_S) |
+ (ESS_PORTS_ALL << ESS_FWD_CTRL1_BC_FLOOD_S));
+
+ return 0;
+}
+
+void ess_set_port_status_speed(struct edma_common_info *edma,
+ struct phy_device *phydev, uint8_t port_id)
+{
+ uint16_t reg_off = ESS_PORT0_STATUS + (4 * port_id);
+ uint32_t reg_val = 0;
+
+ ess_read_reg(edma, reg_off, &reg_val);
+
+ /* reset the speed bits [0:1] */
+ reg_val &= ~ESS_PORT_STATUS_SPEED_INV;
+
+ /* set the new speed */
+ switch(phydev->speed) {
+ case SPEED_1000: reg_val |= ESS_PORT_STATUS_SPEED_1000; break;
+ case SPEED_100: reg_val |= ESS_PORT_STATUS_SPEED_100; break;
+ case SPEED_10: reg_val |= ESS_PORT_STATUS_SPEED_10; break;
+ default: reg_val |= ESS_PORT_STATUS_SPEED_INV; break;
+ }
+
+ /* check full/half duplex */
+ if (phydev->duplex) {
+ reg_val |= ESS_PORT_STATUS_DUPLEX_MODE;
+ } else {
+ reg_val &= ~ESS_PORT_STATUS_DUPLEX_MODE;
+ }
+
+ ess_write_reg(edma, reg_off, reg_val);
+}
+
/* edma_change_tx_coalesce()
* change tx interrupt moderation timer
*/
@@ -550,6 +650,31 @@ static struct ctl_table edma_table[] = {
{}
};
+static int ess_parse(struct edma_common_info *edma)
+{
+ struct device_node *switch_node;
+ int ret = -EINVAL;
+
+ switch_node = of_find_node_by_name(NULL, "ess-switch");
+ if (!switch_node) {
+ pr_err("cannot find ess-switch node\n");
+ goto out;
+ }
+
+ edma->ess_hw_addr = of_io_request_and_map(switch_node,
+ 0, KBUILD_MODNAME);
+ if (!edma->ess_hw_addr) {
+ pr_err("%s ioremap fail.", __func__);
+ goto out;
+ }
+
+ edma->ess_clk = of_clk_get_by_name(switch_node, "ess_clk");
+ ret = clk_prepare_enable(edma->ess_clk);
+out:
+ of_node_put(switch_node);
+ return ret;
+}
+
/* edma_axi_netdev_ops
* Describe the operations supported by registered netdevices
*
@@ -785,6 +910,17 @@ static int edma_axi_probe(struct platfor
miibus = mdio_data->mii_bus;
}
+ if (of_property_read_bool(np, "qcom,single-phy") &&
+ edma_cinfo->num_gmac == 1) {
+ err = ess_parse(edma_cinfo);
+ if (!err)
+ err = ess_reset(edma_cinfo);
+ if (err)
+ goto err_single_phy_init;
+ else
+ edma_cinfo->is_single_phy = true;
+ }
+
for_each_available_child_of_node(np, pnp) {
const char *mac_addr;
@@ -1073,11 +1209,15 @@ static int edma_axi_probe(struct platfor
for (i = 0; i < edma_cinfo->num_gmac; i++) {
if (adapter[i]->poll_required) {
+ int phy_mode = of_get_phy_mode(np);
+
+ if (phy_mode < 0)
+ phy_mode = PHY_INTERFACE_MODE_SGMII;
adapter[i]->phydev =
phy_connect(edma_netdev[i],
(const char *)adapter[i]->phy_id,
&edma_adjust_link,
- PHY_INTERFACE_MODE_SGMII);
+ phy_mode);
if (IS_ERR(adapter[i]->phydev)) {
dev_dbg(&pdev->dev, "PHY attach FAIL");
err = -EIO;
@@ -1121,6 +1261,9 @@ err_rmap_alloc_fail:
for (i = 0; i < edma_cinfo->num_gmac; i++)
unregister_netdev(edma_netdev[i]);
err_register:
+err_single_phy_init:
+ iounmap(edma_cinfo->ess_hw_addr);
+ clk_disable_unprepare(edma_cinfo->ess_clk);
err_mdiobus_init_fail:
edma_free_rx_rings(edma_cinfo);
err_rx_rinit:
@@ -1181,6 +1324,8 @@ static int edma_axi_remove(struct platfo
del_timer_sync(&edma_cinfo->edma_stats_timer);
edma_free_irqs(adapter);
unregister_net_sysctl_table(edma_cinfo->edma_ctl_table_hdr);
+ iounmap(edma_cinfo->ess_hw_addr);
+ clk_disable_unprepare(edma_cinfo->ess_clk);
edma_free_tx_resources(edma_cinfo);
edma_free_rx_resources(edma_cinfo);
edma_free_tx_rings(edma_cinfo);
--- a/drivers/net/ethernet/qualcomm/essedma/ess_edma.h
+++ b/drivers/net/ethernet/qualcomm/essedma/ess_edma.h
@@ -329,4 +329,61 @@ struct edma_hw;
#define EDMA_RRD_PRIORITY_MASK 0x7
#define EDMA_RRD_PORT_TYPE_SHIFT 7
#define EDMA_RRD_PORT_TYPE_MASK 0x1F
+
+#define ESS_RGMII_CTRL 0x0004
+
+/* Port status registers */
+#define ESS_PORT0_STATUS 0x007C
+#define ESS_PORT1_STATUS 0x0080
+#define ESS_PORT2_STATUS 0x0084
+#define ESS_PORT3_STATUS 0x0088
+#define ESS_PORT4_STATUS 0x008C
+#define ESS_PORT5_STATUS 0x0090
+
+#define ESS_PORT_STATUS_HDX_FLOW_CTL 0x80
+#define ESS_PORT_STATUS_DUPLEX_MODE 0x40
+#define ESS_PORT_STATUS_RX_FLOW_EN 0x20
+#define ESS_PORT_STATUS_TX_FLOW_EN 0x10
+#define ESS_PORT_STATUS_RX_MAC_EN 0x08
+#define ESS_PORT_STATUS_TX_MAC_EN 0x04
+#define ESS_PORT_STATUS_SPEED_INV 0x03
+#define ESS_PORT_STATUS_SPEED_1000 0x02
+#define ESS_PORT_STATUS_SPEED_100 0x01
+#define ESS_PORT_STATUS_SPEED_10 0x00
+
+#define ESS_PORT_1G_FDX (ESS_PORT_STATUS_DUPLEX_MODE | ESS_PORT_STATUS_RX_FLOW_EN | \
+ ESS_PORT_STATUS_TX_FLOW_EN | ESS_PORT_STATUS_RX_MAC_EN | \
+ ESS_PORT_STATUS_TX_MAC_EN | ESS_PORT_STATUS_SPEED_1000)
+
+#define PHY_STATUS_REG 0x11
+#define PHY_STATUS_SPEED 0xC000
+#define PHY_STATUS_SPEED_SHIFT 14
+#define PHY_STATUS_DUPLEX 0x2000
+#define PHY_STATUS_DUPLEX_SHIFT 13
+#define PHY_STATUS_SPEED_DUPLEX_RESOLVED 0x0800
+#define PHY_STATUS_CARRIER 0x0400
+#define PHY_STATUS_CARRIER_SHIFT 10
+
+/* Port lookup control registers */
+#define ESS_PORT0_LOOKUP_CTRL 0x0660
+#define ESS_PORT1_LOOKUP_CTRL 0x066C
+#define ESS_PORT2_LOOKUP_CTRL 0x0678
+#define ESS_PORT3_LOOKUP_CTRL 0x0684
+#define ESS_PORT4_LOOKUP_CTRL 0x0690
+#define ESS_PORT5_LOOKUP_CTRL 0x069C
+
+#define ESS_PORT0_HEADER_CTRL 0x009C
+
+#define ESS_PORTS_ALL 0x3f
+
+#define ESS_FWD_CTRL1 0x0624
+#define ESS_FWD_CTRL1_UC_FLOOD BITS(0, 7)
+#define ESS_FWD_CTRL1_UC_FLOOD_S 0
+#define ESS_FWD_CTRL1_MC_FLOOD BITS(8, 7)
+#define ESS_FWD_CTRL1_MC_FLOOD_S 8
+#define ESS_FWD_CTRL1_BC_FLOOD BITS(16, 7)
+#define ESS_FWD_CTRL1_BC_FLOOD_S 16
+#define ESS_FWD_CTRL1_IGMP BITS(24, 7)
+#define ESS_FWD_CTRL1_IGMP_S 24
+
#endif /* _ESS_EDMA_H_ */

21
target/linux/ipq40xx/patches-4.19/713-essedma-alloc-skb-ip-align.patch Normal file
View File

@ -0,0 +1,21 @@
From 17681f0bb474d0d227f07369144149d1555d8bce Mon Sep 17 00:00:00 2001
From: Chen Minqiang <ptpt52@gmail.com>
Date: Sun, 17 Jun 2018 04:14:13 +0800
Subject: [PATCH] essedma: alloc skb ip align
Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
---
drivers/net/ethernet/qualcomm/essedma/edma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
@@ -201,7 +201,7 @@ static int edma_alloc_rx_buf(struct edma
skb = sw_desc->skb;
} else {
/* alloc skb */
- skb = netdev_alloc_skb(edma_netdev[0], length);
+ skb = netdev_alloc_skb_ip_align(edma_netdev[0], length);
if (!skb) {
/* Better luck next round */
break;

197
target/linux/ipq40xx/patches-4.19/714-essedma-add-fix-for-memory-allocation.patch Normal file
View File

@ -0,0 +1,197 @@
From 72c050acbc425ef99313d5c2e4c866e25567e569 Mon Sep 17 00:00:00 2001
From: Rakesh Nair <ranair@codeaurora.org>
Date: Thu, 8 Jun 2017 14:29:20 +0530
Subject: [PATCH] CHROMIUM: net: qualcomm: Add fix for memory allocation issues
Added ethtool counters for memory allocation failures accounting.
Added support to track number of allocation failures that could
not be fulfilled in the current iteration in the rx descriptor
field and use the info to allocate in the subsequent iteration.
Change-Id: Ie4fd3b6cf25304e5db2c9247a498791e7e9bb4aa
Signed-off-by: Rakesh Nair <ranair@codeaurora.org>
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/535419
Reviewed-by: Grant Grundler <grundler@chromium.org>
---
drivers/net/ethernet/qualcomm/essedma/edma.c | 54 ++++++++++++++-----
drivers/net/ethernet/qualcomm/essedma/edma.h | 2 +
.../ethernet/qualcomm/essedma/edma_ethtool.c | 1 +
3 files changed, 43 insertions(+), 14 deletions(-)
--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
@@ -103,6 +103,9 @@ static int edma_alloc_rx_ring(struct edm
return -ENOMEM;
}
+ /* Initialize pending_fill */
+ erxd->pending_fill = 0;
+
return 0;
}
@@ -185,11 +188,8 @@ static int edma_alloc_rx_buf(struct edma
u16 prod_idx, length;
u32 reg_data;
- if (cleaned_count > erdr->count) {
- dev_err(&pdev->dev, "Incorrect cleaned_count %d",
- cleaned_count);
- return -1;
- }
+ if (cleaned_count > erdr->count)
+ cleaned_count = erdr->count - 1;
i = erdr->sw_next_to_fill;
@@ -199,6 +199,9 @@ static int edma_alloc_rx_buf(struct edma
if (sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_REUSE) {
skb = sw_desc->skb;
+
+ /* Clear REUSE Flag */
+ sw_desc->flags &= ~EDMA_SW_DESC_FLAG_SKB_REUSE;
} else {
/* alloc skb */
skb = netdev_alloc_skb_ip_align(edma_netdev[0], length);
@@ -264,6 +267,13 @@ static int edma_alloc_rx_buf(struct edma
reg_data &= ~EDMA_RFD_PROD_IDX_BITS;
reg_data |= prod_idx;
edma_write_reg(EDMA_REG_RFD_IDX_Q(queue_id), reg_data);
+
+ /* If we couldn't allocate all the buffers
+ * we increment the alloc failure counters
+ */
+ if (cleaned_count)
+ edma_cinfo->edma_ethstats.rx_alloc_fail_ctr++;
+
return cleaned_count;
}
@@ -534,7 +544,7 @@ static int edma_rx_complete_paged(struct
* edma_rx_complete()
* Main api called from the poll function to process rx packets.
*/
-static void edma_rx_complete(struct edma_common_info *edma_cinfo,
+static u16 edma_rx_complete(struct edma_common_info *edma_cinfo,
int *work_done, int work_to_do, int queue_id,
struct napi_struct *napi)
{
@@ -554,6 +564,7 @@ static void edma_rx_complete(struct edma
u16 count = erdr->count, rfd_avail;
u8 queue_to_rxid[8] = {0, 0, 1, 1, 2, 2, 3, 3};
+ cleaned_count = erdr->pending_fill;
sw_next_to_clean = erdr->sw_next_to_clean;
edma_read_reg(EDMA_REG_RFD_IDX_Q(queue_id), &data);
@@ -652,12 +663,13 @@ static void edma_rx_complete(struct edma
(*work_done)++;
drop_count = 0;
}
- if (cleaned_count == EDMA_RX_BUFFER_WRITE) {
+ if (cleaned_count >= EDMA_RX_BUFFER_WRITE) {
/* If buffer clean count reaches 16, we replenish HW buffers. */
ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
sw_next_to_clean);
cleaned_count = ret_count;
+ erdr->pending_fill = ret_count;
}
continue;
}
@@ -730,11 +742,12 @@ static void edma_rx_complete(struct edma
adapter->stats.rx_bytes += length;
/* Check if we reached refill threshold */
- if (cleaned_count == EDMA_RX_BUFFER_WRITE) {
+ if (cleaned_count >= EDMA_RX_BUFFER_WRITE) {
ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
sw_next_to_clean);
cleaned_count = ret_count;
+ erdr->pending_fill = ret_count;
}
/* At this point skb should go to stack */
@@ -756,11 +769,17 @@ static void edma_rx_complete(struct edma
/* Refill here in case refill threshold wasn't reached */
if (likely(cleaned_count)) {
ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
- if (ret_count)
- dev_dbg(&pdev->dev, "Not all buffers was reallocated");
+ erdr->pending_fill = ret_count;
+ if (ret_count) {
+ if (net_ratelimit())
+ dev_dbg(&pdev->dev, "Not all buffers was reallocated");
+ }
+
edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
erdr->sw_next_to_clean);
}
+
+ return erdr->pending_fill;
}
/* edma_delete_rfs_filter()
@@ -2064,6 +2083,7 @@ int edma_poll(struct napi_struct *napi,
u32 shadow_rx_status, shadow_tx_status;
int queue_id;
int i, work_done = 0;
+ u16 rx_pending_fill;
/* Store the Rx/Tx status by ANDing it with
* appropriate CPU RX?TX mask
@@ -2097,13 +2117,19 @@ int edma_poll(struct napi_struct *napi,
*/
while (edma_percpu_info->rx_status) {
queue_id = ffs(edma_percpu_info->rx_status) - 1;
- edma_rx_complete(edma_cinfo, &work_done,
- budget, queue_id, napi);
+ rx_pending_fill = edma_rx_complete(edma_cinfo, &work_done,
+ budget, queue_id, napi);
- if (likely(work_done < budget))
+ if (likely(work_done < budget)) {
+ if (rx_pending_fill) {
+ /* reschedule poll() to refill rx buffer deficit */
+ work_done = budget;
+ break;
+ }
edma_percpu_info->rx_status &= ~(1 << queue_id);
- else
+ } else {
break;
+ }
}
/* Clear the status register, to avoid the interrupts to
--- a/drivers/net/ethernet/qualcomm/essedma/edma.h
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.h
@@ -225,6 +225,7 @@ struct edma_ethtool_statistics {
u32 rx_q6_byte;
u32 rx_q7_byte;
u32 tx_desc_error;
+ u32 rx_alloc_fail_ctr;
};
struct edma_mdio_data {
@@ -362,6 +363,7 @@ struct edma_rfd_desc_ring {
dma_addr_t dma; /* descriptor ring physical address */
u16 sw_next_to_fill; /* next descriptor to fill */
u16 sw_next_to_clean; /* next descriptor to clean */
+ u16 pending_fill; /* fill pending from previous iteration */
};
/* edma_rfs_flter_node - rfs filter node in hash table */
--- a/drivers/net/ethernet/qualcomm/essedma/edma_ethtool.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma_ethtool.c
@@ -78,6 +78,7 @@ static const struct edma_ethtool_stats e
{"rx_q6_byte", EDMA_STAT(rx_q6_byte)},
{"rx_q7_byte", EDMA_STAT(rx_q7_byte)},
{"tx_desc_error", EDMA_STAT(tx_desc_error)},
+ {"rx_alloc_fail_ctr", EDMA_STAT(rx_alloc_fail_ctr)},
};
#define EDMA_STATS_LEN ARRAY_SIZE(edma_gstrings_stats)

180
target/linux/ipq40xx/patches-4.19/850-soc-add-qualcomm-syscon.patch Normal file
View File

@ -0,0 +1,180 @@
From: Christian Lamparter <chunkeey@googlemail.com>
Subject: SoC: add qualcomm syscon
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_QCOM_SMEM_STATE) += smem_st
obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
obj-$(CONFIG_QCOM_SMSM) += smsm.o
obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
+obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o
obj-$(CONFIG_QCOM_APR) += apr.o
obj-$(CONFIG_QCOM_LLCC) += llcc-slice.o
obj-$(CONFIG_QCOM_SDM845_LLCC) += llcc-sdm845.o
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -146,6 +146,13 @@ config QCOM_SMSM
Say yes here to support the Qualcomm Shared Memory State Machine.
The state machine is represented by bits in shared memory.
+config QCOM_TCSR
+ tristate "QCOM Top Control and Status Registers"
+ depends on ARCH_QCOM
+ help
+ Say y here to enable TCSR support. The TCSR provides control
+ functions for various peripherals.
+
config QCOM_WCNSS_CTRL
tristate "Qualcomm WCNSS control driver"
depends on ARCH_QCOM
--- /dev/null
+++ b/drivers/soc/qcom/qcom_tcsr.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2014, The Linux foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License rev 2 and
+ * only rev 2 as published by the free Software foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+#define TCSR_USB_PORT_SEL 0xb0
+#define TCSR_USB_HSPHY_CONFIG 0xC
+
+#define TCSR_ESS_INTERFACE_SEL_OFFSET 0x0
+#define TCSR_ESS_INTERFACE_SEL_MASK 0xf
+
+#define TCSR_WIFI0_GLB_CFG_OFFSET 0x0
+#define TCSR_WIFI1_GLB_CFG_OFFSET 0x4
+#define TCSR_PNOC_SNOC_MEMTYPE_M0_M2 0x4
+
+static int tcsr_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ const struct device_node *node = pdev->dev.of_node;
+ void __iomem *base;
+ u32 val;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) {
+ dev_err(&pdev->dev, "setting usb port select = %d\n", val);
+ writel(val, base + TCSR_USB_PORT_SEL);
+ }
+
+ if (!of_property_read_u32(node, "qcom,usb-hsphy-mode-select", &val)) {
+ dev_info(&pdev->dev, "setting usb hs phy mode select = %x\n", val);
+ writel(val, base + TCSR_USB_HSPHY_CONFIG);
+ }
+
+ if (!of_property_read_u32(node, "qcom,ess-interface-select", &val)) {
+ u32 tmp = 0;
+ dev_info(&pdev->dev, "setting ess interface select = %x\n", val);
+ tmp = readl(base + TCSR_ESS_INTERFACE_SEL_OFFSET);
+ tmp = tmp & (~TCSR_ESS_INTERFACE_SEL_MASK);
+ tmp = tmp | (val&TCSR_ESS_INTERFACE_SEL_MASK);
+ writel(tmp, base + TCSR_ESS_INTERFACE_SEL_OFFSET);
+ }
+
+ if (!of_property_read_u32(node, "qcom,wifi_glb_cfg", &val)) {
+ dev_info(&pdev->dev, "setting wifi_glb_cfg = %x\n", val);
+ writel(val, base + TCSR_WIFI0_GLB_CFG_OFFSET);
+ writel(val, base + TCSR_WIFI1_GLB_CFG_OFFSET);
+ }
+
+ if (!of_property_read_u32(node, "qcom,wifi_noc_memtype_m0_m2", &val)) {
+ dev_info(&pdev->dev,
+ "setting wifi_noc_memtype_m0_m2 = %x\n", val);
+ writel(val, base + TCSR_PNOC_SNOC_MEMTYPE_M0_M2);
+ }
+
+ return 0;
+}
+
+static const struct of_device_id tcsr_dt_match[] = {
+ { .compatible = "qcom,tcsr", },
+ { },
+};
+
+MODULE_DEVICE_TABLE(of, tcsr_dt_match);
+
+static struct platform_driver tcsr_driver = {
+ .driver = {
+ .name = "tcsr",
+ .owner = THIS_MODULE,
+ .of_match_table = tcsr_dt_match,
+ },
+ .probe = tcsr_probe,
+};
+
+module_platform_driver(tcsr_driver);
+
+MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
+MODULE_DESCRIPTION("QCOM TCSR driver");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+++ b/include/dt-bindings/soc/qcom,tcsr.h
@@ -0,0 +1,48 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DT_BINDINGS_QCOM_TCSR_H
+#define __DT_BINDINGS_QCOM_TCSR_H
+
+#define TCSR_USB_SELECT_USB3_P0 0x1
+#define TCSR_USB_SELECT_USB3_P1 0x2
+#define TCSR_USB_SELECT_USB3_DUAL 0x3
+
+/* IPQ40xx HS PHY Mode Select */
+#define TCSR_USB_HSPHY_HOST_MODE 0x00E700E7
+#define TCSR_USB_HSPHY_DEVICE_MODE 0x00C700E7
+
+/* IPQ40xx ess interface mode select */
+#define TCSR_ESS_PSGMII 0
+#define TCSR_ESS_PSGMII_RGMII5 1
+#define TCSR_ESS_PSGMII_RMII0 2
+#define TCSR_ESS_PSGMII_RMII1 4
+#define TCSR_ESS_PSGMII_RMII0_RMII1 6
+#define TCSR_ESS_PSGMII_RGMII4 9
+
+/*
+ * IPQ40xx WiFi Global Config
+ * Bit 30:AXID_EN
+ * Enable AXI master bus Axid translating to confirm all txn submitted by order
+ * Bit 24: Use locally generated socslv_wxi_bvalid
+ * 1: use locally generate socslv_wxi_bvalid for performance.
+ * 0: use SNOC socslv_wxi_bvalid.
+ */
+#define TCSR_WIFI_GLB_CFG 0x41000000
+
+/* IPQ40xx MEM_TYPE_SEL_M0_M2 Select Bit 26:24 - 2 NORMAL */
+#define TCSR_WIFI_NOC_MEMTYPE_M0_M2 0x02222222
+
+/* TCSR A/B REG */
+#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL 0
+#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL 1
+
+#endif

157
target/linux/ipq40xx/patches-4.19/900-dts-ipq4019-ap-dk01.1.patch Normal file
View File

@ -0,0 +1,157 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -15,6 +15,7 @@
*/
#include "qcom-ipq4019.dtsi"
+#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
@@ -29,6 +30,32 @@
};
soc {
+ tcsr@194b000 {
+ /* select hostmode */
+ compatible = "qcom,tcsr";
+ reg = <0x194b000 0x100>;
+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+ status = "ok";
+ };
+
+ ess_tcsr@1953000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1953000 0x1000>;
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+ };
+
+ tcsr@1949000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1949000 0x100>;
+ qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+ };
+
+ tcsr@1957000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1957000 0x100>;
+ qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+ };
+
rng@22000 {
status = "ok";
};
@@ -74,14 +101,6 @@
pinctrl-names = "default";
status = "ok";
cs-gpios = <&tlmm 54 0>;
-
- mx25l25635e@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0>;
- compatible = "mx25l25635e";
- spi-max-frequency = <24000000>;
- };
};
serial@78af000 {
@@ -110,6 +129,22 @@
status = "ok";
};
+ mdio@90000 {
+ status = "okay";
+ };
+
+ ess-switch@c000000 {
+ status = "okay";
+ };
+
+ ess-psgmii@98000 {
+ status = "okay";
+ };
+
+ edma@c080000 {
+ status = "okay";
+ };
+
usb3_ss_phy: ssphy@9a000 {
status = "ok";
};
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
@@ -18,5 +18,73 @@
/ {
model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
+ compatible = "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1";
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>;
+ };
+};
+
+&blsp1_spi1 {
+ mx25l25635f@0 {
+ compatible = "mx25l25635f", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+
+ SBL1@0 {
+ label = "SBL1";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+ MIBIB@40000 {
+ label = "MIBIB";
+ reg = <0x40000 0x20000>;
+ read-only;
+ };
+ QSEE@60000 {
+ label = "QSEE";
+ reg = <0x60000 0x60000>;
+ read-only;
+ };
+ CDT@c0000 {
+ label = "CDT";
+ reg = <0xc0000 0x10000>;
+ read-only;
+ };
+ DDRPARAMS@d0000 {
+ label = "DDRPARAMS";
+ reg = <0xd0000 0x10000>;
+ read-only;
+ };
+ APPSBLENV@e0000 {
+ label = "APPSBLENV";
+ reg = <0xe0000 0x10000>;
+ read-only;
+ };
+ APPSBL@f0000 {
+ label = "APPSBL";
+ reg = <0xf0000 0x80000>;
+ read-only;
+ };
+ ART@170000 {
+ label = "ART";
+ reg = <0x170000 0x10000>;
+ read-only;
+ };
+ kernel@180000 {
+ label = "kernel";
+ reg = <0x180000 0x400000>;
+ };
+ rootfs@580000 {
+ label = "rootfs";
+ reg = <0x580000 0x1600000>;
+ };
+ firmware@180000 {
+ label = "firmware";
+ reg = <0x180000 0x1a00000>;
+ };
+ };
};

48
target/linux/ipq40xx/patches-4.19/901-arm-boot-add-dts-files.patch Normal file
View File

@ -0,0 +1,48 @@
From a10fab12a927e60b7141a602e740d70cb4d09e4a Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Thu, 9 Mar 2017 11:03:18 +0100
Subject: [PATCH] arm: boot: add dts files
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/arm/boot/dts/Makefile | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -785,11 +785,35 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8074-dragonboard.dtb \
qcom-apq8084-ifc6540.dtb \
qcom-apq8084-mtp.dtb \
+ qcom-ipq4018-a42.dtb \
+ qcom-ipq4018-ap120c-ac.dtb \
+ qcom-ipq4018-ea6350v3.dtb \
+ qcom-ipq4018-eap1300.dtb \
+ qcom-ipq4018-ens620ext.dtb \
+ qcom-ipq4018-ex6100v2.dtb \
+ qcom-ipq4018-ex6150v2.dtb \
+ qcom-ipq4018-fritz4040.dtb \
+ qcom-ipq4018-jalapeno.dtb \
+ qcom-ipq4018-nbg6617.dtb \
+ qcom-ipq4018-rt-ac58u.dtb \
+ qcom-ipq4018-wre6606.dtb \
qcom-ipq4019-ap.dk01.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c3.dtb \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq4019-ap.dk07.1-c2.dtb \
+ qcom-ipq4019-a62.dtb \
+ qcom-ipq4019-fritzbox-7530.dtb \
+ qcom-ipq4019-fritzrepeater-1200.dtb \
+ qcom-ipq4019-fritzrepeater-3000.dtb \
+ qcom-ipq4019-linksys_ea8300.dtb \
+ qcom-ipq4019-map-ac2200.dtb \
+ qcom-ipq4019-qxwlan-e2600ac-c1.dtb \
+ qcom-ipq4019-qxwlan-e2600ac-c2.dtb \
+ qcom-ipq4019-unielec-u4019-32m.dtb \
+ qcom-ipq4028-wpj428.dtb \
+ qcom-ipq4029-gl-b1300.dtb \
+ qcom-ipq4029-mr33.dtb \
qcom-ipq8064-ap148.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \

12
target/linux/ipq40xx/patches-4.19/997-device_tree_cmdline.patch Normal file
View File

@ -0,0 +1,12 @@
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -1090,6 +1090,9 @@ int __init early_init_dt_scan_chosen(uns
p = of_get_flat_dt_prop(node, "bootargs", &l);
if (p != NULL && l > 0)
strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE));
+ p = of_get_flat_dt_prop(node, "bootargs-append", &l);
+ if (p != NULL && l > 0)
+ strlcat(data, p, min_t(int, strlen(data) + (int)l, COMMAND_LINE_SIZE));
/*
* CONFIG_CMDLINE is meant to be a default in case nothing else

26
target/linux/layerscape/patches-4.14/202-core-linux-support-layerscape.patch
View File

@ -62,7 +62,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -161,10 +161,10 @@ static int device_reorder_to_tail(struct
@@ -162,10 +162,10 @@ static int device_reorder_to_tail(struct
* of the link. If DL_FLAG_PM_RUNTIME is not set, DL_FLAG_RPM_ACTIVE will be
* ignored.
*
@ -77,7 +77,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
*
* A side effect of the link creation is re-ordering of dpm_list and the
* devices_kset list by moving the consumer device and all devices depending
@@ -181,7 +181,8 @@ struct device_link *device_link_add(stru
@@ -182,7 +182,8 @@ struct device_link *device_link_add(stru
struct device_link *link;
if (!consumer || !supplier ||
@ -87,7 +87,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
return NULL;
device_links_write_lock();
@@ -199,8 +200,10 @@ struct device_link *device_link_add(stru
@@ -200,8 +201,10 @@ struct device_link *device_link_add(stru
}
list_for_each_entry(link, &supplier->links.consumers, s_node)
@ -99,7 +99,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
link = kzalloc(sizeof(*link), GFP_KERNEL);
if (!link)
@@ -232,6 +235,7 @@ struct device_link *device_link_add(stru
@@ -233,6 +236,7 @@ struct device_link *device_link_add(stru
link->consumer = consumer;
INIT_LIST_HEAD(&link->c_node);
link->flags = flags;
@ -107,7 +107,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
/* Determine the initial link state. */
if (flags & DL_FLAG_STATELESS) {
@@ -302,8 +306,10 @@ static void __device_link_free_srcu(stru
@@ -303,8 +307,10 @@ static void __device_link_free_srcu(stru
device_link_free(container_of(rhead, struct device_link, rcu_head));
}
@ -119,7 +119,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
dev_info(link->consumer, "Dropping the link to %s\n",
dev_name(link->supplier));
@@ -315,8 +321,10 @@ static void __device_link_del(struct dev
@@ -316,8 +322,10 @@ static void __device_link_del(struct dev
call_srcu(&device_links_srcu, &link->rcu_head, __device_link_free_srcu);
}
#else /* !CONFIG_SRCU */
@ -131,7 +131,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
dev_info(link->consumer, "Dropping the link to %s\n",
dev_name(link->supplier));
@@ -334,18 +342,50 @@ static void __device_link_del(struct dev
@@ -335,18 +343,50 @@ static void __device_link_del(struct dev
* @link: Device link to delete.
*
* The caller must ensure proper synchronization of this function with runtime
@ -184,7 +184,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
static void device_links_missing_supplier(struct device *dev)
{
struct device_link *link;
@@ -453,8 +493,8 @@ static void __device_links_no_driver(str
@@ -454,8 +494,8 @@ static void __device_links_no_driver(str
if (link->flags & DL_FLAG_STATELESS)
continue;
@ -195,7 +195,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
else if (link->status != DL_STATE_SUPPLIER_UNBIND)
WRITE_ONCE(link->status, DL_STATE_AVAILABLE);
}
@@ -489,8 +529,18 @@ void device_links_driver_cleanup(struct
@@ -490,8 +530,18 @@ void device_links_driver_cleanup(struct
if (link->flags & DL_FLAG_STATELESS)
continue;
@ -215,7 +215,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
WRITE_ONCE(link->status, DL_STATE_DORMANT);
}
@@ -607,13 +657,13 @@ static void device_links_purge(struct de
@@ -608,13 +658,13 @@ static void device_links_purge(struct de
list_for_each_entry_safe_reverse(link, ln, &dev->links.suppliers, c_node) {
WARN_ON(link->status == DL_STATE_ACTIVE);
@ -231,7 +231,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
}
device_links_write_unlock();
@@ -1035,6 +1085,34 @@ static ssize_t online_store(struct devic
@@ -1036,6 +1086,34 @@ static ssize_t online_store(struct devic
}
static DEVICE_ATTR_RW(online);
@ -266,7 +266,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
int device_add_groups(struct device *dev, const struct attribute_group **groups)
{
return sysfs_create_groups(&dev->kobj, groups);
@@ -1206,8 +1284,20 @@ static int device_add_attrs(struct devic
@@ -1207,8 +1285,20 @@ static int device_add_attrs(struct devic
goto err_remove_dev_groups;
}
@ -287,7 +287,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
err_remove_dev_groups:
device_remove_groups(dev, dev->groups);
err_remove_type_groups:
@@ -1225,6 +1315,8 @@ static void device_remove_attrs(struct d
@@ -1226,6 +1316,8 @@ static void device_remove_attrs(struct d
struct class *class = dev->class;
const struct device_type *type = dev->type;

2
target/linux/layerscape/patches-4.14/807-usb-support-layerscape.patch
View File

@ -1363,7 +1363,7 @@ Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
while (ep_ring->dequeue != td->last_trb)
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1595,13 +1595,38 @@ static int xhci_urb_dequeue(struct usb_h
@@ -1607,13 +1607,38 @@ static int xhci_urb_dequeue(struct usb_h
ret = -ENOMEM;
goto done;
}

2
target/linux/x86/Makefile
View File

@ -13,7 +13,7 @@ FEATURES:=squashfs vdi vmdk pcmcia fpu
SUBTARGETS:=64 generic legacy geode
MAINTAINER:=Felix Fietkau <nbd@nbd.name>
KERNEL_PATCHVER:=4.9
KERNEL_PATCHVER:=4.19
KERNELNAME:=bzImage