mediatek: add support for CMCC A10

This commit is contained in:
coolsnowwolf 2025-03-16 23:18:07 +08:00
parent 83134525fd
commit d4831d96b7
4 changed files with 312 additions and 0 deletions

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@ -0,0 +1,22 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981b-cmcc-a10.dts"
/ {
model = "CMCC A10 (U-Boot mod)";
compatible = "cmcc,a10-mod", "mediatek,mt7981";
};
&spi0 {
spi_nand@0 {
partitions {
partition@580000 {
label = "ubi";
reg = <0x0580000 0x6000000>;
};
/delete-node/ partition@4580000;
};
};
};

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@ -0,0 +1,260 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7981.dtsi"
/ {
model = "CMCC A10";
compatible = "cmcc,a10", "mediatek,mt7981";
aliases {
serial0 = &uart0;
label-mac-device = &gmac0;
led-boot = &led_status_red;
led-failsafe = &led_status_red;
led-running = &led_status_blue;
led-upgrade = &led_status_green;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_status_blue: blue {
label = "blue:status";
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
led_status_green: green {
label = "green:status";
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
led_status_red: red {
label = "red:status";
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_factory_2a>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
&mdio_bus {
switch: switch@0 {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x0100000 0x0080000>;
};
factory: partition@180000 {
label = "Factory";
reg = <0x0180000 0x0200000>;
read-only;
};
partition@380000 {
label = "FIP";
reg = <0x0380000 0x0200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x0580000 0x4000000>;
};
partition@4580000 {
label = "backup";
reg = <0x4580000 0x2000000>;
};
partition@6580000 {
label = "zrsave";
reg = <0x6580000 0x0100000>;
};
partition@6680000 {
label = "config2";
reg = <0x6680000 0x0100000>;
read-only;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@4 {
reg = <4>;
label = "wan";
nvmem-cells = <&macaddr_factory_24>;
nvmem-cell-names = "mac-address";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
mediatek,mtd-eeprom = <&factory 0x0>;
};
&factory {
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_24: macaddr@24 {
reg = <0x24 0x6>;
};
macaddr_factory_2a: macaddr@2a {
reg = <0x2a 0x6>;
};
};
};

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@ -42,6 +42,7 @@ mediatek_setup_interfaces()
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 eth1" "wan eth2"
;;
cetron,ct3003*|\
cmcc,a10*|\
fzs,5gcpe-p3|\
jcg,q30-pro|\
qihoo,360t7|\

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@ -282,6 +282,35 @@ define Device/cetron_ct3003-mod
endef
TARGET_DEVICES += cetron_ct3003-mod
define Device/cmcc_a10
DEVICE_VENDOR := CMCC
DEVICE_MODEL := A10
DEVICE_DTS := mt7981b-cmcc-a10
DEVICE_DTS_DIR := ../dts
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
endef
TARGET_DEVICES += cmcc_a10
define Device/cmcc_a10-mod
DEVICE_VENDOR := CMCC
DEVICE_MODEL := A10 (U-Boot mod)
DEVICE_DTS := mt7981b-cmcc-a10-mod
DEVICE_DTS_DIR := ../dts
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
endef
TARGET_DEVICES += cmcc_a10-mod
define Device/cmcc_rax3000m-emmc
DEVICE_VENDOR := CMCC
DEVICE_MODEL := RAX3000M (eMMC version)