diff --git a/target/linux/rockchip/armv8/config-5.19 b/target/linux/rockchip/armv8/config-5.19 deleted file mode 100644 index 74b83e977..000000000 --- a/target/linux/rockchip/armv8/config-5.19 +++ /dev/null @@ -1,843 +0,0 @@ -CONFIG_64BIT=y -CONFIG_AF_UNIX_OOB=y -CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=33 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_ROCKCHIP=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANTS_NO_INSTR=y -CONFIG_ARC_EMAC_CORE=y -CONFIG_ARM64=y -CONFIG_ARM64_CNP=y -CONFIG_ARM64_CRYPTO=y -CONFIG_ARM64_ERRATUM_1024718=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_ERRATUM_2051678=y -CONFIG_ARM64_ERRATUM_2077057=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_845719=y -CONFIG_ARM64_ERRATUM_858921=y -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_MODULE_PLTS=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PAN=y -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_SME=y -CONFIG_ARM64_SVE=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_VA_BITS=48 -# CONFIG_ARM64_VA_BITS_39 is not set -CONFIG_ARM64_VA_BITS_48=y -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -# CONFIG_ARMV8_DEPRECATED is not set -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_ARM_CPUIDLE=y -CONFIG_ARM_FFA_SMCCC=y -CONFIG_ARM_FFA_TRANSPORT=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -CONFIG_ARM_MHU=y -CONFIG_ARM_PSCI_CPUIDLE=y -CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y -CONFIG_ARM_PSCI_FW=y -CONFIG_ARM_RK3399_DMC_DEVFREQ=y -CONFIG_ARM_SCMI_CPUFREQ=y -CONFIG_ARM_SCMI_HAVE_SHMEM=y -CONFIG_ARM_SCMI_HAVE_TRANSPORT=y -CONFIG_ARM_SCMI_POWER_DOMAIN=y -CONFIG_ARM_SCMI_PROTOCOL=y -CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y -CONFIG_ARM_SCMI_TRANSPORT_SMC=y -# CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set -CONFIG_ARM_SCPI_CPUFREQ=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SMCCC_SOC_ID=y -CONFIG_ARM_SMMU=y -CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y -# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set -CONFIG_ARM_SMMU_V3=y -# CONFIG_ARM_SMMU_V3_SVA is not set -CONFIG_ATA=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GPIO=y -CONFIG_BACKLIGHT_PWM=y -CONFIG_BINARY_PRINTF=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_BSG_COMMON=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_NVME=y -CONFIG_BLK_DEV_PCIESSD_MTIP32XX=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BLOCK_COMPAT=y -CONFIG_BLOCK_LEGACY_AUTOLOAD=y -CONFIG_BRCMSTB_GISB_ARB=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_CHARGER_GPIO=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLK_PX30=y -CONFIG_CLK_RK3308=y -CONFIG_CLK_RK3328=y -CONFIG_CLK_RK3368=y -CONFIG_CLK_RK3399=y -CONFIG_CLK_RK3568=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=5 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_RK808=y -CONFIG_COMMON_CLK_ROCKCHIP=y -# CONFIG_COMMON_CLK_RS9_PCIE is not set -CONFIG_COMMON_CLK_SCMI=y -CONFIG_COMMON_CLK_SCPI=y -CONFIG_COMPAT=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_CONFIGFS_FS=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONTIG_ALLOC=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_FREQ=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y -CONFIG_CPU_ISOLATION=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_THERMAL=y -CONFIG_CRASH_CORE=y -CONFIG_CRASH_DUMP=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CRC64=y -CONFIG_CRC64_ROCKSOFT=y -CONFIG_CRC_T10DIF=y -CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC64_ROCKSOFT=y -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_RNG2=y -# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set -# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_INFO=y -CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y -# CONFIG_DEVFREQ_GOV_PASSIVE is not set -CONFIG_DEVFREQ_GOV_PERFORMANCE=y -CONFIG_DEVFREQ_GOV_POWERSAVE=y -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -CONFIG_DEVFREQ_GOV_USERSPACE=y -# CONFIG_DEVFREQ_THERMAL is not set -CONFIG_DEVMEM=y -# CONFIG_DEVPORT is not set -# CONFIG_DM9051 is not set -CONFIG_DMADEVICES=y -CONFIG_DMA_CMA=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DNOTIFY=y -CONFIG_DRM=y -# CONFIG_DRM_ANALOGIX_ANX7625 is not set -CONFIG_DRM_BRIDGE=y -# CONFIG_DRM_CHIPONE_ICN6211 is not set -CONFIG_DRM_DEBUG_MODESET_LOCK=y -CONFIG_DRM_DISPLAY_HDMI_HELPER=y -CONFIG_DRM_DISPLAY_HELPER=y -CONFIG_DRM_DW_HDMI=y -CONFIG_DRM_DW_MIPI_DSI=y -# CONFIG_DRM_FSL_LDB is not set -CONFIG_DRM_GEM_CMA_HELPER=y -# CONFIG_DRM_ITE_IT6505 is not set -# CONFIG_DRM_ITE_IT66121 is not set -CONFIG_DRM_KMS_HELPER=y -# CONFIG_DRM_LONTIUM_LT8912B is not set -# CONFIG_DRM_LONTIUM_LT9211 is not set -# CONFIG_DRM_LONTIUM_LT9611UXC is not set -CONFIG_DRM_MIPI_DSI=y -CONFIG_DRM_NOMODESET=y -CONFIG_DRM_PANEL=y -# CONFIG_DRM_PANEL_ABT_Y030XX067A is not set -# CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0 is not set -CONFIG_DRM_PANEL_BRIDGE=y -# CONFIG_DRM_PANEL_DSI_CM is not set -# CONFIG_DRM_PANEL_EDP is not set -# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set -# CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set -# CONFIG_DRM_PANEL_JDI_R63452 is not set -# CONFIG_DRM_PANEL_KHADAS_TS050 is not set -# CONFIG_DRM_PANEL_MIPI_DBI is not set -# CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35560 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT35950 is not set -# CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set -# CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set -# CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set -# CONFIG_DRM_PANEL_SHARP_LS060T1SX01 is not set -# CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521 is not set -# CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set -# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set -# CONFIG_DRM_RCAR_MIPI_DSI is not set -# CONFIG_DRM_RCAR_USE_LVDS is not set -CONFIG_DRM_ROCKCHIP=y -# CONFIG_DRM_SIMPLEDRM is not set -# CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_TI_SN65DSI83 is not set -CONFIG_DTC=y -CONFIG_DT_IDLE_GENPD=y -CONFIG_DT_IDLE_STATES=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_DWMAC_DWC_QOS_ETH=y -CONFIG_DWMAC_GENERIC=y -CONFIG_DWMAC_ROCKCHIP=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EEPROM_AT24=y -CONFIG_EMAC_ROCKCHIP=y -CONFIG_ENERGY_MODEL=y -CONFIG_EXCLUSIVE_SYSTEM_RAM=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FANOTIFY=y -CONFIG_FB_CMDLINE=y -CONFIG_FHANDLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FORTIFY_SOURCE is not set -CONFIG_FRAME_POINTER=y -CONFIG_FRAME_WARN=2048 -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -# CONFIG_FUN_ETH is not set -CONFIG_FWNODE_MDIO=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC12_NO_ARRAY_BOUNDS=y -CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PHY_MIPI_DPHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -# CONFIG_GPIO_CASCADE is not set -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_DWAPB=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_ROCKCHIP=y -# CONFIG_GPIO_SIM is not set -CONFIG_GRO_CELLS=y -# CONFIG_HARDENED_USERCOPY is not set -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HDMI=y -CONFIG_HID=y -CONFIG_HID_GENERIC=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HOTPLUG_PCI=y -# CONFIG_HOTPLUG_PCI_CPCI is not set -CONFIG_HOTPLUG_PCI_PCIE=y -CONFIG_HOTPLUG_PCI_SHPC=y -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y -# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set -CONFIG_HWMON=y -CONFIG_HWSPINLOCK=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_ROCKCHIP=y -CONFIG_HW_CONSOLE=y -CONFIG_HZ=250 -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_RK3X=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INDIRECT_PIO=y -CONFIG_INPUT=y -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_KEYBOARD=y -CONFIG_INPUT_LEDS=y -CONFIG_INPUT_MATRIXKMAP=y -CONFIG_INPUT_MOUSE=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_RK805_PWRKEY=y -CONFIG_INPUT_SPARSEKMAP=y -CONFIG_IOMMU_API=y -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set -CONFIG_IOMMU_DEFAULT_DMA_STRICT=y -CONFIG_IOMMU_DMA=y -CONFIG_IOMMU_IOVA=y -CONFIG_IOMMU_IO_PGTABLE=y -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -CONFIG_IOMMU_IO_PGTABLE_LPAE=y -# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set -CONFIG_IOMMU_SUPPORT=y -# CONFIG_IO_STRICT_DEVMEM is not set -CONFIG_IO_URING=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JUMP_LABEL=y -CONFIG_KALLSYMS=y -CONFIG_KCMP=y -CONFIG_KEXEC_CORE=y -CONFIG_KEXEC_FILE=y -# CONFIG_KEXEC_SIG is not set -CONFIG_KSM=y -# CONFIG_LAN966X_SWITCH is not set -# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=y -# CONFIG_LEDS_PWM_MULTICOLOR is not set -CONFIG_LEDS_SYSCON=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_LEDS_TRIGGER_PANIC=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_LIBCRC32C=y -CONFIG_LIBFDT=y -CONFIG_LOCALVERSION_AUTO=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOG_BUF_SHIFT=19 -CONFIG_LTO_NONE=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_SERIAL=y -CONFIG_MAILBOX=y -# CONFIG_MAILBOX_TEST is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_BUS_MUX=y -CONFIG_MDIO_BUS_MUX_GPIO=y -CONFIG_MDIO_BUS_MUX_MMIOREG=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEDIATEK_GE_PHY=y -CONFIG_MEMFD_CREATE=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_CORE=y -# CONFIG_MFD_KHADAS_MCU is not set -# CONFIG_MFD_MAX77714 is not set -CONFIG_MFD_RK808=y -# CONFIG_MFD_SIMPLE_MFD_I2C is not set -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -CONFIG_MMC_CQHCI=y -CONFIG_MMC_DW=y -# CONFIG_MMC_DW_BLUEFIELD is not set -# CONFIG_MMC_DW_EXYNOS is not set -# CONFIG_MMC_DW_HI3798CV200 is not set -# CONFIG_MMC_DW_K3 is not set -# CONFIG_MMC_DW_PCI is not set -CONFIG_MMC_DW_PLTFM=y -CONFIG_MMC_DW_ROCKCHIP=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_OF_ARASAN=y -CONFIG_MMC_SDHCI_OF_DWCMSHC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MOTORCOMM_PHY=y -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_BYD=y -CONFIG_MOUSE_PS2_CYPRESS=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SMBUS=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set -CONFIG_MQ_IOSCHED_DEADLINE=y -# CONFIG_MTD_CFI is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MT7530=y -# CONFIG_NET_DSA_REALTEK is not set -CONFIG_NET_DSA_TAG_MTK=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SOCK_MSG=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NET_VENDOR_DAVICOM=y -CONFIG_NET_VENDOR_FUNGIBLE=y -CONFIG_NLS=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NVMEM=y -CONFIG_NVMEM_SYSFS=y -CONFIG_NVME_CORE=y -# CONFIG_NVME_HWMON is not set -# CONFIG_NVME_MULTIPATH is not set -# CONFIG_NVME_VERBOSE_ERRORS is not set -# CONFIG_OCTEON_EP is not set -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IOMMU=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_RESOLVE=y -CONFIG_OLD_SIGSUSPEND3=y -# CONFIG_OVERLAY_FS_XINO_AUTO is not set -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -CONFIG_PAGE_SIZE_LESS_THAN_256KB=y -CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PAHOLE_HAS_SPLIT_BTF=y -CONFIG_PAHOLE_VERSION=121 -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PARTITION_PERCPU=y -CONFIG_PATA_SIS=y -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEASPM=y -CONFIG_PCIEASPM_DEFAULT=y -# CONFIG_PCIEASPM_PERFORMANCE is not set -# CONFIG_PCIEASPM_POWERSAVE is not set -# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -CONFIG_PCIE_PME=y -CONFIG_PCIE_ROCKCHIP=y -CONFIG_PCIE_ROCKCHIP_DW_HOST=y -CONFIG_PCIE_ROCKCHIP_HOST=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCI_STUB=y -CONFIG_PCS_XPCS=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_ROCKCHIP_DP=y -CONFIG_PHY_ROCKCHIP_DPHY_RX0=y -CONFIG_PHY_ROCKCHIP_EMMC=y -CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY=y -CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=y -CONFIG_PHY_ROCKCHIP_INNO_HDMI=y -CONFIG_PHY_ROCKCHIP_INNO_USB2=y -CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y -CONFIG_PHY_ROCKCHIP_PCIE=y -CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y -CONFIG_PHY_ROCKCHIP_TYPEC=y -CONFIG_PHY_ROCKCHIP_USB=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_RK805=y -CONFIG_PINCTRL_ROCKCHIP=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PL330_DMA=y -CONFIG_PLATFORM_MHU=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_DEVFREQ=y -CONFIG_PM_DEVFREQ_EVENT=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_OPP=y -CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_POWER_SUPPLY_HWMON=y -CONFIG_PPS=y -CONFIG_PREEMPT=y -CONFIG_PREEMPTION=y -CONFIG_PREEMPT_BUILD=y -CONFIG_PREEMPT_COUNT=y -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_RCU=y -CONFIG_PRINTK_TIME=y -# CONFIG_PRINT_QUOTA_WARNING is not set -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PROC_VMCORE=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PWM=y -CONFIG_PWM_ROCKCHIP=y -CONFIG_PWM_SYSFS=y -# CONFIG_PWM_XILINX is not set -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_QUOTA=y -CONFIG_QUOTACTL=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_RAID_ATTRS=y -CONFIG_RANDOMIZE_BASE=y -CONFIG_RANDOMIZE_KSTACK_OFFSET=y -CONFIG_RANDOMIZE_MODULE_REGION_FULL=y -CONFIG_RANDSTRUCT_NONE=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -# CONFIG_RAVE_SP_CORE is not set -CONFIG_RCU_TRACE=y -CONFIG_REALTEK_PHY=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_IRQ=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_ARM_SCMI is not set -CONFIG_REGULATOR_FAN53555=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_PWM=y -CONFIG_REGULATOR_RK808=y -# CONFIG_REGULATOR_RT5190A is not set -# CONFIG_REGULATOR_RT5759 is not set -# CONFIG_REGULATOR_SY7636A is not set -# CONFIG_REGULATOR_TPS6286X is not set -CONFIG_RELOCATABLE=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RESET_SCMI=y -CONFIG_RFS_ACCEL=y -# CONFIG_ROCKCHIP_ANALOGIX_DP is not set -# CONFIG_ROCKCHIP_CDN_DP is not set -CONFIG_ROCKCHIP_DW_HDMI=y -CONFIG_ROCKCHIP_DW_MIPI_DSI=y -CONFIG_ROCKCHIP_EFUSE=y -CONFIG_ROCKCHIP_GRF=y -CONFIG_ROCKCHIP_INNO_HDMI=y -CONFIG_ROCKCHIP_IODOMAIN=y -CONFIG_ROCKCHIP_IOMMU=y -# CONFIG_ROCKCHIP_LVDS is not set -CONFIG_ROCKCHIP_MBOX=y -# CONFIG_ROCKCHIP_OTP is not set -CONFIG_ROCKCHIP_PHY=y -CONFIG_ROCKCHIP_PM_DOMAINS=y -# CONFIG_ROCKCHIP_RGB is not set -CONFIG_ROCKCHIP_RK3066_HDMI=y -CONFIG_ROCKCHIP_THERMAL=y -CONFIG_ROCKCHIP_TIMER=y -CONFIG_ROCKCHIP_VOP=y -CONFIG_ROCKCHIP_VOP2=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -CONFIG_RPS=y -CONFIG_RSEQ=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_RK808=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_NVMEM=y -# CONFIG_RUNTIME_TESTING_MENU is not set -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SATA_AHCI=y -CONFIG_SATA_HOST=y -CONFIG_SATA_PMP=y -CONFIG_SATA_SIS=y -CONFIG_SCHED_MC=y -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -# CONFIG_SCSI_SAS_ATA is not set -CONFIG_SCSI_SAS_ATTRS=y -CONFIG_SCSI_SAS_HOST_SMP=y -CONFIG_SCSI_SAS_LIBSAS=y -# CONFIG_SECURITY_DMESG_RESTRICT is not set -# CONFIG_SENSORS_ARM_SCMI is not set -CONFIG_SENSORS_ARM_SCPI=y -# CONFIG_SENSORS_NCT6775_I2C is not set -# CONFIG_SENSORS_SY7636A is not set -# CONFIG_SENSORS_TMP464 is not set -CONFIG_SERIAL_8250_ASPEED_VUART=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_EXAR=y -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FINTEK=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIO=y -CONFIG_SERIO_AMBAKMI=y -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIO_PCIPS2=y -CONFIG_SERIO_RAW=y -# CONFIG_SFC_SIENA is not set -CONFIG_SG_POOL=y -CONFIG_SLUB_DEBUG=y -CONFIG_SMP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOC_BUS=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_DYNAMIC=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_ROCKCHIP=y -CONFIG_SPI_SPIDEV=y -# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set -CONFIG_SQUASHFS_DECOMP_SINGLE=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FILE_CACHE=y -# CONFIG_SQUASHFS_FILE_DIRECT is not set -CONFIG_SRAM=y -CONFIG_SRCU=y -CONFIG_STACKDEPOT=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_PER_TASK=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_STACKTRACE=y -CONFIG_STMMAC_ETH=y -CONFIG_STMMAC_PLATFORM=y -# CONFIG_STMMAC_SELFTESTS is not set -CONFIG_STRICT_DEVMEM=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_SWAP is not set -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SYNC_FILE=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_SYSVIPC_COMPAT=y -# CONFIG_TEXTSEARCH is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_EMULATION=y -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -# CONFIG_TINYDRM_ILI9163 is not set -CONFIG_TRACE_CLOCK=y -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -CONFIG_TRANS_TABLE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_TYPEC=y -# CONFIG_TYPEC_DP_ALTMODE is not set -CONFIG_TYPEC_FUSB302=y -# CONFIG_TYPEC_HD3SS3220 is not set -# CONFIG_TYPEC_MUX_FSA4480 is not set -# CONFIG_TYPEC_MUX_PI3USB30532 is not set -# CONFIG_TYPEC_RT1719 is not set -# CONFIG_TYPEC_STUSB160X is not set -# CONFIG_TYPEC_TCPCI is not set -CONFIG_TYPEC_TCPM=y -# CONFIG_TYPEC_TPS6598X is not set -# CONFIG_TYPEC_WUSB3801 is not set -# CONFIG_UACCE is not set -# CONFIG_UCLAMP_TASK is not set -# CONFIG_UEVENT_HELPER is not set -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_HOST=y -CONFIG_USB_DWC3_OF_SIMPLE=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_HID=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_PHY=y -CONFIG_USB_ROLE_SWITCH=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_BUS=y -CONFIG_USB_ULPI_VIEWPORT=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USERIO=y -CONFIG_VIDEOMODE_HELPERS=y -# CONFIG_VIRTIO_MENU is not set -CONFIG_VMAP_STACK=y -# CONFIG_VMWARE_VMCI is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_WATCHDOG is not set -CONFIG_XARRAY_MULTI=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts deleted file mode 100644 index 6f9cf81f8..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts +++ /dev/null @@ -1,495 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 EmbedFire - */ - -/dts-v1/; - -#include -#include -#include "rk3328-dram-nanopi2-timing.dtsi" -#include "rk3328.dtsi" - -/ { - model = "EmbedFire DoorNet1"; - compatible = "embedfire,doornet1", "rockchip,rk3328"; - - aliases { - led-boot = &sys_led; - led-failsafe = &sys_led; - led-running = &sys_led; - led-upgrade = &sys_led; - // mmc1 = &sdmmc; - // mmc0 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clk: gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - keys { - compatible = "gpio-keys"; - pinctrl-0 = <&reset_button_pin>; - pinctrl-names = "default"; - - reset { - label = "reset"; - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <50>; - }; - }; - - vcc_rtl8153: vcc-rtl8153-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&rtl8153_en_drv>; - regulator-always-on; - regulator-name = "vcc_rtl8153"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - }; - - dmc: dmc { - compatible = "rockchip,rk3328-dmc"; - devfreq-events = <&dfi>; - center-supply = <&vdd_log>; - clocks = <&cru SCLK_DDRCLK>; - clock-names = "dmc_clk"; - operating-points-v2 = <&dmc_opp_table>; - ddr_timing = <&ddr_timing>; - upthreshold = <40>; - downdifferential = <20>; - auto-min-freq = <786000>; - auto-freq-en = <1>; - #cooling-cells = <2>; - status = "okay"; - - ddr_power_model: ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <120>; - static-power-coefficient = <200>; - ts = <32000 4700 (-80) 2>; - thermal-zone = "soc-thermal"; - }; - }; - - dmc_opp_table: dmc-opp-table { - compatible = "operating-points-v2"; - - rockchip,leakage-voltage-sel = < - 1 10 0 - 11 254 1 - >; - nvmem-cells = <&logic_leakage>; - nvmem-cell-names = "ddr_leakage"; - - opp-786000000 { - opp-hz = /bits/ 64 <786000000>; - opp-microvolt = <1075000>; - opp-microvolt-L0 = <1075000>; - opp-microvolt-L1 = <1050000>; - }; - opp-798000000 { - opp-hz = /bits/ 64 <798000000>; - opp-microvolt = <1075000>; - opp-microvolt-L0 = <1075000>; - opp-microvolt-L1 = <1050000>; - }; - opp-840000000 { - opp-hz = /bits/ 64 <840000000>; - opp-microvolt = <1075000>; - opp-microvolt-L0 = <1075000>; - opp-microvolt-L1 = <1050000>; - }; - opp-924000000 { - opp-hz = /bits/ 64 <924000000>; - opp-microvolt = <1100000>; - opp-microvolt-L0 = <1100000>; - opp-microvolt-L1 = <1075000>; - }; - opp-1056000000 { - opp-hz = /bits/ 64 <1056000000>; - opp-microvolt = <1175000>; - opp-microvolt-L0 = <1175000>; - opp-microvolt-L1 = <1150000>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - pinctrl-names = "default"; - - lan_led: led-0 { - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - label = "doornet1:green:lan"; - }; - - sys_led: led-1 { - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; - label = "doornet1:red:sys"; - }; - - wan_led: led-2 { - gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - label = "doornet1:green:wan"; - }; - - wifi_enable: wifi_enable { - gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; - label = "wifi-enable"; - }; - }; - - vcc_io_sdio: sdmmcio-regulator { - compatible = "regulator-gpio"; - enable-active-high; - gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&sdio_vcc_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_io_sdio"; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-settling-time-us = <5000>; - regulator-type = "voltage"; - startup-delay-us = <2000>; - states = <1800000 0x1 - 3300000 0x0>; - vin-supply = <&vcc_io_33>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&sdmmc0m1_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_sd"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io_33>; - }; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&dfi { - status = "okay"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; - clock_in_out = "input"; - phy-mode = "rgmii"; - phy-supply = <&vcc_io_33>; - pinctrl-0 = <&rgmiim1_pins>; - pinctrl-names = "default"; - snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - snps,reset-delays-us = <0 1000000 50000>; - snps,reset-active-low; - tx_delay = <0x18>; - rx_delay = <0x24>; - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-0 = <&pmic_int_l>; - pinctrl-names = "default"; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vdd_5v>; - vcc2-supply = <&vdd_5v>; - vcc3-supply = <&vdd_5v>; - vcc4-supply = <&vdd_5v>; - vcc5-supply = <&vcc_io_33>; - vcc6-supply = <&vdd_5v>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <1075000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <1225000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io_33: DCDC_REG4 { - regulator-name = "vcc_io_33"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; - usb { - rtl8153_en_drv: rtl8153-en-drv { - rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&io_domains { - pmuio-supply = <&vcc_io_33>; - vccio1-supply = <&vcc_io_33>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io_sdio>; - vccio4-supply = <&vcc_18>; - vccio5-supply = <&vcc_io_33>; - vccio6-supply = <&vcc_io_33>; - status = "okay"; -}; - -&pinctrl { - button { - reset_button_pin: reset-button-pin { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - ethernet-phy { - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - leds { - lan_led_pin: lan-led-pin { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_pin: wifi_pin{ - rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sd { - sdio_vcc_pin: sdio-vcc-pin { - rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - pinctrl-names = "default"; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vcc_io_sdio>; - status = "okay"; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - vmmc-supply = <&vcc_io_33>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb20_otg { - status = "okay"; - dr_mode = "host"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usbdrd3 { - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - /* Second port is for USB 3.0 */ - rtl8153: device@2 { - compatible = "usbbda,8153"; - reg = <2>; - - realtek,led-data = <0x87>; - }; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts deleted file mode 100644 index adf91a030..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts +++ /dev/null @@ -1,47 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2021 Tianling Shen - */ - -/dts-v1/; - -#include "rk3328-nanopi-r2s.dts" - -/ { - model = "FriendlyElec NanoPi R2C"; - compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; -}; - -&gmac2io { - phy-handle = <&yt8521s>; - - mdio { - /delete-node/ ethernet-phy@1; - - yt8521s: ethernet-phy@3 { - compatible = "ethernet-phy-id0000.011a", - "ethernet-phy-ieee802.3-c22"; - reg = <3>; - pinctrl-0 = <ð_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&lan_led { - label = "nanopi-r2c:green:lan"; -}; - -&sys_led { - label = "nanopi-r2c:red:sys"; -}; - -&wan_led { - label = "nanopi-r2c:green:wan"; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts deleted file mode 100644 index ee37573d6..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts +++ /dev/null @@ -1,70 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -#include "rk3328-orangepi-r1-plus.dts" - -/ { - model = "Xunlong Orange Pi R1 Plus LTS"; - compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328"; -}; - -/delete-node/ &rtl8211e; -&gmac2io { - phy-handle = <ðphy3>; - snps,reset-delays-us = <0 15000 50000>; - tx_delay = <0x19>; - rx_delay = <0x05>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - ethphy3: ethernet-phy@0 { - reg = <0x0>; - keep-clkout-on; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - pinctrl-names = "default"; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vcc_io_sdio>; - status = "okay"; -}; - -&dmc_opp_table { - opp-1056000000 { - status = "disabled"; - }; - opp-924000000 { - status = "disabled"; - }; - opp-840000000 { - status = "disabled"; - }; - opp-798000000 { - status = "disabled"; - }; -}; - -&sys_led { - label = "orangepi-r1-plus-lts:red:sys"; -}; - -&wan_led { - label = "orangepi-r1-plus-lts:green:wan"; -}; - -&lan_led { - label = "orangepi-r1-plus-lts:green:lan"; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts deleted file mode 100644 index ed585daf4..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -#include "rk3328-nanopi-r2s.dts" - -/ { - model = "Xunlong Orange Pi R1 Plus"; - compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -}; - -&lan_led { - label = "orangepi-r1-plus:green:lan"; -}; - -&spi0 { - max-freq = <48000000>; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <10000000>; - }; -}; - -&sys_led { - gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; - label = "orangepi-r1-plus:red:sys"; -}; - -&sys_led_pin { - rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; -}; - -&uart1 { - status = "okay"; -}; - -&wan_led { - label = "orangepi-r1-plus:green:wan"; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dts deleted file mode 100644 index 7b9d5efaf..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dts +++ /dev/null @@ -1,113 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; -#include "rk3399-doornet2.dtsi" - -/ { - model = "EmbedFire DoorNet2 1GB"; - compatible = "embedfire,doornet2", "rockchip,rk3399"; - - aliases { - led-boot = &sys_led; - led-failsafe = &sys_led; - led-running = &sys_led; - led-upgrade = &sys_led; - }; - - /delete-node/ display-subsystem; - - gpio-leds { - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - - /delete-node/ status; - - lan_led: led-lan { - gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; - label = "green:lan"; - }; - - sys_led: led-sys { - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - label = "red:sys"; - default-state = "on"; - }; - - wan_led: led-wan { - gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - label = "green:wan"; - }; - }; - - gpio-keys { - pinctrl-0 = <&reset_button_pin>; - - /delete-node/ power; - - reset { - debounce-interval = <50>; - gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; - label = "reset"; - linux,code = ; - }; - }; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - }; -}; - -&pcie0 { - max-link-speed = <1>; - num-lanes = <1>; - vpcie3v3-supply = <&vcc3v3_sys>; - - pcie@0 { - reg = <0x00000000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - pcie-eth@0,0 { - compatible = "realtek,r8168"; - reg = <0x000000 0 0 0 0>; - - realtek,led-data = <0x870>; - }; - }; -}; - -&pinctrl { - gpio-leds { - /delete-node/ leds-gpio; - - lan_led_pin: lan-led-pin { - rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - rockchip-key { - /delete-node/ power-key; - - reset_button_pin: reset-button-pin { - rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&u2phy0_host { - phy-supply = <&vdd_5v>; -}; - -&vcc3v3_sys { - vin-supply = <&vcc5v0_sys>; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dtsi b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dtsi deleted file mode 100644 index 4f6bddafe..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-doornet2.dtsi +++ /dev/null @@ -1,636 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; -#include -#include "rk3399.dtsi" - -/ { - chosen { - stdout-path = "serial2:1500000n8"; - }; - - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_sys"; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_sys"; - vin-supply = <&vdd_5v>; - }; - - /* switched by pmic_sleep */ - vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_s3"; - vin-supply = <&vcc_1v8>; - }; - - vcc3v0_sd: vcc3v0-sd { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_pwr_h>; - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc3v0_sd"; - vin-supply = <&vcc3v3_sys>; - }; - - vbus_typec: vbus-typec { - compatible = "regulator-fixed"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vbus_typec"; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - pinctrl-names = "default"; - pinctrl-0 = <&power_key>; - - power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; - linux,code = ; - wakeup-source; - }; - }; - - leds: gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&leds_gpio>; - - status { - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - label = "status_led"; - linux,default-trigger = "heartbeat"; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_reg_on_h>; - reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - }; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_b>; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_l>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_l>; -}; - -&emmc_phy { - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc3v3_s3>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 100000 50000>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c7>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec>; - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - i2c-scl-rising-time-ns = <160>; - i2c-scl-falling-time-ns = <30>; - status = "okay"; - - vdd_cpu_b: regulator@40 { - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&cpu_b_sleep>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd_cpu_b"; - regulator-ramp-delay = <1000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: regulator@41 { - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&gpu_sleep>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd_gpu"; - regulator-ramp-delay = <1000>; - vin-supply = <&vcc3v3_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - clock-output-names = "xin32k", "rtc_clko_wifi"; - #clock-cells = <1>; - interrupt-parent = <&gpio1>; - interrupts = <21 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - vcc10-supply = <&vcc3v3_sys>; - vcc11-supply = <&vcc3v3_sys>; - vcc12-supply = <&vcc3v3_sys>; - vddio-supply = <&vcc_3v0>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_center"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_cpu_l"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_ddr"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_cam: LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_cam"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v0_touch: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc3v0_touch"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc1v8_pmupll: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc1v8_pmupll"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <3000000>; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_sdio"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcca3v0_codec"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc_1v5"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_codec"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc_3v0"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_s3"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&i2c1 { - clock-frequency = <200000>; - i2c-scl-rising-time-ns = <150>; - i2c-scl-falling-time-ns = <30>; - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&i2c7 { - status = "okay"; -}; - -&io_domains { - bt656-supply = <&vcc_1v8>; - audio-supply = <&vcca1v8_codec>; - sdmmc-supply = <&vcc_sdio>; - gpio1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pcie_phy { - assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; - assigned-clock-rates = <100000000>; - assigned-clocks = <&cru SCLK_PCIEPHY_REF>; - status = "okay"; -}; - -&pcie0 { - ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; - max-link-speed = <2>; - num-lanes = <4>; - status = "okay"; -}; - -&pinctrl { - fusb30x { - fusb0_int: fusb0-int { - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gpio-leds { - leds_gpio: leds-gpio { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - ethernet-phy { - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - pmic { - cpu_b_sleep: cpu-b-sleep { - rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - gpu_sleep: gpu-sleep { - rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rockchip-key { - power_key: power-key { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdio { - bt_host_wake_l: bt-host-wake-l { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_reg_on_h: bt-reg-on-h { - /* external pullup to VCC1V8_PMUPLL */ - rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - bt_wake_l: bt-wake-l { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wifi_reg_on_h: wifi-reg_on-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - sdmmc0_det_l: sdmmc0-det-l { - rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - sdmmc0_pwr_h: sdmmc0-pwr-h { - rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmu1830-supply = <&vcc_3v0>; - status = "okay"; -}; - -&pwm1 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca1v8_s3>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - cap-mmc-highspeed; - cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v0_sd>; - vqmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&tcphy0 { - status = "okay"; -}; - -&tcphy1 { - status = "okay"; -}; - -&tsadc { - /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-mode = <1>; - /* tshut polarity 0:LOW 1:HIGH */ - rockchip,hw-tshut-polarity = <1>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; -}; - -&u2phy0_host { - status = "okay"; -}; - -&u2phy0_otg { - status = "okay"; -}; - -&u2phy1 { - status = "okay"; -}; - -&u2phy1_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd3_1 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - dr_mode = "host"; - status = "okay"; -}; - -&usbdrd_dwc3_1 { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; - diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-opp.dtsi b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-opp.dtsi deleted file mode 100644 index 0c700e32d..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-opp.dtsi +++ /dev/null @@ -1,152 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd - * - * Copyright (c) 2020 Tianling Shen - * Copyright (c) 2020 gzelvis - */ - -/ { - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <800000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <800000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <850000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <925000>; - }; - opp04 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1000000>; - }; - opp05 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1125000>; - }; - opp06 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <1225000>; - }; - opp07 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1275000>; - }; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <800000>; - clock-latency-ns = <40000>; - }; - opp01 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <800000>; - }; - opp02 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <825000>; - }; - opp03 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <875000>; - }; - opp04 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <950000>; - }; - opp05 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1025000>; - }; - opp06 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <1100000>; - }; - opp07 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1200000>; - }; - opp08 { - opp-hz = /bits/ 64 <2016000000>; - opp-microvolt = <1250000>; - }; - opp09 { - opp-hz = /bits/ 64 <2208000000>; - opp-microvolt = <1325000>; - }; - }; - - gpu_opp_table: opp-table-2 { - compatible = "operating-points-v2"; - - opp00 { - opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <800000>; - }; - opp01 { - opp-hz = /bits/ 64 <297000000>; - opp-microvolt = <800000>; - }; - opp02 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <825000>; - }; - opp03 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <875000>; - }; - opp04 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <925000>; - }; - opp05 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <1100000>; - }; - }; -}; - -&cpu_l0 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l1 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l2 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_l3 { - operating-points-v2 = <&cluster0_opp>; -}; - -&cpu_b0 { - operating-points-v2 = <&cluster1_opp>; -}; - -&cpu_b1 { - operating-points-v2 = <&cluster1_opp>; -}; - -&gpu { - operating-points-v2 = <&gpu_opp_table>; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts deleted file mode 100644 index f6e7710a0..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts +++ /dev/null @@ -1,19 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Akash Gajjar - * Copyright (c) 2019 Pragnesh Patel - */ - -/* TODO - * Delete this file and migrate RockPi 4 to RockPi 4A after - * removing Kernel 5.4. - */ - - -/dts-v1/; -#include "rk3399-rock-pi-4.dtsi" - -/ { - model = "Radxa ROCK Pi 4"; - compatible = "radxa,rockpi4", "rockchip,rk3399"; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-fastrhino.dtsi b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-fastrhino.dtsi deleted file mode 100644 index 4aeafbc11..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-fastrhino.dtsi +++ /dev/null @@ -1,524 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -/dts-v1/; -#include -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - aliases { - led-boot = &power_led; - led-failsafe = &power_led; - led-running = &power_led; - led-upgrade = &power_led; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&power_led_pin>; - - power_led: led-power { - label = "green:power"; - gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&reset_button_pin>; - - reset { - debounce-interval = <50>; - gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; - label = "reset"; - linux,code = ; - }; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_sys"; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb_host"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; - regulator-always-on; - regulator-boot-on; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <950000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-init-microvolt = <950000>; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - }; -}; - -&gic { - mbi-ranges = <94 31>, <229 31>, <289 31>; -}; - -&pcie30phy { - data-lanes = <1 2>; - status = "okay"; -}; - -&pcie3x1 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; - - pcie@10 { - reg = <0x00100000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - rtl8125_1: pcie-eth@10,0 { - compatible = "pci10ec,8125"; - reg = <0x000000 0 0 0 0>; - - realtek,led-data = <0x4078>; - }; - }; -}; - -&pcie3x2 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; - - pcie@20 { - reg = <0x00200000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - rtl8125_2: pcie-eth@20,0 { - compatible = "pci10ec,8125"; - reg = <0x000000 0 0 0 0>; - - realtek,led-data = <0x4078>; - }; - }; -}; - -&pinctrl { - gpio-leds { - power_led_pin: power-led-pin { - rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rockchip-key { - reset_button_pin: reset-button-pin { - rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&rng { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - dr_mode = "host"; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-mrkaio-m68s.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-mrkaio-m68s.dts deleted file mode 100644 index e309d7fd1..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-mrkaio-m68s.dts +++ /dev/null @@ -1,580 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "EZPRO Mrkaio M68S"; - compatible = "ezpro,mrkaio-m68s", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - - led-boot = &led_sys; - led-failsafe = &led_sys; - led-running = &led_sys; - led-upgrade = &led_sys; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_sata_en>, <&led_sys_en>; - - sata { - label = "blue:sata"; - gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; - }; - - led_sys: sys { - label = "red:sys"; - gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; - }; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-name = "dc_12v"; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_sys"; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_sys"; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_host_en>; - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc5v0_usb_host"; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc5v0_usb_otg"; - }; - - vcc5v0_ahci: vcc5v0-ahci { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&sata_pwr_en>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_ahci"; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - snps,reset-gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x3c>; - rx_delay = <0x2f>; - phy-handle = <&rgmii_phy0>; - status = "okay"; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - snps,reset-gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x42>; - rx_delay = <0x28>; - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1390000>; - regulator-name = "vdd_cpu"; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_logic"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_gpu"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-name = "vcc_ddr"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_npu"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_image"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda_0v9"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_acodec"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca_1v8"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_image"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_3v3"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&mdio0 { - rgmii_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&pinctrl { - leds { - led_sata_en: led_sata_en { - rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - led_sys_en: led_sys_en { - rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sata { - sata_pwr_en: sata-pwr-en { - rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_usb_host_en: vcc5v0_usb_host_en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sata2 { - target-supply = <&vcc5v0_ahci>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts deleted file mode 100644 index 3cda9452d..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts +++ /dev/null @@ -1,825 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - - -/dts-v1/; -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "FriendlyElec NanoPi R5S"; - compatible = "friendlyelec,nanopi-r5s", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - led-boot = &sys_led; - led-failsafe = &sys_led; - led-running = &sys_led; - led-upgrade = &sys_led; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - cooling-levels = <0 18 102 170 255>; - #cooling-cells = <2>; - fan-supply = <&vcc5v0_sysp>; - pwms = <&pwm0 0 50000 0>; - }; - - firmware { - optee: optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - cspmu: cspmu@fd90c000 { - compatible = "rockchip,cspmu"; - reg = <0x0 0xfd90c000 0x0 0x1000>, - <0x0 0xfd90d000 0x0 0x1000>, - <0x0 0xfd90e000 0x0 0x1000>, - <0x0 0xfd90f000 0x0 0x1000>; - }; - - gpio-key { - compatible = "gpio-key"; - pinctrl-names = "default"; - pinctrl-0 = <&key1_pin>; - - button@1 { - debounce-interval = <50>; - gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; - wakeup-source; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - sys_led: led-sys { - gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; - label = "red:power"; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&sys_led_pin>; - }; - - wan_led: led-wan { - gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - label = "green:wan"; - pinctrl-names = "default"; - pinctrl-0 = <&wan_led_pin>; - }; - - lan1_led: led-lan1 { - gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; - label = "green:lan1"; - pinctrl-names = "default"; - pinctrl-0 = <&lan1_led_pin>; - }; - - lan2_led: led-lan2 { - gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>; - label = "green:lan2"; - pinctrl-names = "default"; - pinctrl-0 = <&lan2_led_pin>; - }; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - vdd_usbc: vdd-usbc { - compatible = "regulator-fixed"; - regulator-name = "vdd_usbc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vdd_usbc>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vdd_usbc>; - }; - - pcie30_avdd0v9: pcie30-avdd0v9 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - pcie30_avdd1v8: pcie30-avdd1v8 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - startup-delay-us = <200000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - startup-delay-us = <50000>; - vin-supply = <&vcc3v3_pcie>; - }; - - vcc3v3_ngff: vcc3v3-ngff-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_ngff"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>; - startup-delay-us = <50000>; - vin-supply = <&vcc3v3_pcie>; - }; - - vcc5v0_usb: vcc5v0_usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vdd_usbc>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_host_en>; - regulator-name = "vcc5v0_usb_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_sysp: vcc5v0-sysp { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sysp"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gmac0 { - phy-mode = "rgmii"; - clock_in_out = "output"; - - snps,reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - - tx_delay = <0x3c>; - rx_delay = <0x2f>; - - phy-handle = <&rgmii_phy0>; - status = "okay"; -}; - - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - regulator-always-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - - -&i2c5 { - status = "okay"; - - hym8563: hym8563@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - pinctrl-names = "default"; - pinctrl-0 = <&rtc_int>; - interrupt-parent = <&gpio0>; - interrupts = ; - wakeup-source; - }; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&i2s1_8ch { - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - - -&mdio0 { - rgmii_phy0: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x1>; - interrupt-parent = <&gpio0>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&gmac_int>; - }; -}; - -&pcie30phy { - data-lanes = <1 2>; - status = "okay"; -}; - -&pcie3x1 { - num-lanes = <1>; - reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_ngff>; - status = "okay"; -}; - -&pcie3x2 { - num-lanes = <1>; - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pcie2x1 { - num-viewport = <4>; - reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&pinctrl { - gpio-leds { - - sys_led_pin: sys-led-pin { - rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - lan1_led_pin: lan1-led-pin { - rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - lan2_led_pin: lan2-led-pin { - rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - gmac { - gmac_int: gmac-int { - rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gpio-key { - key1_pin: key1-pin { - rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rtc { - rtc_int: rtc-int { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_usb_host_en: vcc5v0-usb-host-en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_usb_otg_en: vcc5v0-usb-otg-en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm4 { - status = "disabled"; -}; - -&pwm5 { - status = "disabled"; -}; - -&pwm7 { - status = "disabled"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sata2 { - status = "disabled"; -}; - -&sdhci { - bus-width = <8>; - non-removable; - max-frequency = <200000000>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; - status = "okay"; -}; - -&sdmmc0 { - max-frequency = <150000000>; - no-sdio; - no-mmc; - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - status = "okay"; -}; - -&spi3 { - pinctrl-0 = <&spi3m1_pins>; - status = "disabled"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart0 { - status = "disabled"; -}; - -&uart2 { - status = "okay"; -}; - -&uart7 { - pinctrl-0 = <&uart7m1_xfer>; - status = "disabled"; -}; - -&uart9 { - pinctrl-0 = <&uart9m1_xfer>; - status = "disabled"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - status = "okay"; -}; - -&usb2phy1_otg { - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; \ No newline at end of file diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts deleted file mode 100644 index 644d635d4..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts +++ /dev/null @@ -1,635 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -// Copyright (c) 2022 AmadeusGhost - -/dts-v1/; - -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "HINLINK OPC-H68K Board"; - compatible = "hinlink,opc-h68k", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - - led-boot = &led_work; - led-failsafe = &led_work; - led-running = &led_work; - led-upgrade = &led_work; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-name = "dc_12v"; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_sys"; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_sys"; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb: vcc5v0-usb { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_usb"; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_host_en>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_usb_host"; - vin-supply = <&vcc5v0_usb>; - }; - - vcc3v3_pcie: gpio-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_pcie"; - startup-delay-us = <5000>; - vin-supply = <&dc_12v>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_net_en>, <&led_user_en>, <&led_work_en>; - - net { - label = "blue:net"; - gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; - }; - - user { - label = "amber:user"; - gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; - }; - - led_work: work { - label = "green:work"; - gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; - }; - }; - - rk809-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "Analog RK809"; - simple-audio-card,mclk-fs = <256>; - - simple-audio-card,cpu { - sound-dai = <&i2s1_8ch>; - }; - simple-audio-card,codec { - sound-dai = <&rk809>; - }; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x3c>; - rx_delay = <0x2f>; - phy-handle = <&rgmii_phy0>; - status = "okay"; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x4f>; - rx_delay = <0x26>; - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - #clock-cells = <1>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - wakeup-source; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_logic"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-always-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_gpu"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-name = "vcc_ddr"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_npu"; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda_0v9"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_acodec"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca_1v8"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_pmu"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_image"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - codec { - mic-in-differential; - }; - }; -}; - -&i2s1_8ch { - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&mdio0 { - rgmii_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&pcie2x1 { - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pcie30phy { - data-lanes = <1 2>; - status = "okay"; -}; - -&pcie3x1 { - num-lanes = <1>; - reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; - - pcie@10 { - reg = <0x00100000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - rtl8125_1: pcie-eth@10,0 { - compatible = "pci10ec,8125"; - reg = <0x000000 0 0 0 0>; - }; - }; -}; - -&pcie3x2 { - num-lanes = <1>; - rockchip,init-delay-ms = <100>; - reset-gpios = <&gpio2 RK_PD0 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; - - pcie@20 { - reg = <0x00200000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - rtl8125_2: pcie-eth@20,0 { - compatible = "pci10ec,8125"; - reg = <0x000000 0 0 0 0>; - }; - }; -}; - -&pinctrl { - leds { - led_net_en: led_net_en { - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - led_user_en: led_user_en { - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - led_work_en: led_work_en { - rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_usb_host_en: vcc5v0_usb_host_en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts deleted file mode 100644 index 60733c123..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts +++ /dev/null @@ -1,26 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include "rk3568-fastrhino.dtsi" - -/ { - model = "FastRhino R66S"; - compatible = "fastrhino,r66s", "rockchip,rk3568"; - - aliases { - mmc0 = &sdmmc0; - }; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r68s.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r68s.dts deleted file mode 100644 index 020b7f015..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r68s.dts +++ /dev/null @@ -1,83 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include "rk3568-fastrhino.dtsi" - -/ { - model = "FastRhino R68S"; - compatible = "fastrhino,r68s", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdhci; - }; -}; - -&gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x3c>; - rx_delay = <0x2f>; - phy-handle = <&rgmii_phy0>; - status = "okay"; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - snps,reset-gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x4f>; - rx_delay = <0x26>; - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&mdio0 { - rgmii_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status = "okay"; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts deleted file mode 100644 index 6b5093a1a..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +++ /dev/null @@ -1,617 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "Radxa ROCK3 Model A"; - compatible = "radxa,rock3a", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led_user: led-0 { - gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; - function = LED_FUNCTION_HEARTBEAT; - color = ; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&led_user_en>; - }; - }; - - rk809-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "Analog RK809"; - simple-audio-card,mclk-fs = <256>; - - simple-audio-card,cpu { - sound-dai = <&i2s1_8ch>; - }; - - simple-audio-card,codec { - sound-dai = <&rk809>; - }; - }; - - vcc12v_dcin: vcc12v-dcin { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usb: vcc5v0-usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_host_en>; - regulator-name = "vcc5v0_usb_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_usb_hub: vcc5v0-usb-hub-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_hub_en>; - regulator-name = "vcc5v0_usb_hub"; - regulator-always-on; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-handle = <&rgmii_phy1>; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - #clock-cells = <1>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - - codec { - mic-in-differential; - }; - }; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&i2s1_8ch { - rockchip,trcm-sync-tx-only; - status = "okay"; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - pinctrl-names = "default"; - pinctrl-0 = <ð_phy_rst>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; - }; -}; - -&pinctrl { - ethernet { - eth_phy_rst: eth_phy_rst { - rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - leds { - led_user_en: led_user_en { - rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_usb_host_en: vcc5v0_usb_host_en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc5v0_usb_hub_en: vcc5v0_usb_hub_en { - rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - vbus-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts deleted file mode 100644 index 3883c1827..000000000 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts +++ /dev/null @@ -1,787 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - * - */ - -/dts-v1/; - -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "Firefly Station P2"; - compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac0_clkin: external-gmac0-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac0_clkin"; - #clock-cells = <0>; - }; - - gmac1_clkin: external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - - power_led: power { - label = "firefly:blue:power"; - linux,default-trigger = "ir-power-click"; - default-state = "on"; - gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&led_power>; - }; - - user_led: user { - label = "firefly:yellow:user"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; - gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&led_user>; - }; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - sdio_pwrseq: sdio-pwrseq { - status = "okay"; - compatible = "mmc-pwrseq-simple"; - clocks = <&rk809 1>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; - post-power-on-delay-ms = <100>; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb: vcc5v0-usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - pcie30_avdd0v9: pcie30-avdd0v9 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - pcie30_avdd1v8: pcie30-avdd1v8 { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_pcie: vcc3v3_pi6c: vcc3v3-pcie { - compatible = "regulator-fixed"; - regulator-always-on; - enable-active-high; - gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_enable_h>; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host: vcc5v0-host { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_otg: vcc5v0-otg { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_otg"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_otg_en>; - vin-supply = <&vcc5v0_usb>; - }; - - vcc_hub_reset: vcc-hub-reset { - compatible = "regulator-fixed"; - regulator-name = "vcc_hub_reset"; - enable-active-high; - gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_hub_reset_en>; - regulator-always-on; - }; - - pcie_pi6c_oe: pcie-pi6c-oe { - compatible = "regulator-fixed"; - regulator-name = "pcie_pi6c_oe_en"; - gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_pi6c_oe_en>; - regulator-always-on; - }; - - vcc3v3_lcd0_n: vcc3v3-lcd0-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd0_n"; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_lcd1_n: vcc3v3-lcd1-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd1_n"; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&gmac0 { - phy-mode = "rgmii"; - clock_in_out = "input"; - - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus - &gmac0_clkinout>; - - tx_delay = <0x3c>; - rx_delay = <0x2f>; - - phy-handle = <&rgmii_phy0>; - status = "okay"; -}; - -&gmac1 { - phy-mode = "rgmii"; - clock_in_out = "input"; - - snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus - &gmac1m1_clkinout>; - - tx_delay = <0x4f>; - rx_delay = <0x26>; - - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&hdmi { - status = "okay"; - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - assigned-clocks = <&cru I2S1_MCLKOUT_TX>; - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; - #clock-cells = <1>; - clock-names = "mclk"; - clocks = <&cru I2S1_MCLKOUT_TX>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - #sound-dai-cells = <0>; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&mdio0 { - rgmii_phy0: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&mdio1 { - rgmii_phy1: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&pinctrl { - leds { - led_power: led-power { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - led_user: led-user { - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc5v0_otg_en: vcc5v0-otg-en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc_hub_reset_en: vcc-hub-reset-en { - rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - fusb0_int { - fusb0_int: fusb0-int { - rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - - pcie { - pcie_enable_h: pcie-enable-h { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_reset_h: pcie-reset-h { - rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie_pi6c_oe_en: pcie-pi6c-oe-en { - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic_int { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&sdmmc2 { - max-frequency = <150000000>; - supports-sdio; - bus-width = <4>; - disable-wp; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; - sd-uhs-sdr104; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&vop { - status = "okay"; - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; -}; - -&vop_mmu { - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&combphy2 { - status = "okay"; -}; - -&sata2 { - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x2{ - pinctrl-names = "default"; - pinctrl-0 = <&pcie_reset_h>; - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; diff --git a/target/linux/rockchip/files-5.19/drivers/phy/rockchip/p3phy.fw b/target/linux/rockchip/files-5.19/drivers/phy/rockchip/p3phy.fw deleted file mode 100644 index 301c42837..000000000 --- a/target/linux/rockchip/files-5.19/drivers/phy/rockchip/p3phy.fw +++ /dev/null @@ -1,8192 +0,0 @@ -0x081D, -0xFFFF, -0x33AF, -0x33AE, -0x0C4F, -0xD10D, -0x0D0F, -0xD306, -0x0C8F, -0xDB06, -0x33AF, -0xD38D, -0x01AC, -0x2000, -0x0C1E, -0x014A, -0x2800, -0x1B80, -0xA0B2, -0x0806, -0x0016, -0x8CC7, -0xD1AE, -0x0C2E, -0x1B75, -0x33AE, -0xA01C, -0x8026, -0x0C2F, -0xD375, -0x33AF, -0x1B81, -0xA022, -0x8026, -0x0D8F, -0x03A6, -0x0003, -0x33AF, -0x0C6F, -0xDBA6, -0x33AF, -0x0C4F, -0xD10D, -0x33AF, -0x0D8F, -0xDBA6, -0x33AF, -0x1B81, -0xA032, -0x8048, -0xDB87, -0x038D, -0x0020, -0xD310, -0x080F, -0x0020, -0xD106, -0x33AF, -0xDB8B, -0xDB8C, -0x1B0F, -0xA03A, -0x0807, -0x0044, -0x33FE, -0x0C01, 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0x80 -#define SRAM_INIT_DONE(reg) (reg & BIT(14)) - -#define RK3568_BIFURCATION_LANE_0_1 BIT(0) - -/* Register for RK3588 */ -#define PHP_GRF_PCIESEL_CON 0x100 -#define RK3588_PCIE3PHY_GRF_CMN_CON0 0x0 -#define RK3588_PCIE3PHY_GRF_PHY0_STATUS1 0x904 -#define RK3588_PCIE3PHY_GRF_PHY1_STATUS1 0xa04 -#define RK3588_SRAM_INIT_DONE(reg) (reg & BIT(0)) - -#define RK3588_BIFURCATION_LANE_0_1 BIT(0) -#define RK3588_BIFURCATION_LANE_2_3 BIT(1) -#define RK3588_LANE_AGGREGATION BIT(2) - -struct rockchip_p3phy_ops; - -struct rockchip_p3phy_priv { - const struct rockchip_p3phy_ops *ops; - void __iomem *mmio; - /* mode: RC, EP */ - int mode; - /* pcie30_phymode: Aggregation, Bifurcation */ - int pcie30_phymode; - struct regmap *phy_grf; - struct regmap *pipe_grf; - struct reset_control *p30phy; - struct phy *phy; - struct clk_bulk_data *clks; - int num_clks; - int num_lanes; - u32 lanes[4]; -}; - -struct rockchip_p3phy_ops { - int (*phy_init)(struct rockchip_p3phy_priv *priv); -}; - -static u16 phy_fw[] = { - #include "p3phy.fw" -}; - -static int rockchip_p3phy_set_mode(struct phy *phy, enum phy_mode mode, int submode) -{ - struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy); - - /* Actually We don't care EP/RC mode, but just record it */ - switch (submode) { - case PHY_MODE_PCIE_RC: - priv->mode = PHY_MODE_PCIE_RC; - break; - case PHY_MODE_PCIE_EP: - priv->mode = PHY_MODE_PCIE_EP; - break; - default: - dev_err(&phy->dev, "%s, invalid mode\n", __func__); - return -EINVAL; - } - - return 0; -} - -static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv) -{ - struct phy *phy = priv->phy; - bool bifurcation = false; - int ret; - int i; - u32 reg; - - /* Deassert PCIe PMA output clamp mode */ - regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, BIT(15) | BIT(31)); - - for (i = 0; i < priv->num_lanes; i++) { - dev_info(&phy->dev, "lane number %d, val %d\n", i, priv->lanes[i]); - if (priv->lanes[i] > 1) - bifurcation = true; - } - - /* Set bifurcation if needed, and it doesn't care RC/EP */ - if (bifurcation) { - dev_info(&phy->dev, "bifurcation enabled\n"); - regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6, - (0xf << 16) | RK3568_BIFURCATION_LANE_0_1); - regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON1, - BIT(15) | BIT(31)); - } else { - dev_info(&phy->dev, "bifurcation disabled\n"); - regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6, - (0xf << 16) & ~RK3568_BIFURCATION_LANE_0_1); - } - - regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON4, - (0x0 << 14) | (0x1 << (14 + 16))); //sdram_ld_done - regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON4, - (0x0 << 13) | (0x1 << (13 + 16))); //sdram_bypass - - reset_control_deassert(priv->p30phy); - - ret = regmap_read_poll_timeout(priv->phy_grf, - GRF_PCIE30PHY_STATUS0, - reg, SRAM_INIT_DONE(reg), - 0, 500); - if (ret) { - dev_err(&priv->phy->dev, "%s: lock failed 0x%x, check input refclk and power supply\n", - __func__, reg); - return ret; - } - - regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, - (0x3 << 8) | (0x3 << (8 + 16))); //map to access sram - for (i = 0; i < 8192; i++) - writel(phy_fw[i], priv->mmio + (i<<2)); - - regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, - (0x0 << 8) | (0x3 << (8 + 16))); - regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON4, - (0x1 << 14) | (0x1 << (14 + 16))); //sdram_ld_done - - dev_info(&priv->phy->dev, "p3phy (fw-d54d0eb) initialized\n"); - return 0; -} - -static const struct rockchip_p3phy_ops rk3568_ops = { - .phy_init = rockchip_p3phy_rk3568_init, -}; - -static int rockchip_p3phy_rk3588_init(struct rockchip_p3phy_priv *priv) -{ - u32 reg = 0; - u8 mode = 0; - int ret; - int i; - - /* Deassert PCIe PMA output clamp mode */ - regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, BIT(8) | BIT(24)); - - /* Set bifurcation if needed */ - for (i = 0; i < priv->num_lanes; i++) { - if (!priv->lanes[i]) - mode |= (BIT(i) << 3); - - if (priv->lanes[i] > 1) - mode |= (BIT(i) >> 1); - } - - if (!mode) - reg = RK3588_LANE_AGGREGATION; - else { - if (mode & (BIT(0) | BIT(1))) - reg |= RK3588_BIFURCATION_LANE_0_1; - - if (mode & (BIT(2) | BIT(3))) - reg |= RK3588_BIFURCATION_LANE_2_3; - } - - regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, (0x7<<16) | reg); - - /* Set pcie1ln_sel in PHP_GRF_PCIESEL_CON */ - if (!IS_ERR(priv->pipe_grf)) { - reg = (mode & (BIT(6) | BIT(7))) >> 6; - if (reg) - regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON, - (reg << 16) | reg); - } - - reset_control_deassert(priv->p30phy); - - ret = regmap_read_poll_timeout(priv->phy_grf, - RK3588_PCIE3PHY_GRF_PHY0_STATUS1, - reg, RK3588_SRAM_INIT_DONE(reg), - 0, 500); - ret |= regmap_read_poll_timeout(priv->phy_grf, - RK3588_PCIE3PHY_GRF_PHY1_STATUS1, - reg, RK3588_SRAM_INIT_DONE(reg), - 0, 500); - if (ret) - pr_err("%s: lock failed 0x%x, check input refclk and power supply\n", - __func__, reg); - return ret; -} - -static const struct rockchip_p3phy_ops rk3588_ops = { - .phy_init = rockchip_p3phy_rk3588_init, -}; - -static int rochchip_p3phy_init(struct phy *phy) -{ - struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy); - int ret; - - ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks); - if (ret) { - pr_err("failed to enable PCIe bulk clks %d\n", ret); - return ret; - } - - reset_control_assert(priv->p30phy); - udelay(1); - - if (priv->ops->phy_init) { - ret = priv->ops->phy_init(priv); - if (ret) - clk_bulk_disable_unprepare(priv->num_clks, priv->clks); - } - - return ret; -} - -static int rochchip_p3phy_exit(struct phy *phy) -{ - struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy); - - clk_bulk_disable_unprepare(priv->num_clks, priv->clks); - reset_control_assert(priv->p30phy); - return 0; -} - -static const struct phy_ops rochchip_p3phy_ops = { - .init = rochchip_p3phy_init, - .exit = rochchip_p3phy_exit, - .set_mode = rockchip_p3phy_set_mode, - .owner = THIS_MODULE, -}; - -static int rockchip_p3phy_probe(struct platform_device *pdev) -{ - struct phy_provider *phy_provider; - struct device *dev = &pdev->dev; - struct rockchip_p3phy_priv *priv; - struct device_node *np = dev->of_node; - struct resource *res; - int ret; - - priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->mmio = devm_ioremap_resource(dev, res); - if (IS_ERR(priv->mmio)) { - ret = PTR_ERR(priv->mmio); - return ret; - } - - priv->ops = of_device_get_match_data(&pdev->dev); - if (!priv->ops) { - dev_err(&pdev->dev, "no of match data provided\n"); - return -EINVAL; - } - - priv->phy_grf = syscon_regmap_lookup_by_phandle(np, "rockchip,phy-grf"); - if (IS_ERR(priv->phy_grf)) { - dev_err(dev, "failed to find rockchip,phy_grf regmap\n"); - return PTR_ERR(priv->phy_grf); - } - - priv->pipe_grf = syscon_regmap_lookup_by_phandle(dev->of_node, - "rockchip,pipe-grf"); - if (IS_ERR(priv->pipe_grf)) - dev_info(dev, "failed to find rockchip,pipe_grf regmap\n"); - - priv->num_lanes = of_property_read_variable_u32_array(dev->of_node, "data-lanes", - priv->lanes, 2, - ARRAY_SIZE(priv->lanes)); - - /* if no data-lanes assume aggregation */ - if (priv->num_lanes == -EINVAL) { - dev_dbg(dev, "no data-lanes property found\n"); - priv->num_lanes = 1; - priv->lanes[0] = 1; - } else if (priv->num_lanes < 0) { - dev_err(dev, "failed to read data-lanes property %d\n", priv->num_lanes); - return priv->num_lanes; - } - - priv->phy = devm_phy_create(dev, NULL, &rochchip_p3phy_ops); - if (IS_ERR(priv->phy)) { - dev_err(dev, "failed to create combphy\n"); - return PTR_ERR(priv->phy); - } - - priv->p30phy = devm_reset_control_get_optional_exclusive(dev, "phy"); - if (IS_ERR(priv->p30phy)) { - return dev_err_probe(dev, PTR_ERR(priv->p30phy), - "failed to get phy reset control\n"); - } - if (!priv->p30phy) - dev_info(dev, "no phy reset control specified\n"); - - priv->num_clks = devm_clk_bulk_get_all(dev, &priv->clks); - if (priv->num_clks < 1) - return -ENODEV; - - dev_set_drvdata(dev, priv); - phy_set_drvdata(priv->phy, priv); - phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); - return PTR_ERR_OR_ZERO(phy_provider); -} - -static const struct of_device_id rockchip_p3phy_of_match[] = { - { .compatible = "rockchip,rk3568-pcie3-phy", .data = &rk3568_ops }, - { .compatible = "rockchip,rk3588-pcie3-phy", .data = &rk3588_ops }, - { }, -}; -MODULE_DEVICE_TABLE(of, rockchip_p3phy_of_match); - -static struct platform_driver rockchip_p3phy_driver = { - .probe = rockchip_p3phy_probe, - .driver = { - .name = "rockchip-snps-pcie3-phy", - .of_match_table = rockchip_p3phy_of_match, - }, -}; -module_platform_driver(rockchip_p3phy_driver); -MODULE_DESCRIPTION("Rockchip Synopsys PCIe 3.0 PHY driver"); -MODULE_LICENSE("GPL"); diff --git a/target/linux/rockchip/files-5.19/include/linux/phy/pcie.h b/target/linux/rockchip/files-5.19/include/linux/phy/pcie.h deleted file mode 100644 index 93c997f52..000000000 --- a/target/linux/rockchip/files-5.19/include/linux/phy/pcie.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ -#ifndef __PHY_PCIE_H -#define __PHY_PCIE_H - -#define PHY_MODE_PCIE_RC 20 -#define PHY_MODE_PCIE_EP 21 -#define PHY_MODE_PCIE_BIFURCATION 22 - -#endif diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3399-doornet2-4gb.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3399-doornet2-4gb.dts deleted file mode 100644 index dbbe3758c..000000000 --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3399-doornet2-4gb.dts +++ /dev/null @@ -1,113 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; -#include "rk3399-doornet2.dtsi" - -/ { - model = "EmbedFire DoorNet2-4GB"; - compatible = "embedfire,doornet2", "rockchip,rk3399"; - - aliases { - led-boot = &sys_led; - led-failsafe = &sys_led; - led-running = &sys_led; - led-upgrade = &sys_led; - }; - - /delete-node/ display-subsystem; - - gpio-leds { - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - - /delete-node/ status; - - lan_led: led-lan { - gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; - label = "green:lan"; - }; - - sys_led: led-sys { - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - label = "red:sys"; - default-state = "on"; - }; - - wan_led: led-wan { - gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - label = "green:wan"; - }; - }; - - gpio-keys { - pinctrl-0 = <&reset_button_pin>; - - /delete-node/ power; - - reset { - debounce-interval = <50>; - gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; - label = "reset"; - linux,code = ; - }; - }; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - }; -}; - -&pcie0 { - max-link-speed = <1>; - num-lanes = <1>; - vpcie3v3-supply = <&vcc3v3_sys>; - - pcie@0 { - reg = <0x00000000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - pcie-eth@0,0 { - compatible = "realtek,r8168"; - reg = <0x000000 0 0 0 0>; - - realtek,led-data = <0x870>; - }; - }; -}; - -&pinctrl { - gpio-leds { - /delete-node/ leds-gpio; - - lan_led_pin: lan-led-pin { - rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - rockchip-key { - /delete-node/ power-key; - - reset_button_pin: reset-button-pin { - rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&u2phy0_host { - phy-supply = <&vdd_5v>; -}; - -&vcc3v3_sys { - vin-supply = <&vcc5v0_sys>; -}; diff --git a/target/linux/rockchip/files/drivers/net/phy/motorcomm.c b/target/linux/rockchip/files/drivers/net/phy/motorcomm.c deleted file mode 100644 index 1941785e2..000000000 --- a/target/linux/rockchip/files/drivers/net/phy/motorcomm.c +++ /dev/null @@ -1,450 +0,0 @@ -/* - * drivers/net/phy/motorcomm.c - * - * Driver for Motorcomm PHYs - * - * Author: Leilei Zhao - * - * Copyright (c) 2019 Motorcomm, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Support : Motorcomm Phys: - * Giga phys: yt8511, yt8521 - * 100/10 Phys : yt8512, yt8512b, yt8510 - * Automotive 100Mb Phys : yt8010 - * Automotive 100/10 hyper range Phys: yt8510 - */ - -#include -#include -#include -#include -#include -#include -#include - -static int ytphy_read_ext(struct phy_device *phydev, u32 regnum) -{ - int ret; - int val; - - ret = phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum); - if (ret < 0) - return ret; - - val = phy_read(phydev, REG_DEBUG_DATA); - - return val; -} - -static int ytphy_write_ext(struct phy_device *phydev, u32 regnum, u16 val) -{ - int ret; - - ret = phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum); - if (ret < 0) - return ret; - - ret = phy_write(phydev, REG_DEBUG_DATA, val); - - return ret; -} - -static int yt8010_config_aneg(struct phy_device *phydev) -{ - phydev->speed = SPEED_100; - return 0; -} - -static int yt8511_config_init(struct phy_device *phydev) -{ - int ret; - int val; - - /* disable auto sleep */ - val = ytphy_read_ext(phydev, YT8511_EXTREG_SLEEP_CONTROL1); - if (val < 0) - return val; - - val &= (~BIT(YT8511_EN_SLEEP_SW_BIT)); - ret = ytphy_write_ext(phydev, YT8511_EXTREG_SLEEP_CONTROL1, val); - if (ret < 0) - return ret; - - /* output SyncE clock (125mhz) even link is down */ - ret = ytphy_write_ext(phydev, 0xa012, 0xd0); - if (ret < 0) - return ret; - - /* enable RXC clock when no wire plug */ - val = ytphy_read_ext(phydev, 0xc); - if (val < 0) - return val; - - /* ext reg 0xc.b[2:1] - 00-----25M from pll; - 01---- 25M from xtl;(default) - 10-----62.5M from pll; - 11----125M from pll(here set to this value) - */ - val |= (3 << 1); - ret = ytphy_write_ext(phydev, 0xc, val); - if (ret < 0) - return ret; - - /* LED0: Unused/Off, LED1: Link, LED2: Activity, 8Hz */ - ytphy_write_ext(phydev, 0xa00b, 0xe004); - ytphy_write_ext(phydev, 0xa00c, 0); - ytphy_write_ext(phydev, 0xa00d, 0x2600); - ytphy_write_ext(phydev, 0xa00e, 0x0070); - ytphy_write_ext(phydev, 0xa00f, 0x000a); - - return 0; -} - -static int yt8512_clk_init(struct phy_device *phydev) -{ - int ret; - int val; - - val = ytphy_read_ext(phydev, YT8512_EXTREG_AFE_PLL); - if (val < 0) - return val; - - val |= YT8512_CONFIG_PLL_REFCLK_SEL_EN; - - ret = ytphy_write_ext(phydev, YT8512_EXTREG_AFE_PLL, val); - if (ret < 0) - return ret; - - val = ytphy_read_ext(phydev, YT8512_EXTREG_EXTEND_COMBO); - if (val < 0) - return val; - - val |= YT8512_CONTROL1_RMII_EN; - - ret = ytphy_write_ext(phydev, YT8512_EXTREG_EXTEND_COMBO, val); - if (ret < 0) - return ret; - - val = phy_read(phydev, MII_BMCR); - if (val < 0) - return val; - - val |= YT_SOFTWARE_RESET; - ret = phy_write(phydev, MII_BMCR, val); - - return ret; -} - -static int yt8512_led_init(struct phy_device *phydev) -{ - int ret; - int val; - int mask; - - val = ytphy_read_ext(phydev, YT8512_EXTREG_LED0); - if (val < 0) - return val; - - val |= YT8512_LED0_ACT_BLK_IND; - - mask = YT8512_LED0_DIS_LED_AN_TRY | YT8512_LED0_BT_BLK_EN | - YT8512_LED0_HT_BLK_EN | YT8512_LED0_COL_BLK_EN | - YT8512_LED0_BT_ON_EN; - val &= ~mask; - - ret = ytphy_write_ext(phydev, YT8512_EXTREG_LED0, val); - if (ret < 0) - return ret; - - val = ytphy_read_ext(phydev, YT8512_EXTREG_LED1); - if (val < 0) - return val; - - val |= YT8512_LED1_BT_ON_EN; - - mask = YT8512_LED1_TXACT_BLK_EN | YT8512_LED1_RXACT_BLK_EN; - val &= ~mask; - - ret = ytphy_write_ext(phydev, YT8512_LED1_BT_ON_EN, val); - - return ret; -} - -static int yt8512_config_init(struct phy_device *phydev) -{ - int ret; - int val; - - ret = yt8512_clk_init(phydev); - if (ret < 0) - return ret; - - ret = yt8512_led_init(phydev); - - /* disable auto sleep */ - val = ytphy_read_ext(phydev, YT8512_EXTREG_SLEEP_CONTROL1); - if (val < 0) - return val; - - val &= (~BIT(YT8512_EN_SLEEP_SW_BIT)); - - ret = ytphy_write_ext(phydev, YT8512_EXTREG_SLEEP_CONTROL1, val); - if (ret < 0) - return ret; - - return ret; -} - -static int yt8512_read_status(struct phy_device *phydev) -{ - int ret; - int val; - int speed, speed_mode, duplex; - - ret = genphy_update_link(phydev); - if (ret) - return ret; - - val = phy_read(phydev, REG_PHY_SPEC_STATUS); - if (val < 0) - return val; - - duplex = (val & YT8512_DUPLEX) >> YT8512_DUPLEX_BIT; - speed_mode = (val & YT8512_SPEED_MODE) >> YT8512_SPEED_MODE_BIT; - switch (speed_mode) { - case 0: - speed = SPEED_10; - break; - case 1: - speed = SPEED_100; - break; - case 2: - case 3: - default: - speed = SPEED_UNKNOWN; - break; - } - - phydev->speed = speed; - phydev->duplex = duplex; - - return 0; -} - -static int yt8521_config_init(struct phy_device *phydev) -{ - int ret; - int val; - - /* disable auto sleep */ - val = ytphy_read_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1); - if (val < 0) - return val; - - val &= (~BIT(YT8521_EN_SLEEP_SW_BIT)); - ret = ytphy_write_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1, val); - if (ret < 0) - return ret; - - /* switch to access UTP */ - ret = ytphy_write_ext(phydev, 0xa000, 0); - if (ret < 0) - return ret; - - /* enable RXC clock when no wire plug */ - val = ytphy_read_ext(phydev, 0xc); - if (val < 0) - return val; - - val &= ~(1 << 12); - ret = ytphy_write_ext(phydev, 0xc, val); - if (ret < 0) - return ret; - - /* output SyncE clock (125mhz) even link is down */ - ret = ytphy_write_ext(phydev, 0xa012, 0x38); - if (ret < 0) - return ret; - - /* disable rgmii clk 2ns delay */ - val = ytphy_read_ext(phydev, 0xa001); - if (val < 0) - return val; - - val &= ~(1 << 8); - ret = ytphy_write_ext(phydev, 0xa001, val); - if (ret < 0) - return ret; - - /* setup delay */ - val = (1 << 10) | (0xf << 4) | 5; - ret = ytphy_write_ext(phydev, 0xa003, val); - if (ret < 0) - return ret; - - /* LED0: Unused/Off, LED1: Link, LED2: Activity, 8Hz */ - ytphy_write_ext(phydev, 0xa00b, 0xe004); - ytphy_write_ext(phydev, 0xa00c, 0); - ytphy_write_ext(phydev, 0xa00d, 0x2600); - ytphy_write_ext(phydev, 0xa00e, 0x0070); - ytphy_write_ext(phydev, 0xa00f, 0x000a); - - return 0; -} - -static int yt8521_config_intr(struct phy_device *phydev) -{ - int val; - - if (phydev->interrupts == PHY_INTERRUPT_ENABLED) - val = BIT(14) | BIT(13) | BIT(11) | BIT(10); - else - val = 0; - - return phy_write(phydev, REG_INT_MASK, val); -} - -#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0) -static int yt8521_ack_interrupt(struct phy_device *phydev) -{ - int val; - - val = phy_read(phydev, REG_INT_STATUS); - phydev_dbg(phydev, "intr status 0x04%x\n", val); - - return (val < 0) ? val : 0; -} -#else -static irqreturn_t yt8521_handle_interrupt(struct phy_device *phydev) -{ - int irq_status, int_enabled; - - irq_status = phy_read(phydev, REG_INT_STATUS); - if (irq_status < 0) { - phy_error(phydev); - return IRQ_NONE; - } - - /* Read the current enabled interrupts */ - int_enabled = phy_read(phydev, REG_INT_MASK); - if (int_enabled < 0) { - phy_error(phydev); - return IRQ_NONE; - } - - /* See if this was one of our enabled interrupts */ - if (!(irq_status & int_enabled)) - return IRQ_NONE; - - phy_trigger_machine(phydev); - - return IRQ_HANDLED; -} -#endif - -static struct phy_driver ytphy_drvs[] = { - { - .phy_id = PHY_ID_YT8010, - .name = "YT8010 Automotive Ethernet", - .phy_id_mask = MOTORCOMM_PHY_ID_MASK, - .features = PHY_BASIC_FEATURES, - .config_aneg = yt8010_config_aneg, - .read_status = genphy_read_status, - }, { - .phy_id = PHY_ID_YT8510, - .name = "YT8510 100/10Mb Ethernet", - .phy_id_mask = MOTORCOMM_PHY_ID_MASK, - .features = PHY_BASIC_FEATURES, - .read_status = genphy_read_status, - }, { - .phy_id = PHY_ID_YT8511, - .name = "YT8511 Gigabit Ethernet", - .phy_id_mask = MOTORCOMM_PHY_ID_MASK, - .features = PHY_GBIT_FEATURES, - .read_status = genphy_read_status, - .suspend = genphy_suspend, - .resume = genphy_resume, - }, { - .phy_id = PHY_ID_YT8512, - .name = "YT8512 Ethernet", - .phy_id_mask = MOTORCOMM_PHY_ID_MASK, - .features = PHY_BASIC_FEATURES, - .config_init = yt8512_config_init, - .read_status = yt8512_read_status, - .suspend = genphy_suspend, - .resume = genphy_resume, - }, { - .phy_id = PHY_ID_YT8512B, - .name = "YT8512B Ethernet", - .phy_id_mask = MOTORCOMM_PHY_ID_MASK, - .features = PHY_BASIC_FEATURES, - .config_init = yt8512_config_init, - .read_status = yt8512_read_status, - .suspend = genphy_suspend, - .resume = genphy_resume, - }, { - .phy_id = PHY_ID_YT8521, - .name = "YT8521 Ethernet", - .phy_id_mask = MOTORCOMM_PHY_ID_MASK, - /* PHY_GBIT_FEATURES */ - .config_init = yt8521_config_init, -#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0) - .ack_interrupt = yt8521_ack_interrupt, -#else - .handle_interrupt = yt8521_handle_interrupt, -#endif - .config_intr = yt8521_config_intr, - .suspend = genphy_suspend, - .resume = genphy_resume, - }, { - /* same as 8521 */ - .phy_id = PHY_ID_YT8531S, - .name = "YT8531S Ethernet", - .phy_id_mask = MOTORCOMM_PHY_ID_MASK, - /* PHY_GBIT_FEATURES */ - .config_init = yt8521_config_init, -#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0) - .ack_interrupt = yt8521_ack_interrupt, -#else - .handle_interrupt = yt8521_handle_interrupt, -#endif - .config_intr = yt8521_config_intr, - .suspend = genphy_suspend, - .resume = genphy_resume, - }, { - /* same as 8511 */ - .phy_id = PHY_ID_YT8531, - .name = "YT8531 Gigabit Ethernet", - .phy_id_mask = MOTORCOMM_PHY_ID_MASK, - .features = PHY_GBIT_FEATURES, - .config_init = yt8511_config_init, - .read_status = genphy_read_status, - .suspend = genphy_suspend, - .resume = genphy_resume, - }, -}; - -module_phy_driver(ytphy_drvs); - -static struct mdio_device_id __maybe_unused motorcomm_tbl[] = { - { PHY_ID_YT8010, MOTORCOMM_PHY_ID_MASK }, - { PHY_ID_YT8510, MOTORCOMM_PHY_ID_MASK }, - { PHY_ID_YT8511, MOTORCOMM_PHY_ID_MASK }, - { PHY_ID_YT8512, MOTORCOMM_PHY_ID_MASK }, - { PHY_ID_YT8512B, MOTORCOMM_PHY_ID_MASK }, - { PHY_ID_YT8521, MOTORCOMM_PHY_ID_MASK }, - { PHY_ID_YT8531S, MOTORCOMM_PHY_ID_8531_MASK }, - { PHY_ID_YT8531, MOTORCOMM_PHY_ID_8531_MASK }, - { } -}; - -MODULE_AUTHOR("Leilei Zhao"); -MODULE_DESCRIPTION("Motorcomm PHY driver"); -MODULE_DEVICE_TABLE(mdio, motorcomm_tbl); -MODULE_LICENSE("GPL"); diff --git a/target/linux/rockchip/files/include/linux/motorcomm_phy.h b/target/linux/rockchip/files/include/linux/motorcomm_phy.h deleted file mode 100644 index 4ef801c81..000000000 --- a/target/linux/rockchip/files/include/linux/motorcomm_phy.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * include/linux/motorcomm_phy.h - * - * Motorcomm PHY IDs - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifndef _MOTORCOMM_PHY_H -#define _MOTORCOMM_PHY_H - -#define MOTORCOMM_PHY_ID_MASK 0x00000fff -#define MOTORCOMM_PHY_ID_8531_MASK 0xffffffff - -#define PHY_ID_YT8010 0x00000309 -#define PHY_ID_YT8510 0x00000109 -#define PHY_ID_YT8511 0x0000010a -#define PHY_ID_YT8512 0x00000118 -#define PHY_ID_YT8512B 0x00000128 -#define PHY_ID_YT8521 0x0000011a -#define PHY_ID_YT8531S 0x4f51e91a -#define PHY_ID_YT8531 0x4f51e91b - -#define REG_PHY_SPEC_STATUS 0x11 -#define REG_INT_MASK 0x12 -#define REG_INT_STATUS 0x13 -#define REG_DEBUG_ADDR_OFFSET 0x1e -#define REG_DEBUG_DATA 0x1f - -#define YT8511_EXTREG_SLEEP_CONTROL1 0x27 -#define YT8511_EN_SLEEP_SW_BIT 15 - -#define YT8512_EXTREG_AFE_PLL 0x50 -#define YT8512_EXTREG_EXTEND_COMBO 0x4000 -#define YT8512_EXTREG_LED0 0x40c0 -#define YT8512_EXTREG_LED1 0x40c3 - -#define YT8512_EXTREG_SLEEP_CONTROL1 0x2027 - -#define YT_SOFTWARE_RESET 0x8000 - -#define YT8512_CONFIG_PLL_REFCLK_SEL_EN 0x0040 -#define YT8512_CONTROL1_RMII_EN 0x0001 -#define YT8512_LED0_ACT_BLK_IND 0x1000 -#define YT8512_LED0_DIS_LED_AN_TRY 0x0001 -#define YT8512_LED0_BT_BLK_EN 0x0002 -#define YT8512_LED0_HT_BLK_EN 0x0004 -#define YT8512_LED0_COL_BLK_EN 0x0008 -#define YT8512_LED0_BT_ON_EN 0x0010 -#define YT8512_LED1_BT_ON_EN 0x0010 -#define YT8512_LED1_TXACT_BLK_EN 0x0100 -#define YT8512_LED1_RXACT_BLK_EN 0x0200 -#define YT8512_SPEED_MODE 0xc000 -#define YT8512_DUPLEX 0x2000 - -#define YT8512_SPEED_MODE_BIT 14 -#define YT8512_DUPLEX_BIT 13 -#define YT8512_EN_SLEEP_SW_BIT 15 - -#define YT8521_EXTREG_SLEEP_CONTROL1 0x27 -#define YT8521_EN_SLEEP_SW_BIT 15 - -#define YT8521_SPEED_MODE 0xc000 -#define YT8521_DUPLEX 0x2000 -#define YT8521_SPEED_MODE_BIT 14 -#define YT8521_DUPLEX_BIT 13 -#define YT8521_LINK_STATUS_BIT 10 - -#endif /* _MOTORCOMM_PHY_H */ diff --git a/target/linux/rockchip/patches-5.19/0000-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch b/target/linux/rockchip/patches-5.19/0000-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch deleted file mode 100644 index 792028b29..000000000 --- a/target/linux/rockchip/patches-5.19/0000-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch +++ /dev/null @@ -1,31 +0,0 @@ -From af20b3384e8723077cc6484160b0cf4e9be321de Mon Sep 17 00:00:00 2001 -From: Tianling Shen -Date: Mon, 7 Jun 2021 15:45:37 +0800 -Subject: [PATCH] arm64: dts: rockchip: add EEPROM node for NanoPi R4S - -NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which -stores the MAC address. - -Signed-off-by: Tianling Shen ---- - arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -68,6 +68,15 @@ - status = "disabled"; - }; - -+&i2c2 { -+ eeprom@51 { -+ compatible = "microchip,24c02", "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ read-only; /* This holds our MAC */ -+ }; -+}; -+ - &i2c4 { - status = "disabled"; - }; diff --git a/target/linux/rockchip/patches-5.19/0001-arm64-dts-rockchip-add-Quartz64-A-fan-pinctrl.patch b/target/linux/rockchip/patches-5.19/0001-arm64-dts-rockchip-add-Quartz64-A-fan-pinctrl.patch deleted file mode 100644 index 745b32033..000000000 --- a/target/linux/rockchip/patches-5.19/0001-arm64-dts-rockchip-add-Quartz64-A-fan-pinctrl.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 2c26cd88f13382b6965bbf5a8fc1c56384c6c3f6 Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 11:01:15 -0400 -Subject: [PATCH 01/51] arm64: dts: rockchip: add Quartz64-A fan pinctrl - -The Quartz64 Model A fan is bound to a single gpio. Prevent pinctrl -issues in the future by binding the pinctrl assignment for the gpio. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220511150117.113070-5-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -32,6 +32,8 @@ - gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = <0 0 - 4500 1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&fan_en_h>; - #cooling-cells = <2>; - }; - -@@ -523,6 +525,12 @@ - }; - }; - -+ fan { -+ fan_en_h: fan-en-h { -+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - leds { - work_led_enable_h: work-led-enable-h { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/target/linux/rockchip/patches-5.19/0002-arm64-dts-rockchip-enable-sdr-104-for-sdmmc-on-Quart.patch b/target/linux/rockchip/patches-5.19/0002-arm64-dts-rockchip-enable-sdr-104-for-sdmmc-on-Quart.patch deleted file mode 100644 index 880f77649..000000000 --- a/target/linux/rockchip/patches-5.19/0002-arm64-dts-rockchip-enable-sdr-104-for-sdmmc-on-Quart.patch +++ /dev/null @@ -1,32 +0,0 @@ -From eda045fa2ca7b1567457048a389cda854a3a01e5 Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 11:01:16 -0400 -Subject: [PATCH 02/51] arm64: dts: rockchip: enable sdr-104 for sdmmc on - Quartz A - -Now that we have working io-domain support, we can enable higher date -rates on the sdmmc card. - -Before: -Timing buffered disk reads: 68 MB in 3.08 seconds = 22.07 MB/sec - -After: -Timing buffered disk reads: 188 MB in 3.02 seconds = 62.29 MB/sec - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220511150117.113070-6-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -595,6 +595,7 @@ - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; -+ sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; diff --git a/target/linux/rockchip/patches-5.19/0003-arm64-dts-rockchip-enable-sfc-controller-on-Quartz64.patch b/target/linux/rockchip/patches-5.19/0003-arm64-dts-rockchip-enable-sfc-controller-on-Quartz64.patch deleted file mode 100644 index 3cd979168..000000000 --- a/target/linux/rockchip/patches-5.19/0003-arm64-dts-rockchip-enable-sfc-controller-on-Quartz64.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 591f44f27342906ccd58eb7e63ec3ef5810bd7eb Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 11:01:17 -0400 -Subject: [PATCH 03/51] arm64: dts: rockchip: enable sfc controller on Quartz64 - Model A - -Add the sfc controller binding for the Quartz64 Model A. This is not -populated by default, so leave it disabled. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220511150117.113070-7-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3566-quartz64-a.dts | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -616,6 +616,22 @@ - status = "okay"; - }; - -+&sfc { -+ pinctrl-0 = <&fspi_pins>; -+ pinctrl-names = "default"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ -+ flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <24000000>; -+ spi-rx-bus-width = <4>; -+ spi-tx-bus-width = <1>; -+ }; -+}; -+ - /* spdif is exposed on con40 pin 18 */ - &spdif { - status = "okay"; diff --git a/target/linux/rockchip/patches-5.19/0004-arm64-dts-rockchip-Add-rk3568-PCIe2x1-controller.patch b/target/linux/rockchip/patches-5.19/0004-arm64-dts-rockchip-Add-rk3568-PCIe2x1-controller.patch deleted file mode 100644 index cea47965f..000000000 --- a/target/linux/rockchip/patches-5.19/0004-arm64-dts-rockchip-Add-rk3568-PCIe2x1-controller.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 83729931332a2f15b0452f7dc8ea7a2e1b431842 Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Fri, 29 Apr 2022 08:38:30 -0400 -Subject: [PATCH 04/51] arm64: dts: rockchip: Add rk3568 PCIe2x1 controller - -The PCIe2x1 controller is common between the rk3568 and rk3566. It is a -single lane PCIe2 compliant controller. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220429123832.2376381-5-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 ++++++++++++++++++++++++ - 1 file changed, 50 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -752,6 +752,56 @@ - reg = <0x0 0xfe1a8100 0x0 0x20>; - }; - -+ pcie2x1: pcie@fe260000 { -+ compatible = "rockchip,rk3568-pcie"; -+ reg = <0x3 0xc0000000 0x0 0x00400000>, -+ <0x0 0xfe260000 0x0 0x00010000>, -+ <0x3 0x3f000000 0x0 0x01000000>; -+ reg-names = "dbi", "apb", "config"; -+ interrupts = , -+ , -+ , -+ , -+ ; -+ interrupt-names = "sys", "pmc", "msi", "legacy", "err"; -+ bus-range = <0x0 0xf>; -+ clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, -+ <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, -+ <&cru CLK_PCIE20_AUX_NDFT>; -+ clock-names = "aclk_mst", "aclk_slv", -+ "aclk_dbi", "pclk", "aux"; -+ device_type = "pci"; -+ interrupt-map-mask = <0 0 0 7>; -+ interrupt-map = <0 0 0 1 &pcie_intc 0>, -+ <0 0 0 2 &pcie_intc 1>, -+ <0 0 0 3 &pcie_intc 2>, -+ <0 0 0 4 &pcie_intc 3>; -+ linux,pci-domain = <0>; -+ num-ib-windows = <6>; -+ num-ob-windows = <2>; -+ max-link-speed = <2>; -+ msi-map = <0x0 &gic 0x0 0x1000>; -+ num-lanes = <1>; -+ phys = <&combphy2 PHY_TYPE_PCIE>; -+ phy-names = "pcie-phy"; -+ power-domains = <&power RK3568_PD_PIPE>; -+ ranges = <0x01000000 0x0 0x3ef00000 0x3 0x3ef00000 0x0 0x00100000 -+ 0x02000000 0x0 0x00000000 0x3 0x00000000 0x0 0x3ef00000>; -+ resets = <&cru SRST_PCIE20_POWERUP>; -+ reset-names = "pipe"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ status = "disabled"; -+ -+ pcie_intc: legacy-interrupt-controller { -+ #address-cells = <0>; -+ #interrupt-cells = <1>; -+ interrupt-controller; -+ interrupt-parent = <&gic>; -+ interrupts = ; -+ }; -+ }; -+ - sdmmc0: mmc@fe2b0000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe2b0000 0x0 0x4000>; diff --git a/target/linux/rockchip/patches-5.19/0005-arm64-dts-rockchip-Enable-PCIe-controller-on-quartz6.patch b/target/linux/rockchip/patches-5.19/0005-arm64-dts-rockchip-Enable-PCIe-controller-on-quartz6.patch deleted file mode 100644 index 4247daf55..000000000 --- a/target/linux/rockchip/patches-5.19/0005-arm64-dts-rockchip-Enable-PCIe-controller-on-quartz6.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 5b1b78762d3fb4cf20aec4b22fbfab33960a6fdc Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Fri, 29 Apr 2022 08:38:31 -0400 -Subject: [PATCH 05/51] arm64: dts: rockchip: Enable PCIe controller on - quartz64-a - -Add the nodes to enable the PCIe controller on the Quartz64 Model A -board. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220429123832.2376381-6-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3566-quartz64-a.dts | 34 +++++++++++++++++++ - 1 file changed, 34 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -127,6 +127,18 @@ - vin-supply = <&vcc12v_dcin>; - }; - -+ vcc3v3_pcie_p: vcc3v3-pcie-p-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_enable_h>; -+ regulator-name = "vcc3v3_pcie_p"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_3v3>; -+ }; -+ - vcc5v0_usb: vcc5v0_usb { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; -@@ -202,6 +214,10 @@ - status = "okay"; - }; - -+&combphy2 { -+ status = "okay"; -+}; -+ - &cpu0 { - cpu-supply = <&vdd_cpu>; - }; -@@ -510,6 +526,14 @@ - }; - }; - -+&pcie2x1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_reset_h>; -+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; -+ vpcie3v3-supply = <&vcc3v3_pcie_p>; -+ status = "okay"; -+}; -+ - &pinctrl { - bt { - bt_enable_h: bt-enable-h { -@@ -541,6 +565,16 @@ - }; - }; - -+ pcie { -+ pcie_enable_h: pcie-enable-h { -+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ pcie_reset_h: pcie-reset-h { -+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/target/linux/rockchip/patches-5.19/0006-arm64-dts-rockchip-add-pine64-touch-panel-display-to.patch b/target/linux/rockchip/patches-5.19/0006-arm64-dts-rockchip-add-pine64-touch-panel-display-to.patch deleted file mode 100644 index e714d89bb..000000000 --- a/target/linux/rockchip/patches-5.19/0006-arm64-dts-rockchip-add-pine64-touch-panel-display-to.patch +++ /dev/null @@ -1,131 +0,0 @@ -From 175ce006fe4ebf077322e5818127acfade41296f Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 11 May 2022 07:35:16 -0400 -Subject: [PATCH 06/51] arm64: dts: rockchip: add pine64 touch panel display to - rockpro64 - -The Pine64 touch panel is a panel consisting of the Feiyang fy07024di26a30d -panel with a Goodix gt911 touch screen. Add the device tree nodes to the -rockpro64 to permit attaching this display to the device. - -Signed-off-by: Peter Geis -Link: https://lore.kernel.org/r/20220511113517.4172962-4-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3399-rockpro64.dtsi | 70 +++++++++++++++++-- - 1 file changed, 66 insertions(+), 4 deletions(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -@@ -20,6 +20,15 @@ - stdout-path = "serial2:1500000n8"; - }; - -+ /* enable for panel backlight support */ -+ backlight: backlight { -+ compatible = "pwm-backlight"; -+ brightness-levels = <0 4 8 16 32 64 128 255>; -+ default-brightness-level = <5>; -+ pwms = <&pwm0 0 1000000 0>; -+ status = "disabled"; -+ }; -+ - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; -@@ -107,6 +116,14 @@ - }; - }; - -+ avdd: avdd-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "avdd"; -+ regulator-min-microvolt = <11000000>; -+ regulator-max-microvolt = <11000000>; -+ vin-supply = <&vcc3v3_s0>; -+ }; -+ - vcc12v_dcin: vcc12v-dcin { - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; -@@ -400,8 +417,6 @@ - - vcc3v0_touch: LDO_REG2 { - regulator-name = "vcc3v0_touch"; -- regulator-always-on; -- regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { -@@ -490,8 +505,6 @@ - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; -- regulator-always-on; -- regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; -@@ -565,6 +578,19 @@ - vbus-supply = <&vcc5v0_typec>; - status = "okay"; - }; -+ -+ /* enable for pine64 touch screen support */ -+ touch: touchscreen@5d { -+ compatible = "goodix,gt911"; -+ reg = <0x5d>; -+ interrupt-parent = <&gpio4>; -+ interrupts = ; -+ AVDD28-supply = <&vcc3v0_touch>; -+ VDDIO-supply = <&vcc3v0_touch>; -+ irq-gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>; -+ reset-gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; -+ status = "disabled"; -+ }; - }; - - &i2s0 { -@@ -600,6 +626,42 @@ - gpio1830-supply = <&vcc_3v0>; - }; - -+/* enable for pine64 panel display support */ -+&mipi_dsi { -+ clock-master; -+ status = "disabled"; -+ -+ ports { -+ mipi_out: port@1 { -+ reg = <1>; -+ -+ mipi_out_panel: endpoint { -+ remote-endpoint = <&mipi_in_panel>; -+ }; -+ }; -+ }; -+ -+ mipi_panel: panel@0 { -+ compatible = "feiyang,fy07024di26a30d"; -+ reg = <0>; -+ avdd-supply = <&avdd>; -+ backlight = <&backlight>; -+ dvdd-supply = <&vcc3v3_s0>; -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ -+ mipi_in_panel: endpoint { -+ remote-endpoint = <&mipi_out_panel>; -+ }; -+ }; -+ }; -+ }; -+}; -+ - &pcie0 { - ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; - num-lanes = <4>; diff --git a/target/linux/rockchip/patches-5.19/0007-arm64-dts-rockchip-rk356x-Add-VOP2-nodes.patch b/target/linux/rockchip/patches-5.19/0007-arm64-dts-rockchip-rk356x-Add-VOP2-nodes.patch deleted file mode 100644 index 8105f0840..000000000 --- a/target/linux/rockchip/patches-5.19/0007-arm64-dts-rockchip-rk356x-Add-VOP2-nodes.patch +++ /dev/null @@ -1,106 +0,0 @@ -From ec7cbc7e9111d3d655f25807e8511492359bb0fd Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 22 Apr 2022 09:28:33 +0200 -Subject: [PATCH 07/51] arm64: dts: rockchip: rk356x: Add VOP2 nodes - -The VOP2 is the display output controller on the RK3568. Add the node -for it to the dtsi file along with the required display-subsystem node -and the iommu node. - -Signed-off-by: Sascha Hauer -Acked-by: Rob Herring -Link: https://lore.kernel.org/r/20220422072841.2206452-17-s.hauer@pengutronix.de -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3566.dtsi | 4 ++ - arch/arm64/boot/dts/rockchip/rk3568.dtsi | 4 ++ - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 51 ++++++++++++++++++++++++ - 3 files changed, 59 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi -@@ -29,3 +29,7 @@ - extcon = <&usb2phy0>; - maximum-speed = "high-speed"; - }; -+ -+&vop { -+ compatible = "rockchip,rk3566-vop"; -+}; ---- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi -@@ -137,3 +137,7 @@ - phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - }; -+ -+&vop { -+ compatible = "rockchip,rk3568-vop"; -+}; ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -129,6 +129,11 @@ - }; - }; - -+ display_subsystem: display-subsystem { -+ compatible = "rockchip,display-subsystem"; -+ ports = <&vop_out>; -+ }; -+ - firmware { - scmi: scmi { - compatible = "arm,scmi-smc"; -@@ -632,6 +637,52 @@ - }; - }; - -+ vop: vop@fe040000 { -+ reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>; -+ reg-names = "vop", "gamma-lut"; -+ interrupts = ; -+ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>, -+ <&cru DCLK_VOP1>, <&cru DCLK_VOP2>; -+ clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2"; -+ iommus = <&vop_mmu>; -+ power-domains = <&power RK3568_PD_VO>; -+ rockchip,grf = <&grf>; -+ status = "disabled"; -+ -+ vop_out: ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ vp0: port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ vp1: port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ vp2: port@2 { -+ reg = <2>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+ }; -+ -+ vop_mmu: iommu@fe043e00 { -+ compatible = "rockchip,rk3568-iommu"; -+ reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>; -+ interrupts = ; -+ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; -+ clock-names = "aclk", "iface"; -+ #iommu-cells = <0>; -+ status = "disabled"; -+ }; -+ - qos_gpu: qos@fe128000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe128000 0x0 0x20>; diff --git a/target/linux/rockchip/patches-5.19/0008-arm64-dts-rockchip-rk356x-Add-HDMI-nodes.patch b/target/linux/rockchip/patches-5.19/0008-arm64-dts-rockchip-rk356x-Add-HDMI-nodes.patch deleted file mode 100644 index eed468bdf..000000000 --- a/target/linux/rockchip/patches-5.19/0008-arm64-dts-rockchip-rk356x-Add-HDMI-nodes.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 98180f4652c2c994cc2cc6088932086ee5c6e4d9 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 22 Apr 2022 09:28:34 +0200 -Subject: [PATCH 08/51] arm64: dts: rockchip: rk356x: Add HDMI nodes - -Add support for the HDMI port found on RK3568. - -Signed-off-by: Sascha Hauer -Signed-off-by: Sascha Hauer -Link: https://lore.kernel.org/r/20220422072841.2206452-18-s.hauer@pengutronix.de -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 32 ++++++++++++++++++++++++ - 1 file changed, 32 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -683,6 +683,38 @@ - status = "disabled"; - }; - -+ hdmi: hdmi@fe0a0000 { -+ compatible = "rockchip,rk3568-dw-hdmi"; -+ reg = <0x0 0xfe0a0000 0x0 0x20000>; -+ interrupts = ; -+ clocks = <&cru PCLK_HDMI_HOST>, -+ <&cru CLK_HDMI_SFR>, -+ <&cru CLK_HDMI_CEC>, -+ <&pmucru CLK_HDMI_REF>, -+ <&cru HCLK_VO>; -+ clock-names = "iahb", "isfr", "cec", "ref"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>; -+ power-domains = <&power RK3568_PD_VO>; -+ reg-io-width = <4>; -+ rockchip,grf = <&grf>; -+ #sound-dai-cells = <0>; -+ status = "disabled"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ hdmi_in: port@0 { -+ reg = <0>; -+ }; -+ -+ hdmi_out: port@1 { -+ reg = <1>; -+ }; -+ }; -+ }; -+ - qos_gpu: qos@fe128000 { - compatible = "rockchip,rk3568-qos", "syscon"; - reg = <0x0 0xfe128000 0x0 0x20>; diff --git a/target/linux/rockchip/patches-5.19/0009-arm64-dts-rockchip-rk3568-evb-Enable-VOP2-and-hdmi.patch b/target/linux/rockchip/patches-5.19/0009-arm64-dts-rockchip-rk3568-evb-Enable-VOP2-and-hdmi.patch deleted file mode 100644 index c4316b5d1..000000000 --- a/target/linux/rockchip/patches-5.19/0009-arm64-dts-rockchip-rk3568-evb-Enable-VOP2-and-hdmi.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 7ccf41205a3deb146e7cc4fffb59fb1eb490a649 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 22 Apr 2022 09:28:35 +0200 -Subject: [PATCH 09/51] arm64: dts: rockchip: rk3568-evb: Enable VOP2 and hdmi - -This enabled the VOP2 display controller along with hdmi and the -required port routes which is enough to get a picture out of the -hdmi port of the board. - -Signed-off-by: Sascha Hauer -Link: https://lore.kernel.org/r/20220422072841.2206452-19-s.hauer@pengutronix.de -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3568-evb1-v10.dts | 47 +++++++++++++++++++ - 1 file changed, 47 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts -@@ -8,6 +8,7 @@ - #include - #include - #include -+#include - #include "rk3568.dtsi" - - / { -@@ -34,6 +35,17 @@ - regulator-max-microvolt = <12000000>; - }; - -+ hdmi-con { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -209,6 +221,24 @@ - status = "okay"; - }; - -+&hdmi { -+ avdd-0v9-supply = <&vdda0v9_image>; -+ avdd-1v8-supply = <&vcca1v8_image>; -+ status = "okay"; -+}; -+ -+&hdmi_in { -+ hdmi_in_vp0: endpoint { -+ remote-endpoint = <&vp0_out_hdmi>; -+ }; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -635,3 +665,20 @@ - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; - }; -+ -+&vop { -+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; -+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; -+ status = "okay"; -+}; -+ -+&vop_mmu { -+ status = "okay"; -+}; -+ -+&vp0 { -+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { -+ reg = ; -+ remote-endpoint = <&hdmi_in_vp0>; -+ }; -+}; diff --git a/target/linux/rockchip/patches-5.19/0010-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-quartz.patch b/target/linux/rockchip/patches-5.19/0010-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-quartz.patch deleted file mode 100644 index 926096d6e..000000000 --- a/target/linux/rockchip/patches-5.19/0010-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-quartz.patch +++ /dev/null @@ -1,91 +0,0 @@ -From d6eb924b01522decb987cb8c70d66c6b732a91e4 Mon Sep 17 00:00:00 2001 -From: Michael Riesch -Date: Fri, 22 Apr 2022 09:28:36 +0200 -Subject: [PATCH 10/51] arm64: dts: rockchip: enable vop2 and hdmi tx on - quartz64a - -Enable the RK356x Video Output Processor (VOP) 2 on the Pine64 -Quartz64 Model A. - -Signed-off-by: Michael Riesch -Signed-off-by: Sascha Hauer -Link: https://lore.kernel.org/r/20220422072841.2206452-20-s.hauer@pengutronix.de -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3566-quartz64-a.dts | 47 +++++++++++++++++++ - 1 file changed, 47 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -4,6 +4,7 @@ - - #include - #include -+#include - #include "rk3566.dtsi" - - / { -@@ -37,6 +38,17 @@ - #cooling-cells = <2>; - }; - -+ hdmi-con { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -279,6 +291,24 @@ - status = "okay"; - }; - -+&hdmi { -+ avdd-0v9-supply = <&vdda_0v9>; -+ avdd-1v8-supply = <&vcc_1v8>; -+ status = "okay"; -+}; -+ -+&hdmi_in { -+ hdmi_in_vp0: endpoint { -+ remote-endpoint = <&vp0_out_hdmi>; -+ }; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -781,3 +811,20 @@ - phy-supply = <&vcc5v0_usb20_host>; - status = "okay"; - }; -+ -+&vop { -+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; -+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; -+ status = "okay"; -+}; -+ -+&vop_mmu { -+ status = "okay"; -+}; -+ -+&vp0 { -+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { -+ reg = ; -+ remote-endpoint = <&hdmi_in_vp0>; -+ }; -+}; diff --git a/target/linux/rockchip/patches-5.19/0013-arm64-dts-rockchip-adjust-whitespace-around.patch b/target/linux/rockchip/patches-5.19/0013-arm64-dts-rockchip-adjust-whitespace-around.patch deleted file mode 100644 index 2896d4254..000000000 --- a/target/linux/rockchip/patches-5.19/0013-arm64-dts-rockchip-adjust-whitespace-around.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 6ca0fc50d82e4ee0c1f5a2ba35cc692cfb4eeeec Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski -Date: Thu, 26 May 2022 22:42:16 +0200 -Subject: [PATCH 13/51] arm64: dts: rockchip: adjust whitespace around '=' - -Fix whitespace coding style: use single space instead of tabs or -multiple spaces around '=' sign in property assignment. No functional -changes (same DTB). - -Signed-off-by: Krzysztof Kozlowski -Link: https://lore.kernel.org/r/20220526204218.832029-1-krzysztof.kozlowski@linaro.org -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/px30.dtsi | 2 +- - arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 +++--- - arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 2 +- - arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 2 +- - arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts | 2 +- - arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 2 +- - 6 files changed, 8 insertions(+), 8 deletions(-) - ---- a/arch/arm64/boot/dts/rockchip/px30.dtsi -+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi -@@ -528,7 +528,7 @@ - i2c0: i2c@ff180000 { - compatible = "rockchip,px30-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff180000 0x0 0x1000>; -- clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>; -+ clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>; - clock-names = "i2c", "pclk"; - interrupts = ; - pinctrl-names = "default"; ---- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi -@@ -1084,7 +1084,7 @@ - - gmac { - rgmii_pins: rgmii-pins { -- rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>, -+ rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>, - <3 RK_PD0 1 &pcfg_pull_none>, - <3 RK_PC3 1 &pcfg_pull_none>, - <3 RK_PB0 1 &pcfg_pull_none_12ma>, -@@ -1102,7 +1102,7 @@ - }; - - rmii_pins: rmii-pins { -- rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>, -+ rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>, - <3 RK_PD0 1 &pcfg_pull_none>, - <3 RK_PC3 1 &pcfg_pull_none>, - <3 RK_PB0 1 &pcfg_pull_none_12ma>, -@@ -1257,7 +1257,7 @@ - - spdif { - spdif_tx: spdif-tx { -- rockchip,pins = <2 RK_PC7 1 &pcfg_pull_none>; -+ rockchip,pins = <2 RK_PC7 1 &pcfg_pull_none>; - }; - }; - ---- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -@@ -55,7 +55,7 @@ - }; - - edp_panel: edp-panel { -- compatible ="lg,lp079qx1-sp0v"; -+ compatible = "lg,lp079qx1-sp0v"; - backlight = <&backlight>; - enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; - power-supply = <&vcc3v3_s0>; ---- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts -@@ -49,7 +49,7 @@ - sgtl5000_clk: sgtl5000-oscillator { - compatible = "fixed-clock"; - #clock-cells = <0>; -- clock-frequency = <24576000>; -+ clock-frequency = <24576000>; - }; - - dc_12v: dc-12v { ---- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts -@@ -88,7 +88,7 @@ - }; - - edp_panel: edp-panel { -- compatible ="lg,lp079qx1-sp0v"; -+ compatible = "lg,lp079qx1-sp0v"; - backlight = <&backlight>; - enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; ---- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi -@@ -347,7 +347,7 @@ - - pcie { - pcie_pwr: pcie-pwr { -- rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; -+ rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - diff --git a/target/linux/rockchip/patches-5.19/0014-arm64-dts-rockchip-Add-HDMI-audio-nodes-to-rk356x.patch b/target/linux/rockchip/patches-5.19/0014-arm64-dts-rockchip-Add-HDMI-audio-nodes-to-rk356x.patch deleted file mode 100644 index 5f5d06dd4..000000000 --- a/target/linux/rockchip/patches-5.19/0014-arm64-dts-rockchip-Add-HDMI-audio-nodes-to-rk356x.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 7a32752d0d94ea613092aaa45db136626a55a1ab Mon Sep 17 00:00:00 2001 -From: Nicolas Frattaroli -Date: Sat, 11 Jun 2022 08:52:59 +0200 -Subject: [PATCH 14/51] arm64: dts: rockchip: Add HDMI audio nodes to rk356x - -This adds the i2s0 node and an hdmi-sound sound device to the -rk356x device tree. On the rk356[68], the i2s0 controller is -connected to HDMI audio. - -Tested-by: Michael Riesch -Tested-by: Peter Geis -Signed-off-by: Nicolas Frattaroli -Link: https://lore.kernel.org/r/20220611065300.885212-2-frattaroli.nicolas@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 33 ++++++++++++++++++++++++ - 1 file changed, 33 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -183,6 +183,22 @@ - }; - }; - -+ hdmi_sound: hdmi-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "HDMI"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,mclk-fs = <256>; -+ status = "disabled"; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s0_8ch>; -+ }; -+ }; -+ - pmu { - compatible = "arm,cortex-a55-pmu"; - interrupts = , -@@ -950,6 +966,23 @@ - #sound-dai-cells = <0>; - status = "disabled"; - }; -+ -+ i2s0_8ch: i2s@fe400000 { -+ compatible = "rockchip,rk3568-i2s-tdm"; -+ reg = <0x0 0xfe400000 0x0 0x1000>; -+ interrupts = ; -+ assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>; -+ assigned-clock-rates = <1188000000>, <1188000000>; -+ clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>; -+ clock-names = "mclk_tx", "mclk_rx", "hclk"; -+ dmas = <&dmac1 0>; -+ dma-names = "tx"; -+ resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>; -+ reset-names = "tx-m", "rx-m"; -+ rockchip,grf = <&grf>; -+ #sound-dai-cells = <0>; -+ status = "disabled"; -+ }; - - i2s1_8ch: i2s@fe410000 { - compatible = "rockchip,rk3568-i2s-tdm"; diff --git a/target/linux/rockchip/patches-5.19/0015-arm64-dts-rockchip-Enable-HDMI-audio-on-Quartz64-A.patch b/target/linux/rockchip/patches-5.19/0015-arm64-dts-rockchip-Enable-HDMI-audio-on-Quartz64-A.patch deleted file mode 100644 index 316674eea..000000000 --- a/target/linux/rockchip/patches-5.19/0015-arm64-dts-rockchip-Enable-HDMI-audio-on-Quartz64-A.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 2d330dcbbb5f3ce5ff55a2642aac4fb0d0e0a79e Mon Sep 17 00:00:00 2001 -From: Nicolas Frattaroli -Date: Sat, 11 Jun 2022 08:53:00 +0200 -Subject: [PATCH 15/51] arm64: dts: rockchip: Enable HDMI audio on Quartz64 A - -This enables the i2s0 controller and the hdmi-sound node on -the PINE64 Quartz64 Model A single-board computer. - -Tested-by: Peter Geis -Signed-off-by: Nicolas Frattaroli -Link: https://lore.kernel.org/r/20220611065300.885212-3-frattaroli.nicolas@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts -@@ -309,6 +309,10 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -539,6 +543,10 @@ - status = "okay"; - }; - -+&i2s0_8ch { -+ status = "okay"; -+}; -+ - &i2s1_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s1m0_sclktx diff --git a/target/linux/rockchip/patches-5.19/0017-arm64-dts-rockchip-add-RTC-to-BPI-R2-Pro.patch b/target/linux/rockchip/patches-5.19/0017-arm64-dts-rockchip-add-RTC-to-BPI-R2-Pro.patch deleted file mode 100644 index e7609aef6..000000000 --- a/target/linux/rockchip/patches-5.19/0017-arm64-dts-rockchip-add-RTC-to-BPI-R2-Pro.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 0a691542952f6706436e383f984c38b361c986ee Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Wed, 8 Jun 2022 18:11:49 +0200 -Subject: [PATCH 17/51] arm64: dts: rockchip: add RTC to BPI-R2 Pro - -Add devicetree node for hym8563 rtc to Bananapi R2 Pro board. - -Signed-off-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220608161150.58919-3-linux@fw-web.de -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 23 +++++++++++++++++++ - 1 file changed, 23 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -@@ -389,6 +389,23 @@ - }; - }; - -+&i2c3 { -+ status = "okay"; -+ -+ hym8563: rtc@51 { -+ compatible = "haoyu,hym8563"; -+ reg = <0x51>; -+ interrupt-parent = <&gpio0>; -+ interrupts = ; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ clock-output-names = "rtcic_32kout"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hym8563_int>; -+ wakeup-source; -+ }; -+}; -+ - &i2c5 { - /* pin 3 (SDA) + 4 (SCL) of header con2 */ - status = "disabled"; -@@ -411,6 +428,12 @@ - }; - }; - -+ hym8563 { -+ hym8563_int: hym8563-int { -+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - pmic { - pmic_int: pmic_int { - rockchip,pins = diff --git a/target/linux/rockchip/patches-5.19/0019-arm64-dts-rockchip-set-display-regulators-to-always-.patch b/target/linux/rockchip/patches-5.19/0019-arm64-dts-rockchip-set-display-regulators-to-always-.patch deleted file mode 100644 index 902ccaa14..000000000 --- a/target/linux/rockchip/patches-5.19/0019-arm64-dts-rockchip-set-display-regulators-to-always-.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 032baf8d6c3493e0dcad2c780361faa7ac4f9dde Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Mon, 6 Jun 2022 19:07:59 +0200 -Subject: [PATCH 19/51] arm64: dts: rockchip: set display regulators to - always-on on BPI-R2-Pro - -The gpu power supply needs to stay always on until the issues with power- -domains not being regulator aware is resolved. Otherwise we run into -issues where the gpu-regulator gets shut down and we start getting mmu -faults. - -Signed-off-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220606170803.478082-2-linux@fw-web.de -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -@@ -215,6 +215,7 @@ - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; -+ regulator-always-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; -@@ -264,6 +265,7 @@ - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; -+ regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - -@@ -359,6 +361,7 @@ - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; -+ regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - diff --git a/target/linux/rockchip/patches-5.19/0020-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-BPI-R2.patch b/target/linux/rockchip/patches-5.19/0020-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-BPI-R2.patch deleted file mode 100644 index 725f46306..000000000 --- a/target/linux/rockchip/patches-5.19/0020-arm64-dts-rockchip-enable-vop2-and-hdmi-tx-on-BPI-R2.patch +++ /dev/null @@ -1,90 +0,0 @@ -From ffb2555c106a820acc90d31c201d9879b4400623 Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Mon, 6 Jun 2022 19:08:00 +0200 -Subject: [PATCH 20/51] arm64: dts: rockchip: enable vop2 and hdmi tx on - BPI-R2-Pro - -Enable the RK356x Video Output Processor (VOP) 2 on the -BananaPi R2 Pro board. - -Signed-off-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220606170803.478082-3-linux@fw-web.de -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 47 +++++++++++++++++++ - 1 file changed, 47 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -@@ -8,6 +8,7 @@ - #include - #include - #include -+#include - #include "rk3568.dtsi" - - / { -@@ -54,6 +55,17 @@ - regulator-max-microvolt = <12000000>; - }; - -+ hdmi-con { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; -@@ -174,6 +186,24 @@ - status = "okay"; - }; - -+&hdmi { -+ avdd-0v9-supply = <&vdda0v9_image>; -+ avdd-1v8-supply = <&vcca1v8_image>; -+ status = "okay"; -+}; -+ -+&hdmi_in { -+ hdmi_in_vp0: endpoint { -+ remote-endpoint = <&vp0_out_hdmi>; -+ }; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -613,3 +643,20 @@ - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; - }; -+ -+&vop { -+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; -+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; -+ status = "okay"; -+}; -+ -+&vop_mmu { -+ status = "okay"; -+}; -+ -+&vp0 { -+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { -+ reg = ; -+ remote-endpoint = <&hdmi_in_vp0>; -+ }; -+}; diff --git a/target/linux/rockchip/patches-5.19/0021-arm64-dts-rockchip-Enable-HDMI-audio-on-BPI-R2-Pro.patch b/target/linux/rockchip/patches-5.19/0021-arm64-dts-rockchip-Enable-HDMI-audio-on-BPI-R2-Pro.patch deleted file mode 100644 index 65ca0a5f6..000000000 --- a/target/linux/rockchip/patches-5.19/0021-arm64-dts-rockchip-Enable-HDMI-audio-on-BPI-R2-Pro.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 16fa52e8e2aae8debb651ac5f84a8d49499a301e Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Mon, 6 Jun 2022 19:08:01 +0200 -Subject: [PATCH 21/51] arm64: dts: rockchip: Enable HDMI audio on BPI R2 Pro - -This enables the i2s0 controller and the hdmi-sound node on -the Bananapi R2 Pro single-board computer. - -Signed-off-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220606170803.478082-4-linux@fw-web.de -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -@@ -204,6 +204,10 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -444,6 +448,11 @@ - status = "disabled"; - }; - -+&i2s0_8ch { -+ /* hdmi sound */ -+ status = "okay"; -+}; -+ - &mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; diff --git a/target/linux/rockchip/patches-5.19/0022-arm64-dts-rockchip-configure-thermal-shutdown-for-BP.patch b/target/linux/rockchip/patches-5.19/0022-arm64-dts-rockchip-configure-thermal-shutdown-for-BP.patch deleted file mode 100644 index 7238aabbf..000000000 --- a/target/linux/rockchip/patches-5.19/0022-arm64-dts-rockchip-configure-thermal-shutdown-for-BP.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 6976a5970ca53ac9dba444f4929528c3400152a5 Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Mon, 6 Jun 2022 19:08:02 +0200 -Subject: [PATCH 22/51] arm64: dts: rockchip: configure thermal shutdown for - BPI-R2-Pro - -Add thermal shutdown configuration for use of GPU. - -Signed-off-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220606170803.478082-5-linux@fw-web.de -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -@@ -588,6 +588,8 @@ - }; - - &tsadc { -+ rockchip,hw-tshut-mode = <1>; -+ rockchip,hw-tshut-polarity = <0>; - status = "okay"; - }; - diff --git a/target/linux/rockchip/patches-5.19/0023-arm64-dts-rockchip-enable-the-gpu-on-BPI-R2-Pro.patch b/target/linux/rockchip/patches-5.19/0023-arm64-dts-rockchip-enable-the-gpu-on-BPI-R2-Pro.patch deleted file mode 100644 index 8a8613708..000000000 --- a/target/linux/rockchip/patches-5.19/0023-arm64-dts-rockchip-enable-the-gpu-on-BPI-R2-Pro.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 92e9e89c7fe9178cb56dba0faf4b0fabbc19d97d Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Mon, 6 Jun 2022 19:08:03 +0200 -Subject: [PATCH 23/51] arm64: dts: rockchip: enable the gpu on BPI-R2-Pro - -Enable the GPU core on the Rockchip RK3568 BananaPi R2 Pro - -Signed-off-by: Frank Wunderlich -Link: https://lore.kernel.org/r/20220606170803.478082-6-linux@fw-web.de -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -@@ -186,6 +186,11 @@ - status = "okay"; - }; - -+&gpu { -+ mali-supply = <&vdd_gpu>; -+ status = "okay"; -+}; -+ - &hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; diff --git a/target/linux/rockchip/patches-5.19/0024-arm64-dts-rockchip-Add-missing-space-around-regulato.patch b/target/linux/rockchip/patches-5.19/0024-arm64-dts-rockchip-Add-missing-space-around-regulato.patch deleted file mode 100644 index 41a6973b8..000000000 --- a/target/linux/rockchip/patches-5.19/0024-arm64-dts-rockchip-Add-missing-space-around-regulato.patch +++ /dev/null @@ -1,31 +0,0 @@ -From fe99ab9113e33c825d1efb8d66f79e217e3108bf Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= - -Date: Mon, 13 Jun 2022 00:31:57 +0200 -Subject: [PATCH 24/51] arm64: dts: rockchip: Add missing space around - regulator-name on rk3368-orion-r68 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add the missing space around the regulator-name property before the typo -spreads to other files. - -Signed-off-by: Niklas Söderlund -Link: https://lore.kernel.org/r/20220612223201.2740248-3-niklas.soderlund+renesas@ragnatech.se -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts -@@ -134,7 +134,7 @@ - - vccio_sd: vcc-io-sd-regulator { - compatible = "regulator-fixed"; -- regulator-name= "vccio_sd"; -+ regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; diff --git a/target/linux/rockchip/patches-5.19/0025-arm64-dts-rockchip-add-ROCK-Pi-S-DTS-support.patch b/target/linux/rockchip/patches-5.19/0025-arm64-dts-rockchip-add-ROCK-Pi-S-DTS-support.patch deleted file mode 100644 index f787cd228..000000000 --- a/target/linux/rockchip/patches-5.19/0025-arm64-dts-rockchip-add-ROCK-Pi-S-DTS-support.patch +++ /dev/null @@ -1,245 +0,0 @@ -From 50373d43ecd2504c240f0048087bf0a1fd6e8b4c Mon Sep 17 00:00:00 2001 -From: Akash Gajjar -Date: Tue, 14 Jun 2022 08:48:56 +0200 -Subject: [PATCH 25/51] arm64: dts: rockchip: add ROCK Pi S DTS support - -ROCK Pi S is RK3308 based SBC from radxa.com. ROCK Pi S has a, -- 256MB/512MB DDR3 RAM -- SD, NAND flash (optional on board 1/2/4/8Gb) -- 100MB ethernet, PoE (optional) -- Onboard 802.11 b/g/n wifi + Bluetooth 4.0 Module -- USB2.0 Type-A HOST x1 -- USB3.0 Type-C OTG x1 -- 26-pin expansion header -- USB Type-C DC 5V Power Supply - -This patch enables -- Console -- NAND Flash -- SD Card - -Signed-off-by: Akash Gajjar -[sjoerd: Sort dt nodes, drop properties duplicated from dtsi] -Signed-off-by: Sjoerd Simons -Link: https://lore.kernel.org/r/20220614064858.1445817-3-sjoerd@collabora.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - .../boot/dts/rockchip/rk3308-rock-pi-s.dts | 201 ++++++++++++++++++ - 2 files changed, 202 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts - ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engi - dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts -@@ -0,0 +1,201 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 Akash Gajjar -+ * Copyright (c) 2019 Jagan Teki -+ */ -+ -+/dts-v1/; -+#include "rk3308.dtsi" -+ -+/ { -+ model = "Radxa ROCK Pi S"; -+ compatible = "radxa,rockpis", "rockchip,rk3308"; -+ -+ chosen { -+ stdout-path = "serial0:1500000n8"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>; -+ -+ green-led { -+ default-state = "on"; -+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; -+ label = "rockpis:green:power"; -+ linux,default-trigger = "default-on"; -+ }; -+ -+ blue-led { -+ default-state = "on"; -+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; -+ label = "rockpis:blue:user"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ pinctrl-0 = <&wifi_enable_h>; -+ pinctrl-names = "default"; -+ reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; -+ }; -+ -+ vcc_1v8: vcc-1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_1v8"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vcc_io>; -+ }; -+ -+ vcc_io: vcc-io { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_io"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc5v0_sys>; -+ }; -+ -+ vcc_ddr: vcc-ddr { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ vin-supply = <&vcc5v0_sys>; -+ }; -+ -+ vcc5v0_otg: vcc5v0-otg { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&otg_vbus_drv>; -+ regulator-name = "vcc5v0_otg"; -+ regulator-always-on; -+ vin-supply = <&vcc5v0_sys>; -+ }; -+ -+ vcc5v0_sys: vcc5v0-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ -+ vdd_core: vdd-core { -+ compatible = "pwm-regulator"; -+ pwms = <&pwm0 0 5000 1>; -+ pwm-supply = <&vcc5v0_sys>; -+ regulator-name = "vdd_core"; -+ regulator-min-microvolt = <827000>; -+ regulator-max-microvolt = <1340000>; -+ regulator-init-microvolt = <1015000>; -+ regulator-settling-time-up-us = <250>; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vdd_log: vdd-log { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd_log"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1050000>; -+ regulator-max-microvolt = <1050000>; -+ vin-supply = <&vcc5v0_sys>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vdd_core>; -+}; -+ -+&emmc { -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ mmc-hs200-1_8v; -+ non-removable; -+ vmmc-supply = <&vcc_io>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ status = "okay"; -+}; -+ -+&pinctrl { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rtc_32k>; -+ -+ leds { -+ green_led_gio: green-led-gpio { -+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ heartbeat_led_gpio: heartbeat-led-gpio { -+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb { -+ otg_vbus_drv: otg-vbus-drv { -+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ sdio-pwrseq { -+ wifi_enable_h: wifi-enable-h { -+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ wifi_host_wake: wifi-host-wake { -+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+}; -+ -+&pwm0 { -+ status = "okay"; -+ pinctrl-0 = <&pwm0_pin_pull_down>; -+}; -+ -+&saradc { -+ vref-supply = <&vcc_1v8>; -+ status = "okay"; -+}; -+ -+&sdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ cap-sd-highspeed; -+ cap-sdio-irq; -+ keep-power-in-suspend; -+ max-frequency = <1000000>; -+ mmc-pwrseq = <&sdio_pwrseq>; -+ non-removable; -+ sd-uhs-sdr104; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ cap-sd-highspeed; -+ status = "okay"; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&uart4 { -+ status = "okay"; -+}; diff --git a/target/linux/rockchip/patches-5.19/0026-arm64-dts-rockchip-rock-pi-s-add-more-peripherals.patch b/target/linux/rockchip/patches-5.19/0026-arm64-dts-rockchip-rock-pi-s-add-more-peripherals.patch deleted file mode 100644 index 20b5695fe..000000000 --- a/target/linux/rockchip/patches-5.19/0026-arm64-dts-rockchip-rock-pi-s-add-more-peripherals.patch +++ /dev/null @@ -1,100 +0,0 @@ -From a1bee6a014cf68d8298c370115f7036f0dcb4f59 Mon Sep 17 00:00:00 2001 -From: Sjoerd Simons -Date: Tue, 14 Jun 2022 08:48:57 +0200 -Subject: [PATCH 26/51] arm64: dts: rockchip: rock-pi-s add more peripherals - -This enables the following peripherals: -* Onboard ethernet support -* Bluetooth -* USB 2 port -* OTG port via type-c connector -* Hardware watchog - -Also add aliases for the mmc devices and the ethernet interface - -Signed-off-by: Sjoerd Simons -Link: https://lore.kernel.org/r/20220614064858.1445817-4-sjoerd@collabora.com -Signed-off-by: Heiko Stuebner ---- - .../boot/dts/rockchip/rk3308-rock-pi-s.dts | 52 +++++++++++++++++++ - 1 file changed, 52 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts -@@ -11,6 +11,12 @@ - model = "Radxa ROCK Pi S"; - compatible = "radxa,rockpis", "rockchip,rk3308"; - -+ aliases { -+ ethernet0 = &gmac; -+ mmc0 = &emmc; -+ mmc1 = &sdmmc; -+ }; -+ - chosen { - stdout-path = "serial0:1500000n8"; - }; -@@ -129,6 +135,15 @@ - status = "okay"; - }; - -+&gmac { -+ clock_in_out = "output"; -+ phy-supply = <&vcc_io>; -+ snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; -+ snps,reset-active-low; -+ snps,reset-delays-us = <0 50000 50000>; -+ status = "okay"; -+}; -+ - &i2c1 { - status = "okay"; - }; -@@ -192,10 +207,47 @@ - status = "okay"; - }; - -+&u2phy { -+ status = "okay"; -+ -+ u2phy_host: host-port { -+ phy-supply = <&vcc5v0_otg>; -+ status = "okay"; -+ }; -+ -+ u2phy_otg: otg-port { -+ phy-supply = <&vcc5v0_otg>; -+ status = "okay"; -+ }; -+}; -+ - &uart0 { - status = "okay"; - }; - - &uart4 { - status = "okay"; -+ -+ bluetooth { -+ compatible = "realtek,rtl8723bs-bt"; -+ device-wake-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; -+ host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; -+ }; -+}; -+ -+&usb_host_ehci { -+ status = "okay"; -+}; -+ -+&usb_host_ohci { -+ status = "okay"; -+}; -+ -+&usb20_otg { -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&wdt { -+ status = "okay"; - }; diff --git a/target/linux/rockchip/patches-5.19/0027-arm64-dts-rockchip-align-gpio-key-node-names-with-dt.patch b/target/linux/rockchip/patches-5.19/0027-arm64-dts-rockchip-align-gpio-key-node-names-with-dt.patch deleted file mode 100644 index 3df5bf71f..000000000 --- a/target/linux/rockchip/patches-5.19/0027-arm64-dts-rockchip-align-gpio-key-node-names-with-dt.patch +++ /dev/null @@ -1,369 +0,0 @@ -From deefbffc188d3b0c9e08fa1ce31bb098839a9995 Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski -Date: Wed, 15 Jun 2022 17:53:19 -0700 -Subject: [PATCH 27/51] arm64: dts: rockchip: align gpio-key node names with - dtschema - -The node names should be generic and DT schema expects certain pattern -(e.g. with key/button/switch). - -Signed-off-by: Krzysztof Kozlowski -Link: https://lore.kernel.org/r/20220616005333.18491-26-krzysztof.kozlowski@linaro.org -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3308-evb.dts | 2 +- - .../boot/dts/rockchip/rk3326-odroid-go2.dts | 32 +++++++++---------- - .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 2 +- - arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi | 2 +- - .../boot/dts/rockchip/rk3368-geekbox.dts | 2 +- - .../dts/rockchip/rk3368-orion-r68-meta.dts | 2 +- - .../boot/dts/rockchip/rk3368-px5-evb.dts | 2 +- - arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 2 +- - .../boot/dts/rockchip/rk3399-firefly.dts | 2 +- - .../dts/rockchip/rk3399-gru-chromebook.dtsi | 2 +- - .../boot/dts/rockchip/rk3399-gru-kevin.dts | 2 +- - .../boot/dts/rockchip/rk3399-gru-scarlet.dtsi | 2 +- - .../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 2 +- - .../boot/dts/rockchip/rk3399-nanopi-r4s.dts | 4 +-- - .../boot/dts/rockchip/rk3399-nanopi4.dtsi | 2 +- - .../boot/dts/rockchip/rk3399-orangepi.dts | 2 +- - .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 +-- - .../boot/dts/rockchip/rk3399-roc-pc.dtsi | 2 +- - .../boot/dts/rockchip/rk3399-rockpro64.dtsi | 2 +- - .../boot/dts/rockchip/rk3399-sapphire.dtsi | 2 +- - .../boot/dts/rockchip/rk3566-pinenote.dtsi | 2 +- - 21 files changed, 38 insertions(+), 38 deletions(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3308-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3308-evb.dts -@@ -75,7 +75,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key>; - -- power { -+ key-power { - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; - linux,code = ; - label = "GPIO Key Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -@@ -71,82 +71,82 @@ - * |------------------------------------------------| - */ - -- sw1 { -+ button-sw1 { - gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; - label = "DPAD-UP"; - linux,code = ; - }; -- sw2 { -+ button-sw2 { - gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; - label = "DPAD-DOWN"; - linux,code = ; - }; -- sw3 { -+ button-sw3 { - gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; - label = "DPAD-LEFT"; - linux,code = ; - }; -- sw4 { -+ button-sw4 { - gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; - label = "DPAD-RIGHT"; - linux,code = ; - }; -- sw5 { -+ button-sw5 { - gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; - label = "BTN-A"; - linux,code = ; - }; -- sw6 { -+ button-sw6 { - gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; - label = "BTN-B"; - linux,code = ; - }; -- sw7 { -+ button-sw7 { - gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; - label = "BTN-Y"; - linux,code = ; - }; -- sw8 { -+ button-sw8 { - gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; - label = "BTN-X"; - linux,code = ; - }; -- sw9 { -+ button-sw9 { - gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; - label = "F1"; - linux,code = ; - }; -- sw10 { -+ button-sw10 { - gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; - label = "F2"; - linux,code = ; - }; -- sw11 { -+ button-sw11 { - gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; - label = "F3"; - linux,code = ; - }; -- sw12 { -+ button-sw12 { - gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; - label = "F4"; - linux,code = ; - }; -- sw13 { -+ button-sw13 { - gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>; - label = "F5"; - linux,code = ; - }; -- sw14 { -+ button-sw14 { - gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>; - label = "F6"; - linux,code = ; - }; -- sw15 { -+ button-sw15 { - gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; - label = "TOP-LEFT"; - linux,code = ; - }; -- sw16 { -+ button-sw16 { - gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; - label = "TOP-RIGHT"; - linux,code = ; ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -34,7 +34,7 @@ - pinctrl-0 = <&reset_button_pin>; - pinctrl-names = "default"; - -- reset { -+ key-reset { - label = "reset"; - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; - linux,code = ; ---- a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi -@@ -76,7 +76,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key>; - -- power { -+ key-power { - wakeup-source; - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; - label = "GPIO Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts -@@ -43,7 +43,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key>; - -- power { -+ key-power { - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; - label = "GPIO Power"; - linux,code = ; ---- a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts -@@ -44,7 +44,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key>; - -- power { -+ key-power { - wakeup-source; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - label = "GPIO Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts -@@ -30,7 +30,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key>; - -- power { -+ key-power { - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; - label = "GPIO Power"; - linux,code = ; ---- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts -@@ -37,7 +37,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key>; - -- power { -+ key-power { - wakeup-source; - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; - label = "GPIO Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts -@@ -87,7 +87,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn>; - -- power { -+ key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi -@@ -206,7 +206,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l>; - -- wake_on_bt: wake-on-bt { -+ wake_on_bt: key-wake-on-bt { - label = "Wake-on-Bluetooth"; - gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; - linux,code = ; ---- a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts -@@ -92,7 +92,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l>, <&cpu1_pen_eject>; - -- pen-insert { -+ switch-pen-insert { - label = "Pen Insert"; - /* Insert = low, eject = high */ - gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; ---- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi -@@ -183,7 +183,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pen_eject_odl>; - -- pen-insert { -+ switch-pen-insert { - label = "Pen Insert"; - /* Insert = low, eject = high */ - gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; ---- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi -@@ -136,7 +136,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn>; - -- power { -+ key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -46,9 +46,9 @@ - gpio-keys { - pinctrl-0 = <&reset_button_pin>; - -- /delete-node/ power; -+ /delete-node/ key-power; - -- reset { -+ key-reset { - debounce-interval = <50>; - gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; - label = "reset"; ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -@@ -111,7 +111,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&power_key>; - -- power { -+ key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -@@ -78,7 +78,7 @@ - compatible = "gpio-keys"; - autorepeat; - -- power { -+ key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -76,7 +76,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&lidbtn_pin>; - -- lid { -+ switch-lid { - debounce-interval = <20>; - gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; - label = "Lid"; -@@ -92,7 +92,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn_pin>; - -- power { -+ key-power { - debounce-interval = <20>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi -@@ -54,7 +54,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key_l>; - -- power { -+ key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -@@ -42,7 +42,7 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn>; - -- power { -+ key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi -@@ -53,7 +53,7 @@ - compatible = "gpio-keys"; - autorepeat; - -- power { -+ key-power { - debounce-interval = <100>; - gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; - label = "GPIO Power"; ---- a/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi -@@ -49,7 +49,7 @@ - pinctrl-0 = <&hall_int_l>; - pinctrl-names = "default"; - -- cover { -+ switch-cover { - label = "cover"; - gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>; - linux,input-type = ; diff --git a/target/linux/rockchip/patches-5.19/0028-arm64-dts-rockchip-enable-hdmi-tx-audio-on-rk3568-ev.patch b/target/linux/rockchip/patches-5.19/0028-arm64-dts-rockchip-enable-hdmi-tx-audio-on-rk3568-ev.patch deleted file mode 100644 index ed38b3cc6..000000000 --- a/target/linux/rockchip/patches-5.19/0028-arm64-dts-rockchip-enable-hdmi-tx-audio-on-rk3568-ev.patch +++ /dev/null @@ -1,40 +0,0 @@ -From ff2aa1ec6f09917d03959bc2250eccf5f9c24f0c Mon Sep 17 00:00:00 2001 -From: Michael Riesch -Date: Wed, 15 Jun 2022 01:03:53 +0200 -Subject: [PATCH 28/51] arm64: dts: rockchip: enable hdmi tx audio on - rk3568-evb1-v10 - -Enable the I2S0 controller and the hdmi-sound node on the Rockchip -RK3568 EVB1. - -Signed-off-by: Michael Riesch -Link: https://lore.kernel.org/r/20220614230354.3756364-1-michael.riesch@wolfvision.net -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts -@@ -239,6 +239,10 @@ - }; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -496,6 +500,10 @@ - }; - }; - -+&i2s0_8ch { -+ status = "okay"; -+}; -+ - &i2s1_8ch { - rockchip,trcm-sync-tx-only; - status = "okay"; diff --git a/target/linux/rockchip/patches-5.19/0029-arm64-dts-rockchip-enable-hdmi-tx-audio-on-rock-3a.patch b/target/linux/rockchip/patches-5.19/0029-arm64-dts-rockchip-enable-hdmi-tx-audio-on-rock-3a.patch deleted file mode 100644 index d8ce2ae08..000000000 --- a/target/linux/rockchip/patches-5.19/0029-arm64-dts-rockchip-enable-hdmi-tx-audio-on-rock-3a.patch +++ /dev/null @@ -1,39 +0,0 @@ -From f33757d7c1a25febc85546f9a398e23ad449de05 Mon Sep 17 00:00:00 2001 -From: Michael Riesch -Date: Wed, 15 Jun 2022 01:03:54 +0200 -Subject: [PATCH 29/51] arm64: dts: rockchip: enable hdmi tx audio on rock-3a - -Enable the I2S0 controller and the hdmi-sound node on the Radxa -ROCK3 Model A. - -Signed-off-by: Michael Riesch -Link: https://lore.kernel.org/r/20220614230354.3756364-2-michael.riesch@wolfvision.net -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts -@@ -200,6 +200,10 @@ - status = "okay"; - }; - -+&hdmi_sound { -+ status = "okay"; -+}; -+ - &i2c0 { - status = "okay"; - -@@ -441,6 +445,10 @@ - }; - - &i2s0_8ch { -+ status = "okay"; -+}; -+ -+&i2s0_8ch { - status = "okay"; - }; - diff --git a/target/linux/rockchip/patches-5.19/0030-arm64-dts-rockchip-Add-mt7531-dsa-node-to-BPI-R2-Pro.patch b/target/linux/rockchip/patches-5.19/0030-arm64-dts-rockchip-Add-mt7531-dsa-node-to-BPI-R2-Pro.patch deleted file mode 100644 index 797c4538b..000000000 --- a/target/linux/rockchip/patches-5.19/0030-arm64-dts-rockchip-Add-mt7531-dsa-node-to-BPI-R2-Pro.patch +++ /dev/null @@ -1,72 +0,0 @@ -From a502eafcfbed31cb01e71e23553f9348a08c3cfe Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Fri, 10 Jun 2022 19:05:41 +0200 -Subject: [PATCH 30/51] arm64: dts: rockchip: Add mt7531 dsa node to BPI-R2-Pro - board - -Add Device Tree node for mt7531 switch connected to gmac0. - -Signed-off-by: Frank Wunderlich -Reviewed-by: Florian Fainelli -Signed-off-by: Jakub Kicinski ---- - .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 48 +++++++++++++++++++ - 1 file changed, 48 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -@@ -458,6 +458,54 @@ - status = "okay"; - }; - -+&mdio0 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ switch@0 { -+ compatible = "mediatek,mt7531"; -+ reg = <0>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@1 { -+ reg = <1>; -+ label = "lan0"; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ label = "lan1"; -+ }; -+ -+ port@3 { -+ reg = <3>; -+ label = "lan2"; -+ }; -+ -+ port@4 { -+ reg = <4>; -+ label = "lan3"; -+ }; -+ -+ port@5 { -+ reg = <5>; -+ label = "cpu"; -+ ethernet = <&gmac0>; -+ phy-mode = "rgmii"; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ pause; -+ }; -+ }; -+ }; -+ }; -+}; -+ - &mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; diff --git a/target/linux/rockchip/patches-5.19/0031-net-dsa-mt7530-rework-mt7530_hw_vlan_-add-del.patch b/target/linux/rockchip/patches-5.19/0031-net-dsa-mt7530-rework-mt7530_hw_vlan_-add-del.patch deleted file mode 100644 index 9704b1f66..000000000 --- a/target/linux/rockchip/patches-5.19/0031-net-dsa-mt7530-rework-mt7530_hw_vlan_-add-del.patch +++ /dev/null @@ -1,87 +0,0 @@ -From fd0e3d705a8ee61e822c9f4e74c34567a9a31335 Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Fri, 10 Jun 2022 19:05:37 +0200 -Subject: [PATCH 31/51] net: dsa: mt7530: rework mt7530_hw_vlan_{add,del} - -Rework vlan_add/vlan_del functions in preparation for dynamic cpu port. - -Currently BIT(MT7530_CPU_PORT) is added to new_members, even though -mt7530_port_vlan_add() will be called on the CPU port too. - -Let DSA core decide when to call port_vlan_add for the CPU port, rather -than doing it implicitly. - -We can do autonomous forwarding in a certain VLAN, but not add br0 to that -VLAN and avoid flooding the CPU with those packets, if software knows it -doesn't need to process them. - -Suggested-by: Vladimir Oltean -Signed-off-by: Frank Wunderlich -Reviewed-by: Vladimir Oltean -Reviewed-by: Florian Fainelli -Signed-off-by: Jakub Kicinski ---- - drivers/net/dsa/mt7530.c | 30 ++++++++++++------------------ - 1 file changed, 12 insertions(+), 18 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -1530,11 +1530,11 @@ static void - mt7530_hw_vlan_add(struct mt7530_priv *priv, - struct mt7530_hw_vlan_entry *entry) - { -+ struct dsa_port *dp = dsa_to_port(priv->ds, entry->port); - u8 new_members; - u32 val; - -- new_members = entry->old_members | BIT(entry->port) | -- BIT(MT7530_CPU_PORT); -+ new_members = entry->old_members | BIT(entry->port); - - /* Validate the entry with independent learning, create egress tag per - * VLAN and joining the port as one of the port members. -@@ -1545,22 +1545,20 @@ mt7530_hw_vlan_add(struct mt7530_priv *p - - /* Decide whether adding tag or not for those outgoing packets from the - * port inside the VLAN. -- */ -- val = entry->untagged ? MT7530_VLAN_EGRESS_UNTAG : -- MT7530_VLAN_EGRESS_TAG; -- mt7530_rmw(priv, MT7530_VAWD2, -- ETAG_CTRL_P_MASK(entry->port), -- ETAG_CTRL_P(entry->port, val)); -- -- /* CPU port is always taken as a tagged port for serving more than one -+ * CPU port is always taken as a tagged port for serving more than one - * VLANs across and also being applied with egress type stack mode for - * that VLAN tags would be appended after hardware special tag used as - * DSA tag. - */ -+ if (dsa_port_is_cpu(dp)) -+ val = MT7530_VLAN_EGRESS_STACK; -+ else if (entry->untagged) -+ val = MT7530_VLAN_EGRESS_UNTAG; -+ else -+ val = MT7530_VLAN_EGRESS_TAG; - mt7530_rmw(priv, MT7530_VAWD2, -- ETAG_CTRL_P_MASK(MT7530_CPU_PORT), -- ETAG_CTRL_P(MT7530_CPU_PORT, -- MT7530_VLAN_EGRESS_STACK)); -+ ETAG_CTRL_P_MASK(entry->port), -+ ETAG_CTRL_P(entry->port, val)); - } - - static void -@@ -1579,11 +1577,7 @@ mt7530_hw_vlan_del(struct mt7530_priv *p - return; - } - -- /* If certain member apart from CPU port is still alive in the VLAN, -- * the entry would be kept valid. Otherwise, the entry is got to be -- * disabled. -- */ -- if (new_members && new_members != BIT(MT7530_CPU_PORT)) { -+ if (new_members) { - val = IVL_MAC | VTAG_EN | PORT_MEM(new_members) | - VLAN_VALID; - mt7530_write(priv, MT7530_VAWD1, val); diff --git a/target/linux/rockchip/patches-5.19/0032-net-dsa-mt7530-rework-mt753-01-_setup.patch b/target/linux/rockchip/patches-5.19/0032-net-dsa-mt7530-rework-mt753-01-_setup.patch deleted file mode 100644 index 68822ca9a..000000000 --- a/target/linux/rockchip/patches-5.19/0032-net-dsa-mt7530-rework-mt753-01-_setup.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 65046fea942259fb22ae9cdfb86971d8c4e4237b Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Fri, 10 Jun 2022 19:05:38 +0200 -Subject: [PATCH 32/51] net: dsa: mt7530: rework mt753[01]_setup - -Enumerate available cpu-ports instead of using hardcoded constant. - -Suggested-by: Vladimir Oltean -Signed-off-by: Frank Wunderlich -Reviewed-by: Vladimir Oltean -Reviewed-by: Florian Fainelli -Signed-off-by: Jakub Kicinski ---- - drivers/net/dsa/mt7530.c | 25 +++++++++++++++++++++---- - 1 file changed, 21 insertions(+), 4 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2095,11 +2095,12 @@ static int - mt7530_setup(struct dsa_switch *ds) - { - struct mt7530_priv *priv = ds->priv; -+ struct device_node *dn = NULL; - struct device_node *phy_node; - struct device_node *mac_np; - struct mt7530_dummy_poll p; - phy_interface_t interface; -- struct device_node *dn; -+ struct dsa_port *cpu_dp; - u32 id, val; - int ret, i; - -@@ -2107,7 +2108,19 @@ mt7530_setup(struct dsa_switch *ds) - * controller also is the container for two GMACs nodes representing - * as two netdev instances. - */ -- dn = dsa_to_port(ds, MT7530_CPU_PORT)->master->dev.of_node->parent; -+ dsa_switch_for_each_cpu_port(cpu_dp, ds) { -+ dn = cpu_dp->master->dev.of_node->parent; -+ /* It doesn't matter which CPU port is found first, -+ * their masters should share the same parent OF node -+ */ -+ break; -+ } -+ -+ if (!dn) { -+ dev_err(ds->dev, "parent OF node of DSA master not found"); -+ return -EINVAL; -+ } -+ - ds->assisted_learning_on_cpu_port = true; - ds->mtu_enforcement_ingress = true; - -@@ -2269,6 +2282,7 @@ mt7531_setup(struct dsa_switch *ds) - { - struct mt7530_priv *priv = ds->priv; - struct mt7530_dummy_poll p; -+ struct dsa_port *cpu_dp; - u32 val, id; - int ret, i; - -@@ -2343,8 +2357,11 @@ mt7531_setup(struct dsa_switch *ds) - CORE_PLL_GROUP4, val); - - /* BPDU to CPU port */ -- mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK, -- BIT(MT7530_CPU_PORT)); -+ dsa_switch_for_each_cpu_port(cpu_dp, ds) { -+ mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK, -+ BIT(cpu_dp->index)); -+ break; -+ } - mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, - MT753X_BPDU_CPU_ONLY); - diff --git a/target/linux/rockchip/patches-5.19/0033-net-dsa-mt7530-get-cpu-port-via-dp-cpu_dp-instead-of.patch b/target/linux/rockchip/patches-5.19/0033-net-dsa-mt7530-get-cpu-port-via-dp-cpu_dp-instead-of.patch deleted file mode 100644 index b744d7975..000000000 --- a/target/linux/rockchip/patches-5.19/0033-net-dsa-mt7530-get-cpu-port-via-dp-cpu_dp-instead-of.patch +++ /dev/null @@ -1,117 +0,0 @@ -From 28650c65d8ca16a1b607a06fd0bce67371143069 Mon Sep 17 00:00:00 2001 -From: Frank Wunderlich -Date: Fri, 10 Jun 2022 19:05:39 +0200 -Subject: [PATCH 33/51] net: dsa: mt7530: get cpu-port via dp->cpu_dp instead - of constant - -Replace last occurences of hardcoded cpu-port by cpu_dp member of -dsa_port struct. - -Now the constant can be dropped. - -Suggested-by: Vladimir Oltean -Signed-off-by: Frank Wunderlich -Reviewed-by: Vladimir Oltean -Reviewed-by: Florian Fainelli -Signed-off-by: Jakub Kicinski ---- - drivers/net/dsa/mt7530.c | 27 ++++++++++++++++++++------- - drivers/net/dsa/mt7530.h | 1 - - 2 files changed, 20 insertions(+), 8 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -1041,6 +1041,7 @@ static int - mt7530_port_enable(struct dsa_switch *ds, int port, - struct phy_device *phy) - { -+ struct dsa_port *dp = dsa_to_port(ds, port); - struct mt7530_priv *priv = ds->priv; - - mutex_lock(&priv->reg_mutex); -@@ -1049,7 +1050,11 @@ mt7530_port_enable(struct dsa_switch *ds - * restore the port matrix if the port is the member of a certain - * bridge. - */ -- priv->ports[port].pm |= PCR_MATRIX(BIT(MT7530_CPU_PORT)); -+ if (dsa_port_is_user(dp)) { -+ struct dsa_port *cpu_dp = dp->cpu_dp; -+ -+ priv->ports[port].pm |= PCR_MATRIX(BIT(cpu_dp->index)); -+ } - priv->ports[port].enable = true; - mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, - priv->ports[port].pm); -@@ -1198,7 +1203,8 @@ mt7530_port_bridge_join(struct dsa_switc - struct netlink_ext_ack *extack) - { - struct dsa_port *dp = dsa_to_port(ds, port), *other_dp; -- u32 port_bitmap = BIT(MT7530_CPU_PORT); -+ struct dsa_port *cpu_dp = dp->cpu_dp; -+ u32 port_bitmap = BIT(cpu_dp->index); - struct mt7530_priv *priv = ds->priv; - - mutex_lock(&priv->reg_mutex); -@@ -1275,9 +1281,12 @@ mt7530_port_set_vlan_unaware(struct dsa_ - * the CPU port get out of VLAN filtering mode. - */ - if (all_user_ports_removed) { -- mt7530_write(priv, MT7530_PCR_P(MT7530_CPU_PORT), -+ struct dsa_port *dp = dsa_to_port(ds, port); -+ struct dsa_port *cpu_dp = dp->cpu_dp; -+ -+ mt7530_write(priv, MT7530_PCR_P(cpu_dp->index), - PCR_MATRIX(dsa_user_ports(priv->ds))); -- mt7530_write(priv, MT7530_PVC_P(MT7530_CPU_PORT), PORT_SPEC_TAG -+ mt7530_write(priv, MT7530_PVC_P(cpu_dp->index), PORT_SPEC_TAG - | PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); - } - } -@@ -1315,6 +1324,7 @@ mt7530_port_bridge_leave(struct dsa_swit - struct dsa_bridge bridge) - { - struct dsa_port *dp = dsa_to_port(ds, port), *other_dp; -+ struct dsa_port *cpu_dp = dp->cpu_dp; - struct mt7530_priv *priv = ds->priv; - - mutex_lock(&priv->reg_mutex); -@@ -1343,8 +1353,8 @@ mt7530_port_bridge_leave(struct dsa_swit - */ - if (priv->ports[port].enable) - mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, -- PCR_MATRIX(BIT(MT7530_CPU_PORT))); -- priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT)); -+ PCR_MATRIX(BIT(cpu_dp->index))); -+ priv->ports[port].pm = PCR_MATRIX(BIT(cpu_dp->index)); - - /* When a port is removed from the bridge, the port would be set up - * back to the default as is at initial boot which is a VLAN-unaware -@@ -1511,6 +1521,9 @@ static int - mt7530_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, - struct netlink_ext_ack *extack) - { -+ struct dsa_port *dp = dsa_to_port(ds, port); -+ struct dsa_port *cpu_dp = dp->cpu_dp; -+ - if (vlan_filtering) { - /* The port is being kept as VLAN-unaware port when bridge is - * set up with vlan_filtering not being set, Otherwise, the -@@ -1518,7 +1531,7 @@ mt7530_port_vlan_filtering(struct dsa_sw - * for becoming a VLAN-aware port. - */ - mt7530_port_set_vlan_aware(ds, port); -- mt7530_port_set_vlan_aware(ds, MT7530_CPU_PORT); -+ mt7530_port_set_vlan_aware(ds, cpu_dp->index); - } else { - mt7530_port_set_vlan_unaware(ds, port); - } ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -8,7 +8,6 @@ - - #define MT7530_NUM_PORTS 7 - #define MT7530_NUM_PHYS 5 --#define MT7530_CPU_PORT 6 - #define MT7530_NUM_FDB_RECORDS 2048 - #define MT7530_ALL_MEMBERS 0xff - diff --git a/target/linux/rockchip/patches-5.19/0034-drm-rockchip-Fix-Kconfig-dependencies-for-display-po.patch b/target/linux/rockchip/patches-5.19/0034-drm-rockchip-Fix-Kconfig-dependencies-for-display-po.patch deleted file mode 100644 index 47cb28b7b..000000000 --- a/target/linux/rockchip/patches-5.19/0034-drm-rockchip-Fix-Kconfig-dependencies-for-display-po.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 83aef06999a8ee66444ef52986834780f5e4f94a Mon Sep 17 00:00:00 2001 -From: Ren Zhijie -Date: Sat, 7 May 2022 18:09:10 +0800 -Subject: [PATCH 34/51] drm/rockchip: Fix Kconfig dependencies for display-port - encoders - -The DP-helper module has been replaced by the display-helper module. -So the driver have to select it. - -Reported-by: Hulk Robot -Fixes: 1e0f66420b13("drm/display: Introduce a DRM display-helper module") -Signed-off-by: Ren Zhijie -Reviewed-by: Andy Yan -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20220507100910.93705-1-renzhijie2@huawei.com ---- - drivers/gpu/drm/rockchip/Kconfig | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/gpu/drm/rockchip/Kconfig -+++ b/drivers/gpu/drm/rockchip/Kconfig -@@ -2,7 +2,6 @@ - config DRM_ROCKCHIP - tristate "DRM Support for Rockchip" - depends on DRM && ROCKCHIP_IOMMU -- select DRM_DISPLAY_HELPER if ROCKCHIP_ANALOGIX_DP - select DRM_GEM_CMA_HELPER - select DRM_KMS_HELPER - select DRM_PANEL -@@ -38,6 +37,7 @@ config ROCKCHIP_VOP2 - config ROCKCHIP_ANALOGIX_DP - bool "Rockchip specific extensions for Analogix DP driver" - depends on ROCKCHIP_VOP -+ select DRM_DISPLAY_HELPER - select DRM_DISPLAY_DP_HELPER - help - This selects support for Rockchip SoC specific extensions -@@ -47,6 +47,8 @@ config ROCKCHIP_ANALOGIX_DP - config ROCKCHIP_CDN_DP - bool "Rockchip cdn DP" - depends on EXTCON=y || (EXTCON=m && DRM_ROCKCHIP=m) -+ select DRM_DISPLAY_HELPER -+ select DRM_DISPLAY_DP_HELPER - help - This selects support for Rockchip SoC specific extensions - for the cdn DP driver. If you want to enable Dp on diff --git a/target/linux/rockchip/patches-5.19/0035-drm-rockchip-remove-unneeded-semicolon-from-vop2-dri.patch b/target/linux/rockchip/patches-5.19/0035-drm-rockchip-remove-unneeded-semicolon-from-vop2-dri.patch deleted file mode 100644 index c0adcc66d..000000000 --- a/target/linux/rockchip/patches-5.19/0035-drm-rockchip-remove-unneeded-semicolon-from-vop2-dri.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 9226222a72f2a336495728d24cd9bff7685f1cbe Mon Sep 17 00:00:00 2001 -From: Yang Li -Date: Fri, 6 May 2022 07:26:59 +0800 -Subject: [PATCH 35/51] drm/rockchip: remove unneeded semicolon from vop2 - driver - -Eliminate the following coccicheck warning: -./drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:1476:2-3: Unneeded -semicolon - -Reported-by: Abaci Robot -Signed-off-by: Yang Li -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20220505232659.4405-1-yang.lee@linux.alibaba.com ---- - drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c -@@ -1477,7 +1477,7 @@ static void rk3568_set_intf_mux(struct v - default: - drm_err(vop2->drm, "Invalid interface id %d on vp%d\n", id, vp->id); - return; -- }; -+ } - - dip |= RK3568_DSP_IF_POL__CFG_DONE_IMD; - diff --git a/target/linux/rockchip/patches-5.19/0036-drm-rockchip-Fix-spelling-mistake-aligened-aligned.patch b/target/linux/rockchip/patches-5.19/0036-drm-rockchip-Fix-spelling-mistake-aligened-aligned.patch deleted file mode 100644 index 0b3925a69..000000000 --- a/target/linux/rockchip/patches-5.19/0036-drm-rockchip-Fix-spelling-mistake-aligened-aligned.patch +++ /dev/null @@ -1,26 +0,0 @@ -From c130c07b62dd4cc18c9b10ab65da6c6a5d41fcfa Mon Sep 17 00:00:00 2001 -From: Colin Ian King -Date: Thu, 5 May 2022 12:10:44 +0100 -Subject: [PATCH 36/51] drm/rockchip: Fix spelling mistake "aligened" -> - "aligned" - -There is a spelling mistake in a drm_err message. Fix it. - -Signed-off-by: Colin Ian King -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20220505111044.374174-1-colin.i.king@gmail.com ---- - drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c -@@ -1202,7 +1202,7 @@ static void vop2_plane_atomic_update(str - */ - stride = (fb->pitches[0] << 3) / bpp; - if ((stride & 0x3f) && (xmirror || rotate_90 || rotate_270)) -- drm_err(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligened\n", -+ drm_err(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligned\n", - vp->id, win->data->name, stride); - - rb_swap = vop2_afbc_rb_swap(fb->format->format); diff --git a/target/linux/rockchip/patches-5.19/0038-drm-Drop-drm_edid.h-from-drm_crtc.h.patch b/target/linux/rockchip/patches-5.19/0038-drm-Drop-drm_edid.h-from-drm_crtc.h.patch deleted file mode 100644 index 95eb69b22..000000000 --- a/target/linux/rockchip/patches-5.19/0038-drm-Drop-drm_edid.h-from-drm_crtc.h.patch +++ /dev/null @@ -1,569 +0,0 @@ -From 38666f6a53492c98e2224bb292b89671bc2ed866 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= -Date: Tue, 14 Jun 2022 12:02:45 +0300 -Subject: [PATCH 38/51] drm: Drop drm_edid.h from drm_crtc.h -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -drm_crtc.h has no need for drm_edid.h, so don't include it. -Avoids useless rebuilds of the entire universe when -touching drm_edid.h. - -Quite a few placs do currently depend on drm_edid.h without -actually including it directly. All of those need to be fixed -up. - -v2: Fix up i915 and msm some more -v3: Fix alphabetical ordering (Sam) - -Signed-off-by: Ville Syrjälä -Link: https://patchwork.freedesktop.org/patch/msgid/20220614090245.30283-1-ville.syrjala@linux.intel.com -Acked-by: Sam Ravnborg -Acked-by: Jani Nikula ---- - drivers/gpu/drm/arm/malidp_mw.c | 1 + - drivers/gpu/drm/aspeed/aspeed_gfx_out.c | 1 + - drivers/gpu/drm/ast/ast_mode.c | 1 + - drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 1 + - drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 1 + - drivers/gpu/drm/bridge/lontium-lt8912b.c | 1 + - drivers/gpu/drm/bridge/parade-ps8640.c | 1 + - drivers/gpu/drm/bridge/simple-bridge.c | 1 + - drivers/gpu/drm/bridge/ti-tfp410.c | 1 + - drivers/gpu/drm/display/drm_dp_helper.c | 1 + - drivers/gpu/drm/display/drm_dp_mst_topology.c | 1 + - drivers/gpu/drm/drm_client_modeset.c | 1 + - drivers/gpu/drm/drm_kms_helper_common.c | 1 + - drivers/gpu/drm/drm_modes.c | 1 + - drivers/gpu/drm/exynos/exynos_mixer.c | 1 + - drivers/gpu/drm/gma500/cdv_intel_dp.c | 1 + - drivers/gpu/drm/gma500/oaktrail_hdmi.c | 1 + - drivers/gpu/drm/gma500/oaktrail_lvds.c | 1 + - drivers/gpu/drm/gma500/psb_intel_modes.c | 2 ++ - drivers/gpu/drm/gud/gud_connector.c | 1 + - drivers/gpu/drm/i915/display/intel_bios.c | 1 + - drivers/gpu/drm/i915/display/intel_dp.c | 1 + - drivers/gpu/drm/i915/display/intel_lspcon.c | 1 + - drivers/gpu/drm/i915/display/intel_opregion.c | 2 ++ - drivers/gpu/drm/imx/imx-ldb.c | 1 + - drivers/gpu/drm/imx/imx-tve.c | 1 + - drivers/gpu/drm/imx/parallel-display.c | 1 + - drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c | 2 ++ - drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 1 + - drivers/gpu/drm/omapdrm/dss/hdmi4.c | 1 + - drivers/gpu/drm/omapdrm/dss/hdmi5.c | 1 + - drivers/gpu/drm/panel/panel-edp.c | 1 + - drivers/gpu/drm/panel/panel-simple.c | 1 + - drivers/gpu/drm/qxl/qxl_display.c | 1 + - drivers/gpu/drm/rcar-du/rcar_du_writeback.c | 1 + - drivers/gpu/drm/rockchip/rk3066_hdmi.c | 1 + - drivers/gpu/drm/solomon/ssd130x.c | 1 + - drivers/gpu/drm/stm/ltdc.c | 1 + - drivers/gpu/drm/tiny/arcpgu.c | 1 + - drivers/gpu/drm/tiny/bochs.c | 1 + - drivers/gpu/drm/tiny/cirrus.c | 1 + - drivers/gpu/drm/tiny/gm12u320.c | 1 + - drivers/gpu/drm/udl/udl_connector.c | 1 + - drivers/gpu/drm/vboxvideo/vbox_mode.c | 1 + - drivers/gpu/drm/virtio/virtgpu_display.c | 1 + - drivers/gpu/drm/virtio/virtgpu_vq.c | 2 ++ - drivers/gpu/drm/vkms/vkms_output.c | 1 + - drivers/gpu/drm/vkms/vkms_writeback.c | 1 + - include/drm/drm_crtc.h | 1 - - 49 files changed, 52 insertions(+), 1 deletion(-) - ---- a/drivers/gpu/drm/arm/malidp_mw.c -+++ b/drivers/gpu/drm/arm/malidp_mw.c -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - #include - #include - #include ---- a/drivers/gpu/drm/aspeed/aspeed_gfx_out.c -+++ b/drivers/gpu/drm/aspeed/aspeed_gfx_out.c -@@ -4,6 +4,7 @@ - #include - #include - #include -+#include - #include - - #include "aspeed_gfx.h" ---- a/drivers/gpu/drm/ast/ast_mode.c -+++ b/drivers/gpu/drm/ast/ast_mode.c -@@ -36,6 +36,7 @@ - #include - #include - #include -+#include - #include - #include - #include ---- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c -+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c -@@ -24,6 +24,7 @@ - #include - #include - #include -+#include - #include - #include - #include ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c -@@ -43,6 +43,7 @@ - #include - #include - #include -+#include - #include - #include - #include ---- a/drivers/gpu/drm/bridge/lontium-lt8912b.c -+++ b/drivers/gpu/drm/bridge/lontium-lt8912b.c -@@ -11,6 +11,7 @@ - - #include - #include -+#include - #include - #include - ---- a/drivers/gpu/drm/bridge/parade-ps8640.c -+++ b/drivers/gpu/drm/bridge/parade-ps8640.c -@@ -16,6 +16,7 @@ - #include - #include - #include -+#include - #include - #include - #include ---- a/drivers/gpu/drm/bridge/simple-bridge.c -+++ b/drivers/gpu/drm/bridge/simple-bridge.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - ---- a/drivers/gpu/drm/bridge/ti-tfp410.c -+++ b/drivers/gpu/drm/bridge/ti-tfp410.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - #include - #include - ---- a/drivers/gpu/drm/display/drm_dp_helper.c -+++ b/drivers/gpu/drm/display/drm_dp_helper.c -@@ -32,6 +32,7 @@ - - #include - #include -+#include - #include - #include - #include ---- a/drivers/gpu/drm/display/drm_dp_mst_topology.c -+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c -@@ -42,6 +42,7 @@ - #include - #include - #include -+#include - #include - #include - ---- a/drivers/gpu/drm/drm_client_modeset.c -+++ b/drivers/gpu/drm/drm_client_modeset.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - ---- a/drivers/gpu/drm/drm_kms_helper_common.c -+++ b/drivers/gpu/drm/drm_kms_helper_common.c -@@ -27,6 +27,7 @@ - - #include - -+#include - #include - - #include "drm_crtc_helper_internal.h" ---- a/drivers/gpu/drm/drm_modes.c -+++ b/drivers/gpu/drm/drm_modes.c -@@ -41,6 +41,7 @@ - - #include - #include -+#include - #include - #include - ---- a/drivers/gpu/drm/exynos/exynos_mixer.c -+++ b/drivers/gpu/drm/exynos/exynos_mixer.c -@@ -25,6 +25,7 @@ - #include - #include - -+#include - #include - #include - #include ---- a/drivers/gpu/drm/gma500/cdv_intel_dp.c -+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c -@@ -32,6 +32,7 @@ - #include - #include - #include -+#include - #include - - #include "gma_display.h" ---- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c -+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c -@@ -27,6 +27,7 @@ - #include - - #include -+#include - #include - - #include "psb_drv.h" ---- a/drivers/gpu/drm/gma500/oaktrail_lvds.c -+++ b/drivers/gpu/drm/gma500/oaktrail_lvds.c -@@ -13,6 +13,7 @@ - - #include - -+#include - #include - - #include "intel_bios.h" ---- a/drivers/gpu/drm/gma500/psb_intel_modes.c -+++ b/drivers/gpu/drm/gma500/psb_intel_modes.c -@@ -7,6 +7,8 @@ - - #include - -+#include -+ - #include "psb_intel_drv.h" - - /** ---- a/drivers/gpu/drm/gud/gud_connector.c -+++ b/drivers/gpu/drm/gud/gud_connector.c -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - #include - #include - #include ---- a/drivers/gpu/drm/i915/display/intel_bios.c -+++ b/drivers/gpu/drm/i915/display/intel_bios.c -@@ -25,6 +25,7 @@ - * - */ - -+#include - #include - #include - ---- a/drivers/gpu/drm/i915/display/intel_dp.c -+++ b/drivers/gpu/drm/i915/display/intel_dp.c -@@ -40,6 +40,7 @@ - #include - #include - #include -+#include - #include - - #include "g4x_dp.h" ---- a/drivers/gpu/drm/i915/display/intel_lspcon.c -+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c -@@ -26,6 +26,7 @@ - #include - #include - #include -+#include - - #include "intel_de.h" - #include "intel_display_types.h" ---- a/drivers/gpu/drm/i915/display/intel_opregion.c -+++ b/drivers/gpu/drm/i915/display/intel_opregion.c -@@ -30,6 +30,8 @@ - #include - #include - -+#include -+ - #include "i915_drv.h" - #include "intel_acpi.h" - #include "intel_backlight.h" ---- a/drivers/gpu/drm/imx/imx-ldb.c -+++ b/drivers/gpu/drm/imx/imx-ldb.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - #include - #include - #include ---- a/drivers/gpu/drm/imx/imx-tve.c -+++ b/drivers/gpu/drm/imx/imx-tve.c -@@ -18,6 +18,7 @@ - #include