mirror of
https://github.com/coolsnowwolf/lede.git
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ar71xx: add SGR-W500-N85b v2.0 and TL-WDR3227 v2(ar934x+ar8035) support
This commit is contained in:
coolsnowwolf
parent
742a43571f
commit
c3bb5f072f
@ -728,6 +728,9 @@ rut900)
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ucidef_set_led_switch "lan2" "LAN2" "$board:green:lan2" "switch0" "0x08"
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ucidef_set_led_switch "lan3" "LAN3" "$board:green:lan3" "switch0" "0x04"
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;;
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sgr-w500-n85b-v2)
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ucidef_set_led_wlan "wlan" "WLAN" "grentech:green:wlan2g" "phy0tpt"
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;;
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smart-300)
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ucidef_set_led_netdev "wan" "WAN" "nc-link:green:wan" "eth0"
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ucidef_set_led_switch "lan1" "LAN1" "nc-link:green:lan1" "switch0" "0x04"
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@ -870,6 +873,10 @@ tl-wr2041n-v2|\
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tl-wr1041n-v2)
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ucidef_set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt"
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;;
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tl-wdr3227-v2)
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ucidef_set_led_wlan "wlan2g" "WLAN2G" "tp-link:green:wlan2g" "phy0tpt"
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ucidef_set_led_wlan "wlan5g" "WLAN5G" "tp-link:green:wlan5g" "phy1tpt"
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;;
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tl-wdr3320-v2)
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ucidef_set_led_wlan "wlan5g" "WLAN5G" "tp-link:green:wlan5g" "phy0tpt"
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;;
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@ -121,6 +121,7 @@ ar71xx_setup_interfaces()
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re450|\
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rocket-m-xw|\
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sc300m |\
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sgr-w500-n85b-v2|\
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tl-mr10u|\
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tl-mr11u|\
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tl-mr12u|\
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@ -141,6 +142,7 @@ ar71xx_setup_interfaces()
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tl-wa901nd-v3|\
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tl-wa901nd-v4|\
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tl-wa901nd-v5|\
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tl-wdr3227-v2|\
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tl-wr703n|\
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tl-wr802n-v1|\
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tl-wr802n-v2|\
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@ -416,6 +416,9 @@ get_status_led() {
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smart-300)
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status_led="nc-link:green:system"
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;;
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sgr-w500-n85b-v2)
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status_led="grentech:green:status"
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;;
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qihoo-c301)
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status_led="qihoo:green:status"
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;;
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@ -464,6 +467,7 @@ get_status_led() {
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tl-wa901nd-v3|\
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tl-wa901nd-v4|\
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tl-wa901nd-v5|\
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tl-wdr3227-v2|\
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tl-wdr3320-v2|\
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tl-wdr3500|\
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tl-wr1041n-v2|\
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@ -349,6 +349,9 @@ tplink_board_detect() {
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"934100"*)
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model="NC-LINK SMART-300"
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;;
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"322700"*)
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model="TP-Link TL-WDR3227"
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;;
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"c50000"*)
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model="TP-Link Archer C5"
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;;
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@ -784,6 +787,9 @@ ar71xx_board_detect() {
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*"GL-USB150")
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name="gl-usb150"
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;;
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"GRENTECH SGR-W500-N85b v2.0")
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name="sgr-w500-n85b-v2"
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;;
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*"HiveAP-121")
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name="hiveap-121"
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;;
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@ -1268,6 +1274,9 @@ ar71xx_board_detect() {
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*"TL-WA901ND v5")
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name="tl-wa901nd-v5"
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;;
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*"TL-WDR3227 v2")
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name="tl-wdr3227-v2"
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;;
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*"TL-WDR3320 v2")
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name="tl-wdr3320-v2"
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;;
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@ -355,6 +355,7 @@ platform_check_image() {
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hornet-ub|\
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mr12|\
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mr16|\
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sgr-w500-n85b-v2|\
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zbt-we1526|\
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zcn-1523h-2|\
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zcn-1523h-5)
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@ -456,6 +457,7 @@ platform_check_image() {
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tl-wa901nd-v3|\
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tl-wa901nd-v4|\
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tl-wa901nd-v5|\
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tl-wdr3227-v2|\
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tl-wdr3320-v2|\
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tl-wdr3500|\
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tl-wdr4300|\
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@ -189,6 +189,7 @@ CONFIG_ATH79=y
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# CONFIG_ATH79_MACH_SC1750 is not set
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# CONFIG_ATH79_MACH_SC300M is not set
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# CONFIG_ATH79_MACH_SC450 is not set
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# CONFIG_ATH79_MACH_SGR_W500_N85B_V2 is not set
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# CONFIG_ATH79_MACH_SMART_300 is not set
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# CONFIG_ATH79_MACH_SOM9331 is not set
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# CONFIG_ATH79_MACH_SR3200 is not set
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@ -214,6 +215,7 @@ CONFIG_ATH79=y
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# CONFIG_ATH79_MACH_TL_WA901ND_V2 is not set
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# CONFIG_ATH79_MACH_TL_WA901ND_V4 is not set
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# CONFIG_ATH79_MACH_TL_WAX50RE is not set
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# CONFIG_ATH79_MACH_TL_WDR3227_V2 is not set
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# CONFIG_ATH79_MACH_TL_WDR3320_V2 is not set
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# CONFIG_ATH79_MACH_TL_WDR3500 is not set
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# CONFIG_ATH79_MACH_TL_WDR4300 is not set
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@ -189,6 +189,7 @@ CONFIG_ATH79=y
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# CONFIG_ATH79_MACH_SC1750 is not set
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# CONFIG_ATH79_MACH_SC300M is not set
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# CONFIG_ATH79_MACH_SC450 is not set
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# CONFIG_ATH79_MACH_SGR_W500_N85B_V2 is not set
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# CONFIG_ATH79_MACH_SMART_300 is not set
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# CONFIG_ATH79_MACH_SOM9331 is not set
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# CONFIG_ATH79_MACH_SR3200 is not set
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@ -214,6 +215,7 @@ CONFIG_ATH79=y
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# CONFIG_ATH79_MACH_TL_WA901ND_V2 is not set
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# CONFIG_ATH79_MACH_TL_WA901ND_V4 is not set
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# CONFIG_ATH79_MACH_TL_WAX50RE is not set
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# CONFIG_ATH79_MACH_TL_WDR3227_V2 is not set
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# CONFIG_ATH79_MACH_TL_WDR3320_V2 is not set
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# CONFIG_ATH79_MACH_TL_WDR3500 is not set
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# CONFIG_ATH79_MACH_TL_WDR4300 is not set
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@ -105,6 +105,17 @@ config ATH79_MACH_SC450
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select ATH79_DEV_M25P80
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select ATH79_DEV_USB
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select ATH79_DEV_WMAC
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config ATH79_MACH_SGR_W500_N85B_V2
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bool "GRENTECH SGR-W500-N85b v2.0 support"
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select SOC_AR934X
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select ATH79_DEV_AP9X_PCI if PCI
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select ATH79_DEV_ETH
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select ATH79_DEV_GPIO_BUTTONS
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select ATH79_DEV_LEDS_GPIO
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select ATH79_DEV_M25P80
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select ATH79_DEV_WMAC
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select ATH79_DEV_USB
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config ATH79_MACH_ALL0258N
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bool "Allnet ALL0258N support"
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@ -1819,6 +1830,17 @@ config ATH79_MACH_TL_WA901ND_V4
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select ATH79_DEV_M25P80
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select ATH79_DEV_WMAC
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config ATH79_MACH_TL_WDR3227_V2
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bool "TP-LINK TL-WDR3227 v2 board support"
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select SOC_AR934X
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select ATH79_DEV_AP9X_PCI if PCI
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select ATH79_DEV_ETH
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select ATH79_DEV_GPIO_BUTTONS
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select ATH79_DEV_LEDS_GPIO
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select ATH79_DEV_M25P80
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select ATH79_DEV_USB
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select ATH79_DEV_WMAC
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config ATH79_MACH_TL_WDR3320_V2
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bool "TP-LINK TL-WDR3320 v2 board support"
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select SOC_AR934X
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@ -200,6 +200,7 @@ obj-$(CONFIG_ATH79_MACH_RW2458N) += mach-rw2458n.o
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obj-$(CONFIG_ATH79_MACH_SC1750) += mach-sc1750.o
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obj-$(CONFIG_ATH79_MACH_SC300M) += mach-sc300m.o
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obj-$(CONFIG_ATH79_MACH_SC450) += mach-sc450.o
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obj-$(CONFIG_ATH79_MACH_SGR_W500_N85B_V2) += mach-sgr-w500-n85b-v2.o
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obj-$(CONFIG_ATH79_MACH_SMART_300) += mach-smart-300.o
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obj-$(CONFIG_ATH79_MACH_SOM9331) += mach-som9331.o
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obj-$(CONFIG_ATH79_MACH_SR3200) += mach-sr3200.o
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@ -226,6 +227,7 @@ obj-$(CONFIG_ATH79_MACH_TL_WA901ND_V2) += mach-tl-wa901nd-v2.o
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obj-$(CONFIG_ATH79_MACH_TL_WA901ND_V4) += mach-tl-wa901nd-v4.o
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obj-$(CONFIG_ATH79_MACH_TL_WAX50RE) += mach-tl-wax50re.o
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obj-$(CONFIG_ATH79_MACH_TL_WDR3320_V2) += mach-tl-wdr3320-v2.o
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obj-$(CONFIG_ATH79_MACH_TL_WDR3320_V2) += mach-tl-wdr3320-v2.o
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obj-$(CONFIG_ATH79_MACH_TL_WDR3500) += mach-tl-wdr3500.o
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obj-$(CONFIG_ATH79_MACH_TL_WDR4300) += mach-tl-wdr4300.o
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obj-$(CONFIG_ATH79_MACH_TL_WDR6500_V2) += mach-tl-wdr6500-v2.o
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@ -0,0 +1,134 @@
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/*
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* GRENTECH SGR-W500-N85b v2.0 board support
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*
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* Copyright (c) 2017 Weijie Gao <hackpascal@gmail.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-spi.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define GRENTECH_GPIO_LED_STATUS 21
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#define GRENTECH_GPIO_LED_WLAN2G 20
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#define GRENTECH_GPIO_BUTTON_RESET 3
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#define GRENTECH_GPIO_RTL8211E_RESET_L 11
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#define GRENTECH_GPIO_EXTERNAL_LNA0 18
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#define GRENTECH_GPIO_EXTERNAL_LNA1 19
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#define GRENTECH_KEYS_POLL_INTERVAL 20 /* msecs */
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#define GRENTECH_KEYS_DEBOUNCE_INTERVAL (3 * GRENTECH_KEYS_POLL_INTERVAL)
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#define GRENTECH_MAC_OFFSET 0
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#define GRENTECH_WMAC_CALDATA_OFFSET 0x1000
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#define GRENTECH_PCIE_CALDATA_OFFSET 0x5000
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static struct gpio_led grentech_leds_gpio[] __initdata = {
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{
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.name = "grentech:green:status",
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.gpio = GRENTECH_GPIO_LED_STATUS,
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.active_low = 1,
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},
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{
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.name = "grentech:green:wlan2g",
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.gpio = GRENTECH_GPIO_LED_WLAN2G,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button grentech_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = GRENTECH_KEYS_DEBOUNCE_INTERVAL,
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.gpio = GRENTECH_GPIO_BUTTON_RESET,
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.active_low = 1,
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},
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};
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static struct mdio_board_info grentech_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 1,
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},
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};
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static void __init grentech_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 tmpmac[ETH_ALEN];
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(grentech_leds_gpio),
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grentech_leds_gpio);
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ath79_register_gpio_keys_polled(-1, GRENTECH_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(grentech_gpio_keys),
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grentech_gpio_keys);
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gpio_request_one(GRENTECH_GPIO_RTL8211E_RESET_L,
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GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
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"RTL8211E reset pin");
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ath79_wmac_set_ext_lna_gpio(0, GRENTECH_GPIO_EXTERNAL_LNA0);
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ath79_wmac_set_ext_lna_gpio(1, GRENTECH_GPIO_EXTERNAL_LNA1);
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ath79_init_mac(tmpmac, art + GRENTECH_MAC_OFFSET, 1);
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ath79_register_wmac(art + GRENTECH_WMAC_CALDATA_OFFSET, tmpmac);
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/* AR9382 */
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ath79_init_mac(tmpmac, art + GRENTECH_MAC_OFFSET, 2);
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ap9x_pci_setup_wmac_led_pin(0, 6);
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ap91_pci_init(art + GRENTECH_PCIE_CALDATA_OFFSET, tmpmac);
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ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
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ath79_register_mdio(0, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, art + GRENTECH_MAC_OFFSET, 0);
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mdiobus_register_board_info(grentech_mdio0_info,
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ARRAY_SIZE(grentech_mdio0_info));
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/* GMAC0 is connected to a RTL8211E Gigabit PHY */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(1);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x46000000;
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ath79_eth0_pll_data.pll_100 = 0x0101;
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ath79_eth0_pll_data.pll_10 = 0x1313;
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ath79_register_eth(0);
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}
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MIPS_MACHINE(ATH79_MACH_SGR_W500_N85B_V2, "SGRW500N85BV2", "GRENTECH SGR-W500-N85b v2.0",
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grentech_setup);
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186
target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3227-v2.c
Normal file
186
target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3227-v2.c
Normal file
@ -0,0 +1,186 @@
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/*
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* TP-LINK TL-WDR3227 board support
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*
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* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2013 Gui Iribarren <gui@altermundi.net>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/ar8216_platform.h>
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#include <linux/platform_data/phy-at803x.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-spi.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define WDR3227_GPIO_LED_USB 11
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#define WDR3227_GPIO_LED_WLAN2G 13
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#define WDR3227_GPIO_LED_SYSTEM 14
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#define WDR3227_GPIO_LED_QSS 15
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#define WDR3227_GPIO_LED_WAN 21
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#define WDR3227_GPIO_LED_LAN1 19
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#define WDR3227_GPIO_LED_LAN2 20
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#define WDR3227_GPIO_LED_LAN3 18
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#define WDR3227_GPIO_LED_LAN4 22
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#define WDR3227_GPIO_BTN_RESET 16
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#define WDR3227_GPIO_BTN_RFKILL 17
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#define WDR3227_GPIO_USB_POWER 12
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#define WDR3227_KEYS_POLL_INTERVAL 20 /* msecs */
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#define WDR3227_KEYS_DEBOUNCE_INTERVAL (3 * WDR3227_KEYS_POLL_INTERVAL)
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#define WDR3227_MAC0_OFFSET 0
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#define WDR3227_MAC1_OFFSET 6
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#define WDR3227_WMAC_CALDATA_OFFSET 0x1000
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#define WDR3227_PCIE_CALDATA_OFFSET 0x5000
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||||
|
||||
static const char *WDR3227_part_probes[] = {
|
||||
"tp-link",
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct flash_platform_data WDR3227_flash_data = {
|
||||
.part_probes = WDR3227_part_probes,
|
||||
};
|
||||
|
||||
static struct gpio_led WDR3227_leds_gpio[] __initdata = {
|
||||
{
|
||||
.name = "tp-link:green:qss",
|
||||
.gpio = WDR3227_GPIO_LED_QSS,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
.name = "tp-link:green:system",
|
||||
.gpio = WDR3227_GPIO_LED_SYSTEM,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
.name = "tp-link:green:usb",
|
||||
.gpio = WDR3227_GPIO_LED_USB,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
.name = "tp-link:green:wlan2g",
|
||||
.gpio = WDR3227_GPIO_LED_WLAN2G,
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_button WDR3227_gpio_keys[] __initdata = {
|
||||
{
|
||||
.desc = "reset",
|
||||
.type = EV_KEY,
|
||||
.code = KEY_RESTART,
|
||||
.debounce_interval = WDR3227_KEYS_DEBOUNCE_INTERVAL,
|
||||
.gpio = WDR3227_GPIO_BTN_RESET,
|
||||
.active_low = 1,
|
||||
},
|
||||
{
|
||||
.desc = "RFKILL switch",
|
||||
.type = EV_SW,
|
||||
.code = KEY_RFKILL,
|
||||
.debounce_interval = WDR3227_KEYS_DEBOUNCE_INTERVAL,
|
||||
.gpio = WDR3227_GPIO_BTN_RFKILL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct at803x_platform_data WDR3227_ar8035_data = {
|
||||
.enable_rgmii_tx_delay = 1,
|
||||
.enable_rgmii_rx_delay = 1,
|
||||
};
|
||||
|
||||
static struct mdio_board_info WDR3227_mdio0_info[] = {
|
||||
{
|
||||
.bus_id = "ag71xx-mdio.0",
|
||||
.phy_addr = 0,
|
||||
.platform_data = &WDR3227_ar8035_data,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init WDR3227_setup(void)
|
||||
{
|
||||
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
|
||||
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
|
||||
u8 tmpmac[ETH_ALEN];
|
||||
|
||||
ath79_register_m25p80(&WDR3227_flash_data);
|
||||
ath79_register_leds_gpio(-1, ARRAY_SIZE(WDR3227_leds_gpio),
|
||||
WDR3227_leds_gpio);
|
||||
ath79_register_gpio_keys_polled(-1, WDR3227_KEYS_POLL_INTERVAL,
|
||||
ARRAY_SIZE(WDR3227_gpio_keys),
|
||||
WDR3227_gpio_keys);
|
||||
|
||||
ath79_init_mac(tmpmac, mac, 0);
|
||||
ath79_register_wmac(art + WDR3227_WMAC_CALDATA_OFFSET, tmpmac);
|
||||
|
||||
ath79_init_mac(tmpmac, mac, 1);
|
||||
ap9x_pci_setup_wmac_led_pin(0, 0);
|
||||
ap91_pci_init(art + WDR3227_PCIE_CALDATA_OFFSET, tmpmac);
|
||||
|
||||
ath79_register_mdio(0, 0x0);
|
||||
|
||||
mdiobus_register_board_info(WDR3227_mdio0_info, ARRAY_SIZE(WDR3227_mdio0_info));
|
||||
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
|
||||
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
|
||||
/* GMAC0 is connected to an AR8035 Gigabit PHY */
|
||||
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
|
||||
ath79_eth0_data.phy_mask = BIT(0);
|
||||
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
|
||||
ath79_eth0_pll_data.pll_1000 = 0x0e000000;
|
||||
ath79_eth0_pll_data.pll_100 = 0x0101;
|
||||
ath79_eth0_pll_data.pll_10 = 0x1313;
|
||||
ath79_register_eth(0);
|
||||
#if 0
|
||||
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
|
||||
|
||||
ath79_register_mdio(1, 0x0);
|
||||
|
||||
/* LAN */
|
||||
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
|
||||
|
||||
/* GMAC1 is connected to the internal switch */
|
||||
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
|
||||
|
||||
ath79_register_eth(1);
|
||||
|
||||
/* WAN */
|
||||
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 2);
|
||||
|
||||
/* GMAC0 is connected to the PHY4 of the internal switch */
|
||||
ath79_switch_data.phy4_mii_en = 1;
|
||||
ath79_switch_data.phy_poll_mask = BIT(4);
|
||||
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
|
||||
ath79_eth0_data.phy_mask = BIT(4);
|
||||
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
|
||||
|
||||
ath79_register_eth(0);
|
||||
#endif
|
||||
ath79_gpio_output_select(WDR3227_GPIO_LED_WAN,
|
||||
AR934X_GPIO_OUT_LED_LINK4);
|
||||
gpio_request_one(WDR3227_GPIO_USB_POWER,
|
||||
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
|
||||
"USB power");
|
||||
ath79_register_usb();
|
||||
}
|
||||
|
||||
MIPS_MACHINE(ATH79_MACH_TL_WDR3227_V2, "TL-WDR3227-v2",
|
||||
"TP-LINK TL-WDR3227 v2",
|
||||
WDR3227_setup);
|
||||
@ -240,6 +240,7 @@ enum ath79_mach_type {
|
||||
ATH79_MACH_SC1750, /* Abicom SC1750 */
|
||||
ATH79_MACH_SC300M, /* Abicom SC300M */
|
||||
ATH79_MACH_SC450, /* Abicom SC450 */
|
||||
ATH79_MACH_SGR_W500_N85B_V2, /* GRENTECH SGR_W500_N85B_V2.0 */
|
||||
ATH79_MACH_SMART_300, /* NC-LINK SMART-300 */
|
||||
ATH79_MACH_SOM9331, /* OpenEmbed SOM9331 */
|
||||
ATH79_MACH_SR3200, /* YunCore SR3200 */
|
||||
@ -277,6 +278,7 @@ enum ath79_mach_type {
|
||||
ATH79_MACH_TL_WA901ND_V3, /* TP-LINK TL-WA901ND v3 */
|
||||
ATH79_MACH_TL_WA901ND_V4, /* TP-LINK TL-WA901ND v4 */
|
||||
ATH79_MACH_TL_WA901ND_V5, /* TP-LINK TL-WA901ND v5 */
|
||||
ATH79_MACH_TL_WDR3227_V2, /* TP-LINK TL-WDR3227 v2 */
|
||||
ATH79_MACH_TL_WDR3320_V2, /* TP-LINK TL-WDR3320 v2 */
|
||||
ATH79_MACH_TL_WDR3500, /* TP-LINK TL-WDR3500 */
|
||||
ATH79_MACH_TL_WDR4300, /* TP-LINK TL-WDR4300 */
|
||||
|
||||
@ -145,6 +145,7 @@ CONFIG_ATH79_MACH_RW2458N=y
|
||||
CONFIG_ATH79_MACH_SC1750=y
|
||||
CONFIG_ATH79_MACH_SC300M=y
|
||||
CONFIG_ATH79_MACH_SC450=y
|
||||
CONFIG_ATH79_MACH_SGR_W500_N85B_V2=y
|
||||
CONFIG_ATH79_MACH_SMART_300=y
|
||||
CONFIG_ATH79_MACH_SOM9331=y
|
||||
CONFIG_ATH79_MACH_SR3200=y
|
||||
@ -155,6 +156,7 @@ CONFIG_ATH79_MACH_TEW_732BR=y
|
||||
CONFIG_ATH79_MACH_TEW_823DRU=y
|
||||
CONFIG_ATH79_MACH_TL_MR3X20=y
|
||||
CONFIG_ATH79_MACH_TL_MR6400=y
|
||||
CONFIG_ATH79_MACH_TL_WDR3227_V2=y
|
||||
CONFIG_ATH79_MACH_TL_WDR3500=y
|
||||
CONFIG_ATH79_MACH_TL_WDR4300=y
|
||||
CONFIG_ATH79_MACH_TL_WDR6500_V2=y
|
||||
|
||||
@ -5,6 +5,12 @@ define LegacyDevice/A60
|
||||
endef
|
||||
LEGACY_DEVICES += A60
|
||||
|
||||
define LegacyDevice/SGRW500N85BV2
|
||||
DEVICE_TITLE := GRENTECH SGR-W500-N85b v2.0
|
||||
DEVICE_PACKAGES := kmod-usb-core kmod-usb2
|
||||
endef
|
||||
LEGACY_DEVICES += SGRW500N85BV2
|
||||
|
||||
define LegacyDevice/ALFANX
|
||||
DEVICE_TITLE := ALFA Network N2/N5 board
|
||||
endef
|
||||
|
||||
@ -267,6 +267,15 @@ define Device/tl-mr6400-v1
|
||||
endef
|
||||
TARGET_DEVICES += tl-mr6400-v1
|
||||
|
||||
define Device/tl-wdr3227-v2
|
||||
$(Device/tplink-8mlzma)
|
||||
DEVICE_TITLE := TP-LINK TL-WDR3227 v2
|
||||
BOARDNAME := TL-WDR3227-v2
|
||||
DEVICE_PROFILE := TLWDR3227V2
|
||||
TPLINK_HWID := 0x32270002
|
||||
endef
|
||||
TARGET_DEVICES += tl-wdr3227-v2
|
||||
|
||||
define Device/tl-wdr3500-v1
|
||||
$(Device/tplink-8mlzma)
|
||||
DEVICE_TITLE := TP-LINK TL-WDR3500 v1
|
||||
|
||||
@ -269,6 +269,7 @@ wnr2000_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,3712k(firmwar
|
||||
wnr2000v3_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,3712k(firmware),64k(art)ro
|
||||
wnr2000v4_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env)ro,3776k(firmware),64k(art)ro
|
||||
r6100_mtdlayout=mtdparts=ar934x-nfc:128k(u-boot)ro,256k(caldata)ro,256k(caldata-backup),512k(config),512k(pot),2048k(kernel),122240k(ubi),25600k@0x1a0000(firmware),2048k(language),3072k(traffic_meter)
|
||||
sgrw500n85bv2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art)ro,16000k@0x50000(firmware)
|
||||
tew823dru_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,15296k(firmware),192k(lang)ro,512k(my-dlink)ro,64k(mac)ro,64k(art)ro
|
||||
wndr4300_mtdlayout=mtdparts=ar934x-nfc:256k(u-boot)ro,256k(u-boot-env)ro,256k(caldata)ro,512k(pot),2048k(language),512k(config),3072k(traffic_meter),2048k(kernel),23552k(ubi),25600k@0x6c0000(firmware),256k(caldata_backup),-(reserved)
|
||||
zcn1523h_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6208k(rootfs),1472k(kernel),64k(configure)ro,64k(mfg)ro,64k(art)ro,7680k@0x50000(firmware)
|
||||
@ -895,6 +896,7 @@ $(eval $(call SingleProfile,AthLzma,64k,BXU2000N2,bxu2000n-2-a1,BXU2000n-2-A1,tt
|
||||
$(eval $(call SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage))
|
||||
$(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage))
|
||||
$(eval $(call SingleProfile,AthLzma,64k,HORNETUBx2,hornet-ub-x2,HORNET-UB,ttyATH0,115200,$$(alfa_mtdlayout_16M),KRuImage,65536))
|
||||
$(eval $(call SingleProfile,AthLzma,64k,SGRW500N85BV2,sgr-w500-n85b-v2,SGRW500N85BV2,ttyS0,115200,$$(sgrw500n85bv2_mtdlayout),RKuImage))
|
||||
$(eval $(call SingleProfile,AthLzma,64k,TUBE2H16M,tube2h-16M,TUBE2H,ttyATH0,115200,$$(alfa_mtdlayout_16M),KRuImage,65536))
|
||||
|
||||
$(eval $(call SingleProfile,CameoAP121_8M,64kraw-nojffs,DIR505A1,dir-505-a1,DIR-505-A1,ttyATH0,115200,"HORNET-PACKET-DIR505A1-3",1.99.99,""))
|
||||
|
||||
Loading…
Reference in New Issue
Block a user