From be692b5939c02a602e32e72284cd2e37a4c406a8 Mon Sep 17 00:00:00 2001 From: Shane Synan Date: Fri, 3 Dec 2021 15:46:36 -0500 Subject: [PATCH] ipq806x: revert SDC clock changes for NBG6817 MMC Revert the SDC "CLK_SET_RATE_GATE" changes to the SDC clock regulator structures. See https://elinux.org/images/b/b8/Elc2013_Clement.pdf > if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count) { > > For this particular clock, setting its rate is possible only if the > clock is ungated (not yet prepared) This fixes the MMC failing to initialize on newer ZyXEL NBG6817 hardware revisions with Kingston MMC. Older revisions should hopefully be unaffected. Check MMC hardware details with: cd /sys/block/mmcblk0/device/ && \ tail -v cid date name manfid fwrev hwrev oemid rev Known problematic MMC names (broken before this commit): * M62704 (dated 12/2018) via myself * M62704 (dated 11/2018) via Drake Stefani Known unaffected MMC names (already working without this commit): * S10004 (dated 12/2015) via slh Now, the MMC properly initializes and later switches to high speed. Thanks to: * Ansuel for maintaining/help with the IPQ806x platform, kernel code * slh for additional debugging and suggestions * dwfreed for confirming newer MMC details, clock frequency * robimarko for device driver debug printing help, clock debugging * Drake for testing and confirmation with their own newer NBG6817 ...and anyone else I missed! Signed-off-by: Shane Synan Tested-by: Shane Synan --- ...7-1-ipq806x-gcc-add-missing-clk-flag.patch | 22 +++---------------- ...missing-clk-and-reset-for-crypto-eng.patch | 10 ++++----- 2 files changed, 8 insertions(+), 24 deletions(-) diff --git a/target/linux/ipq806x/patches-5.10/097-1-ipq806x-gcc-add-missing-clk-flag.patch b/target/linux/ipq806x/patches-5.10/097-1-ipq806x-gcc-add-missing-clk-flag.patch index 3067ec777..3b4900faf 100644 --- a/target/linux/ipq806x/patches-5.10/097-1-ipq806x-gcc-add-missing-clk-flag.patch +++ b/target/linux/ipq806x/patches-5.10/097-1-ipq806x-gcc-add-missing-clk-flag.patch @@ -69,7 +69,7 @@ Signed-off-by: Ansuel Smith }, }, }; -@@ -1293,6 +1295,7 @@ static struct clk_rcg sdc1_src = { +@@ -1424,6 +1426,7 @@ static struct clk_rcg tsif_ref_src = { .parent_names = gcc_pxo_pll8, .num_parents = 2, .ops = &clk_rcg_ops, @@ -77,23 +77,7 @@ Signed-off-by: Ansuel Smith }, } }; -@@ -1341,6 +1344,7 @@ static struct clk_rcg sdc3_src = { - .parent_names = gcc_pxo_pll8, - .num_parents = 2, - .ops = &clk_rcg_ops, -+ .flags = CLK_SET_RATE_GATE, - }, - } - }; -@@ -1424,6 +1428,7 @@ static struct clk_rcg tsif_ref_src = { - .parent_names = gcc_pxo_pll8, - .num_parents = 2, - .ops = &clk_rcg_ops, -+ .flags = CLK_SET_RATE_GATE, - }, - } - }; -@@ -2694,7 +2699,8 @@ static struct clk_dyn_rcg ubi32_core1_sr +@@ -2694,7 +2697,8 @@ static struct clk_dyn_rcg ubi32_core1_sr .parent_names = gcc_pxo_pll8_pll14_pll18_pll0, .num_parents = 5, .ops = &clk_dyn_rcg_ops, @@ -103,7 +87,7 @@ Signed-off-by: Ansuel Smith }, }, }; -@@ -2747,7 +2753,8 @@ static struct clk_dyn_rcg ubi32_core2_sr +@@ -2747,7 +2751,8 @@ static struct clk_dyn_rcg ubi32_core2_sr .parent_names = gcc_pxo_pll8_pll14_pll18_pll0, .num_parents = 5, .ops = &clk_dyn_rcg_ops, diff --git a/target/linux/ipq806x/patches-5.10/097-4-ipq806x-gcc-add-missing-clk-and-reset-for-crypto-eng.patch b/target/linux/ipq806x/patches-5.10/097-4-ipq806x-gcc-add-missing-clk-and-reset-for-crypto-eng.patch index f8f4924dd..d1e047cab 100644 --- a/target/linux/ipq806x/patches-5.10/097-4-ipq806x-gcc-add-missing-clk-and-reset-for-crypto-eng.patch +++ b/target/linux/ipq806x/patches-5.10/097-4-ipq806x-gcc-add-missing-clk-and-reset-for-crypto-eng.patch @@ -107,7 +107,7 @@ Signed-off-by: Ansuel Smith { 64000000, P_PLL8, 3, 1, 2 }, { 96000000, P_PLL8, 4, 0, 0 }, { 192000000, P_PLL8, 2, 0, 0 }, -@@ -2647,7 +2703,9 @@ static const struct freq_tbl clk_tbl_nss +@@ -2645,7 +2701,9 @@ static const struct freq_tbl clk_tbl_nss { 110000000, P_PLL18, 1, 1, 5 }, { 275000000, P_PLL18, 2, 0, 0 }, { 550000000, P_PLL18, 1, 0, 0 }, @@ -117,7 +117,7 @@ Signed-off-by: Ansuel Smith { } }; -@@ -2759,6 +2817,186 @@ static struct clk_dyn_rcg ubi32_core2_sr +@@ -2757,6 +2815,186 @@ static struct clk_dyn_rcg ubi32_core2_sr }, }; @@ -304,7 +304,7 @@ Signed-off-by: Ansuel Smith static struct clk_regmap *gcc_ipq806x_clks[] = { [PLL0] = &pll0.clkr, [PLL0_VOTE] = &pll0_vote, -@@ -2766,6 +3004,7 @@ static struct clk_regmap *gcc_ipq806x_cl +@@ -2764,6 +3002,7 @@ static struct clk_regmap *gcc_ipq806x_cl [PLL4_VOTE] = &pll4_vote, [PLL8] = &pll8.clkr, [PLL8_VOTE] = &pll8_vote, @@ -312,7 +312,7 @@ Signed-off-by: Ansuel Smith [PLL14] = &pll14.clkr, [PLL14_VOTE] = &pll14_vote, [PLL18] = &pll18.clkr, -@@ -2880,6 +3119,12 @@ static struct clk_regmap *gcc_ipq806x_cl +@@ -2878,6 +3117,12 @@ static struct clk_regmap *gcc_ipq806x_cl [PLL9] = &hfpll0.clkr, [PLL10] = &hfpll1.clkr, [PLL12] = &hfpll_l2.clkr, @@ -325,7 +325,7 @@ Signed-off-by: Ansuel Smith }; static const struct qcom_reset_map gcc_ipq806x_resets[] = { -@@ -3011,6 +3256,11 @@ static const struct qcom_reset_map gcc_i +@@ -3009,6 +3254,11 @@ static const struct qcom_reset_map gcc_i [GMAC_CORE3_RESET] = { 0x3cfc, 0 }, [GMAC_CORE4_RESET] = { 0x3d1c, 0 }, [GMAC_AHB_RESET] = { 0x3e24, 0 },