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rockchip: add support for Radxa ROCK Pi E25

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This commit is contained in:
AmadeusGhost 2022-11-05 23:19:35 +08:00
parent 4c889ca6f7
commit bb0d430546
9 changed files with 807 additions and 31 deletions
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12
package/boot/uboot-rockchip/Makefile
View File

@ -181,6 +181,17 @@ define U-Boot/rock-3a-rk3568
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/rock-pi-e25-rk3568
BUILD_SUBTARGET:=armv8
NAME:=ROCK Pi E25
BUILD_DEVICES:= \
radxa_rock-pi-e25
DEPENDS:=+PACKAGE_u-boot-rock-pi-e25-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.28.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/r66s-rk3568
BUILD_SUBTARGET:=armv8
NAME:=R66S/R68S
@ -208,6 +219,7 @@ UBOOT_TARGETS := \
mrkaio-m68s-rk3568 \
opc-h68k-rk3568 \
rock-3a-rk3568 \
rock-pi-e25-rk3568 \
r66s-rk3568 \
station-p2-rk3568 \
guangmiao-g4c-rk3399 \

148
package/boot/uboot-rockchip/patches/311-rockchip-rk3568-Add-support-for-radxa_rock-pi-e25.patch Normal file
View File

@ -0,0 +1,148 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -174,7 +174,8 @@ rk3568-evb.dtb \
rk3568-mrkaio-m68s.dtb \
rk3568-nanopi-r5s.dtb \
rk3566-quartz64-a.dtb \
- rk3568-rock-3a.dtb
+ rk3568-rock-3a.dtb \
+ rk3568-rock-pi-e25.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3568-rock-pi-e25-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3568-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
+ };
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ u-boot,spl-fifo-mode;
+};
+
+&uart2 {
+ u-boot,dm-spl;
+ clock-frequency = <24000000>;
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-rock-pi-e25.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3568-evb.dts"
+
+/ {
+ model = "Radxa ROCK Pi E25";
+ compatible = "radxa,rockpi-e25", "rockchip,rk3568";
+};
--- /dev/null
+++ b/configs/rock-pi-e25-rk3568_defconfig
@@ -0,0 +1,98 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-rock-pi-e25"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_API=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-rock-pi-e25.dtb"
+# CONFIG_SYS_DEVICE_NULLDEV is not set
+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_LOAD_IMAGE_V2=y
+CONFIG_CMD_BIND=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_WARN=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_ROCKCHIP_GPIO_V2=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_SPL_MMC_HS200_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_LAN75XX=y
+CONFIG_USB_ETHER_LAN78XX=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_ERRNO_STR=y

3
target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
View File

@ -22,9 +22,6 @@ sharevdi,guangmiao-g4c)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0"
ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth1"
;;
firefly,rk3568-roc-pc)
ucidef_set_led_timer "health" "health" "firefly:yellow:user" "200" "800"
;;
friendlyarm,nanopi-r5s)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0"
ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "eth1"

3
target/linux/rockchip/armv8/base-files/etc/board.d/02_network
View File

@ -22,7 +22,8 @@ rockchip_setup_interfaces()
ucidef_set_interfaces_lan_wan 'eth1 eth2 eth3' 'eth0'
;;
fastrhino,r66s|\
firefly,rk3568-roc-pc)
firefly,rk3568-roc-pc|\
radxa,rockpi-e25)
ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
;;
fastrhino,r68s)

15
target/linux/rockchip/armv8/base-files/etc/init.d/startup
View File

@ -1,15 +0,0 @@
#!/bin/sh /etc/rc.common
# Copyright (C) 2006-2011 OpenWrt.org
START=99
. /lib/functions/system.sh
boot() {
case $(board_name) in
rongpin,king3399)
echo 50 > /sys/class/gpio/export && echo high > /sys/class/gpio/gpio50/direction
echo 56 > /sys/class/gpio/export && echo high > /sys/class/gpio/gpio56/direction
;;
esac
}

630
target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-rock-pi-e25.dts Normal file
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@ -0,0 +1,630 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2022 AmadeusGhost <amadeus@jmu.edu.cn>
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568.dtsi"
/ {
model = "Radxa ROCK Pi E25";
compatible = "radxa,rockpi-e25", "rockchip,rk3568";
aliases {
mmc0 = &sdmmc0;
mmc1 = &sdhci;
};
chosen: chosen {
stdout-path = "serial2:1500000n8";
};
gpio-leds {
compatible = "gpio-leds";
led_user: led-0 {
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_GREEN>;
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&led_user_en>;
};
};
pwm-leds {
compatible = "pwm-leds-multicolor";
multi-led {
color = <LED_COLOR_ID_RGB>;
max-brightness = <255>;
led-red {
color = <LED_COLOR_ID_RED>;
pwms = <&pwm1 0 1000000 0>;
};
led-green {
color = <LED_COLOR_ID_GREEN>;
pwms = <&pwm2 0 1000000 0>;
};
led-blue {
color = <LED_COLOR_ID_BLUE>;
pwms = <&pwm12 0 1000000 0>;
};
};
};
typec_5v: typec-5v {
compatible = "regulator-fixed";
regulator-name = "typec_5v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
pcie30_avdd0v9: pcie30-avdd0v9 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc3v3_sys>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc3v3_sys>;
};
/* actually fed by vcc5v0_sys, dependent
* on pi6c clock generator
*/
vcc3v3_pcie30x1: vcc3v3-pcie30x1 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x1_enable_h>;
regulator-name = "vcc3v3_pcie30x1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_pi6c_05>;
};
vcc3v3_pi6c_05: vcc3v3-pi6c-05 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_enable_h>;
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_minipcie: vcc3v3-minipcie {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&minipcie_enable_h>;
regulator-name = "vcc3v3_minipcie";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_ngff: vcc3v3-ngff {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ngffpcie_enable_h>;
regulator-name = "vcc3v3_ngff";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&typec_5v>;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&typec_5v>;
};
vcc5v0_usb_otg: vcc5v0-usb-otg {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb_otg_en>;
regulator-name = "vcc5v0_usb_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
};
&combphy0 {
status = "okay";
};
&combphy2 {
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&cpu1 {
cpu-supply = <&vdd_cpu>;
};
&cpu2 {
cpu-supply = <&vdd_cpu>;
};
&cpu3 {
cpu-supply = <&vdd_cpu>;
};
#ifdef DTS_NO_LEGACY
&display_subsystem {
status = "disabled";
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
#endif
&i2c0 {
status = "okay";
vdd_cpu: regulator@1c {
compatible = "tcs,tcs4525";
reg = <0x1c>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1150000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
#clock-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>;
rockchip,system-power-controller;
wakeup-source;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
regulators {
vdd_logic: DCDC_REG1 {
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
regulator-init-microvolt = <900000>;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-name = "vdd_gpu";
regulator-always-on;
regulator-init-microvolt = <900000>;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_npu: DCDC_REG4 {
regulator-name = "vdd_npu";
regulator-init-microvolt = <900000>;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: DCDC_REG5 {
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_image: LDO_REG1 {
regulator-name = "vdda0v9_image";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v9: LDO_REG2 {
regulator-name = "vdda_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-name = "vdda0v9_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_acodec: LDO_REG4 {
regulator-name = "vccio_acodec";
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-name = "vcc3v3_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcca_1v8: LDO_REG7 {
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG8 {
regulator-name = "vcca1v8_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca1v8_image: LDO_REG9 {
regulator-name = "vcca1v8_image";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3: SWITCH_REG1 {
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_sd: SWITCH_REG2 {
regulator-name = "vcc3v3_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&pcie2x1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie20_reset_h>;
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
status = "okay";
};
&pcie30phy {
data-lanes = <1 2>;
status = "okay";
};
&pcie3x1 {
num-lanes = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x1m0_pins>;
reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30x1>;
status = "okay";
};
&pcie3x2 {
num-lanes = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x2_reset_h>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
status = "okay";
};
&pinctrl {
leds {
led_user_en: led_user_en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie20_reset_h: pcie20-reset-h {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie30x1_enable_h: pcie30x1-enable-h {
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie30x2_reset_h: pcie30x2-reset-h {
rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_enable_h: pcie-enable-h {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic_int {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
minipcie_enable_h: minipcie-enable-h {
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
ngffpcie_enable_h: ngffpcie-enable-h {
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pmu_io_domains {
pmuio1-supply = <&vcc3v3_pmu>;
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
status = "okay";
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm12 {
pinctrl-names = "default";
pinctrl-0 = <&pwm12m1_pins>;
status = "okay";
};
&rng {
status = "okay";
};
&saradc {
vref-supply = <&vcca_1v8>;
status = "okay";
};
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};
&sdmmc0 {
bus-width = <4>;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
/* Also used in pcie30x1_clkreqnm0 */
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <0>;
status = "okay";
};
&uart2 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host0_xhci {
extcon = <&usb2phy0>;
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy0_otg {
phy-supply = <&vcc5v0_usb_otg>;
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb2phy1_host {
phy-supply = <&vcc3v3_minipcie>;
status = "okay";
};
&usb2phy1_otg {
phy-supply = <&vcc3v3_ngff>;
status = "okay";
};

21
target/linux/rockchip/image/armv8.mk
View File

@ -91,16 +91,6 @@ define Device/friendlyarm_nanopi-r4se
endef
TARGET_DEVICES += friendlyarm_nanopi-r4se
define Device/rongpin_king3399
DEVICE_VENDOR := Rongpin
DEVICE_MODEL := King3399
SOC := rk3399
UBOOT_DEVICE_NAME := rongpin-king3399-rk3399
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r4s | pine64-bin | gzip | append-metadata
DEVICE_PACKAGES := kmod-r8168 -urngd
endef
TARGET_DEVICES += rongpin_king3399
define Device/friendlyarm_nanopi-r5s
DEVICE_VENDOR := FriendlyARM
DEVICE_MODEL := NanoPi R5S
@ -152,6 +142,17 @@ define Device/radxa_rock-pi-4
endef
TARGET_DEVICES += radxa_rock-pi-4
define Device/radxa_rock-pi-e25
DEVICE_VENDOR := Radxa
DEVICE_MODEL := ROCK Pi E25
SOC := rk3568
SUPPORTED_DEVICES := radxa,rockpi-e25
UBOOT_DEVICE_NAME := rock-pi-e25-rk3568
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata
DEVICE_PACKAGES := kmod-r8125
endef
TARGET_DEVICES += radxa_rock-pi-e25
define Device/sharevdi_guangmiao-g4c
DEVICE_VENDOR := SHAREVDI
DEVICE_MODEL := GuangMiao G4C

3
target/linux/rockchip/patches-5.15/210-rockchip-rk356x-add-support-for-new-boards.patch
View File

@ -1,9 +1,10 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -59,3 +59,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa
@@ -59,3 +59,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sa
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-pi-e25.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb

3
target/linux/rockchip/patches-6.0/300-rockchip-rk356x-add-support-for-new-boards.patch
View File

@ -1,9 +1,10 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -71,3 +71,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so
@@ -71,3 +71,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-pi-e25.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb