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rockchip: correct board name for radxa e25

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This commit is contained in:
AmadeusGhost 2022-11-13 23:54:02 +08:00
parent 93f840212b
commit b4bbdc1e99
8 changed files with 315 additions and 269 deletions
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24
package/boot/uboot-rockchip/Makefile
View File

@ -170,6 +170,17 @@ define U-Boot/opc-h68k-rk3568
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/radxa-e25-rk3568
BUILD_SUBTARGET:=armv8
NAME:=Radxa E25
BUILD_DEVICES:= \
radxa_e25
DEPENDS:=+PACKAGE_u-boot-radxa-e25-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.28.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/rock-3a-rk3568
BUILD_SUBTARGET:=armv8
NAME:=ROCK3 Model A
@ -181,17 +192,6 @@ define U-Boot/rock-3a-rk3568
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/rock-pi-e25-rk3568
BUILD_SUBTARGET:=armv8
NAME:=ROCK Pi E25
BUILD_DEVICES:= \
radxa_rock-pi-e25
DEPENDS:=+PACKAGE_u-boot-rock-pi-e25-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.28.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/r66s-rk3568
BUILD_SUBTARGET:=armv8
NAME:=R66S/R68S
@ -218,8 +218,8 @@ endef
UBOOT_TARGETS := \
mrkaio-m68s-rk3568 \
opc-h68k-rk3568 \
radxa-e25-rk3568 \
rock-3a-rk3568 \
rock-pi-e25-rk3568 \
r66s-rk3568 \
station-p2-rk3568 \
guangmiao-g4c-rk3399 \

25
package/boot/uboot-rockchip/patches/311-rockchip-rk3568-Add-support-for-radxa_rock-pi-e25.patch → package/boot/uboot-rockchip/patches/315-rockchip-rk3568-Add-support-for-radxa_e25.patch
View File

@ -1,17 +1,17 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -174,7 +174,8 @@ rk3568-evb.dtb \
@@ -177,7 +177,8 @@ rk3568-evb.dtb \
rk3568-mrkaio-m68s.dtb \
rk3568-nanopi-r5s.dtb \
rk3566-quartz64-a.dtb \
- rk3568-rock-3a.dtb
+ rk3568-rock-3a.dtb \
+ rk3568-rock-pi-e25.dtb
+ rk3568-radxa-e25.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
--- /dev/null
+++ b/arch/arm/dts/rk3568-rock-pi-e25-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
@ -35,18 +35,23 @@
+ status = "okay";
+};
--- /dev/null
+++ b/arch/arm/dts/rk3568-rock-pi-e25.dts
@@ -0,0 +1,8 @@
+++ b/arch/arm/dts/rk3568-radxa-e25.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3568-evb.dts"
+
+/ {
+ model = "Radxa ROCK Pi E25";
+ compatible = "radxa,rockpi-e25", "rockchip,rk3568";
+ model = "Radxa E25";
+ compatible = "radxa,e25", "rockchip,rk3568";
+
+ aliases {
+ mmc0 = &sdmmc0;
+ mmc1 = &sdhci;
+ };
+};
--- /dev/null
+++ b/configs/rock-pi-e25-rk3568_defconfig
+++ b/configs/radxa-e25-rk3568_defconfig
@@ -0,0 +1,98 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
@ -55,7 +60,7 @@
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-rock-pi-e25"
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
@ -72,7 +77,7 @@
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-rock-pi-e25.dtb"
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-radxa-e25.dtb"
+# CONFIG_SYS_DEVICE_NULLDEV is not set
+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
+# CONFIG_DISPLAY_CPUINFO is not set

4
target/linux/rockchip/armv8/base-files/etc/board.d/02_network
View File

@ -8,6 +8,7 @@ rockchip_setup_interfaces()
local board="$1"
case "$board" in
ariaboard,photonicat|\
ezpro,mrkaio-m68s|\
friendlyarm,nanopi-r2c|\
friendlyarm,nanopi-r2s|\
@ -23,7 +24,7 @@ rockchip_setup_interfaces()
;;
fastrhino,r66s|\
firefly,rk3568-roc-pc|\
radxa,rockpi-e25)
radxa,e25)
ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
;;
fastrhino,r68s)
@ -74,6 +75,7 @@ rockchip_setup_macs()
local label_mac=""
case "$board" in
ariaboard,photonicat|\
ezpro,mrkaio-m68s|\
hinlink,opc-h68k|\
fastrhino,r66s|\

254
target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-rock-pi-e25.dts → target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
View File

@ -1,23 +1,16 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2022 AmadeusGhost <amadeus@jmu.edu.cn>
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568.dtsi"
/ {
model = "Radxa ROCK Pi E25";
compatible = "radxa,rockpi-e25", "rockchip,rk3568";
model = "Radxa CM3 Industrial Board";
compatible = "radxa,cm3i", "rockchip,rk3568";
aliases {
mmc0 = &sdmmc0;
mmc1 = &sdhci;
};
chosen: chosen {
stdout-path = "serial2:1500000n8";
mmc0 = &sdhci;
};
gpio-leds {
@ -33,40 +26,7 @@
};
};
pwm-leds {
compatible = "pwm-leds-multicolor";
multi-led {
color = <LED_COLOR_ID_RGB>;
max-brightness = <255>;
led-red {
color = <LED_COLOR_ID_RED>;
pwms = <&pwm1 0 1000000 0>;
};
led-green {
color = <LED_COLOR_ID_GREEN>;
pwms = <&pwm2 0 1000000 0>;
};
led-blue {
color = <LED_COLOR_ID_BLUE>;
pwms = <&pwm12 0 1000000 0>;
};
};
};
typec_5v: typec-5v {
compatible = "regulator-fixed";
regulator-name = "typec_5v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
pcie30_avdd0v9: pcie30-avdd0v9 {
pcie30_avdd0v9: pcie30-avdd0v9-regulator {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd0v9";
regulator-always-on;
@ -76,7 +36,7 @@
vin-supply = <&vcc3v3_sys>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
pcie30_avdd1v8: pcie30-avdd1v8-regulator {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-always-on;
@ -86,87 +46,34 @@
vin-supply = <&vcc3v3_sys>;
};
/* actually fed by vcc5v0_sys, dependent
* on pi6c clock generator
*/
vcc3v3_pcie30x1: vcc3v3-pcie30x1 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x1_enable_h>;
regulator-name = "vcc3v3_pcie30x1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_pi6c_05>;
};
vcc3v3_pi6c_05: vcc3v3-pi6c-05 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_enable_h>;
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_minipcie: vcc3v3-minipcie {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&minipcie_enable_h>;
regulator-name = "vcc3v3_minipcie";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_ngff: vcc3v3-ngff {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ngffpcie_enable_h>;
regulator-name = "vcc3v3_ngff";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_sys: vcc3v3-sys {
vcc3v3_sys: vcc3v3-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&typec_5v>;
vin-supply = <&vcc5v_input>;
};
vcc5v0_sys: vcc5v0-sys {
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&typec_5v>;
vin-supply = <&vcc5v_input>;
};
vcc5v0_usb_otg: vcc5v0-usb-otg {
/* labeled +5v_input in schematic */
vcc5v_input: vcc5v-input-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb_otg_en>;
regulator-name = "vcc5v0_usb_otg";
regulator-name = "vcc5v_input";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
};
@ -174,6 +81,10 @@
status = "okay";
};
&combphy1 {
status = "okay";
};
&combphy2 {
status = "okay";
};
@ -218,7 +129,7 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1150000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
vin-supply = <&vcc5v_input>;
regulator-state-mem {
regulator-off-in-suspend;
@ -437,37 +348,6 @@
};
};
&pcie2x1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie20_reset_h>;
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
status = "okay";
};
&pcie30phy {
data-lanes = <1 2>;
status = "okay";
};
&pcie3x1 {
num-lanes = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x1m0_pins>;
reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30x1>;
status = "okay";
};
&pcie3x2 {
num-lanes = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x2_reset_h>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
status = "okay";
};
&pinctrl {
leds {
led_user_en: led_user_en {
@ -475,43 +355,11 @@
};
};
pcie {
pcie20_reset_h: pcie20-reset-h {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie30x1_enable_h: pcie30x1-enable-h {
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie30x2_reset_h: pcie30x2-reset-h {
rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_enable_h: pcie-enable-h {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic_int {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
minipcie_enable_h: minipcie-enable-h {
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
ngffpcie_enable_h: ngffpcie-enable-h {
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pmu_io_domains {
@ -527,20 +375,6 @@
status = "okay";
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm12 {
pinctrl-names = "default";
pinctrl-0 = <&pwm12m1_pins>;
status = "okay";
};
&rng {
status = "okay";
};
@ -561,20 +395,6 @@
status = "okay";
};
&sdmmc0 {
bus-width = <4>;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
/* Also used in pcie30x1_clkreqnm0 */
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <0>;
@ -585,46 +405,14 @@
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host0_xhci {
extcon = <&usb2phy0>;
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy0_otg {
phy-supply = <&vcc5v0_usb_otg>;
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb2phy1_host {
phy-supply = <&vcc3v3_minipcie>;
status = "okay";
};
&usb2phy1_otg {
phy-supply = <&vcc3v3_ngff>;
status = "okay";
&usb_host0_xhci {
extcon = <&usb2phy0>;
};

252
target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts Normal file
View File

@ -0,0 +1,252 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "rk3568-radxa-cm3i.dtsi"
/ {
model = "Radxa E25";
compatible = "radxa,e25", "rockchip,rk3568";
aliases {
mmc0 = &sdmmc0;
mmc1 = &sdhci;
};
chosen {
stdout-path = "serial2:115200n8";
};
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1750000>;
button-power {
label = "Power";
linux,code = <KEY_POWER>;
press-threshold-microvolt = <0>;
};
};
pwm-leds {
compatible = "pwm-leds-multicolor";
multi-led {
color = <LED_COLOR_ID_RGB>;
max-brightness = <255>;
led-red {
color = <LED_COLOR_ID_RED>;
pwms = <&pwm1 0 1000000 0>;
};
led-green {
color = <LED_COLOR_ID_GREEN>;
pwms = <&pwm2 0 1000000 0>;
};
led-blue {
color = <LED_COLOR_ID_BLUE>;
pwms = <&pwm12 0 1000000 0>;
};
};
};
vbus_typec: vbus-typec-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vbus_typec_en>;
regulator-name = "vbus_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_minipcie: vcc3v3-minipcie-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&minipcie_enable_h>;
regulator-name = "vcc3v3_minipcie";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_ngff: vcc3v3-ngff-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ngffpcie_enable_h>;
regulator-name = "vcc3v3_ngff";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
/* actually fed by vcc5v0_sys, dependent
* on pi6c clock generator
*/
vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x1_enable_h>;
regulator-name = "vcc3v3_pcie30x1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_pi6c_05>;
};
vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_enable_h>;
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
};
&pcie2x1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie20_reset_h>;
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
status = "okay";
};
&pcie30phy {
data-lanes = <1 2>;
status = "okay";
};
&pcie3x1 {
num-lanes = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x1m0_pins>;
reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30x1>;
status = "okay";
};
&pcie3x2 {
num-lanes = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pcie30x2_reset_h>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
status = "okay";
};
&pinctrl {
pcie {
pcie20_reset_h: pcie20-reset-h {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie30x1_enable_h: pcie30x1-enable-h {
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie30x2_reset_h: pcie30x2-reset-h {
rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_enable_h: pcie-enable-h {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
minipcie_enable_h: minipcie-enable-h {
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
ngffpcie_enable_h: ngffpcie-enable-h {
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vbus_typec_en: vbus_typec_en {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm12 {
pinctrl-names = "default";
pinctrl-0 = <&pwm12m1_pins>;
status = "okay";
};
&sata1 {
ahci-supply = <&vcc3v3_pi6c_05>;
target-supply = <&vcc3v3_pcie30x1>;
status = "okay";
};
&sdmmc0 {
bus-width = <4>;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
/* Also used in pcie30x1_clkreqnm0 */
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host0_xhci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usb2phy0_otg {
phy-supply = <&vbus_typec>;
status = "okay";
};
&usb2phy1_host {
phy-supply = <&vcc3v3_minipcie>;
status = "okay";
};
&usb2phy1_otg {
phy-supply = <&vcc3v3_ngff>;
status = "okay";
};

21
target/linux/rockchip/image/armv8.mk
View File

@ -121,6 +121,16 @@ define Device/pine64_rockpro64
endef
TARGET_DEVICES += pine64_rockpro64
define Device/radxa_e25
DEVICE_VENDOR := Radxa
DEVICE_MODEL := E25
DEVICE_DTS := rockchip/rk3568-radxa-e25
UBOOT_DEVICE_NAME := radxa-e25-rk3568
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata
DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-r8125
endef
TARGET_DEVICES += radxa_e25
define Device/radxa_rock-3a
DEVICE_VENDOR := Radxa
DEVICE_MODEL := ROCK3 A
@ -142,17 +152,6 @@ define Device/radxa_rock-pi-4
endef
TARGET_DEVICES += radxa_rock-pi-4
define Device/radxa_rock-pi-e25
DEVICE_VENDOR := Radxa
DEVICE_MODEL := ROCK Pi E25
SOC := rk3568
SUPPORTED_DEVICES := radxa,rockpi-e25
UBOOT_DEVICE_NAME := rock-pi-e25-rk3568
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata
DEVICE_PACKAGES := kmod-r8125
endef
TARGET_DEVICES += radxa_rock-pi-e25
define Device/rongpin_king3399
DEVICE_VENDOR := Rongpin
DEVICE_MODEL := King3399

2
target/linux/rockchip/patches-5.15/210-rockchip-rk356x-add-support-for-new-boards.patch
View File

@ -4,9 +4,9 @@
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-pi-e25.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb

2
target/linux/rockchip/patches-6.0/300-rockchip-rk356x-add-support-for-new-boards.patch
View File

@ -4,7 +4,7 @@
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-pi-e25.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb