diff --git a/include/kernel-6.1 b/include/kernel-6.1 index 101dbf34f..7ea1f9e02 100644 --- a/include/kernel-6.1 +++ b/include/kernel-6.1 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.1 = .83 -LINUX_KERNEL_HASH-6.1.83 = 88b69611093613ce4494527685f833af0c31b986dcbeda7086f69f18f9e0b190 +LINUX_VERSION-6.1 = .84 +LINUX_KERNEL_HASH-6.1.84 = af97d2ebe14765d0db3af6560309daf08535da25bfad36e5fb3e436f22a1707a diff --git a/target/linux/bcm27xx/patches-6.1/950-0025-drm-panel-Add-and-initialise-an-orientation-field-to.patch b/target/linux/bcm27xx/patches-6.1/950-0025-drm-panel-Add-and-initialise-an-orientation-field-to.patch index 9cdbe6d7c..67c1e1826 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0025-drm-panel-Add-and-initialise-an-orientation-field-to.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0025-drm-panel-Add-and-initialise-an-orientation-field-to.patch @@ -46,7 +46,7 @@ Signed-off-by: Dave Stevenson } EXPORT_SYMBOL(drm_panel_init); -@@ -289,16 +292,18 @@ int of_drm_get_panel_orientation(const s +@@ -294,16 +297,18 @@ int of_drm_get_panel_orientation(const s if (ret < 0) return ret; diff --git a/target/linux/bcm27xx/patches-6.1/950-0106-Add-dwc_otg-driver.patch b/target/linux/bcm27xx/patches-6.1/950-0106-Add-dwc_otg-driver.patch index f8ab3b04a..ab145eb66 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0106-Add-dwc_otg-driver.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0106-Add-dwc_otg-driver.patch @@ -1185,7 +1185,7 @@ Signed-off-by: Jonathan Bell } --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c -@@ -5677,7 +5677,7 @@ static void port_event(struct usb_hub *h +@@ -5686,7 +5686,7 @@ static void port_event(struct usb_hub *h port_dev->over_current_count++; port_over_current_notify(port_dev); diff --git a/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch b/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch index 476a3caf3..c50177898 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch @@ -266,7 +266,7 @@ Signed-off-by: Phil Elwell static inline int mmc_blk_part_switch(struct mmc_card *card, unsigned int part_type); static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, -@@ -3040,6 +3047,8 @@ static int mmc_blk_probe(struct mmc_card +@@ -3042,6 +3049,8 @@ static int mmc_blk_probe(struct mmc_card { struct mmc_blk_data *md; int ret = 0; @@ -275,7 +275,7 @@ Signed-off-by: Phil Elwell /* * Check that the card supports the command class(es) we need. -@@ -3047,7 +3056,16 @@ static int mmc_blk_probe(struct mmc_card +@@ -3049,7 +3058,16 @@ static int mmc_blk_probe(struct mmc_card if (!(card->csd.cmdclass & CCC_BLOCK_READ)) return -ENODEV; @@ -293,7 +293,7 @@ Signed-off-by: Phil Elwell card->complete_wq = alloc_workqueue("mmc_complete", WQ_MEM_RECLAIM | WQ_HIGHPRI, 0); -@@ -3062,6 +3080,17 @@ static int mmc_blk_probe(struct mmc_card +@@ -3064,6 +3082,17 @@ static int mmc_blk_probe(struct mmc_card goto out_free; } diff --git a/target/linux/bcm27xx/patches-6.1/950-0165-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch b/target/linux/bcm27xx/patches-6.1/950-0165-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch index ec5a217c7..ba8d2beed 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0165-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0165-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch @@ -13,7 +13,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c -@@ -1773,7 +1773,7 @@ int vchiq_mmal_component_enable(struct v +@@ -1774,7 +1774,7 @@ int vchiq_mmal_component_enable(struct v ret = enable_component(instance, component); if (ret == 0) diff --git a/target/linux/bcm27xx/patches-6.1/950-0166-staging-mmal-vchiq-Add-support-for-event-callbacks.patch b/target/linux/bcm27xx/patches-6.1/950-0166-staging-mmal-vchiq-Add-support-for-event-callbacks.patch index 743c757dd..01a4d49fa 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0166-staging-mmal-vchiq-Add-support-for-event-callbacks.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0166-staging-mmal-vchiq-Add-support-for-event-callbacks.patch @@ -234,7 +234,7 @@ Signed-off-by: Dave Stevenson /* deals with receipt of buffer to host message */ static void buffer_to_host_cb(struct vchiq_mmal_instance *instance, struct mmal_msg *msg, u32 msg_len) -@@ -1330,6 +1423,7 @@ static int port_disable(struct vchiq_mma +@@ -1331,6 +1424,7 @@ static int port_disable(struct vchiq_mma mmalbuf->mmal_flags = 0; mmalbuf->dts = MMAL_TIME_UNKNOWN; mmalbuf->pts = MMAL_TIME_UNKNOWN; @@ -242,7 +242,7 @@ Signed-off-by: Dave Stevenson port->buffer_cb(instance, port, 0, mmalbuf); } -@@ -1631,6 +1725,43 @@ int mmal_vchi_buffer_cleanup(struct mmal +@@ -1632,6 +1726,43 @@ int mmal_vchi_buffer_cleanup(struct mmal } EXPORT_SYMBOL_GPL(mmal_vchi_buffer_cleanup); @@ -286,7 +286,7 @@ Signed-off-by: Dave Stevenson /* Initialise a mmal component and its ports * */ -@@ -1680,6 +1811,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1681,6 +1812,7 @@ int vchiq_mmal_component_init(struct vch ret = port_info_get(instance, &component->control); if (ret < 0) goto release_component; @@ -294,7 +294,7 @@ Signed-off-by: Dave Stevenson for (idx = 0; idx < component->inputs; idx++) { component->input[idx].type = MMAL_PORT_TYPE_INPUT; -@@ -1690,6 +1822,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1691,6 +1823,7 @@ int vchiq_mmal_component_init(struct vch ret = port_info_get(instance, &component->input[idx]); if (ret < 0) goto release_component; @@ -302,7 +302,7 @@ Signed-off-by: Dave Stevenson } for (idx = 0; idx < component->outputs; idx++) { -@@ -1701,6 +1834,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1702,6 +1835,7 @@ int vchiq_mmal_component_init(struct vch ret = port_info_get(instance, &component->output[idx]); if (ret < 0) goto release_component; @@ -310,7 +310,7 @@ Signed-off-by: Dave Stevenson } for (idx = 0; idx < component->clocks; idx++) { -@@ -1712,6 +1846,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1713,6 +1847,7 @@ int vchiq_mmal_component_init(struct vch ret = port_info_get(instance, &component->clock[idx]); if (ret < 0) goto release_component; @@ -318,7 +318,7 @@ Signed-off-by: Dave Stevenson } *component_out = component; -@@ -1737,7 +1872,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i +@@ -1738,7 +1873,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, struct vchiq_mmal_component *component) { @@ -327,7 +327,7 @@ Signed-off-by: Dave Stevenson if (mutex_lock_interruptible(&instance->vchiq_mutex)) return -EINTR; -@@ -1749,6 +1884,13 @@ int vchiq_mmal_component_finalise(struct +@@ -1750,6 +1885,13 @@ int vchiq_mmal_component_finalise(struct component->in_use = 0; diff --git a/target/linux/bcm27xx/patches-6.1/950-0172-staging-mmal-vchiq-Free-the-event-context-for-contro.patch b/target/linux/bcm27xx/patches-6.1/950-0172-staging-mmal-vchiq-Free-the-event-context-for-contro.patch index 02b8ed941..862592856 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0172-staging-mmal-vchiq-Free-the-event-context-for-contro.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0172-staging-mmal-vchiq-Free-the-event-context-for-contro.patch @@ -17,7 +17,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c -@@ -1899,6 +1899,8 @@ int vchiq_mmal_component_finalise(struct +@@ -1900,6 +1900,8 @@ int vchiq_mmal_component_finalise(struct for (idx = 0; idx < component->clocks; idx++) free_event_context(&component->clock[idx]); diff --git a/target/linux/bcm27xx/patches-6.1/950-0173-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch b/target/linux/bcm27xx/patches-6.1/950-0173-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch index 6582bcceb..c14f6c080 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0173-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0173-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch @@ -14,7 +14,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c -@@ -1765,9 +1765,26 @@ static void free_event_context(struct vc +@@ -1766,9 +1766,26 @@ static void free_event_context(struct vc { struct mmal_msg_context *ctx = port->event_context; @@ -41,7 +41,7 @@ Signed-off-by: Dave Stevenson } /* Initialise a mmal component and its ports -@@ -1865,6 +1882,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1866,6 +1883,7 @@ int vchiq_mmal_component_init(struct vch release_component: destroy_component(instance, component); @@ -49,7 +49,7 @@ Signed-off-by: Dave Stevenson unlock: if (component) component->in_use = 0; -@@ -1880,7 +1898,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i +@@ -1881,7 +1899,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, struct vchiq_mmal_component *component) { @@ -58,7 +58,7 @@ Signed-off-by: Dave Stevenson if (mutex_lock_interruptible(&instance->vchiq_mutex)) return -EINTR; -@@ -1892,14 +1910,7 @@ int vchiq_mmal_component_finalise(struct +@@ -1893,14 +1911,7 @@ int vchiq_mmal_component_finalise(struct component->in_use = 0; diff --git a/target/linux/bcm27xx/patches-6.1/950-0182-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch b/target/linux/bcm27xx/patches-6.1/950-0182-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch index 480995112..3c1e41ba0 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0182-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0182-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch @@ -15,7 +15,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c -@@ -1641,6 +1641,109 @@ command_cleanup: +@@ -1643,6 +1643,109 @@ command_cleanup: } /* @@ -125,7 +125,7 @@ Signed-off-by: Jonathan Bell * non-error returns are a promise to giveback() the urb later * we drop ownership so next owner (or urb unlink) can get it */ -@@ -5469,6 +5572,7 @@ static const struct hc_driver xhci_hc_dr +@@ -5471,6 +5574,7 @@ static const struct hc_driver xhci_hc_dr .endpoint_reset = xhci_endpoint_reset, .check_bandwidth = xhci_check_bandwidth, .reset_bandwidth = xhci_reset_bandwidth, diff --git a/target/linux/bcm27xx/patches-6.1/950-0276-staging-mmal-vchiq-Use-vc-sm-cma-to-support-zero-cop.patch b/target/linux/bcm27xx/patches-6.1/950-0276-staging-mmal-vchiq-Use-vc-sm-cma-to-support-zero-cop.patch index bcb322d55..59ce23263 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0276-staging-mmal-vchiq-Use-vc-sm-cma-to-support-zero-cop.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0276-staging-mmal-vchiq-Use-vc-sm-cma-to-support-zero-cop.patch @@ -91,7 +91,7 @@ Signed-off-by: Dave Stevenson } else if (msg->u.buffer_from_host.buffer_header.length == 0) { /* empty buffer */ if (msg->u.buffer_from_host.buffer_header.flags & -@@ -1528,6 +1551,9 @@ int vchiq_mmal_port_parameter_set(struct +@@ -1529,6 +1552,9 @@ int vchiq_mmal_port_parameter_set(struct mutex_unlock(&instance->vchiq_mutex); @@ -101,7 +101,7 @@ Signed-off-by: Dave Stevenson return ret; } EXPORT_SYMBOL_GPL(vchiq_mmal_port_parameter_set); -@@ -1696,6 +1722,31 @@ int vchiq_mmal_submit_buffer(struct vchi +@@ -1697,6 +1723,31 @@ int vchiq_mmal_submit_buffer(struct vchi unsigned long flags = 0; int ret; @@ -133,7 +133,7 @@ Signed-off-by: Dave Stevenson ret = buffer_from_host(instance, port, buffer); if (ret == -EINVAL) { /* Port is disabled. Queue for when it is enabled. */ -@@ -1729,6 +1780,16 @@ int mmal_vchi_buffer_cleanup(struct mmal +@@ -1730,6 +1781,16 @@ int mmal_vchi_buffer_cleanup(struct mmal release_msg_context(msg_context); buf->msg_context = NULL; diff --git a/target/linux/bcm27xx/patches-6.1/950-0339-staging-mmal-vchiq-Add-module-parameter-to-enable-lo.patch b/target/linux/bcm27xx/patches-6.1/950-0339-staging-mmal-vchiq-Add-module-parameter-to-enable-lo.patch index 31162b3ce..9fef146bf 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0339-staging-mmal-vchiq-Add-module-parameter-to-enable-lo.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0339-staging-mmal-vchiq-Add-module-parameter-to-enable-lo.patch @@ -172,7 +172,7 @@ Signed-off-by: Dave Stevenson vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1086,9 +1101,9 @@ static int create_component(struct vchiq +@@ -1087,9 +1102,9 @@ static int create_component(struct vchiq component->outputs = rmsg->u.component_create_reply.output_num; component->clocks = rmsg->u.component_create_reply.clock_num; @@ -185,7 +185,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1257,10 +1272,9 @@ static int port_action_port(struct vchiq +@@ -1258,10 +1273,9 @@ static int port_action_port(struct vchiq ret = -rmsg->u.port_action_reply.status; @@ -199,7 +199,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1304,11 +1318,11 @@ static int port_action_handle(struct vch +@@ -1305,11 +1319,11 @@ static int port_action_handle(struct vch ret = -rmsg->u.port_action_reply.status; @@ -216,7 +216,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1347,9 +1361,9 @@ static int port_parameter_set(struct vch +@@ -1348,9 +1362,9 @@ static int port_parameter_set(struct vch ret = -rmsg->u.port_parameter_set_reply.status; @@ -229,7 +229,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1407,8 +1421,9 @@ static int port_parameter_get(struct vch +@@ -1408,8 +1422,9 @@ static int port_parameter_get(struct vch /* Always report the size of the returned parameter to the caller */ *value_size = rmsg->u.port_parameter_get_reply.size; @@ -241,7 +241,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1665,7 +1680,7 @@ int vchiq_mmal_port_connect_tunnel(struc +@@ -1666,7 +1681,7 @@ int vchiq_mmal_port_connect_tunnel(struc if (!dst) { /* do not make new connection */ ret = 0; @@ -250,7 +250,7 @@ Signed-off-by: Dave Stevenson goto release_unlock; } -@@ -1683,14 +1698,14 @@ int vchiq_mmal_port_connect_tunnel(struc +@@ -1684,14 +1699,14 @@ int vchiq_mmal_port_connect_tunnel(struc /* set new format */ ret = port_info_set(instance, dst); if (ret) { @@ -267,7 +267,7 @@ Signed-off-by: Dave Stevenson goto release_unlock; } -@@ -1699,9 +1714,9 @@ int vchiq_mmal_port_connect_tunnel(struc +@@ -1700,9 +1715,9 @@ int vchiq_mmal_port_connect_tunnel(struc MMAL_MSG_PORT_ACTION_TYPE_CONNECT, dst->component->handle, dst->handle); if (ret < 0) { @@ -280,7 +280,7 @@ Signed-off-by: Dave Stevenson goto release_unlock; } src->connected = dst; -@@ -1726,7 +1741,8 @@ int vchiq_mmal_submit_buffer(struct vchi +@@ -1727,7 +1742,8 @@ int vchiq_mmal_submit_buffer(struct vchi * videobuf2 won't let us have the dmabuf there. */ if (port->zero_copy && buffer->dma_buf && !buffer->vcsm_handle) { @@ -290,7 +290,7 @@ Signed-off-by: Dave Stevenson ret = vc_sm_cma_import_dmabuf(buffer->dma_buf, &buffer->vcsm_handle); if (ret) { -@@ -1742,8 +1758,8 @@ int vchiq_mmal_submit_buffer(struct vchi +@@ -1743,8 +1759,8 @@ int vchiq_mmal_submit_buffer(struct vchi vc_sm_cma_free(buffer->vcsm_handle); return ret; } @@ -301,7 +301,7 @@ Signed-off-by: Dave Stevenson } ret = buffer_from_host(instance, port, buffer); -@@ -1782,8 +1798,8 @@ int mmal_vchi_buffer_cleanup(struct mmal +@@ -1783,8 +1799,8 @@ int mmal_vchi_buffer_cleanup(struct mmal if (buf->vcsm_handle) { int ret; diff --git a/target/linux/bcm27xx/patches-6.1/950-0340-staging-mmal-vchiq-Reset-buffers_with_vpu-on-port_en.patch b/target/linux/bcm27xx/patches-6.1/950-0340-staging-mmal-vchiq-Reset-buffers_with_vpu-on-port_en.patch index 46414dc74..8b7eb58b7 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0340-staging-mmal-vchiq-Reset-buffers_with_vpu-on-port_en.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0340-staging-mmal-vchiq-Reset-buffers_with_vpu-on-port_en.patch @@ -20,7 +20,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c -@@ -1500,6 +1500,8 @@ static int port_enable(struct vchiq_mmal +@@ -1501,6 +1501,8 @@ static int port_enable(struct vchiq_mmal port->enabled = 1; diff --git a/target/linux/bcm27xx/patches-6.1/950-0418-mmc-block-Don-t-do-single-sector-reads-during-recove.patch b/target/linux/bcm27xx/patches-6.1/950-0418-mmc-block-Don-t-do-single-sector-reads-during-recove.patch index 8fa58f832..44dfc2ba5 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0418-mmc-block-Don-t-do-single-sector-reads-during-recove.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0418-mmc-block-Don-t-do-single-sector-reads-during-recove.patch @@ -23,7 +23,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c -@@ -1970,7 +1970,7 @@ static void mmc_blk_mq_rw_recovery(struc +@@ -1972,7 +1972,7 @@ static void mmc_blk_mq_rw_recovery(struc return; } diff --git a/target/linux/bcm27xx/patches-6.1/950-0671-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch b/target/linux/bcm27xx/patches-6.1/950-0671-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch index 0146bbd61..b852bad90 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0671-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0671-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch @@ -19,7 +19,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c -@@ -1730,7 +1730,7 @@ static void xhci_fixup_endpoint(struct u +@@ -1732,7 +1732,7 @@ static void xhci_fixup_endpoint(struct u return; } ctrl_ctx->add_flags = xhci_get_endpoint_flag_from_index(ep_index); diff --git a/target/linux/bcm27xx/patches-6.1/950-0698-serial-8250-Add-NOMSI-bug-for-bcm2835aux.patch b/target/linux/bcm27xx/patches-6.1/950-0698-serial-8250-Add-NOMSI-bug-for-bcm2835aux.patch index 6f62736b0..728e433fb 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0698-serial-8250-Add-NOMSI-bug-for-bcm2835aux.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0698-serial-8250-Add-NOMSI-bug-for-bcm2835aux.patch @@ -71,7 +71,7 @@ Signed-off-by: Phil Elwell * hardware interrupt, we use a timer-based system. The original --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c -@@ -1559,6 +1559,9 @@ static void serial8250_stop_tx(struct ua +@@ -1553,6 +1553,9 @@ static void serial8250_stop_tx(struct ua serial_icr_write(up, UART_ACR, up->acr); } serial8250_rpm_put(up); @@ -81,7 +81,7 @@ Signed-off-by: Phil Elwell } static inline void __start_tx(struct uart_port *port) -@@ -1669,6 +1672,9 @@ static void serial8250_start_tx(struct u +@@ -1663,6 +1666,9 @@ static void serial8250_start_tx(struct u struct uart_8250_port *up = up_to_u8250p(port); struct uart_8250_em485 *em485 = up->em485; @@ -91,7 +91,7 @@ Signed-off-by: Phil Elwell if (!port->x_char && uart_circ_empty(&port->state->xmit)) return; -@@ -1889,6 +1895,9 @@ unsigned int serial8250_modem_status(str +@@ -1883,6 +1889,9 @@ unsigned int serial8250_modem_status(str uart_handle_cts_change(port, status & UART_MSR_CTS); wake_up_interruptible(&port->state->port.delta_msr_wait); diff --git a/target/linux/bcm27xx/patches-6.1/950-0842-f2fs-fix-to-avoid-NULL-pointer-dereference-in-f2fs_i.patch b/target/linux/bcm27xx/patches-6.1/950-0842-f2fs-fix-to-avoid-NULL-pointer-dereference-in-f2fs_i.patch index 33150551b..1e2119c88 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0842-f2fs-fix-to-avoid-NULL-pointer-dereference-in-f2fs_i.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0842-f2fs-fix-to-avoid-NULL-pointer-dereference-in-f2fs_i.patch @@ -35,7 +35,7 @@ Signed-off-by: Jaegeuk Kim --- a/fs/f2fs/segment.c +++ b/fs/f2fs/segment.c -@@ -663,9 +663,7 @@ init_thread: +@@ -665,9 +665,7 @@ init_thread: "f2fs_flush-%u:%u", MAJOR(dev), MINOR(dev)); if (IS_ERR(fcc->f2fs_issue_flush)) { err = PTR_ERR(fcc->f2fs_issue_flush); @@ -46,7 +46,7 @@ Signed-off-by: Jaegeuk Kim } return err; -@@ -5062,11 +5060,9 @@ int f2fs_build_segment_manager(struct f2 +@@ -5064,11 +5062,9 @@ int f2fs_build_segment_manager(struct f2 init_f2fs_rwsem(&sm_info->curseg_lock); diff --git a/target/linux/bcm27xx/patches-6.1/950-0851-Revert-usb-phy-generic-Get-the-vbus-supply.patch b/target/linux/bcm27xx/patches-6.1/950-0851-Revert-usb-phy-generic-Get-the-vbus-supply.patch index 5d271fe4d..aaf49e6a7 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0851-Revert-usb-phy-generic-Get-the-vbus-supply.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0851-Revert-usb-phy-generic-Get-the-vbus-supply.patch @@ -10,9 +10,9 @@ This reverts commit c0ea202fbc855d60bc4a0603ca52a9e80654b327. --- a/drivers/usb/phy/phy-generic.c +++ b/drivers/usb/phy/phy-generic.c -@@ -272,13 +272,6 @@ int usb_phy_gen_create_phy(struct device - return dev_err_probe(dev, PTR_ERR(nop->vbus_draw), - "could not get vbus regulator\n"); +@@ -265,13 +265,6 @@ int usb_phy_gen_create_phy(struct device + return -EPROBE_DEFER; + } - nop->vbus_draw = devm_regulator_get_exclusive(dev, "vbus"); - if (PTR_ERR(nop->vbus_draw) == -ENODEV) diff --git a/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch b/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch index 99ec42fe4..69f52fa40 100644 --- a/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch +++ b/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch @@ -361,7 +361,7 @@ Signed-off-by: T.J. Mercier static void mem_cgroup_css_free(struct cgroup_subsys_state *css) --- a/mm/page_alloc.c +++ b/mm/page_alloc.c -@@ -7943,6 +7943,7 @@ static void __init free_area_init_node(i +@@ -7945,6 +7945,7 @@ static void __init free_area_init_node(i pgdat_set_deferred_range(pgdat); free_area_init_core(pgdat); diff --git a/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch index 51f939356..dfbe88e8e 100644 --- a/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch +++ b/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch @@ -43,7 +43,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support #define QUECTEL_VENDOR_ID 0x2c7c /* These Quectel products use Quectel's vendor ID */ -@@ -1147,6 +1152,11 @@ static const struct usb_device_id option +@@ -1152,6 +1157,11 @@ static const struct usb_device_id option { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */ { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000), /* SIMCom SIM5218 */ .driver_info = NCTRL(0) | NCTRL(1) | NCTRL(2) | NCTRL(3) | RSVD(4) }, @@ -55,7 +55,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support /* Quectel products using Qualcomm vendor ID */ { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC15)}, { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC20), -@@ -1188,6 +1198,11 @@ static const struct usb_device_id option +@@ -1193,6 +1203,11 @@ static const struct usb_device_id option .driver_info = ZLP }, { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96), .driver_info = RSVD(4) }, diff --git a/target/linux/generic/pending-6.1/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-6.1/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch index 4bf473f9a..a3d66c54b 100644 --- a/target/linux/generic/pending-6.1/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch +++ b/target/linux/generic/pending-6.1/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch @@ -71,7 +71,7 @@ Signed-off-by: Tobias Wolf --- a/mm/page_alloc.c +++ b/mm/page_alloc.c -@@ -7897,7 +7897,7 @@ static void __init alloc_node_mem_map(st +@@ -7899,7 +7899,7 @@ static void __init alloc_node_mem_map(st if (pgdat == NODE_DATA(0)) { mem_map = NODE_DATA(0)->node_mem_map; if (page_to_pfn(mem_map) != pgdat->node_start_pfn) diff --git a/target/linux/generic/pending-6.1/834-ledtrig-libata.patch b/target/linux/generic/pending-6.1/834-ledtrig-libata.patch index 050c3515f..39960bc09 100644 --- a/target/linux/generic/pending-6.1/834-ledtrig-libata.patch +++ b/target/linux/generic/pending-6.1/834-ledtrig-libata.patch @@ -134,7 +134,7 @@ Signed-off-by: Daniel Golle /* * Define if arch has non-standard setup. This is a _PCI_ standard -@@ -864,6 +867,12 @@ struct ata_port { +@@ -865,6 +868,12 @@ struct ata_port { #ifdef CONFIG_ATA_ACPI struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */ #endif diff --git a/target/linux/generic/pending-6.1/901-usb-add-more-modem-support.patch b/target/linux/generic/pending-6.1/901-usb-add-more-modem-support.patch index 178b81c65..30d19e511 100644 --- a/target/linux/generic/pending-6.1/901-usb-add-more-modem-support.patch +++ b/target/linux/generic/pending-6.1/901-usb-add-more-modem-support.patch @@ -12,7 +12,7 @@ {QMI_GOBI1K_DEVICE(0x05c6, 0x9212)}, /* Acer Gobi Modem Device */ --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c -@@ -2272,6 +2272,12 @@ static const struct usb_device_id option +@@ -2277,6 +2277,12 @@ static const struct usb_device_id option { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a3, 0xff) }, /* Fibocom FM101-GL (laptop MBIM) */ { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a4, 0xff), /* Fibocom FM101-GL (laptop MBIM) */ .driver_info = RSVD(4) }, diff --git a/target/linux/mediatek/patches-6.1/100-dts-update-mt7622-rfb1.patch b/target/linux/mediatek/patches-6.1/100-dts-update-mt7622-rfb1.patch index 18bcdf02b..1eeed82c1 100644 --- a/target/linux/mediatek/patches-6.1/100-dts-update-mt7622-rfb1.patch +++ b/target/linux/mediatek/patches-6.1/100-dts-update-mt7622-rfb1.patch @@ -68,7 +68,7 @@ }; port@4 { -@@ -240,7 +239,22 @@ +@@ -241,7 +240,22 @@ status = "okay"; }; @@ -91,7 +91,7 @@ /* eMMC is shared pin with parallel NAND */ emmc_pins_default: emmc-pins-default { mux { -@@ -517,11 +531,11 @@ +@@ -518,11 +532,11 @@ }; &sata { diff --git a/target/linux/mediatek/patches-6.1/131-dts-mt7622-add-snand-support.patch b/target/linux/mediatek/patches-6.1/131-dts-mt7622-add-snand-support.patch index 4d6553ec3..134e5997e 100644 --- a/target/linux/mediatek/patches-6.1/131-dts-mt7622-add-snand-support.patch +++ b/target/linux/mediatek/patches-6.1/131-dts-mt7622-add-snand-support.patch @@ -1,7 +1,7 @@ --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts -@@ -524,6 +524,65 @@ - status = "okay"; +@@ -539,6 +539,65 @@ + status = "disabled"; }; +&bch { diff --git a/target/linux/mediatek/patches-6.1/140-dts-fix-wmac-support-for-mt7622-rfb1.patch b/target/linux/mediatek/patches-6.1/140-dts-fix-wmac-support-for-mt7622-rfb1.patch index 3387d3d5e..8e6935b43 100644 --- a/target/linux/mediatek/patches-6.1/140-dts-fix-wmac-support-for-mt7622-rfb1.patch +++ b/target/linux/mediatek/patches-6.1/140-dts-fix-wmac-support-for-mt7622-rfb1.patch @@ -1,6 +1,6 @@ --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts -@@ -565,7 +565,7 @@ +@@ -580,7 +580,7 @@ reg = <0x140000 0x0080000>; }; @@ -9,7 +9,7 @@ label = "Factory"; reg = <0x1c0000 0x0100000>; }; -@@ -626,5 +626,6 @@ +@@ -641,5 +641,6 @@ &wmac { pinctrl-names = "default"; pinctrl-0 = <&wmac_pins>; diff --git a/target/linux/mediatek/patches-6.1/331-mt7622-rfb1-enable-bmt.patch b/target/linux/mediatek/patches-6.1/331-mt7622-rfb1-enable-bmt.patch index 220f4054c..9c1a8f284 100644 --- a/target/linux/mediatek/patches-6.1/331-mt7622-rfb1-enable-bmt.patch +++ b/target/linux/mediatek/patches-6.1/331-mt7622-rfb1-enable-bmt.patch @@ -1,6 +1,6 @@ --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts -@@ -538,6 +538,7 @@ +@@ -553,6 +553,7 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; nand-ecc-engine = <&snfi>; diff --git a/target/linux/mediatek/patches-6.1/410-bt-mtk-serial-fix.patch b/target/linux/mediatek/patches-6.1/410-bt-mtk-serial-fix.patch index 5b94c9216..fa232b5d4 100644 --- a/target/linux/mediatek/patches-6.1/410-bt-mtk-serial-fix.patch +++ b/target/linux/mediatek/patches-6.1/410-bt-mtk-serial-fix.patch @@ -19,7 +19,7 @@ }, [PORT_NPCM] = { .name = "Nuvoton 16550", -@@ -2773,6 +2773,11 @@ serial8250_do_set_termios(struct uart_po +@@ -2767,6 +2767,11 @@ serial8250_do_set_termios(struct uart_po unsigned long flags; unsigned int baud, quot, frac = 0; diff --git a/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch b/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch index c209adbc0..20245698b 100644 --- a/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch +++ b/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch @@ -808,8 +808,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -975,6 +647,18 @@ static const struct freq_tbl ftbl_pcie_a - F(19200000, P_XO, 1, 0, 0), +@@ -976,6 +648,18 @@ static const struct freq_tbl ftbl_pcie_a + { } }; +static const struct clk_parent_data gcc_xo_gpll0_sleep_clk[] = { @@ -827,7 +827,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 pcie0_aux_clk_src = { .cmd_rcgr = 0x75024, .freq_tbl = ftbl_pcie_aux_clk_src, -@@ -983,12 +667,22 @@ static struct clk_rcg2 pcie0_aux_clk_src +@@ -984,12 +668,22 @@ static struct clk_rcg2 pcie0_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "pcie0_aux_clk_src", @@ -852,7 +852,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux pcie0_pipe_clk_src = { .reg = 0x7501c, .shift = 8, -@@ -997,8 +691,8 @@ static struct clk_regmap_mux pcie0_pipe_ +@@ -998,8 +692,8 @@ static struct clk_regmap_mux pcie0_pipe_ .clkr = { .hw.init = &(struct clk_init_data){ .name = "pcie0_pipe_clk_src", @@ -863,7 +863,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1013,7 +707,7 @@ static struct clk_rcg2 pcie1_axi_clk_src +@@ -1014,7 +708,7 @@ static struct clk_rcg2 pcie1_axi_clk_src .clkr.hw.init = &(struct clk_init_data){ .name = "pcie1_axi_clk_src", .parent_data = gcc_xo_gpll0, @@ -872,7 +872,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1026,12 +720,22 @@ static struct clk_rcg2 pcie1_aux_clk_src +@@ -1027,12 +721,22 @@ static struct clk_rcg2 pcie1_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "pcie1_aux_clk_src", @@ -897,7 +897,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux pcie1_pipe_clk_src = { .reg = 0x7601c, .shift = 8, -@@ -1040,8 +744,8 @@ static struct clk_regmap_mux pcie1_pipe_ +@@ -1041,8 +745,8 @@ static struct clk_regmap_mux pcie1_pipe_ .clkr = { .hw.init = &(struct clk_init_data){ .name = "pcie1_pipe_clk_src", @@ -908,7 +908,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1060,6 +764,20 @@ static const struct freq_tbl ftbl_sdcc_a +@@ -1061,6 +765,20 @@ static const struct freq_tbl ftbl_sdcc_a { } }; @@ -929,7 +929,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 sdcc1_apps_clk_src = { .cmd_rcgr = 0x42004, .freq_tbl = ftbl_sdcc_apps_clk_src, -@@ -1068,8 +786,8 @@ static struct clk_rcg2 sdcc1_apps_clk_sr +@@ -1069,8 +787,8 @@ static struct clk_rcg2 sdcc1_apps_clk_sr .parent_map = gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc1_apps_clk_src", @@ -940,8 +940,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_floor_ops, }, }; -@@ -1080,6 +798,20 @@ static const struct freq_tbl ftbl_sdcc_i - F(308570000, P_GPLL6, 3.5, 0, 0), +@@ -1082,6 +800,20 @@ static const struct freq_tbl ftbl_sdcc_i + { } }; +static const struct clk_parent_data gcc_xo_gpll0_gpll6_gpll0_div2[] = { @@ -961,7 +961,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 sdcc1_ice_core_clk_src = { .cmd_rcgr = 0x5d000, .freq_tbl = ftbl_sdcc_ice_core_clk_src, -@@ -1088,8 +820,8 @@ static struct clk_rcg2 sdcc1_ice_core_cl +@@ -1090,8 +822,8 @@ static struct clk_rcg2 sdcc1_ice_core_cl .parent_map = gcc_xo_gpll0_gpll6_gpll0_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc1_ice_core_clk_src", @@ -972,7 +972,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1102,8 +834,8 @@ static struct clk_rcg2 sdcc2_apps_clk_sr +@@ -1104,8 +836,8 @@ static struct clk_rcg2 sdcc2_apps_clk_sr .parent_map = gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc2_apps_clk_src", @@ -983,7 +983,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_floor_ops, }, }; -@@ -1115,6 +847,18 @@ static const struct freq_tbl ftbl_usb_ma +@@ -1117,6 +849,18 @@ static const struct freq_tbl ftbl_usb_ma { } }; @@ -1002,7 +1002,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 usb0_master_clk_src = { .cmd_rcgr = 0x3e00c, .freq_tbl = ftbl_usb_master_clk_src, -@@ -1123,8 +867,8 @@ static struct clk_rcg2 usb0_master_clk_s +@@ -1125,8 +869,8 @@ static struct clk_rcg2 usb0_master_clk_s .parent_map = gcc_xo_gpll0_out_main_div2_gpll0_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb0_master_clk_src", @@ -1013,7 +1013,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1142,8 +886,8 @@ static struct clk_rcg2 usb0_aux_clk_src +@@ -1144,8 +888,8 @@ static struct clk_rcg2 usb0_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb0_aux_clk_src", @@ -1024,7 +1024,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1155,6 +899,20 @@ static const struct freq_tbl ftbl_usb_mo +@@ -1157,6 +901,20 @@ static const struct freq_tbl ftbl_usb_mo { } }; @@ -1045,7 +1045,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 usb0_mock_utmi_clk_src = { .cmd_rcgr = 0x3e020, .freq_tbl = ftbl_usb_mock_utmi_clk_src, -@@ -1163,12 +921,22 @@ static struct clk_rcg2 usb0_mock_utmi_cl +@@ -1165,12 +923,22 @@ static struct clk_rcg2 usb0_mock_utmi_cl .parent_map = gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb0_mock_utmi_clk_src", @@ -1070,7 +1070,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux usb0_pipe_clk_src = { .reg = 0x3e048, .shift = 8, -@@ -1177,8 +945,8 @@ static struct clk_regmap_mux usb0_pipe_c +@@ -1179,8 +947,8 @@ static struct clk_regmap_mux usb0_pipe_c .clkr = { .hw.init = &(struct clk_init_data){ .name = "usb0_pipe_clk_src", @@ -1081,7 +1081,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1193,8 +961,8 @@ static struct clk_rcg2 usb1_master_clk_s +@@ -1195,8 +963,8 @@ static struct clk_rcg2 usb1_master_clk_s .parent_map = gcc_xo_gpll0_out_main_div2_gpll0_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb1_master_clk_src", @@ -1092,7 +1092,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1207,8 +975,8 @@ static struct clk_rcg2 usb1_aux_clk_src +@@ -1209,8 +977,8 @@ static struct clk_rcg2 usb1_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb1_aux_clk_src", @@ -1103,7 +1103,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1221,12 +989,22 @@ static struct clk_rcg2 usb1_mock_utmi_cl +@@ -1223,12 +991,22 @@ static struct clk_rcg2 usb1_mock_utmi_cl .parent_map = gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb1_mock_utmi_clk_src", @@ -1128,7 +1128,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux usb1_pipe_clk_src = { .reg = 0x3f048, .shift = 8, -@@ -1235,8 +1013,8 @@ static struct clk_regmap_mux usb1_pipe_c +@@ -1237,8 +1015,8 @@ static struct clk_regmap_mux usb1_pipe_c .clkr = { .hw.init = &(struct clk_init_data){ .name = "usb1_pipe_clk_src", @@ -1139,7 +1139,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1250,8 +1028,9 @@ static struct clk_branch gcc_xo_clk_src +@@ -1252,8 +1030,9 @@ static struct clk_branch gcc_xo_clk_src .enable_mask = BIT(1), .hw.init = &(struct clk_init_data){ .name = "gcc_xo_clk_src", @@ -1151,7 +1151,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, -@@ -1265,9 +1044,8 @@ static struct clk_fixed_factor gcc_xo_di +@@ -1267,9 +1046,8 @@ static struct clk_fixed_factor gcc_xo_di .div = 4, .hw.init = &(struct clk_init_data){ .name = "gcc_xo_div4_clk_src", @@ -1163,7 +1163,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1285,6 +1063,20 @@ static const struct freq_tbl ftbl_system +@@ -1287,6 +1065,20 @@ static const struct freq_tbl ftbl_system { } }; @@ -1184,7 +1184,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 system_noc_bfdcd_clk_src = { .cmd_rcgr = 0x26004, .freq_tbl = ftbl_system_noc_bfdcd_clk_src, -@@ -1292,8 +1084,8 @@ static struct clk_rcg2 system_noc_bfdcd_ +@@ -1294,8 +1086,8 @@ static struct clk_rcg2 system_noc_bfdcd_ .parent_map = gcc_xo_gpll0_gpll6_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "system_noc_bfdcd_clk_src", @@ -1195,7 +1195,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_IS_CRITICAL, }, -@@ -1304,9 +1096,8 @@ static struct clk_fixed_factor system_no +@@ -1306,9 +1098,8 @@ static struct clk_fixed_factor system_no .div = 1, .hw.init = &(struct clk_init_data){ .name = "system_noc_clk_src", @@ -1207,7 +1207,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1327,7 +1118,7 @@ static struct clk_rcg2 nss_ce_clk_src = +@@ -1329,7 +1120,7 @@ static struct clk_rcg2 nss_ce_clk_src = .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ce_clk_src", .parent_data = gcc_xo_gpll0, @@ -1216,7 +1216,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1338,6 +1129,20 @@ static const struct freq_tbl ftbl_nss_no +@@ -1340,6 +1131,20 @@ static const struct freq_tbl ftbl_nss_no { } }; @@ -1237,7 +1237,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_noc_bfdcd_clk_src = { .cmd_rcgr = 0x68088, .freq_tbl = ftbl_nss_noc_bfdcd_clk_src, -@@ -1345,8 +1150,8 @@ static struct clk_rcg2 nss_noc_bfdcd_clk +@@ -1347,8 +1152,8 @@ static struct clk_rcg2 nss_noc_bfdcd_clk .parent_map = gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_noc_bfdcd_clk_src", @@ -1248,7 +1248,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1356,9 +1161,8 @@ static struct clk_fixed_factor nss_noc_c +@@ -1358,9 +1163,8 @@ static struct clk_fixed_factor nss_noc_c .div = 1, .hw.init = &(struct clk_init_data){ .name = "nss_noc_clk_src", @@ -1260,7 +1260,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1371,6 +1175,18 @@ static const struct freq_tbl ftbl_nss_cr +@@ -1373,6 +1177,18 @@ static const struct freq_tbl ftbl_nss_cr { } }; @@ -1279,7 +1279,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_crypto_clk_src = { .cmd_rcgr = 0x68144, .freq_tbl = ftbl_nss_crypto_clk_src, -@@ -1379,8 +1195,8 @@ static struct clk_rcg2 nss_crypto_clk_sr +@@ -1381,8 +1197,8 @@ static struct clk_rcg2 nss_crypto_clk_sr .parent_map = gcc_xo_nss_crypto_pll_gpll0_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_crypto_clk_src", @@ -1290,7 +1290,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1394,6 +1210,24 @@ static const struct freq_tbl ftbl_nss_ub +@@ -1396,6 +1212,24 @@ static const struct freq_tbl ftbl_nss_ub { } }; @@ -1315,7 +1315,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_ubi0_clk_src = { .cmd_rcgr = 0x68104, .freq_tbl = ftbl_nss_ubi_clk_src, -@@ -1401,8 +1235,8 @@ static struct clk_rcg2 nss_ubi0_clk_src +@@ -1403,8 +1237,8 @@ static struct clk_rcg2 nss_ubi0_clk_src .parent_map = gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ubi0_clk_src", @@ -1326,7 +1326,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1415,9 +1249,8 @@ static struct clk_regmap_div nss_ubi0_di +@@ -1417,9 +1251,8 @@ static struct clk_regmap_div nss_ubi0_di .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_ubi0_div_clk_src", @@ -1338,7 +1338,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ro_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1432,8 +1265,8 @@ static struct clk_rcg2 nss_ubi1_clk_src +@@ -1434,8 +1267,8 @@ static struct clk_rcg2 nss_ubi1_clk_src .parent_map = gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ubi1_clk_src", @@ -1349,7 +1349,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1446,9 +1279,8 @@ static struct clk_regmap_div nss_ubi1_di +@@ -1448,9 +1281,8 @@ static struct clk_regmap_div nss_ubi1_di .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_ubi1_div_clk_src", @@ -1361,7 +1361,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ro_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1462,6 +1294,16 @@ static const struct freq_tbl ftbl_ubi_mp +@@ -1464,6 +1296,16 @@ static const struct freq_tbl ftbl_ubi_mp { } }; @@ -1378,7 +1378,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 ubi_mpt_clk_src = { .cmd_rcgr = 0x68090, .freq_tbl = ftbl_ubi_mpt_clk_src, -@@ -1469,8 +1311,8 @@ static struct clk_rcg2 ubi_mpt_clk_src = +@@ -1471,8 +1313,8 @@ static struct clk_rcg2 ubi_mpt_clk_src = .parent_map = gcc_xo_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "ubi_mpt_clk_src", @@ -1389,7 +1389,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1481,6 +1323,18 @@ static const struct freq_tbl ftbl_nss_im +@@ -1483,6 +1325,18 @@ static const struct freq_tbl ftbl_nss_im { } }; @@ -1408,7 +1408,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_imem_clk_src = { .cmd_rcgr = 0x68158, .freq_tbl = ftbl_nss_imem_clk_src, -@@ -1488,8 +1342,8 @@ static struct clk_rcg2 nss_imem_clk_src +@@ -1490,8 +1344,8 @@ static struct clk_rcg2 nss_imem_clk_src .parent_map = gcc_xo_gpll0_gpll4_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_imem_clk_src", @@ -1419,7 +1419,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1500,6 +1354,24 @@ static const struct freq_tbl ftbl_nss_pp +@@ -1502,6 +1356,24 @@ static const struct freq_tbl ftbl_nss_pp { } }; @@ -1444,7 +1444,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_ppe_clk_src = { .cmd_rcgr = 0x68080, .freq_tbl = ftbl_nss_ppe_clk_src, -@@ -1507,8 +1379,8 @@ static struct clk_rcg2 nss_ppe_clk_src = +@@ -1509,8 +1381,8 @@ static struct clk_rcg2 nss_ppe_clk_src = .parent_map = gcc_xo_bias_gpll0_gpll4_nss_ubi32_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ppe_clk_src", @@ -1455,7 +1455,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1518,9 +1390,8 @@ static struct clk_fixed_factor nss_ppe_c +@@ -1520,9 +1392,8 @@ static struct clk_fixed_factor nss_ppe_c .div = 4, .hw.init = &(struct clk_init_data){ .name = "nss_ppe_cdiv_clk_src", @@ -1467,7 +1467,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1534,6 +1405,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1536,6 +1407,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1490,7 +1490,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port1_rx_clk_src = { .cmd_rcgr = 0x68020, .freq_tbl = ftbl_nss_port1_rx_clk_src, -@@ -1541,8 +1428,8 @@ static struct clk_rcg2 nss_port1_rx_clk_ +@@ -1543,8 +1430,8 @@ static struct clk_rcg2 nss_port1_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port1_rx_clk_src", @@ -1501,7 +1501,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1554,9 +1441,8 @@ static struct clk_regmap_div nss_port1_r +@@ -1556,9 +1443,8 @@ static struct clk_regmap_div nss_port1_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port1_rx_div_clk_src", @@ -1513,7 +1513,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1571,6 +1457,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1573,6 +1459,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1536,7 +1536,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port1_tx_clk_src = { .cmd_rcgr = 0x68028, .freq_tbl = ftbl_nss_port1_tx_clk_src, -@@ -1578,8 +1480,8 @@ static struct clk_rcg2 nss_port1_tx_clk_ +@@ -1580,8 +1482,8 @@ static struct clk_rcg2 nss_port1_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port1_tx_clk_src", @@ -1547,7 +1547,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1591,9 +1493,8 @@ static struct clk_regmap_div nss_port1_t +@@ -1593,9 +1495,8 @@ static struct clk_regmap_div nss_port1_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port1_tx_div_clk_src", @@ -1559,7 +1559,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1608,8 +1509,8 @@ static struct clk_rcg2 nss_port2_rx_clk_ +@@ -1610,8 +1511,8 @@ static struct clk_rcg2 nss_port2_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port2_rx_clk_src", @@ -1570,7 +1570,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1621,9 +1522,8 @@ static struct clk_regmap_div nss_port2_r +@@ -1623,9 +1524,8 @@ static struct clk_regmap_div nss_port2_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port2_rx_div_clk_src", @@ -1582,7 +1582,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1638,8 +1538,8 @@ static struct clk_rcg2 nss_port2_tx_clk_ +@@ -1640,8 +1540,8 @@ static struct clk_rcg2 nss_port2_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port2_tx_clk_src", @@ -1593,7 +1593,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1651,9 +1551,8 @@ static struct clk_regmap_div nss_port2_t +@@ -1653,9 +1553,8 @@ static struct clk_regmap_div nss_port2_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port2_tx_div_clk_src", @@ -1605,7 +1605,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1668,8 +1567,8 @@ static struct clk_rcg2 nss_port3_rx_clk_ +@@ -1670,8 +1569,8 @@ static struct clk_rcg2 nss_port3_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port3_rx_clk_src", @@ -1616,7 +1616,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1681,9 +1580,8 @@ static struct clk_regmap_div nss_port3_r +@@ -1683,9 +1582,8 @@ static struct clk_regmap_div nss_port3_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port3_rx_div_clk_src", @@ -1628,7 +1628,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1698,8 +1596,8 @@ static struct clk_rcg2 nss_port3_tx_clk_ +@@ -1700,8 +1598,8 @@ static struct clk_rcg2 nss_port3_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port3_tx_clk_src", @@ -1639,7 +1639,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1711,9 +1609,8 @@ static struct clk_regmap_div nss_port3_t +@@ -1713,9 +1611,8 @@ static struct clk_regmap_div nss_port3_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port3_tx_div_clk_src", @@ -1651,7 +1651,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1728,8 +1625,8 @@ static struct clk_rcg2 nss_port4_rx_clk_ +@@ -1730,8 +1627,8 @@ static struct clk_rcg2 nss_port4_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port4_rx_clk_src", @@ -1662,7 +1662,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1741,9 +1638,8 @@ static struct clk_regmap_div nss_port4_r +@@ -1743,9 +1640,8 @@ static struct clk_regmap_div nss_port4_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port4_rx_div_clk_src", @@ -1674,7 +1674,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1758,8 +1654,8 @@ static struct clk_rcg2 nss_port4_tx_clk_ +@@ -1760,8 +1656,8 @@ static struct clk_rcg2 nss_port4_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port4_tx_clk_src", @@ -1685,7 +1685,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1771,9 +1667,8 @@ static struct clk_regmap_div nss_port4_t +@@ -1773,9 +1669,8 @@ static struct clk_regmap_div nss_port4_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port4_tx_div_clk_src", @@ -1697,7 +1697,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1793,6 +1688,27 @@ static const struct freq_tbl ftbl_nss_po +@@ -1795,6 +1690,27 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1725,7 +1725,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port5_rx_clk_src = { .cmd_rcgr = 0x68060, .freq_tbl = ftbl_nss_port5_rx_clk_src, -@@ -1800,8 +1716,8 @@ static struct clk_rcg2 nss_port5_rx_clk_ +@@ -1802,8 +1718,8 @@ static struct clk_rcg2 nss_port5_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port5_rx_clk_src", @@ -1736,7 +1736,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1813,9 +1729,8 @@ static struct clk_regmap_div nss_port5_r +@@ -1815,9 +1731,8 @@ static struct clk_regmap_div nss_port5_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port5_rx_div_clk_src", @@ -1748,7 +1748,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1835,6 +1750,27 @@ static const struct freq_tbl ftbl_nss_po +@@ -1837,6 +1752,27 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1776,7 +1776,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port5_tx_clk_src = { .cmd_rcgr = 0x68068, .freq_tbl = ftbl_nss_port5_tx_clk_src, -@@ -1842,8 +1778,8 @@ static struct clk_rcg2 nss_port5_tx_clk_ +@@ -1844,8 +1780,8 @@ static struct clk_rcg2 nss_port5_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port5_tx_clk_src", @@ -1787,7 +1787,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1855,9 +1791,8 @@ static struct clk_regmap_div nss_port5_t +@@ -1857,9 +1793,8 @@ static struct clk_regmap_div nss_port5_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port5_tx_div_clk_src", @@ -1799,7 +1799,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1877,6 +1812,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1879,6 +1814,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1822,7 +1822,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port6_rx_clk_src = { .cmd_rcgr = 0x68070, .freq_tbl = ftbl_nss_port6_rx_clk_src, -@@ -1884,8 +1835,8 @@ static struct clk_rcg2 nss_port6_rx_clk_ +@@ -1886,8 +1837,8 @@ static struct clk_rcg2 nss_port6_rx_clk_ .parent_map = gcc_xo_uniphy2_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port6_rx_clk_src", @@ -1833,7 +1833,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1897,9 +1848,8 @@ static struct clk_regmap_div nss_port6_r +@@ -1899,9 +1850,8 @@ static struct clk_regmap_div nss_port6_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port6_rx_div_clk_src", @@ -1845,7 +1845,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1919,6 +1869,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1921,6 +1871,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1868,7 +1868,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port6_tx_clk_src = { .cmd_rcgr = 0x68078, .freq_tbl = ftbl_nss_port6_tx_clk_src, -@@ -1926,8 +1892,8 @@ static struct clk_rcg2 nss_port6_tx_clk_ +@@ -1928,8 +1894,8 @@ static struct clk_rcg2 nss_port6_tx_clk_ .parent_map = gcc_xo_uniphy2_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port6_tx_clk_src", @@ -1879,7 +1879,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1939,9 +1905,8 @@ static struct clk_regmap_div nss_port6_t +@@ -1941,9 +1907,8 @@ static struct clk_regmap_div nss_port6_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port6_tx_div_clk_src", @@ -1891,7 +1891,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1964,8 +1929,8 @@ static struct clk_rcg2 crypto_clk_src = +@@ -1966,8 +1931,8 @@ static struct clk_rcg2 crypto_clk_src = .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "crypto_clk_src", @@ -1902,7 +1902,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1975,6 +1940,22 @@ static struct freq_tbl ftbl_gp_clk_src[] +@@ -1977,6 +1942,22 @@ static struct freq_tbl ftbl_gp_clk_src[] { } }; @@ -1925,7 +1925,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 gp1_clk_src = { .cmd_rcgr = 0x08004, .freq_tbl = ftbl_gp_clk_src, -@@ -1983,8 +1964,8 @@ static struct clk_rcg2 gp1_clk_src = { +@@ -1985,8 +1966,8 @@ static struct clk_rcg2 gp1_clk_src = { .parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "gp1_clk_src", @@ -1936,7 +1936,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1997,8 +1978,8 @@ static struct clk_rcg2 gp2_clk_src = { +@@ -1999,8 +1980,8 @@ static struct clk_rcg2 gp2_clk_src = { .parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "gp2_clk_src", @@ -1947,7 +1947,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -2011,8 +1992,8 @@ static struct clk_rcg2 gp3_clk_src = { +@@ -2013,8 +1994,8 @@ static struct clk_rcg2 gp3_clk_src = { .parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "gp3_clk_src", @@ -1958,7 +1958,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -2024,9 +2005,8 @@ static struct clk_branch gcc_blsp1_ahb_c +@@ -2026,9 +2007,8 @@ static struct clk_branch gcc_blsp1_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_ahb_clk", @@ -1970,7 +1970,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2041,9 +2021,8 @@ static struct clk_branch gcc_blsp1_qup1_ +@@ -2043,9 +2023,8 @@ static struct clk_branch gcc_blsp1_qup1_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_i2c_apps_clk", @@ -1982,7 +1982,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2058,9 +2037,8 @@ static struct clk_branch gcc_blsp1_qup1_ +@@ -2060,9 +2039,8 @@ static struct clk_branch gcc_blsp1_qup1_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_spi_apps_clk", @@ -1994,7 +1994,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2075,9 +2053,8 @@ static struct clk_branch gcc_blsp1_qup2_ +@@ -2077,9 +2055,8 @@ static struct clk_branch gcc_blsp1_qup2_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_i2c_apps_clk", @@ -2006,7 +2006,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2092,9 +2069,8 @@ static struct clk_branch gcc_blsp1_qup2_ +@@ -2094,9 +2071,8 @@ static struct clk_branch gcc_blsp1_qup2_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_spi_apps_clk", @@ -2018,7 +2018,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2109,9 +2085,8 @@ static struct clk_branch gcc_blsp1_qup3_ +@@ -2111,9 +2087,8 @@ static struct clk_branch gcc_blsp1_qup3_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_i2c_apps_clk", @@ -2030,7 +2030,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2126,9 +2101,8 @@ static struct clk_branch gcc_blsp1_qup3_ +@@ -2128,9 +2103,8 @@ static struct clk_branch gcc_blsp1_qup3_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_spi_apps_clk", @@ -2042,7 +2042,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2143,9 +2117,8 @@ static struct clk_branch gcc_blsp1_qup4_ +@@ -2145,9 +2119,8 @@ static struct clk_branch gcc_blsp1_qup4_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_i2c_apps_clk", @@ -2054,7 +2054,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2160,9 +2133,8 @@ static struct clk_branch gcc_blsp1_qup4_ +@@ -2162,9 +2135,8 @@ static struct clk_branch gcc_blsp1_qup4_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_spi_apps_clk", @@ -2066,7 +2066,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2177,9 +2149,8 @@ static struct clk_branch gcc_blsp1_qup5_ +@@ -2179,9 +2151,8 @@ static struct clk_branch gcc_blsp1_qup5_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup5_i2c_apps_clk", @@ -2078,7 +2078,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2194,9 +2165,8 @@ static struct clk_branch gcc_blsp1_qup5_ +@@ -2196,9 +2167,8 @@ static struct clk_branch gcc_blsp1_qup5_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup5_spi_apps_clk", @@ -2090,7 +2090,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2211,9 +2181,8 @@ static struct clk_branch gcc_blsp1_qup6_ +@@ -2213,9 +2183,8 @@ static struct clk_branch gcc_blsp1_qup6_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup6_i2c_apps_clk", @@ -2102,7 +2102,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2228,9 +2197,8 @@ static struct clk_branch gcc_blsp1_qup6_ +@@ -2230,9 +2199,8 @@ static struct clk_branch gcc_blsp1_qup6_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup6_spi_apps_clk", @@ -2114,7 +2114,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2245,9 +2213,8 @@ static struct clk_branch gcc_blsp1_uart1 +@@ -2247,9 +2215,8 @@ static struct clk_branch gcc_blsp1_uart1 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart1_apps_clk", @@ -2126,7 +2126,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2262,9 +2229,8 @@ static struct clk_branch gcc_blsp1_uart2 +@@ -2264,9 +2231,8 @@ static struct clk_branch gcc_blsp1_uart2 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart2_apps_clk", @@ -2138,7 +2138,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2279,9 +2245,8 @@ static struct clk_branch gcc_blsp1_uart3 +@@ -2281,9 +2247,8 @@ static struct clk_branch gcc_blsp1_uart3 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart3_apps_clk", @@ -2150,7 +2150,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2296,9 +2261,8 @@ static struct clk_branch gcc_blsp1_uart4 +@@ -2298,9 +2263,8 @@ static struct clk_branch gcc_blsp1_uart4 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart4_apps_clk", @@ -2162,7 +2162,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2313,9 +2277,8 @@ static struct clk_branch gcc_blsp1_uart5 +@@ -2315,9 +2279,8 @@ static struct clk_branch gcc_blsp1_uart5 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart5_apps_clk", @@ -2174,7 +2174,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2330,9 +2293,8 @@ static struct clk_branch gcc_blsp1_uart6 +@@ -2332,9 +2295,8 @@ static struct clk_branch gcc_blsp1_uart6 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart6_apps_clk", @@ -2186,7 +2186,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2348,9 +2310,8 @@ static struct clk_branch gcc_prng_ahb_cl +@@ -2350,9 +2312,8 @@ static struct clk_branch gcc_prng_ahb_cl .enable_mask = BIT(8), .hw.init = &(struct clk_init_data){ .name = "gcc_prng_ahb_clk", @@ -2198,7 +2198,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2365,9 +2326,8 @@ static struct clk_branch gcc_qpic_ahb_cl +@@ -2367,9 +2328,8 @@ static struct clk_branch gcc_qpic_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_qpic_ahb_clk", @@ -2210,7 +2210,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2382,9 +2342,8 @@ static struct clk_branch gcc_qpic_clk = +@@ -2384,9 +2344,8 @@ static struct clk_branch gcc_qpic_clk = .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_qpic_clk", @@ -2222,7 +2222,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2399,9 +2358,8 @@ static struct clk_branch gcc_pcie0_ahb_c +@@ -2401,9 +2360,8 @@ static struct clk_branch gcc_pcie0_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_ahb_clk", @@ -2234,7 +2234,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2416,9 +2374,8 @@ static struct clk_branch gcc_pcie0_aux_c +@@ -2418,9 +2376,8 @@ static struct clk_branch gcc_pcie0_aux_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_aux_clk", @@ -2246,7 +2246,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2433,9 +2390,8 @@ static struct clk_branch gcc_pcie0_axi_m +@@ -2435,9 +2392,8 @@ static struct clk_branch gcc_pcie0_axi_m .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_axi_m_clk", @@ -2258,7 +2258,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2450,9 +2406,8 @@ static struct clk_branch gcc_pcie0_axi_s +@@ -2452,9 +2408,8 @@ static struct clk_branch gcc_pcie0_axi_s .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_axi_s_clk", @@ -2270,7 +2270,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2468,9 +2423,8 @@ static struct clk_branch gcc_pcie0_pipe_ +@@ -2470,9 +2425,8 @@ static struct clk_branch gcc_pcie0_pipe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_pipe_clk", @@ -2282,7 +2282,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2485,9 +2439,8 @@ static struct clk_branch gcc_sys_noc_pci +@@ -2487,9 +2441,8 @@ static struct clk_branch gcc_sys_noc_pci .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_pcie0_axi_clk", @@ -2294,7 +2294,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2502,9 +2455,8 @@ static struct clk_branch gcc_pcie1_ahb_c +@@ -2504,9 +2457,8 @@ static struct clk_branch gcc_pcie1_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_ahb_clk", @@ -2306,7 +2306,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2519,9 +2471,8 @@ static struct clk_branch gcc_pcie1_aux_c +@@ -2521,9 +2473,8 @@ static struct clk_branch gcc_pcie1_aux_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_aux_clk", @@ -2318,7 +2318,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2536,9 +2487,8 @@ static struct clk_branch gcc_pcie1_axi_m +@@ -2538,9 +2489,8 @@ static struct clk_branch gcc_pcie1_axi_m .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_axi_m_clk", @@ -2330,7 +2330,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2553,9 +2503,8 @@ static struct clk_branch gcc_pcie1_axi_s +@@ -2555,9 +2505,8 @@ static struct clk_branch gcc_pcie1_axi_s .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_axi_s_clk", @@ -2342,7 +2342,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2571,9 +2520,8 @@ static struct clk_branch gcc_pcie1_pipe_ +@@ -2573,9 +2522,8 @@ static struct clk_branch gcc_pcie1_pipe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_pipe_clk", @@ -2354,7 +2354,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2588,9 +2536,8 @@ static struct clk_branch gcc_sys_noc_pci +@@ -2590,9 +2538,8 @@ static struct clk_branch gcc_sys_noc_pci .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_pcie1_axi_clk", @@ -2366,7 +2366,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2605,9 +2552,8 @@ static struct clk_branch gcc_usb0_aux_cl +@@ -2607,9 +2554,8 @@ static struct clk_branch gcc_usb0_aux_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_aux_clk", @@ -2378,7 +2378,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2622,9 +2568,8 @@ static struct clk_branch gcc_sys_noc_usb +@@ -2624,9 +2570,8 @@ static struct clk_branch gcc_sys_noc_usb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_usb0_axi_clk", @@ -2390,7 +2390,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2639,9 +2584,8 @@ static struct clk_branch gcc_usb0_master +@@ -2641,9 +2586,8 @@ static struct clk_branch gcc_usb0_master .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_master_clk", @@ -2402,7 +2402,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2656,9 +2600,8 @@ static struct clk_branch gcc_usb0_mock_u +@@ -2658,9 +2602,8 @@ static struct clk_branch gcc_usb0_mock_u .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_mock_utmi_clk", @@ -2414,7 +2414,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2673,9 +2616,8 @@ static struct clk_branch gcc_usb0_phy_cf +@@ -2675,9 +2618,8 @@ static struct clk_branch gcc_usb0_phy_cf .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_phy_cfg_ahb_clk", @@ -2426,7 +2426,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2691,9 +2633,8 @@ static struct clk_branch gcc_usb0_pipe_c +@@ -2693,9 +2635,8 @@ static struct clk_branch gcc_usb0_pipe_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_pipe_clk", @@ -2438,7 +2438,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2708,9 +2649,8 @@ static struct clk_branch gcc_usb0_sleep_ +@@ -2710,9 +2651,8 @@ static struct clk_branch gcc_usb0_sleep_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_sleep_clk", @@ -2450,7 +2450,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2725,9 +2665,8 @@ static struct clk_branch gcc_usb1_aux_cl +@@ -2727,9 +2667,8 @@ static struct clk_branch gcc_usb1_aux_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_aux_clk", @@ -2462,7 +2462,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2742,9 +2681,8 @@ static struct clk_branch gcc_sys_noc_usb +@@ -2744,9 +2683,8 @@ static struct clk_branch gcc_sys_noc_usb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_usb1_axi_clk", @@ -2474,7 +2474,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2759,9 +2697,8 @@ static struct clk_branch gcc_usb1_master +@@ -2761,9 +2699,8 @@ static struct clk_branch gcc_usb1_master .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_master_clk", @@ -2486,7 +2486,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2776,9 +2713,8 @@ static struct clk_branch gcc_usb1_mock_u +@@ -2778,9 +2715,8 @@ static struct clk_branch gcc_usb1_mock_u .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_mock_utmi_clk", @@ -2498,7 +2498,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2793,9 +2729,8 @@ static struct clk_branch gcc_usb1_phy_cf +@@ -2795,9 +2731,8 @@ static struct clk_branch gcc_usb1_phy_cf .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_phy_cfg_ahb_clk", @@ -2510,7 +2510,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2811,9 +2746,8 @@ static struct clk_branch gcc_usb1_pipe_c +@@ -2813,9 +2748,8 @@ static struct clk_branch gcc_usb1_pipe_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_pipe_clk", @@ -2522,7 +2522,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2828,9 +2762,8 @@ static struct clk_branch gcc_usb1_sleep_ +@@ -2830,9 +2764,8 @@ static struct clk_branch gcc_usb1_sleep_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_sleep_clk", @@ -2534,7 +2534,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2845,9 +2778,8 @@ static struct clk_branch gcc_sdcc1_ahb_c +@@ -2847,9 +2780,8 @@ static struct clk_branch gcc_sdcc1_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_ahb_clk", @@ -2546,7 +2546,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2862,9 +2794,8 @@ static struct clk_branch gcc_sdcc1_apps_ +@@ -2864,9 +2796,8 @@ static struct clk_branch gcc_sdcc1_apps_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_apps_clk", @@ -2558,7 +2558,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2879,9 +2810,8 @@ static struct clk_branch gcc_sdcc1_ice_c +@@ -2881,9 +2812,8 @@ static struct clk_branch gcc_sdcc1_ice_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_ice_core_clk", @@ -2570,7 +2570,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2896,9 +2826,8 @@ static struct clk_branch gcc_sdcc2_ahb_c +@@ -2898,9 +2828,8 @@ static struct clk_branch gcc_sdcc2_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc2_ahb_clk", @@ -2582,7 +2582,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2913,9 +2842,8 @@ static struct clk_branch gcc_sdcc2_apps_ +@@ -2915,9 +2844,8 @@ static struct clk_branch gcc_sdcc2_apps_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc2_apps_clk", @@ -2594,7 +2594,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2930,9 +2858,8 @@ static struct clk_branch gcc_mem_noc_nss +@@ -2932,9 +2860,8 @@ static struct clk_branch gcc_mem_noc_nss .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_mem_noc_nss_axi_clk", @@ -2606,7 +2606,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2947,9 +2874,8 @@ static struct clk_branch gcc_nss_ce_apb_ +@@ -2949,9 +2876,8 @@ static struct clk_branch gcc_nss_ce_apb_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ce_apb_clk", @@ -2618,7 +2618,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2964,9 +2890,8 @@ static struct clk_branch gcc_nss_ce_axi_ +@@ -2966,9 +2892,8 @@ static struct clk_branch gcc_nss_ce_axi_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ce_axi_clk", @@ -2630,7 +2630,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2981,9 +2906,8 @@ static struct clk_branch gcc_nss_cfg_clk +@@ -2983,9 +2908,8 @@ static struct clk_branch gcc_nss_cfg_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_cfg_clk", @@ -2642,7 +2642,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2998,9 +2922,8 @@ static struct clk_branch gcc_nss_crypto_ +@@ -3000,9 +2924,8 @@ static struct clk_branch gcc_nss_crypto_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_crypto_clk", @@ -2654,7 +2654,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3015,9 +2938,8 @@ static struct clk_branch gcc_nss_csr_clk +@@ -3017,9 +2940,8 @@ static struct clk_branch gcc_nss_csr_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_csr_clk", @@ -2666,7 +2666,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3032,9 +2954,8 @@ static struct clk_branch gcc_nss_edma_cf +@@ -3034,9 +2956,8 @@ static struct clk_branch gcc_nss_edma_cf .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_edma_cfg_clk", @@ -2678,7 +2678,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3049,9 +2970,8 @@ static struct clk_branch gcc_nss_edma_cl +@@ -3051,9 +2972,8 @@ static struct clk_branch gcc_nss_edma_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_edma_clk", @@ -2690,7 +2690,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3066,9 +2986,8 @@ static struct clk_branch gcc_nss_imem_cl +@@ -3068,9 +2988,8 @@ static struct clk_branch gcc_nss_imem_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_imem_clk", @@ -2702,7 +2702,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3083,9 +3002,8 @@ static struct clk_branch gcc_nss_noc_clk +@@ -3085,9 +3004,8 @@ static struct clk_branch gcc_nss_noc_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_noc_clk", @@ -2714,7 +2714,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3100,9 +3018,8 @@ static struct clk_branch gcc_nss_ppe_btq +@@ -3102,9 +3020,8 @@ static struct clk_branch gcc_nss_ppe_btq .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_btq_clk", @@ -2726,7 +2726,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3117,9 +3034,8 @@ static struct clk_branch gcc_nss_ppe_cfg +@@ -3119,9 +3036,8 @@ static struct clk_branch gcc_nss_ppe_cfg .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_cfg_clk", @@ -2738,7 +2738,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3134,9 +3050,8 @@ static struct clk_branch gcc_nss_ppe_clk +@@ -3136,9 +3052,8 @@ static struct clk_branch gcc_nss_ppe_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_clk", @@ -2750,7 +2750,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3151,9 +3066,8 @@ static struct clk_branch gcc_nss_ppe_ipe +@@ -3153,9 +3068,8 @@ static struct clk_branch gcc_nss_ppe_ipe .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_ipe_clk", @@ -2762,7 +2762,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3168,9 +3082,8 @@ static struct clk_branch gcc_nss_ptp_ref +@@ -3170,9 +3084,8 @@ static struct clk_branch gcc_nss_ptp_ref .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ptp_ref_clk", @@ -2774,7 +2774,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3186,9 +3099,8 @@ static struct clk_branch gcc_crypto_ppe_ +@@ -3188,9 +3101,8 @@ static struct clk_branch gcc_crypto_ppe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_ppe_clk", @@ -2786,7 +2786,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3203,9 +3115,8 @@ static struct clk_branch gcc_nssnoc_ce_a +@@ -3205,9 +3117,8 @@ static struct clk_branch gcc_nssnoc_ce_a .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ce_apb_clk", @@ -2798,7 +2798,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3220,9 +3131,8 @@ static struct clk_branch gcc_nssnoc_ce_a +@@ -3222,9 +3133,8 @@ static struct clk_branch gcc_nssnoc_ce_a .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ce_axi_clk", @@ -2810,7 +2810,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3237,9 +3147,8 @@ static struct clk_branch gcc_nssnoc_cryp +@@ -3239,9 +3149,8 @@ static struct clk_branch gcc_nssnoc_cryp .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_crypto_clk", @@ -2822,7 +2822,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3254,9 +3163,8 @@ static struct clk_branch gcc_nssnoc_ppe_ +@@ -3256,9 +3165,8 @@ static struct clk_branch gcc_nssnoc_ppe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ppe_cfg_clk", @@ -2834,7 +2834,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3271,9 +3179,8 @@ static struct clk_branch gcc_nssnoc_ppe_ +@@ -3273,9 +3181,8 @@ static struct clk_branch gcc_nssnoc_ppe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ppe_clk", @@ -2846,7 +2846,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3288,9 +3195,8 @@ static struct clk_branch gcc_nssnoc_qosg +@@ -3290,9 +3197,8 @@ static struct clk_branch gcc_nssnoc_qosg .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_qosgen_ref_clk", @@ -2858,7 +2858,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3305,9 +3211,8 @@ static struct clk_branch gcc_nssnoc_snoc +@@ -3307,9 +3213,8 @@ static struct clk_branch gcc_nssnoc_snoc .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_snoc_clk", @@ -2870,7 +2870,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3322,9 +3227,8 @@ static struct clk_branch gcc_nssnoc_time +@@ -3324,9 +3229,8 @@ static struct clk_branch gcc_nssnoc_time .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_timeout_ref_clk", @@ -2882,7 +2882,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3339,9 +3243,8 @@ static struct clk_branch gcc_nssnoc_ubi0 +@@ -3341,9 +3245,8 @@ static struct clk_branch gcc_nssnoc_ubi0 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ubi0_ahb_clk", @@ -2894,7 +2894,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3356,9 +3259,8 @@ static struct clk_branch gcc_nssnoc_ubi1 +@@ -3358,9 +3261,8 @@ static struct clk_branch gcc_nssnoc_ubi1 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ubi1_ahb_clk", @@ -2906,7 +2906,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3374,9 +3276,8 @@ static struct clk_branch gcc_ubi0_ahb_cl +@@ -3376,9 +3278,8 @@ static struct clk_branch gcc_ubi0_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_ahb_clk", @@ -2918,7 +2918,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3392,9 +3293,8 @@ static struct clk_branch gcc_ubi0_axi_cl +@@ -3394,9 +3295,8 @@ static struct clk_branch gcc_ubi0_axi_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_axi_clk", @@ -2930,7 +2930,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3410,9 +3310,8 @@ static struct clk_branch gcc_ubi0_nc_axi +@@ -3412,9 +3312,8 @@ static struct clk_branch gcc_ubi0_nc_axi .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_nc_axi_clk", @@ -2942,7 +2942,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3428,9 +3327,8 @@ static struct clk_branch gcc_ubi0_core_c +@@ -3430,9 +3329,8 @@ static struct clk_branch gcc_ubi0_core_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_core_clk", @@ -2954,7 +2954,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3446,9 +3344,8 @@ static struct clk_branch gcc_ubi0_mpt_cl +@@ -3448,9 +3346,8 @@ static struct clk_branch gcc_ubi0_mpt_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_mpt_clk", @@ -2966,7 +2966,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3464,9 +3361,8 @@ static struct clk_branch gcc_ubi1_ahb_cl +@@ -3466,9 +3363,8 @@ static struct clk_branch gcc_ubi1_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_ahb_clk", @@ -2978,7 +2978,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3482,9 +3378,8 @@ static struct clk_branch gcc_ubi1_axi_cl +@@ -3484,9 +3380,8 @@ static struct clk_branch gcc_ubi1_axi_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_axi_clk", @@ -2990,7 +2990,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3500,9 +3395,8 @@ static struct clk_branch gcc_ubi1_nc_axi +@@ -3502,9 +3397,8 @@ static struct clk_branch gcc_ubi1_nc_axi .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_nc_axi_clk", @@ -3002,7 +3002,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3518,9 +3412,8 @@ static struct clk_branch gcc_ubi1_core_c +@@ -3520,9 +3414,8 @@ static struct clk_branch gcc_ubi1_core_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_core_clk", @@ -3014,7 +3014,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3536,9 +3429,8 @@ static struct clk_branch gcc_ubi1_mpt_cl +@@ -3538,9 +3431,8 @@ static struct clk_branch gcc_ubi1_mpt_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_mpt_clk", @@ -3026,7 +3026,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3553,9 +3445,8 @@ static struct clk_branch gcc_cmn_12gpll_ +@@ -3555,9 +3447,8 @@ static struct clk_branch gcc_cmn_12gpll_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_cmn_12gpll_ahb_clk", @@ -3038,7 +3038,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3570,9 +3461,8 @@ static struct clk_branch gcc_cmn_12gpll_ +@@ -3572,9 +3463,8 @@ static struct clk_branch gcc_cmn_12gpll_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_cmn_12gpll_sys_clk", @@ -3050,7 +3050,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3587,9 +3477,8 @@ static struct clk_branch gcc_mdio_ahb_cl +@@ -3589,9 +3479,8 @@ static struct clk_branch gcc_mdio_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_mdio_ahb_clk", @@ -3062,7 +3062,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3604,9 +3493,8 @@ static struct clk_branch gcc_uniphy0_ahb +@@ -3606,9 +3495,8 @@ static struct clk_branch gcc_uniphy0_ahb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_ahb_clk", @@ -3074,7 +3074,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3621,9 +3509,8 @@ static struct clk_branch gcc_uniphy0_sys +@@ -3623,9 +3511,8 @@ static struct clk_branch gcc_uniphy0_sys .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_sys_clk", @@ -3086,7 +3086,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3638,9 +3525,8 @@ static struct clk_branch gcc_uniphy1_ahb +@@ -3640,9 +3527,8 @@ static struct clk_branch gcc_uniphy1_ahb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_ahb_clk", @@ -3098,7 +3098,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3655,9 +3541,8 @@ static struct clk_branch gcc_uniphy1_sys +@@ -3657,9 +3543,8 @@ static struct clk_branch gcc_uniphy1_sys .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_sys_clk", @@ -3110,7 +3110,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3672,9 +3557,8 @@ static struct clk_branch gcc_uniphy2_ahb +@@ -3674,9 +3559,8 @@ static struct clk_branch gcc_uniphy2_ahb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_ahb_clk", @@ -3122,7 +3122,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3689,9 +3573,8 @@ static struct clk_branch gcc_uniphy2_sys +@@ -3691,9 +3575,8 @@ static struct clk_branch gcc_uniphy2_sys .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_sys_clk", @@ -3134,7 +3134,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3706,9 +3589,8 @@ static struct clk_branch gcc_nss_port1_r +@@ -3708,9 +3591,8 @@ static struct clk_branch gcc_nss_port1_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port1_rx_clk", @@ -3146,7 +3146,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3723,9 +3605,8 @@ static struct clk_branch gcc_nss_port1_t +@@ -3725,9 +3607,8 @@ static struct clk_branch gcc_nss_port1_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port1_tx_clk", @@ -3158,7 +3158,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3740,9 +3621,8 @@ static struct clk_branch gcc_nss_port2_r +@@ -3742,9 +3623,8 @@ static struct clk_branch gcc_nss_port2_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port2_rx_clk", @@ -3170,7 +3170,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3757,9 +3637,8 @@ static struct clk_branch gcc_nss_port2_t +@@ -3759,9 +3639,8 @@ static struct clk_branch gcc_nss_port2_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port2_tx_clk", @@ -3182,7 +3182,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3774,9 +3653,8 @@ static struct clk_branch gcc_nss_port3_r +@@ -3776,9 +3655,8 @@ static struct clk_branch gcc_nss_port3_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port3_rx_clk", @@ -3194,7 +3194,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3791,9 +3669,8 @@ static struct clk_branch gcc_nss_port3_t +@@ -3793,9 +3671,8 @@ static struct clk_branch gcc_nss_port3_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port3_tx_clk", @@ -3206,7 +3206,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3808,9 +3685,8 @@ static struct clk_branch gcc_nss_port4_r +@@ -3810,9 +3687,8 @@ static struct clk_branch gcc_nss_port4_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port4_rx_clk", @@ -3218,7 +3218,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3825,9 +3701,8 @@ static struct clk_branch gcc_nss_port4_t +@@ -3827,9 +3703,8 @@ static struct clk_branch gcc_nss_port4_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port4_tx_clk", @@ -3230,7 +3230,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3842,9 +3717,8 @@ static struct clk_branch gcc_nss_port5_r +@@ -3844,9 +3719,8 @@ static struct clk_branch gcc_nss_port5_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port5_rx_clk", @@ -3242,7 +3242,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3859,9 +3733,8 @@ static struct clk_branch gcc_nss_port5_t +@@ -3861,9 +3735,8 @@ static struct clk_branch gcc_nss_port5_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port5_tx_clk", @@ -3254,7 +3254,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3876,9 +3749,8 @@ static struct clk_branch gcc_nss_port6_r +@@ -3878,9 +3751,8 @@ static struct clk_branch gcc_nss_port6_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port6_rx_clk", @@ -3266,7 +3266,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3893,9 +3765,8 @@ static struct clk_branch gcc_nss_port6_t +@@ -3895,9 +3767,8 @@ static struct clk_branch gcc_nss_port6_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port6_tx_clk", @@ -3278,7 +3278,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3910,9 +3781,8 @@ static struct clk_branch gcc_port1_mac_c +@@ -3912,9 +3783,8 @@ static struct clk_branch gcc_port1_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port1_mac_clk", @@ -3290,7 +3290,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3927,9 +3797,8 @@ static struct clk_branch gcc_port2_mac_c +@@ -3929,9 +3799,8 @@ static struct clk_branch gcc_port2_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port2_mac_clk", @@ -3302,7 +3302,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3944,9 +3813,8 @@ static struct clk_branch gcc_port3_mac_c +@@ -3946,9 +3815,8 @@ static struct clk_branch gcc_port3_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port3_mac_clk", @@ -3314,7 +3314,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3961,9 +3829,8 @@ static struct clk_branch gcc_port4_mac_c +@@ -3963,9 +3831,8 @@ static struct clk_branch gcc_port4_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port4_mac_clk", @@ -3326,7 +3326,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3978,9 +3845,8 @@ static struct clk_branch gcc_port5_mac_c +@@ -3980,9 +3847,8 @@ static struct clk_branch gcc_port5_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port5_mac_clk", @@ -3338,7 +3338,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3995,9 +3861,8 @@ static struct clk_branch gcc_port6_mac_c +@@ -3997,9 +3863,8 @@ static struct clk_branch gcc_port6_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port6_mac_clk", @@ -3350,7 +3350,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4012,9 +3877,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4014,9 +3879,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port1_rx_clk", @@ -3362,7 +3362,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4029,9 +3893,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4031,9 +3895,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port1_tx_clk", @@ -3374,7 +3374,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4046,9 +3909,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4048,9 +3911,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port2_rx_clk", @@ -3386,7 +3386,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4063,9 +3925,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4065,9 +3927,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port2_tx_clk", @@ -3398,7 +3398,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4080,9 +3941,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4082,9 +3943,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port3_rx_clk", @@ -3410,7 +3410,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4097,9 +3957,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4099,9 +3959,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port3_tx_clk", @@ -3422,7 +3422,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4114,9 +3973,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4116,9 +3975,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port4_rx_clk", @@ -3434,7 +3434,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4131,9 +3989,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4133,9 +3991,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port4_tx_clk", @@ -3446,7 +3446,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4148,9 +4005,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4150,9 +4007,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port5_rx_clk", @@ -3458,7 +3458,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4165,9 +4021,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4167,9 +4023,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port5_tx_clk", @@ -3470,7 +3470,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4182,9 +4037,8 @@ static struct clk_branch gcc_uniphy1_por +@@ -4184,9 +4039,8 @@ static struct clk_branch gcc_uniphy1_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_port5_rx_clk", @@ -3482,7 +3482,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4199,9 +4053,8 @@ static struct clk_branch gcc_uniphy1_por +@@ -4201,9 +4055,8 @@ static struct clk_branch gcc_uniphy1_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_port5_tx_clk", @@ -3494,7 +3494,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4216,9 +4069,8 @@ static struct clk_branch gcc_uniphy2_por +@@ -4218,9 +4071,8 @@ static struct clk_branch gcc_uniphy2_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_port6_rx_clk", @@ -3506,7 +3506,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4233,9 +4085,8 @@ static struct clk_branch gcc_uniphy2_por +@@ -4235,9 +4087,8 @@ static struct clk_branch gcc_uniphy2_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_port6_tx_clk", @@ -3518,7 +3518,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4251,9 +4102,8 @@ static struct clk_branch gcc_crypto_ahb_ +@@ -4253,9 +4104,8 @@ static struct clk_branch gcc_crypto_ahb_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_ahb_clk", @@ -3530,7 +3530,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4269,9 +4119,8 @@ static struct clk_branch gcc_crypto_axi_ +@@ -4271,9 +4121,8 @@ static struct clk_branch gcc_crypto_axi_ .enable_mask = BIT(1), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_axi_clk", @@ -3542,7 +3542,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4287,9 +4136,8 @@ static struct clk_branch gcc_crypto_clk +@@ -4289,9 +4138,8 @@ static struct clk_branch gcc_crypto_clk .enable_mask = BIT(2), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_clk", @@ -3554,7 +3554,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4304,9 +4152,8 @@ static struct clk_branch gcc_gp1_clk = { +@@ -4306,9 +4154,8 @@ static struct clk_branch gcc_gp1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gp1_clk", @@ -3566,7 +3566,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4321,9 +4168,8 @@ static struct clk_branch gcc_gp2_clk = { +@@ -4323,9 +4170,8 @@ static struct clk_branch gcc_gp2_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gp2_clk", @@ -3578,7 +3578,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4338,9 +4184,8 @@ static struct clk_branch gcc_gp3_clk = { +@@ -4340,9 +4186,8 @@ static struct clk_branch gcc_gp3_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gp3_clk", @@ -3590,7 +3590,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4362,7 +4207,7 @@ static struct clk_rcg2 pcie0_rchng_clk_s +@@ -4364,7 +4209,7 @@ static struct clk_rcg2 pcie0_rchng_clk_s .clkr.hw.init = &(struct clk_init_data){ .name = "pcie0_rchng_clk_src", .parent_data = gcc_xo_gpll0, diff --git a/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch b/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch index 81014ab24..182fbe7f0 100644 --- a/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch +++ b/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch @@ -18,7 +18,7 @@ Link: https://lore.kernel.org/r/20221107132901.489240-3-robimarko@gmail.com --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -4665,6 +4665,20 @@ static const struct qcom_reset_map gcc_i +@@ -4667,6 +4667,20 @@ static const struct qcom_reset_map gcc_i [GCC_PCIE1_AXI_SLAVE_ARES] = { 0x76040, 4 }, [GCC_PCIE1_AHB_ARES] = { 0x76040, 5 }, [GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 }, diff --git a/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch b/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch index 35a0a07c7..a55df15c6 100644 --- a/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch +++ b/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch @@ -22,7 +22,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -674,7 +674,7 @@ static struct clk_rcg2 pcie0_aux_clk_src +@@ -675,7 +675,7 @@ static struct clk_rcg2 pcie0_aux_clk_src }; static const struct clk_parent_data gcc_pcie20_phy0_pipe_clk_xo[] = { @@ -31,7 +31,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .fw_name = "xo", .name = "xo" }, }; -@@ -727,7 +727,7 @@ static struct clk_rcg2 pcie1_aux_clk_src +@@ -728,7 +728,7 @@ static struct clk_rcg2 pcie1_aux_clk_src }; static const struct clk_parent_data gcc_pcie20_phy1_pipe_clk_xo[] = { @@ -40,7 +40,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .fw_name = "xo", .name = "xo" }, }; -@@ -1131,7 +1131,7 @@ static const struct freq_tbl ftbl_nss_no +@@ -1133,7 +1133,7 @@ static const struct freq_tbl ftbl_nss_no static const struct clk_parent_data gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2[] = { { .fw_name = "xo", .name = "xo" }, @@ -49,7 +49,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .hw = &gpll0.clkr.hw }, { .hw = &gpll2.clkr.hw }, }; -@@ -1356,7 +1356,7 @@ static const struct freq_tbl ftbl_nss_pp +@@ -1358,7 +1358,7 @@ static const struct freq_tbl ftbl_nss_pp static const struct clk_parent_data gcc_xo_bias_gpll0_gpll4_nss_ubi32[] = { { .fw_name = "xo", .name = "xo" }, @@ -58,7 +58,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .hw = &gpll0.clkr.hw }, { .hw = &gpll4.clkr.hw }, { .hw = &nss_crypto_pll.clkr.hw }, -@@ -1407,10 +1407,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1409,10 +1409,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -72,7 +72,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map gcc_xo_uniphy0_rx_tx_ubi32_bias_map[] = { -@@ -1459,10 +1459,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1461,10 +1461,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -86,7 +86,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map gcc_xo_uniphy0_tx_rx_ubi32_bias_map[] = { -@@ -1690,12 +1690,12 @@ static const struct freq_tbl ftbl_nss_po +@@ -1692,12 +1692,12 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -104,7 +104,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map -@@ -1752,12 +1752,12 @@ static const struct freq_tbl ftbl_nss_po +@@ -1754,12 +1754,12 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -122,7 +122,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map -@@ -1814,10 +1814,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1816,10 +1816,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy2_rx_tx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -136,7 +136,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map gcc_xo_uniphy2_rx_tx_ubi32_bias_map[] = { -@@ -1871,10 +1871,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1873,10 +1873,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy2_tx_rx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, diff --git a/target/linux/qualcommax/patches-6.1/0020-v6.3-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch b/target/linux/qualcommax/patches-6.1/0020-v6.3-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch index 3d5c2182e..61e56a7db 100644 --- a/target/linux/qualcommax/patches-6.1/0020-v6.3-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch +++ b/target/linux/qualcommax/patches-6.1/0020-v6.3-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch @@ -16,7 +16,7 @@ Signed-off-by: Bjorn Helgaas --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -1762,6 +1762,7 @@ static const struct of_device_id qcom_pc +@@ -1771,6 +1771,7 @@ static const struct of_device_id qcom_pc { .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, diff --git a/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch b/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch index e0e8125ba..2fe6a1a42 100644 --- a/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch +++ b/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch @@ -18,7 +18,7 @@ Signed-off-by: Robert Marko --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -928,7 +928,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl +@@ -930,7 +930,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl }; static const struct clk_parent_data gcc_usb3phy_0_cc_pipe_clk_xo[] = { @@ -27,7 +27,7 @@ Signed-off-by: Robert Marko { .fw_name = "xo", .name = "xo" }, }; -@@ -996,7 +996,7 @@ static struct clk_rcg2 usb1_mock_utmi_cl +@@ -998,7 +998,7 @@ static struct clk_rcg2 usb1_mock_utmi_cl }; static const struct clk_parent_data gcc_usb3phy_1_cc_pipe_clk_xo[] = { diff --git a/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch b/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch index 9ae72730d..8cd52b818 100644 --- a/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch +++ b/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch @@ -16,7 +16,7 @@ Link: https://lore.kernel.org/r/1682413909-24927-1-git-send-email-mantas@8device --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c -@@ -1702,7 +1702,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl +@@ -1703,7 +1703,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl .name = "usb0_mock_utmi_clk_src", .parent_data = gcc_xo_gpll6_gpll0_gpll0_out_main_div2, .num_parents = 4, diff --git a/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch b/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch index e38b40278..f7326069b 100644 --- a/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch +++ b/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch @@ -15,7 +15,7 @@ Link: https://lore.kernel.org/r/20230526190855.2941291-1-robimarko@gmail.com --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c -@@ -4143,15 +4143,20 @@ static struct clk_branch gcc_dcc_clk = { +@@ -4145,15 +4145,20 @@ static struct clk_branch gcc_dcc_clk = { static const struct alpha_pll_config ubi32_pll_config = { .l = 0x3e, diff --git a/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch b/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch index e4faac1b6..396558b4a 100644 --- a/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch +++ b/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch @@ -27,7 +27,7 @@ Link: https://lore.kernel.org/r/20230601213416.3373599-1-arnd@kernel.org --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c -@@ -4144,8 +4144,6 @@ static struct clk_branch gcc_dcc_clk = { +@@ -4146,8 +4146,6 @@ static struct clk_branch gcc_dcc_clk = { static const struct alpha_pll_config ubi32_pll_config = { .l = 0x3e, .alpha = 0x6667, diff --git a/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch b/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch index 085852893..0c1576c4f 100644 --- a/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch +++ b/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch @@ -20,7 +20,7 @@ Signed-off-by: Bjorn Andersson --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c -@@ -2120,6 +2120,26 @@ static struct clk_branch gcc_blsp1_qup5_ +@@ -2122,6 +2122,26 @@ static struct clk_branch gcc_blsp1_qup5_ }, }; @@ -47,7 +47,7 @@ Signed-off-by: Bjorn Andersson static struct clk_branch gcc_blsp1_qup6_spi_apps_clk = { .halt_reg = 0x0700c, .clkr = { -@@ -4276,6 +4296,7 @@ static struct clk_regmap *gcc_ipq6018_cl +@@ -4278,6 +4298,7 @@ static struct clk_regmap *gcc_ipq6018_cl [GCC_BLSP1_QUP4_SPI_APPS_CLK] = &gcc_blsp1_qup4_spi_apps_clk.clkr, [GCC_BLSP1_QUP5_I2C_APPS_CLK] = &gcc_blsp1_qup5_i2c_apps_clk.clkr, [GCC_BLSP1_QUP5_SPI_APPS_CLK] = &gcc_blsp1_qup5_spi_apps_clk.clkr, diff --git a/target/linux/qualcommax/patches-6.1/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch b/target/linux/qualcommax/patches-6.1/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch index 62a30bbb2..1cd614761 100644 --- a/target/linux/qualcommax/patches-6.1/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch +++ b/target/linux/qualcommax/patches-6.1/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch @@ -23,7 +23,7 @@ Signed-off-by: Christian Marangi --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -1676,13 +1676,21 @@ static struct clk_regmap_div nss_port4_t +@@ -1678,13 +1678,21 @@ static struct clk_regmap_div nss_port4_t }, }; @@ -49,7 +49,7 @@ Signed-off-by: Christian Marangi F(156250000, P_UNIPHY1_RX, 2, 0, 0), F(312500000, P_UNIPHY1_RX, 1, 0, 0), { } -@@ -1738,13 +1746,21 @@ static struct clk_regmap_div nss_port5_r +@@ -1740,13 +1748,21 @@ static struct clk_regmap_div nss_port5_r }, }; @@ -75,7 +75,7 @@ Signed-off-by: Christian Marangi F(156250000, P_UNIPHY1_TX, 2, 0, 0), F(312500000, P_UNIPHY1_TX, 1, 0, 0), { } -@@ -1800,13 +1816,21 @@ static struct clk_regmap_div nss_port5_t +@@ -1802,13 +1818,21 @@ static struct clk_regmap_div nss_port5_t }, }; @@ -101,7 +101,7 @@ Signed-off-by: Christian Marangi F(156250000, P_UNIPHY2_RX, 2, 0, 0), F(312500000, P_UNIPHY2_RX, 1, 0, 0), { } -@@ -1857,13 +1881,21 @@ static struct clk_regmap_div nss_port6_r +@@ -1859,13 +1883,21 @@ static struct clk_regmap_div nss_port6_r }, }; diff --git a/target/linux/qualcommax/patches-6.1/0118-clk-qcom-Add-WCSSAON-reset.patch b/target/linux/qualcommax/patches-6.1/0118-clk-qcom-Add-WCSSAON-reset.patch index be0524338..ec366fd42 100644 --- a/target/linux/qualcommax/patches-6.1/0118-clk-qcom-Add-WCSSAON-reset.patch +++ b/target/linux/qualcommax/patches-6.1/0118-clk-qcom-Add-WCSSAON-reset.patch @@ -15,7 +15,7 @@ Acked-by: Stephen Boyd --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -4711,6 +4711,7 @@ static const struct qcom_reset_map gcc_i +@@ -4713,6 +4713,7 @@ static const struct qcom_reset_map gcc_i [GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) }, [GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) }, [GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) }, diff --git a/target/linux/qualcommax/patches-6.1/0139-clk-ipq6018-Add-missing-clocks.patch b/target/linux/qualcommax/patches-6.1/0139-clk-ipq6018-Add-missing-clocks.patch index 1d092e7ca..bac6be098 100644 --- a/target/linux/qualcommax/patches-6.1/0139-clk-ipq6018-Add-missing-clocks.patch +++ b/target/linux/qualcommax/patches-6.1/0139-clk-ipq6018-Add-missing-clocks.patch @@ -51,7 +51,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static const struct freq_tbl ftbl_apss_ahb_clk_src[] = { F(24000000, P_XO, 1, 0, 0), F(25000000, P_GPLL0_DIV2, 16, 0, 0), -@@ -1891,6 +1917,19 @@ static struct clk_rcg2 system_noc_bfdcd_ +@@ -1893,6 +1919,19 @@ static struct clk_rcg2 system_noc_bfdcd_ }, }; @@ -71,7 +71,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static const struct freq_tbl ftbl_ubi32_mem_noc_bfdcd_clk_src[] = { F(24000000, P_XO, 1, 0, 0), F(307670000, P_BIAS_PLL_NSS_NOC, 1.5, 0, 0), -@@ -1926,6 +1965,19 @@ static struct clk_rcg2 ubi32_mem_noc_bfd +@@ -1928,6 +1967,19 @@ static struct clk_rcg2 ubi32_mem_noc_bfd }, }; @@ -91,7 +91,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static struct clk_branch gcc_apss_axi_clk = { .halt_reg = 0x46020, .halt_check = BRANCH_HALT_VOTED, -@@ -2683,6 +2735,454 @@ static struct clk_rcg2 lpass_q6_axim_clk +@@ -2685,6 +2737,454 @@ static struct clk_rcg2 lpass_q6_axim_clk }, }; @@ -546,7 +546,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static struct freq_tbl ftbl_rbcpr_wcss_clk_src[] = { F(24000000, P_XO, 1, 0, 0), F(50000000, P_GPLL0, 16, 0, 0), -@@ -2702,6 +3202,22 @@ static struct clk_rcg2 rbcpr_wcss_clk_sr +@@ -2704,6 +3204,22 @@ static struct clk_rcg2 rbcpr_wcss_clk_sr }, }; @@ -569,7 +569,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static struct clk_branch gcc_lpass_core_axim_clk = { .halt_reg = 0x1F028, .clkr = { -@@ -3523,6 +4039,22 @@ static struct clk_branch gcc_prng_ahb_cl +@@ -3525,6 +4041,22 @@ static struct clk_branch gcc_prng_ahb_cl }, }; @@ -592,7 +592,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static struct clk_branch gcc_qdss_dap_clk = { .halt_reg = 0x29084, .clkr = { -@@ -3533,7 +4065,7 @@ static struct clk_branch gcc_qdss_dap_cl +@@ -3535,7 +4067,7 @@ static struct clk_branch gcc_qdss_dap_cl .parent_hws = (const struct clk_hw *[]){ &qdss_dap_sync_clk_src.hw }, .num_parents = 1, @@ -601,7 +601,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 .ops = &clk_branch2_ops, }, }, -@@ -4199,6 +4731,9 @@ static struct clk_hw *gcc_ipq6018_hws[] +@@ -4201,6 +4733,9 @@ static struct clk_hw *gcc_ipq6018_hws[] &gpll6_out_main_div2.hw, &qdss_dap_sync_clk_src.hw, &qdss_tsctr_div2_clk_src.hw, @@ -611,7 +611,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 }; static struct clk_regmap *gcc_ipq6018_clks[] = { -@@ -4362,6 +4897,7 @@ static struct clk_regmap *gcc_ipq6018_cl +@@ -4364,6 +4899,7 @@ static struct clk_regmap *gcc_ipq6018_cl [GCC_SYS_NOC_PCIE0_AXI_CLK] = &gcc_sys_noc_pcie0_axi_clk.clkr, [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr, [GCC_PRNG_AHB_CLK] = &gcc_prng_ahb_clk.clkr, @@ -619,7 +619,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 [GCC_QDSS_DAP_CLK] = &gcc_qdss_dap_clk.clkr, [GCC_QPIC_AHB_CLK] = &gcc_qpic_ahb_clk.clkr, [GCC_QPIC_CLK] = &gcc_qpic_clk.clkr, -@@ -4403,9 +4939,35 @@ static struct clk_regmap *gcc_ipq6018_cl +@@ -4405,9 +4941,35 @@ static struct clk_regmap *gcc_ipq6018_cl [PCIE0_RCHNG_CLK_SRC] = &pcie0_rchng_clk_src.clkr, [GCC_PCIE0_AXI_S_BRIDGE_CLK] = &gcc_pcie0_axi_s_bridge_clk.clkr, [PCIE0_RCHNG_CLK] = &gcc_pcie0_rchng_clk.clkr, @@ -655,7 +655,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 [GCC_LPASS_CORE_AXIM_CLK] = &gcc_lpass_core_axim_clk.clkr, [LPASS_CORE_AXIM_CLK_SRC] = &lpass_core_axim_clk_src.clkr, [GCC_LPASS_SNOC_CFG_CLK] = &gcc_lpass_snoc_cfg_clk.clkr, -@@ -4421,6 +4983,9 @@ static struct clk_regmap *gcc_ipq6018_cl +@@ -4423,6 +4985,9 @@ static struct clk_regmap *gcc_ipq6018_cl [GCC_MEM_NOC_UBI32_CLK] = &gcc_mem_noc_ubi32_clk.clkr, [GCC_MEM_NOC_LPASS_CLK] = &gcc_mem_noc_lpass_clk.clkr, [GCC_SNOC_LPASS_CFG_CLK] = &gcc_snoc_lpass_cfg_clk.clkr,