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update ath79 target

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This commit is contained in:
coolsnowwolf 2018-06-04 13:54:20 +08:00
parent ca8aa84f7b
commit b16811e305
29 changed files with 1232 additions and 88 deletions
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2
target/linux/ath79/Makefile
View File

@ -4,7 +4,7 @@ ARCH:=mips
BOARD:=ath79
BOARDNAME:=Atheros ATH79 (DTS)
CPU_TYPE:=24kc
SUBTARGETS:=generic
SUBTARGETS:=generic tiny
FEATURES:=ramdisk source-only

7
target/linux/ath79/base-files/etc/board.d/01_leds
View File

@ -21,6 +21,13 @@ case "$board" in
"glinet,ar150")
ucidef_set_led_wlan "wlan" "WLAN" "gl-ar150:orange:wlan" "phy0tpt"
;;
"tplink,tl-wr740n-v2")
ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth0"
ucidef_set_led_switch "lan1" "LAN1" "$boardname:green:lan1" "switch0" "0x02"
ucidef_set_led_switch "lan2" "LAN2" "$boardname:green:lan2" "switch0" "0x04"
ucidef_set_led_switch "lan3" "LAN3" "$boardname:green:lan3" "switch0" "0x08"
ucidef_set_led_switch "lan4" "LAN4" "$boardname:green:lan4" "switch0" "0x10"
;;
"tplink,tl-wr1043nd-v1")
ucidef_set_led_usbdev "usb" "USB" "tp-link:green:usb" "1-1"
ucidef_set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt"

17
target/linux/ath79/base-files/etc/board.d/02_network
View File

@ -9,10 +9,27 @@ ath79_setup_interfaces()
case "$board" in
"avm,fritz300e"|\
"tplink,tl-wr703n"|\
"ubnt,unifi")
ucidef_set_interface_lan "eth0"
;;
"glinet,ar150")
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
"tplink,tl-wdr3600"|\
"tplink,tl-wdr4300")
ucidef_add_switch "switch0" \
"0@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "1:wan"
;;
"tplink,tl-wr740n-v2")
ucidef_set_interfaces_lan_wan "eth1.1" "eth0"
ucidef_add_switch "switch0" \
"0@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
"tplink,tl-wr1043nd-v1")
ucidef_add_switch "switch0" \
"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "5@eth0"

4
target/linux/ath79/base-files/etc/diag.sh
View File

@ -2,6 +2,8 @@
. /lib/functions/leds.sh
status_led="$(get_dt_led status)"
get_status_led() {
local board=$(board_name)
local boardname="${board##*,}"
@ -23,7 +25,7 @@ get_status_led() {
}
set_state() {
get_status_led
[ -z "$status_led" ] && get_status_led
case "$1" in
preinit)

5
target/linux/ath79/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom
View File

@ -50,6 +50,11 @@ case "$FIRMWARE" in
"avm,fritz300e")
ath9k_eeprom_extract_reverse "urloader" 5441 1088
;;
"tplink,tl-wdr3600"|\
"tplink,tl-wdr4300")
ath9k_eeprom_extract "art" 20480 1088
;;
"tplink,tl-wr740n-v2"|\
"ubnt,unifi")
ath9k_eeprom_extract "art" 4096 2048
;;

1
target/linux/ath79/config-4.14
View File

@ -202,6 +202,7 @@ CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RESET_ATH79=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RTL8366RB_PHY=y
CONFIG_RTL8366S_PHY=y
CONFIG_RTL8366_SMI=y
# CONFIG_SCHED_INFO is not set

66
target/linux/ath79/dts/ar7240.dtsi Normal file
View File

@ -0,0 +1,66 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar724x.dtsi"
/ {
usb_phy: usb-phy {
compatible = "qca,ar7200-usb-phy";
reset-names = "usb-phy", "usb-ohci-dll";
resets = <&rst 4>, <&rst 3>;
#phy-cells = <0>;
status = "disabled";
};
};
&ahb {
usb: usb@1b000000 {
compatible = "generic-ohci";
reg = <0x1b000000 0x1000>;
interrupts = <3>;
resets = <&rst 5>;
reset-names = "usb-host";
phy-names = "usb-phy";
phys = <&usb_phy>;
status = "disabled";
};
};
&mdio0 {
builtin-switch;
};
&eth0 {
compatible = "qca,ar7240-eth", "syscon";
pll-data = <0x00110000 0x00001099 0x00991099>;
resets = <&rst 8>, <&rst 9>;
reset-names = "phy", "mac";
};
&mdio1 {
builtin-switch;
};
&eth1 {
compatible = "qca,ar7240-eth", "syscon";
pll-data = <0x00110000 0x00001099 0x00991099>;
resets = <&rst 12>, <&rst 13>;
reset-names = "phy", "mac";
phy-mode = "gmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};

174
target/linux/ath79/dts/ar7240_tl-wr740n-v2.dts Normal file
View File

@ -0,0 +1,174 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar7240.dtsi"
/ {
compatible = "tplink,tl-wr740n-v2", "qca,ar7240";
model = "TP-Link TL-WR740N v2";
aliases {
led-status = &led_system;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x2000000>;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&switch_led_pins>;
led_system: system {
label = "tl-wr740n-v2:green:system";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "tl-wr740n-v2:green:lan1";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "tl-wr740n-v2:green:lan2";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "tl-wr740n-v2:green:lan3";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "tl-wr740n-v2:green:lan4";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
wan {
label = "tl-wr740n-v2:green:wan";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
wlan {
label = "tl-wr740n-v2:green:wlan";
gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "phy0tpt";
};
wps {
label = "tl-wr740n-v2:green:wps";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
};
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
reg = <0x0 0x20000>;
label = "u-boot";
read-only;
};
firmware: partition@20000 {
reg = <0x20000 0x3d0000>;
label = "firmware";
};
art: partition@3f0000 {
reg = <0x3f0000 0x10000>;
label = "art";
read-only;
};
};
};
};
&eth0 {
status = "okay";
phy-handle = <&phy4>;
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <(-1)>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <1>;
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "mii";
};
};
&pcie {
status = "okay";
ath9k: wifi@168c,002b {
compatible = "pci168c,002b";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
mtd-mac-address = <&uboot 0x1fc00>;
#gpio-cells = <2>;
gpio-controller;
};
};
&pinmux {
switch_led_pins: pinmux_switch_led_pins {
pinctrl-single,bits = <0x0 0x0 0xf8>;
};
};
&uart {
status = "okay";
};

15
target/linux/ath79/dts/ar724x.dtsi
View File

@ -64,6 +64,21 @@
#interrupt-cells = <2>;
};
pinmux: pinmux@18040028 {
compatible = "pinctrl-single";
reg = <0x18040028 0x8>;
pinctrl-single,bit-per-mux;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x1>;
#pinctrl-cells = <2>;
jtag_disable_pins: pinmux_jtag_disable_pins {
pinctrl-single,bits = <0x0 0x1 0x1>;
};
};
pll: pll-controller@18050000 {
compatible = "qca,ar7240-pll", "syscon";
reg = <0x18050000 0x3c>;

21
target/linux/ath79/dts/ar9132.dtsi
View File

@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/ath79-clk.h>
#include "ath79.dtsi"
/ {
compatible = "qca,ar9132";
@ -160,6 +161,15 @@
#address-cells = <1>;
#size-cells = <0>;
};
wmac: wmac@180c0000 {
compatible = "qca,ar9130-wmac";
reg = <0x180c0000 0x230000>;
interrupts = <2>;
status = "disabled";
};
};
usb_phy: usb-phy {
@ -173,3 +183,14 @@
status = "disabled";
};
};
&eth0 {
compatible = "qca,ar9130-eth", "syscon";
reg = <0x19000000 0x200
0x18070000 0x4>;
pll-data = <0x1a000000 0x13000a44 0x00441099>;
pll-reg = <0x4 0x10 17>;
pll-handle = <&pll>;
resets = <&rst 8>, <&rst 9>;
reset-names = "phy", "mac";
};

82
target/linux/ath79/dts/ar9132_tl_wr1043nd_v1.dts → target/linux/ath79/dts/ar9132_tl-wr1043nd-v1.dts
View File

@ -10,6 +10,10 @@
compatible = "tplink,tl-wr1043nd-v1", "qca,ar9132";
model = "TP-Link TL-WR1043ND Version 1";
aliases {
led-status = &system;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x2000000>;
@ -22,19 +26,18 @@
};
keys {
compatible = "gpio-keys-polled";
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
button@0 {
button0 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
button@1 {
button1 {
label = "qss";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
@ -44,27 +47,50 @@
leds {
compatible = "gpio-leds";
led@0 {
usb {
label = "tp-link:green:usb";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
default-state = "off";
trigger-sources = <&hub_port>;
linux,default-trigger = "usbport";
};
led@1 {
system: system {
label = "tp-link:green:system";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
led@2 {
qss {
label = "tp-link:green:qss";
gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
};
led@3 {
wlan {
label = "tp-link:green:wlan";
gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "phy0tpt";
};
};
rtl8366rb {
compatible = "realtek,rtl8366rb";
gpio-sda = <&gpio 18 GPIO_ACTIVE_HIGH>;
gpio-sck = <&gpio 19 GPIO_ACTIVE_HIGH>;
resets = <&rst 8>;
reset-names = "switch";
mdio-bus {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
};
&uart {
@ -77,6 +103,16 @@
&usb {
status = "okay";
port@1 {
reg = <1>;
#trigger-source-cells = <0>;
hub_port: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
&usb_phy {
@ -90,7 +126,7 @@
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "s25sl064a";
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
@ -99,18 +135,18 @@
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@1 {
partition@020000 {
label = "firmware";
reg = <0x020000 0x7D0000>;
};
partition@2 {
art: partition@7F0000 {
label = "art";
reg = <0x7F0000 0x010000>;
read-only;
@ -118,3 +154,25 @@
};
};
};
&eth0 {
status = "okay";
phy-mode = "rgmii";
mtd-mac-address = <&uboot 0x1fc00>;
resets = <&rst 9>;
reset-names = "mac";
phy-handle = <&phy0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&uboot 0x1fc00>;
};

9
target/linux/ath79/dts/ar9330.dtsi
View File

@ -107,6 +107,15 @@
compatible = "qca,ar9330-gmac";
reg = <0x18070000 0x4>;
};
wmac: wmac@18100000 {
compatible = "qca,ar9330-wmac";
reg = <0x18100000 0x20000>;
interrupts = <2>;
status = "disabled";
};
};
usb_phy: usb-phy {

6
target/linux/ath79/dts/ar9330_glinet_ar150.dts
View File

@ -160,3 +160,9 @@
switch-phy-swap = <0>;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&art 0x0>;
};

139
target/linux/ath79/dts/ar9331_tl-wr703n.dts Normal file
View File

@ -0,0 +1,139 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9331.dtsi"
/ {
compatible = "tplink,tl-wr703n", "qca,ar9331";
model = "TP-Link TL-WR703N";
aliases {
serial0 = &uart;
led-status = &led_system;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x2000000>;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
gpio-leds {
compatible = "gpio-leds";
led_system: system {
label = "tl-wr703n:blue:system";
gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
};
};
reg_usb_vbus: reg_usb_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
reg = <0x0 0x20000>;
label = "u-boot";
read-only;
};
firmware: partition@20000 {
reg = <0x20000 0x3d0000>;
label = "firmware";
};
art: partition@3f0000 {
reg = <0x3f0000 0x10000>;
label = "art";
read-only;
};
};
};
};
&eth0 {
status = "okay";
phy-handle = <&phy4>;
mtd-mac-address = <&uboot 0x1fc00>;
gmac-config {
device = <&gmac>;
switch-phy-addr-swap = <0>;
switch-phy-swap = <0>;
};
};
&gpio {
status = "okay";
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "mii";
};
};
&uart {
status = "okay";
};
&usb {
dr_mode = "host";
vbus-supply = <&reg_usb_vbus>;
status = "okay";
};
&usb_phy {
status = "okay";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&uboot 0x1fc00>;
};

32
target/linux/ath79/dts/ar9344.dtsi Normal file
View File

@ -0,0 +1,32 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar934x.dtsi"
/ {
compatible = "qca,ar9344";
};
&apb {
pcie: pcie-controller@180c0000 {
compatible = "qcom,ar9340-pci", "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0x0>;
reg = <0x180c0000 0x1000>, /* CRP */
<0x180f0000 0x100>, /* CTRL */
<0x14000000 0x1000>; /* CFG */
reg-names = "crp_base", "ctrl_base", "cfg_base";
ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
interrupt-parent = <&cpuintc>;
interrupts = <2>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 1>;
interrupt-map = <0 0 0 0 &pcie 0>;
status = "disabled";
};
};

9
target/linux/ath79/dts/ar9344_tl-wdr3600.dts Normal file
View File

@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ar9344_tl-wdr4300.dtsi"
/ {
model = "TP-Link WDR3600";
compatible = "tplink,tl-wdr3600";
};

9
target/linux/ath79/dts/ar9344_tl-wdr4300.dts Normal file
View File

@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ar9344_tl-wdr4300.dtsi"
/ {
model = "TP-Link WDR4300";
compatible = "tplink,tl-wdr4300";
};

240
target/linux/ath79/dts/ar9344_tl-wdr4300.dtsi Normal file
View File

@ -0,0 +1,240 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9344.dtsi"
/ {
model = "TP-Link WDR4300";
compatible = "tplink,tl-wdr4300";
aliases {
led-status = &system;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x8000000>;
};
leds {
compatible = "gpio-leds";
usb1 {
label = "tp-link:green:usb1";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
default-state = "off";
trigger-sources = <&hub_port1>;
linux,default-trigger = "usbport";
};
usb2 {
label = "tp-link:green:usb2";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
default-state = "off";
trigger-sources = <&hub_port2>;
linux,default-trigger = "usbport";
};
wlan2g {
label = "tp-link:green:wlan2g";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "phy0tpt";
};
system: system {
label = "tp-link:green:system";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
default-state = "on";
};
qss {
label = "tp-link:green:qss";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
default-state = "off";
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan5g {
label = "tp-link:green:wlan5g";
gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
button@0 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
button@1 {
label = "wifi";
linux,code = <KEY_RFKILL>;
linux,input-type = <EV_SW>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_usb1_power {
gpio-export,name = "tp-link:power:usb1";
gpio-export,output = <1>;
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
};
gpio_usb2_power {
gpio-export,name = "tp-link:power:usb2";
gpio-export,output = <1>;
gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
};
gpio_ext_lna0 {
gpio-export,name = "tp-link:ext:lna0";
gpio-export,output = <1>;
gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
};
gpio_ext_lna1 {
gpio-export,name = "tp-link:ext:lna1";
gpio-export,output = <1>;
gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
};
};
};
&ref {
clock-frequency = <40000000>;
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&spi {
num-cs = <1>;
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
label = "firmware";
reg = <0x020000 0x7d0000>;
};
partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&usb {
status = "okay";
port@1 {
reg = <1>;
#trigger-source-cells = <0>;
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
hub_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
&usb_phy {
status = "okay";
};
&pcie {
status = "okay";
ath9k: wifi@168c,0033 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
mtd-mac-address = <&uboot 0x1fc00>;
qca,no-eeprom;
#gpio-cells = <2>;
gpio-controller;
};
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
qca,ar8327-initvals = <
0x04 0x07600000 /* PORT0 PAD MODE CTRL */
0x10 0x80000080 /* POWER_ON_STRIP */
0x50 0xc737c737 /* LED_CTRL0 */
0x54 0x00000000 /* LED_CTRL1 */
0x58 0x00000000 /* LED_CTRL2 */
0x5c 0x0030c300 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&eth0 {
status = "okay";
/* default for ar934x, except for 1000M */
pll-data = <0x06000000 0x00000101 0x00001616>;
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <(-2)>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
};

219
target/linux/ath79/dts/ar934x.dtsi Normal file
View File

@ -0,0 +1,219 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/clock/ath79-clk.h>
#include "ath79.dtsi"
/ {
compatible = "qca,ar9340";
#address-cells = <1>;
#size-cells = <1>;
chosen {
bootargs = "console=ttyS0,115200";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "mips,mips74Kc";
clocks = <&pll ATH79_CLK_CPU>;
reg = <0>;
};
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
ref: ref {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "ref";
};
};
ahb {
compatible = "simple-bus";
ranges;
#address-cells = <1>;
#size-cells = <1>;
apb: apb {
compatible = "simple-bus";
ranges;
#address-cells = <1>;
#size-cells = <1>;
ddr_ctrl: memory-controller@18000000 {
compatible = "qca,ar9340-ddr-controller",
"qca,ar7240-ddr-controller";
reg = <0x18000000 0x12c>;
#qca,ddr-wb-channel-cells = <1>;
};
uart: uart@18020000 {
compatible = "ns16550a";
reg = <0x18020000 0x2c>;
interrupts = <3>;
clocks = <&pll ATH79_CLK_REF>;
clock-names = "uart";
reg-io-width = <4>;
reg-shift = <2>;
no-loopback-test;
status = "disabled";
};
gpio: gpio@18040000 {
compatible = "qca,ar9340-gpio";
reg = <0x18040000 0x2c>;
interrupts = <2>;
ngpios = <23>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
pinmux: pinmux@1804002c {
compatible = "pinctrl-single";
reg = <0x1804002c 0x44>;
#size-cells = <0>;
pinctrl-single,bit-per-mux;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x1>;
#pinctrl-cells = <2>;
jtag_disable_pins: pinmux_jtag_disable_pins {
pinctrl-single,bits = <0x40 0x2 0x2>;
};
};
pll: pll-controller@18050000 {
compatible = "qca,ar9340-pll", "syscon";
reg = <0x18050000 0x4c>;
#clock-cells = <1>;
clocks = <&ref>;
clock-names = "ref";
clock-output-names = "cpu", "ddr", "ahb";
};
wdt: wdt@18060008 {
compatible = "qca,ar9340-wdt", "qca,ar7130-wdt";
reg = <0x18060008 0x8>;
interrupts = <4>;
clocks = <&pll ATH79_CLK_AHB>;
clock-names = "wdt";
};
rst: reset-controller@1806001c {
compatible = "qca,ar9340-reset", "qca,ar7100-reset";
reg = <0x1806001c 0x4>;
#reset-cells = <1>;
};
gmac: gmac@18070000 {
compatible = "qca,ar9340-gmac", "qca,ar9330-gmac";
reg = <0x18070000 0x14>;
};
};
usb: usb@1b000000 {
compatible = "generic-ehci";
reg = <0x1b000000 0x1d8>;
interrupts = <3>;
resets = <&rst 5>;
reset-names = "usb-host";
has-transaction-translator;
caps-offset = <0x100>;
phy-names = "usb-phy";
phys = <&usb_phy>;
status = "disabled";
};
spi: spi@1f000000 {
compatible = "qca,ar9340-spi", "qca,ar7100-spi";
reg = <0x1f000000 0x1c>;
clocks = <&pll ATH79_CLK_AHB>;
clock-names = "ahb";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usb_phy: usb-phy {
compatible = "qca,ar9340-usb-phy", "qca,ar7200-usb-phy";
reset-names = "usb-phy", "usb-suspend-override";
resets = <&rst 4>, <&rst 3>;
#phy-cells = <0>;
status = "disabled";
};
};
&cpuintc {
qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
<&ddr_ctrl 0>, <&ddr_ctrl 1>;
};
&mdio0 {
resets = <&rst 22>;
reset-names = "mdio";
};
&eth0 {
compatible = "qca,ar9340-eth", "syscon";
pll-data = <0x16000000 0x00000101 0x00001616>;
pll-reg = <0x4 0x2c 17>;
pll-handle = <&pll>;
resets = <&rst 8>, <&rst 9>;
reset-names = "mac", "phy";
};
&mdio1 {
resets = <&rst 23>;
reset-names = "mdio";
builtin-switch;
};
&eth1 {
compatible = "qca,ar9340-eth", "syscon";
resets = <&rst 12>, <&rst 13>;
reset-names = "mac", "phy";
};

3
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
View File

@ -624,7 +624,10 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update)
} else if (of_device_is_compatible(np, "qca,ar7242-eth")) {
ath79_set_pll(ag);
} else if (of_device_is_compatible(np, "qca,ar9130-eth")) {
ath79_set_pll(ag);
ath79_mii_ctrl_set_speed(ag);
} else if (of_device_is_compatible(np, "qca,ar9340-eth")) {
ath79_set_pll(ag);
} else if (of_device_is_compatible(np, "qca,qca9550-eth")) {
} else if (of_device_is_compatible(np, "qca,qca9560-eth")) {
}

3
target/linux/ath79/image/Makefile
View File

@ -70,4 +70,7 @@ include ./generic.mk
include ./generic-tp-link.mk
include ./generic-ubnt.mk
endif
ifeq ($(SUBTARGET),tiny)
include ./tiny-tp-link.mk
endif
$(eval $(call BuildImage))

84
target/linux/ath79/image/common-tp-link.mk Normal file
View File

@ -0,0 +1,84 @@
DEVICE_VARS += TPLINK_HWID TPLINK_HWREV TPLINK_FLASHLAYOUT TPLINK_HEADER_VERSION TPLINK_BOARD_NAME
define rootfs_align
$(patsubst %-256k,0x40000,$(patsubst %-128k,0x20000,$(patsubst %-64k,0x10000,$(patsubst squashfs%,0x4,$(patsubst root.%,%,$(1))))))
endef
# combine kernel and rootfs into one image
# mktplinkfw <type> <optional extra arguments to mktplinkfw binary>
# <type> is "sysupgrade" or "factory"
#
# -a align the rootfs start on an <align> bytes boundary
# -j add jffs2 end-of-filesystem markers
# -s strip padding from end of the image
# -X reserve <size> bytes in the firmware image (hexval prefixed with 0x)
define Build/mktplinkfw
-$(STAGING_DIR_HOST)/bin/mktplinkfw \
-H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) -N OpenWrt -V $(REVISION) \
-m $(TPLINK_HEADER_VERSION) \
-k $(IMAGE_KERNEL) \
-r $@ \
-o $@.new \
-j -X 0x40000 \
-a $(call rootfs_align,$(FILESYSTEM)) \
$(wordlist 2,$(words $(1)),$(1)) \
$(if $(findstring sysupgrade,$(word 1,$(1))),-s) && mv $@.new $@ || rm -f $@
endef
# mktplinkfw-combined
#
# -c combined image
define Build/mktplinkfw-combined
$(STAGING_DIR_HOST)/bin/mktplinkfw \
-H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) -N OpenWrt -V $(REVISION) $(1) \
-m $(TPLINK_HEADER_VERSION) \
-k $@ \
-o $@.new \
-s -S \
-c
@mv $@.new $@
endef
define Device/tplink
TPLINK_HWREV := 0x1
TPLINK_HEADER_VERSION := 1
LOADER_TYPE := gz
KERNEL := kernel-bin | append-dtb | lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | tplink-v1-header
IMAGES := sysupgrade.bin factory.bin
IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw sysupgrade | append-metadata
IMAGE/factory.bin := append-rootfs | mktplinkfw factory
endef
define Device/tplink-nolzma
$(Device/tplink)
LOADER_FLASH_OFFS := 0x22000
COMPILE := loader-$(1).gz
COMPILE/loader-$(1).gz := loader-okli-compile
KERNEL := kernel-bin | append-dtb | lzma | uImage lzma -M 0x4f4b4c49 | loader-okli $(1)
KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | tplink-v1-header
endef
define Device/tplink-4m
$(Device/tplink-nolzma)
TPLINK_FLASHLAYOUT := 4M
IMAGE_SIZE := 3904k
endef
define Device/tplink-4mlzma
$(Device/tplink)
TPLINK_FLASHLAYOUT := 4Mlzma
IMAGE_SIZE := 3904k
endef
define Device/tplink-8m
$(Device/tplink-nolzma)
TPLINK_FLASHLAYOUT := 8M
IMAGE_SIZE := 7936k
endef
define Device/tplink-8mlzma
$(Device/tplink)
TPLINK_FLASHLAYOUT := 8Mlzma
IMAGE_SIZE := 7936k
endef

95
target/linux/ath79/image/generic-tp-link.mk
View File

@ -1,78 +1,7 @@
DEVICE_VARS += TPLINK_HWID TPLINK_HWREV TPLINK_FLASHLAYOUT TPLINK_HEADER_VERSION TPLINK_BOARD_NAME
define rootfs_align
$(patsubst %-256k,0x40000,$(patsubst %-128k,0x20000,$(patsubst %-64k,0x10000,$(patsubst squashfs%,0x4,$(patsubst root.%,%,$(1))))))
endef
# combine kernel and rootfs into one image
# mktplinkfw <type> <optional extra arguments to mktplinkfw binary>
# <type> is "sysupgrade" or "factory"
#
# -a align the rootfs start on an <align> bytes boundary
# -j add jffs2 end-of-filesystem markers
# -s strip padding from end of the image
# -X reserve <size> bytes in the firmware image (hexval prefixed with 0x)
define Build/mktplinkfw
-$(STAGING_DIR_HOST)/bin/mktplinkfw \
-H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) -N OpenWrt -V $(REVISION) \
-m $(TPLINK_HEADER_VERSION) \
-k $(IMAGE_KERNEL) \
-r $@ \
-o $@.new \
-j -X 0x40000 \
-a $(call rootfs_align,$(FILESYSTEM)) \
$(wordlist 2,$(words $(1)),$(1)) \
$(if $(findstring sysupgrade,$(word 1,$(1))),-s) && mv $@.new $@ || rm -f $@
endef
# mktplinkfw-combined
#
# -c combined image
define Build/mktplinkfw-combined
$(STAGING_DIR_HOST)/bin/mktplinkfw \
-H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) -N OpenWrt -V $(REVISION) $(1) \
-m $(TPLINK_HEADER_VERSION) \
-k $@ \
-o $@.new \
-s -S \
-c
@mv $@.new $@
endef
include ./common-tp-link.mk
define Device/tplink
TPLINK_HWREV := 0x1
TPLINK_HEADER_VERSION := 1
LOADER_TYPE := gz
KERNEL := kernel-bin | append-dtb | lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | tplink-v1-header
IMAGES := sysupgrade.bin factory.bin
IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw sysupgrade
IMAGE/factory.bin := append-rootfs | mktplinkfw factory
endef
define Device/tplink-nolzma
$(Device/tplink)
LOADER_FLASH_OFFS := 0x22000
COMPILE := loader-$(1).gz
COMPILE/loader-$(1).gz := loader-okli-compile
KERNEL := kernel-bin | append-dtb | lzma | uImage lzma -M 0x4f4b4c49 | loader-okli $(1)
KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | tplink-v1-header
endef
define Device/tplink-4m
$(Device/tplink-nolzma)
TPLINK_FLASHLAYOUT := 4M
IMAGE_SIZE := 3904k
endef
define Device/tplink-8m
$(Device/tplink-nolzma)
TPLINK_FLASHLAYOUT := 8M
IMAGE_SIZE := 7936k
endef
define Device/tl_wr1043nd_v1
define Device/tl-wr1043nd-v1
$(Device/tplink-8m)
ATH_SOC := ar9132
DEVICE_TITLE := TP-LINK TL-WR1043N/ND v1
@ -80,4 +9,22 @@ define Device/tl_wr1043nd_v1
TPLINK_HWID := 0x10430001
SUPPORTED_DEVICES := tplink,tl-wr1043nd-v1 tl-wr1043nd
endef
#TARGET_DEVICES += tl_wr1043nd_v1
TARGET_DEVICES += tl-wr1043nd-v1
define Device/tl-wdr3600
$(Device/tplink-8mlzma)
ATH_SOC := ar9344
DEVICE_TITLE := TP-LINK TL-WDR3600
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x36000001
SUPPORTED_DEVICES := tplink,tl-wdr3600 tl-wdr3600
endef
TARGET_DEVICES += tl-wdr3600
define Device/tl-wdr4300
$(Device/tl-wdr3600)
DEVICE_TITLE := TP-LINK TL-WDR4300
TPLINK_HWID := 0x43000001
SUPPORTED_DEVICES := tplink,tl-wdr4300 tl-wdr4300
endef
TARGET_DEVICES += tl-wdr4300

1
target/linux/ath79/image/lzma-loader/src/Makefile
View File

@ -21,6 +21,7 @@ LOADER_DATA :=
BOARD :=
FLASH_OFFS :=
FLASH_MAX :=
KERNEL_CMDLINE := rootfstype=squashfs
CC := $(CROSS_COMPILE)gcc
LD := $(CROSS_COMPILE)ld

21
target/linux/ath79/image/tiny-tp-link.mk Normal file
View File

@ -0,0 +1,21 @@
include ./common-tp-link.mk
define Device/tl-wr703n
$(Device/tplink-4mlzma)
ATH_SOC := ar9331
DEVICE_TITLE := TP-Link TL-WR703N
DEVICE_PACKAGES := kmod-usb-chipidea2
TPLINK_HWID := 0x07030101
SUPPORTED_DEVICES := tplink,tl-wr703n tl-wr703n
endef
TARGET_DEVICES += tl-wr703n
define Device/tl-wr740n-v2
$(Device/tplink-4m)
ATH_SOC := ar7240
DEVICE_TITLE := TP-Link TL-WR740N/ND v2
TPLINK_HWID := 0x07400001
SUPPORTED_DEVICES := tplink,tl-wr740n-v2 tl-wr740n-v2
endef
TARGET_DEVICES += tl-wr740n-v2

27
target/linux/ath79/patches-4.14/0034-MIPS-ath79-ath9k-exports.patch Normal file
View File

@ -0,0 +1,27 @@
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -34,11 +34,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq);
enum ath79_soc_type ath79_soc;
unsigned int ath79_soc_rev;
+EXPORT_SYMBOL_GPL(ath79_soc_rev);
void __iomem *ath79_pll_base;
void __iomem *ath79_reset_base;
EXPORT_SYMBOL_GPL(ath79_reset_base);
-static void __iomem *ath79_ddr_base;
+void __iomem *ath79_ddr_base;
+EXPORT_SYMBOL_GPL(ath79_ddr_base);
static void __iomem *ath79_ddr_wb_flush_base;
static void __iomem *ath79_ddr_pci_win_base;
--- a/arch/mips/include/asm/mach-ath79/ath79.h
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
@@ -152,6 +152,7 @@ void ath79_ddr_wb_flush(unsigned int reg
void ath79_ddr_set_pci_windows(void);
extern void __iomem *ath79_pll_base;
+extern void __iomem *ath79_ddr_base;
extern void __iomem *ath79_reset_base;
static inline void ath79_pll_wr(unsigned reg, u32 val)

14
target/linux/ath79/tiny/config-default Normal file
View File

@ -0,0 +1,14 @@
CONFIG_BLK_MQ_PCI=y
CONFIG_LEDS_RESET=y
CONFIG_OF_ADDRESS_PCI=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_PCI=y
CONFIG_PCI_AR71XX=y
CONFIG_PCI_AR724X=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHY_AR7100_USB=y
CONFIG_PHY_AR7200_USB=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y

9
target/linux/ath79/tiny/profiles/00-default.mk Normal file
View File

@ -0,0 +1,9 @@
define Profile/Default
NAME:=Default Profile (all drivers)
PRIORITY := 1
endef
define Profile/Default/Description
Default package set compatible with most boards.
endef
$(eval $(call Profile,Default))

6
target/linux/ath79/tiny/target.mk Normal file
View File

@ -0,0 +1,6 @@
BOARDNAME:=Devices with small flash
FEATURES += squashfs small_flash
define Target/Description
Build firmware images for Atheros AR71xx/AR913x/AR934x based boards with small flash
endef