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ipq806x: add support for SURF G-NAT200 (#8810)
Hardware specs: SoC: Qualcomm IPQ8064 RAM: 1GB DDR3 SPI: 32MB S25FL256S NAND: 512MB S34MS04G2 (unused) Ethernet: 5x 10/100/1000 Mbps QCA8337 LED: internet, usb, sata Button: Reset USB: 1 x 3.0 Installation: Interrupt U-Boot, tftpboot initramfs image, than sysupgrade to openwrt. Signed-off-by: AmadeusGhost <amadeus@openjmu.xyz>
This commit is contained in:
AmadeusGhost
GitHub
parent
f266a8a3cb
commit
aafe115cda
@ -42,6 +42,11 @@ netgear,xr500)
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ucidef_set_led_switch "wan" "WAN" "white:wan" "switch0" "0x20"
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ucidef_set_led_ide "esata" "eSATA" "white:esata"
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;;
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surf,g-nat200)
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ucidef_set_led_ide "sata" "SATA" "green:sata"
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ucidef_set_led_switch "wan" "WAN" "green:internet" "switch0" "0x20"
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ucidef_set_led_usbport "usb" "USB" "green:usb" "usb1-port1" "usb2-port1"
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;;
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tplink,ad7200)
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ucidef_set_led_usbport "usb1" "USB 1" "blue:usb1" "usb1-port1" "usb2-port1"
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ucidef_set_led_usbport "usb2" "USB 2" "blue:usb3" "usb3-port1" "usb4-port1"
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@ -30,6 +30,7 @@ netgear,d7800 |\
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netgear,r7500 |\
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netgear,r7500v2 |\
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qcom,ipq8064-ap148 |\
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surf,g-nat200 |\
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tplink,vr2600v)
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ucidef_add_switch "switch0" \
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"1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0"
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@ -0,0 +1,296 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "qcom-ipq8064-v2.0.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "SURF G-NAT200";
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compatible = "surf,g-nat200", "qcom,ipq8064";
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memory@0 {
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reg = <0x42000000 0x3e000000>;
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device_type = "memory";
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};
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aliases {
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led-boot = &led_usb;
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led-failsafe = &led_usb;
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led-upgrade = &led_usb;
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mdio-gpio0 = &mdio0;
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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reset {
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label = "reset";
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gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&led_pins>;
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pinctrl-names = "default";
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led_usb: usb {
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label = "green:usb";
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gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
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};
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sata {
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label = "green:sata";
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gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
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};
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internet {
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label = "green:internet";
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gpios = <&qcom_pinmux 67 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&qcom_pinmux {
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led_pins: led_pins {
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mux {
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pins = "gpio7", "gpio26", "gpio67";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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button_pins: button_pins {
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mux {
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pins = "gpio54";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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spi_pins: spi_pins {
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mux {
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pins = "gpio18", "gpio19", "gpio21";
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function = "gsbi5";
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drive-strength = <10>;
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bias-none;
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};
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cs {
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pins = "gpio20";
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drive-strength = <12>;
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};
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};
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};
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&gsbi5 {
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qcom,mode = <GSBI_PROT_SPI>;
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status = "okay";
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spi@1a280000 {
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status = "okay";
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
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flash@0 {
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compatible = "s25fl256s1";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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SBL1@0 {
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label = "SBL1";
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reg = <0x0 0x20000>;
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read-only;
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};
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MIBIB@20000 {
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label = "MIBIB";
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reg = <0x20000 0x20000>;
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read-only;
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};
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SBL2@40000 {
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label = "SBL2";
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reg = <0x40000 0x40000>;
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read-only;
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};
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SBL3@80000 {
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label = "SBL3";
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reg = <0x80000 0x80000>;
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read-only;
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};
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DDRCONFIG@100000 {
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label = "DDRCONFIG";
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reg = <0x100000 0x10000>;
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read-only;
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};
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SSD@110000 {
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label = "SSD";
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reg = <0x110000 0x10000>;
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read-only;
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};
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TZ@120000 {
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label = "TZ";
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reg = <0x120000 0x80000>;
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read-only;
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};
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RPM@1a0000 {
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label = "RPM";
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reg = <0x1a0000 0x80000>;
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read-only;
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};
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APPSBL@220000 {
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label = "APPSBL";
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reg = <0x220000 0x80000>;
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read-only;
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};
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APPSBLENV@2a0000 {
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label = "APPSBLENV";
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reg = <0x2a0000 0x40000>;
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read-only;
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};
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ART: ART@2e0000 {
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label = "ART";
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reg = <0x2e0000 0x40000>;
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read-only;
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};
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firmware@320000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x320000 0x1a00000>;
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};
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};
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};
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};
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};
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&nand_controller {
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status = "okay";
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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nand@0 {
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reg = <0>;
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compatible = "qcom,nandcs";
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-ecc-step-size = <512>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "ubifs";
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reg = <0x0 0x1eaac000>;
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};
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};
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};
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};
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&mdio0 {
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status = "okay";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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phy0: ethernet-phy@0 {
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reg = <0>;
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qca,ar8327-initvals = <
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0x00004 0x7600000 /* PAD0_MODE */
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0x00008 0x1000000 /* PAD5_MODE */
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0x0000c 0x80 /* PAD6_MODE */
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0x000e4 0x6a545 /* MAC_POWER_SEL */
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0x000e0 0xc74164de /* SGMII_CTRL */
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0x0007c 0x4e /* PORT0_STATUS */
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0x00094 0x4e /* PORT6_STATUS */
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>;
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};
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phy4: ethernet-phy@4 {
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reg = <4>;
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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qcom,id = <1>;
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pinctrl-0 = <&rgmii2_pins>;
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pinctrl-names = "default";
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mtd-mac-address = <&ART 0x6>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gmac2 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <2>;
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mtd-mac-address = <&ART 0xc>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&adm_dma {
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status = "okay";
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};
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&pcie1 {
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status = "okay";
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};
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&sata_phy {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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@ -447,6 +447,18 @@ define Device/norton_core-518
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endef
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TARGET_DEVICES += norton_core-518
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define Device/surf_g-nat200
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$(call Device/LegacyImage)
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DEVICE_VENDOR := SURF
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DEVICE_MODEL := G-NAT200
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SOC := qcom-ipq8064
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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IMAGE_SIZE := 26624k
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IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
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endef
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TARGET_DEVICES += surf_g-nat200
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define Device/tplink_ad7200
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$(call Device/TpSafeImage)
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DEVICE_VENDOR := TP-Link
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@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -907,8 +907,32 @@ dtb-$(CONFIG_ARCH_QCOM) += \
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@@ -907,8 +907,33 @@ dtb-$(CONFIG_ARCH_QCOM) += \
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qcom-ipq4019-ap.dk04.1-c3.dtb \
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qcom-ipq4019-ap.dk07.1-c1.dtb \
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qcom-ipq4019-ap.dk07.1-c2.dtb \
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@ -24,6 +24,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
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+ qcom-ipq8064-ea7500-v1.dtb \
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+ qcom-ipq8064-ea8500.dtb \
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+ qcom-ipq8064-g10.dtb \
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+ qcom-ipq8064-g-nat200.dtb \
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+ qcom-ipq8064-r7500.dtb \
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+ qcom-ipq8064-r7500v2.dtb \
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+ qcom-ipq8064-e8350-v1.dtb \
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@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -842,7 +842,31 @@ dtb-$(CONFIG_ARCH_QCOM) += \
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@@ -842,7 +842,32 @@ dtb-$(CONFIG_ARCH_QCOM) += \
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qcom-ipq4019-ap.dk04.1-c3.dtb \
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qcom-ipq4019-ap.dk07.1-c1.dtb \
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qcom-ipq4019-ap.dk07.1-c2.dtb \
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@ -24,6 +24,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
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+ qcom-ipq8064-e8350-v1.dtb \
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+ qcom-ipq8064-ea8500.dtb \
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+ qcom-ipq8064-g10.dtb \
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+ qcom-ipq8064-g-nat200.dtb \
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+ qcom-ipq8064-r7500.dtb \
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+ qcom-ipq8064-r7500v2.dtb \
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+ qcom-ipq8064-rg-mtfi-m520.dtb \
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