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mediatek: dts: mt7988a: wire-up mediatek,pio for PHY LEDs

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The PHY driver needs to read a register containing the values of the
bootstrap pins (which happen to be the PHY LEDs) to determine the LED
polarities. Allow regmap access to first pinctrl bank by adding the
'syscon' compatible, and reference the pinctrl in the MDIO bus where
the PHY driver will look for it.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2023-07-08 16:27:25 +01:00
parent ebbf939276
commit a7509fafb9
4 changed files with 4 additions and 2 deletions
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1
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
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@ -156,6 +156,7 @@
mdio { mdio {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
mediatek,pio = <&pio>;
gsw_phy0: ethernet-phy@0 { gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481"; compatible = "ethernet-phy-id03a2.9481";

2
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
View File

@ -215,7 +215,7 @@
}; };
pio: pinctrl@1001f000 { pio: pinctrl@1001f000 {
compatible = "mediatek,mt7988-pinctrl"; compatible = "mediatek,mt7988-pinctrl", "syscon";
reg = <0 0x1001f000 0 0x1000>, reg = <0 0x1001f000 0 0x1000>,
<0 0x11c10000 0 0x1000>, <0 0x11c10000 0 0x1000>,
<0 0x11d00000 0 0x1000>, <0 0x11d00000 0 0x1000>,

1
target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
View File

@ -156,6 +156,7 @@
mdio { mdio {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
mediatek,pio = <&pio>;
gsw_phy0: ethernet-phy@0 { gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481"; compatible = "ethernet-phy-id03a2.9481";

2
target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
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@ -215,7 +215,7 @@
}; };
pio: pinctrl@1001f000 { pio: pinctrl@1001f000 {
compatible = "mediatek,mt7988-pinctrl"; compatible = "mediatek,mt7988-pinctrl", "syscon";
reg = <0 0x1001f000 0 0x1000>, reg = <0 0x1001f000 0 0x1000>,
<0 0x11c10000 0 0x1000>, <0 0x11c10000 0 0x1000>,
<0 0x11d00000 0 0x1000>, <0 0x11d00000 0 0x1000>,