From 9b76c3a241d1a3c088fb37ec45fdc99b8381453c Mon Sep 17 00:00:00 2001
From: coolsnowwolf <coolsnowwolf@gmail.com>
Date: Thu, 19 Oct 2017 22:40:22 +0800
Subject: [PATCH] brcm47xx mips:use kernel 4.9 by default

---
 .../broadcom-wl/patches/120-fixup-mac-addresses.patch    | 9 +++++----
 target/linux/brcm47xx/Makefile                           | 2 +-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/package/kernel/broadcom-wl/patches/120-fixup-mac-addresses.patch b/package/kernel/broadcom-wl/patches/120-fixup-mac-addresses.patch
index a07176d02..422f7f784 100644
--- a/package/kernel/broadcom-wl/patches/120-fixup-mac-addresses.patch
+++ b/package/kernel/broadcom-wl/patches/120-fixup-mac-addresses.patch
@@ -1,14 +1,15 @@
 --- a/driver/nvram_stub.c
 +++ b/driver/nvram_stub.c
-@@ -5,6 +5,7 @@
+@@ -5,6 +5,8 @@
  #include <siutils.h>
  #include <bcmendian.h>
  #include <bcmnvram.h>
 +#include <proto/ethernet.h>
++#include <linux/errno.h>
  
  #ifdef BCMDBG_ERR
  #define NVR_MSG(x) printf x
-@@ -24,6 +25,7 @@ typedef struct _vars {
+@@ -24,6 +26,7 @@ typedef struct _vars {
  static vars_t *vars = NULL;
  static int nvram_init_done = 0;
  extern char *nvram_buf[];
@@ -16,7 +17,7 @@
  
  int
  BCMATTACHFN(nvram_init)(void *si)
-@@ -55,6 +57,7 @@ BCMATTACHFN(nvram_init)(void *si)
+@@ -55,6 +58,7 @@ BCMATTACHFN(nvram_init)(void *si)
  	vars = new;
  
  	bcopy((char *)(&nvh[1]), new->vars, nvs);
@@ -24,7 +25,7 @@
  	return 0;
  }
  
-@@ -164,3 +167,65 @@ nvram_getall(char *buf, int count)
+@@ -164,3 +168,65 @@ nvram_getall(char *buf, int count)
  	*buf = '\0';
  	return 0;
  }
diff --git a/target/linux/brcm47xx/Makefile b/target/linux/brcm47xx/Makefile
index 73b7bff4f..f0ac7f94a 100644
--- a/target/linux/brcm47xx/Makefile
+++ b/target/linux/brcm47xx/Makefile
@@ -13,7 +13,7 @@ FEATURES:=squashfs usb
 SUBTARGETS:=generic mips74k legacy
 MAINTAINER:=Hauke Mehrtens <hauke@hauke-m.de>
 
-KERNEL_PATCHVER:=4.4
+KERNEL_PATCHVER:=4.9
 
 define Target/Description
 	Build firmware images for Broadcom based BCM47xx/53xx routers with MIPS CPU, *not* ARM.