Add basic support for TL-XTR10890 (#9202)

* kernel: add module for  bcm574xx 575xx serials

kernel: add module for bnxt_en Linux driver for the 
Broadcom NetXtreme-C/NetXtreme-E 
BCM573xx, BCM574xx, BCM575xx, NetXtreme-S BCM5880x
(up to 200 Gbps) Ethernet Network Controllers and Broadcom Nitro
BCM58700 4-port 1/2.5/10 Gbps Ethernet Network Controller.

* reapply bcm578xx sfp 2.5g patch

* add basic tplink-xtr10890 support

* update 10890dts and add to platform.sh

* update 10890 dts to try boot qcn9074

* revert qca-ssdk to original version
This commit is contained in:
zhouF96 2022-04-07 22:49:43 +08:00 committed by GitHub
parent 72a2df6a81
commit 98eeb48d70
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
8 changed files with 996 additions and 2 deletions

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@ -58,7 +58,8 @@ ALLWIFIBOARDS:= \
qnap_301w \
qxwlan_e2600ac \
zte_mf263 \
zte_mf269
zte_mf269 \
tplink_xtr10890
ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
@ -162,5 +163,6 @@ $(eval $(call generate-ipq-wifi-package,qnap_301w,QNAP 301w))
$(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))
$(eval $(call generate-ipq-wifi-package,zte_mf263,ZTE MF263))
$(eval $(call generate-ipq-wifi-package,zte_mf269,ZTE MF269))
$(eval $(call generate-ipq-wifi-package,tplink_xtr10890,TPLINK XTR10890))
$(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))

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@ -17,6 +17,9 @@ ipq807x_setup_interfaces()
zte,mf269)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
;;
tplink,xtr10890)
ucidef_set_interfaces_lan_wan "eth0 eth1 eth2 eth3 eth4" "eth5"
;;
*)
echo "Unsupported hardware. Network interfaces not initialized"
;;

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@ -15,6 +15,9 @@ case "$FIRMWARE" in
zte,mf269)
caldata_extract "0:ART" 0x1000 0x20000
;;
tplink,xtr10890)
caldata_extract "0:ART" 0x1000 0x20000
;;
esac
;;
*)

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@ -18,6 +18,9 @@ platform_do_upgrade() {
zte,mf269)
nand_do_upgrade "$1"
;;
tplink,xtr10890)
nand_do_upgrade "$1"
;;
*)
default_do_upgrade "$1"
;;

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@ -0,0 +1,969 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
/* Copyright (c) 2017, 2020-2021, The Linux Foundation. All rights reserved.
*/
#include "ipq8074.dtsi"
#include "ipq8074-hk-cpu.dtsi"
#include "ipq8074-ac-nss.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "TP-LINK XTR10890";
compatible = "tplink,xtr10890", "qcom,ipq8074";
interrupt-parent = <&intc>;
//qcom,msm-id = <0x143 0x0>, <0x186 0x0>, <0x158 0x0>, <0x188 0x0>;
aliases {
serial0 = &blsp1_uart5;
serial1 = &blsp1_uart3;
/*
* Aliases as required by u-boot
* to patch MAC addresses
*/
led-boot = &led_system_red;
led-failsafe = &led_system_green;
led-running = &led_system_red;
led-upgrade = &led_system_green;
ethernet0 = &dp1;
ethernet1 = &dp2;
ethernet2 = &dp3;
ethernet3 = &dp4;
ethernet4 = &dp5;
ethernet5 = &dp6;
};
chosen {
stdout-path = "serial0";
bootargs-append = " root=/dev/ubiblock0_1 rootfstype=squashfs";
};
reserved-memory {
/delete-node/ wifi_dump@51100000;
/delete-node/ wigig_dump@51300000;
qcn9000_pcie0: qcn9000_pcie0@51100000 {
no-map;
reg = <0x0 0x51100000 0x0 0x03500000>;
};
mhi_region0: dma_pool0@54600000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x54600000 0x0 0x00900000>;
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
status = "okay";
button@1 {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led_system_green: system-green {
label = "green:system";
gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
};
led_system_red: system-red {
label = "red:system";
gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;
};
10g-green {
label = "green:10g";
gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
};
sfp_green {
label = "green:sfp";
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
};
};
};
&sdhc_1 {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partition0@0 {
label = "0:SBL1";
reg = <0x0 0x80000>;
read-only;
};
partition1@80000 {
label = "0:MIBIB";
reg = <0x80000 0x40000>;
};
partition2@c0000 {
label = "0:BOOTCONFIG";
reg = <0xc0000 0x20000>;
read-only;
};
partition3@e0000 {
label = "0:BOOTCONFIG1";
reg = <0xe0000 0x20000>;
read-only;
};
partition4@100000 {
label = "0:QSEE";
reg = <0x100000 0x280000>;
read-only;
};
partition4@380000 {
label = "0:DEVCFG";
reg = <0x380000 0x20000>;
read-only;
};
partition4@3a0000 {
label = "0:RPM";
reg = <0x3a0000 0x40000>;
read-only;
};
partition5@3e0000 {
label = "0:CDT";
reg = <0x3e0000 0x20000>;
read-only;
};
partition6@400000 {
label = "0:APPSBLENV";
reg = <0x400000 0x40000>;
};
partition7@440000 {
label = "0:APPSBL";
reg = <0x440000 0x100000>;
};
partition8@540000 {
label = "0:ART";
reg = <0x540000 0x80000>;
};
partition12@5c0000 {
label = "rootfs";
reg = <0x5c0000 0x7000000>;
};
partition13@75c0000 {
label = "0:WIFIFW";
reg = <0x75c0000 0x900000>;
};
partition15@7ec0000 {
label = "0:ETHPHYFW";
reg = <0x7ec0000 0x80000>;
};
};
};
&mdio{
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 37 0>;
phy0: ethernet-phy@0 {
reg = <16>;
};
phy1: ethernet-phy@1 {
reg = <17>;
};
phy2: ethernet-phy@2 {
reg = <18>;
};
phy3: ethernet-phy@3 {
reg = <19>;
};
phy4: ethernet-phy@4 {
reg = <30>;
};
phy5: ethernet-phy@5 {
compatible ="ethernet-phy-ieee802.3-c45";
reg = <0>;
};
};
&tlmm {
sd_pins: sd-pinmux {
pins = "gpio63";
function = "sd_card";
drive-strength = <8>;
bias-pull-up;
};
button_pins: button_pins {
wps_button {
pins = "gpio50";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds_pinmux {
led_pwr_green {
pins = "gpio31";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_pwr_red {
pins = "gpio29";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sfp_green {
pins = "gpio30";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_10g_green {
pins = "gpio32";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
mdio_pins: mdio_pinmux {
mux_0 {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
qpic_pins: qpic-pins {
pins = "gpio1", "gpio3", "gpio4",
"gpio5", "gpio6", "gpio7",
"gpio8", "gpio10", "gpio11",
"gpio12", "gpio13", "gpio14",
"gpio15", "gpio17";
function = "qpic";
drive-strength = <8>;
bias-disable;
};
uniphy_pins: uniphy_pinmux {
mux {
pins = "gpio60";
function = "rx2";
bias-disable;
};
sfp_tx {
pins = "gpio52";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
output-low;
};
};
i2c_0_pins: i2c-0-pinmux {
pins = "gpio46", "gpio47";
function = "blsp1_i2c";
drive-strength = <8>;
bias-disable;
};
pwm_pins: pwm_pinmux {
mux_1 {
pins = "gpio25";
function = "pwm02";
drive-strength = <8>;
};
};
pcie0_pins: pcie_pins {
pcie0_rst {
pins = "gpio58";
function = "pcie0_rst";
drive-strength = <8>;
bias-pull-down;
};
pcie0_wake {
pins = "gpio59";
function = "pcie0_wake";
drive-strength = <8>;
bias-pull-down;
};
};
};
&blsp1_uart5 {
status = "okay";
};
&blsp1_spi1 {
status = "okay";
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-select = <0>;
m25p80@0 {
compatible = "n25q128a11";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <50000000>;
};
};
&blsp1_i2c2 {
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&ssphy_0 {
status = "okay";
};
&qusb_phy_0 {
status = "okay";
};
&ssphy_1 {
status = "okay";
};
&qusb_phy_1 {
status = "okay";
};
&usb_0 {
status = "okay";
};
&usb_1 {
status = "okay";
};
&prng {
status = "okay";
};
&cryptobam {
status = "okay";
};
&crypto {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qmp_pcie_phy0 {
status = "okay";
};
&pcie0 {
perst-gpio = <&tlmm 58 1>;
status = "okay";
pcie0_rp {
status = "ok";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
qrtr_instance_id = <0x20>;
#address-cells = <0x2>;
#size-cells = <0x2>;
memory-region = <&mhi_region0>;
// base-addr = <0x51100000>;
// m3-dump-addr = <0x53400000>;
// etr-addr = <0x53500000>;
// qcom,caldb-addr = <0x53600000>;
// mhi,max-channels = <30>;
// mhi,timeout = <10000>;
// qcom,board_id= <0xa4>;
// pcie0_mhi: pcie0_mhi {
// status = "ok";
// };
};
};
};
&qmp_pcie_phy1 {
//status = "okay";
status = "disabled";
};
&pcie1 {
perst-gpio = <&tlmm 61 0x1>;
status = "disabled";
};
&ess_switch {
status = "okay";
pinctrl-0 = <&uniphy_pins>;
pinctrl-names = "default";
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x3e>; /* lan port bitmap */
switch_wan_bmp = <0x40>; /* wan port bitmap */
switch_mac_mode = <0x0b>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0x0e>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0x0d>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <16>;
};
port@1 {
port_id = <2>;
phy_address = <17>;
};
port@2 {
port_id = <3>;
phy_address = <18>;
};
port@3 {
port_id = <4>;
phy_address = <19>;
};
port@4 {
port_id = <5>;
phy_address = <30>;
phy_i2c_address = <30>;
phy-i2c-mode; /*i2c access phy */
media-type = "sfp"; /* fiber mode */
};
port@5 {
port_id = <6>;
phy_address = <0>;
ethernet-phy-ieee802.3-c45;
};
};
port_scheduler_resource {
port@0 {
port_id = < 0x00 >;
ucast_queue = < 0x00 0x8f >;
mcast_queue = < 0x100 0x10f >;
l0sp = < 0x00 0x23 >;
l0cdrr = < 0x00 0x2f >;
l0edrr = < 0x00 0x2f >;
l1cdrr = < 0x00 0x07 >;
l1edrr = < 0x00 0x07 >;
};
port@1 {
port_id = < 0x01 >;
ucast_queue = < 0x90 0x9f >;
mcast_queue = < 0x110 0x113 >;
l0sp = < 0x24 0x27 >;
l0cdrr = < 0x30 0x3f >;
l0edrr = < 0x30 0x3f >;
l1cdrr = < 0x08 0x0b >;
l1edrr = < 0x08 0x0b >;
};
port@2 {
port_id = < 0x02 >;
ucast_queue = < 0xa0 0xaf >;
mcast_queue = < 0x114 0x117 >;
l0sp = < 0x28 0x2b >;
l0cdrr = < 0x40 0x4f >;
l0edrr = < 0x40 0x4f >;
l1cdrr = < 0x0c 0x0f >;
l1edrr = < 0x0c 0x0f >;
};
port@3 {
port_id = < 0x03 >;
ucast_queue = < 0xb0 0xbf >;
mcast_queue = < 0x118 0x11b >;
l0sp = < 0x2c 0x2f >;
l0cdrr = < 0x50 0x5f >;
l0edrr = < 0x50 0x5f >;
l1cdrr = < 0x10 0x13 >;
l1edrr = < 0x10 0x13 >;
};
port@4 {
port_id = < 0x04 >;
ucast_queue = < 0xc0 0xcf >;
mcast_queue = < 0x11c 0x11f >;
l0sp = < 0x30 0x33 >;
l0cdrr = < 0x60 0x6f >;
l0edrr = < 0x60 0x6f >;
l1cdrr = < 0x14 0x17 >;
l1edrr = < 0x14 0x17 >;
};
port@5 {
port_id = < 0x05 >;
ucast_queue = < 0xd0 0xdf >;
mcast_queue = < 0x120 0x123 >;
l0sp = < 0x34 0x37 >;
l0cdrr = < 0x70 0x7f >;
l0edrr = < 0x70 0x7f >;
l1cdrr = < 0x18 0x1b >;
l1edrr = < 0x18 0x1b >;
};
port@6 {
port_id = < 0x06 >;
ucast_queue = < 0xe0 0xef >;
mcast_queue = < 0x124 0x127 >;
l0sp = < 0x38 0x3b >;
l0cdrr = < 0x80 0x8f >;
l0edrr = < 0x80 0x8f >;
l1cdrr = < 0x1c 0x1f >;
l1edrr = < 0x1c 0x1f >;
};
port@7 {
port_id = < 0x07 >;
ucast_queue = < 0xf0 0xff >;
mcast_queue = < 0x128 0x12b >;
l0sp = < 0x3c 0x3f >;
l0cdrr = < 0x90 0x9f >;
l0edrr = < 0x90 0x9f >;
l1cdrr = < 0x20 0x23 >;
l1edrr = < 0x20 0x23 >;
};
};
port_scheduler_config {
port@0 {
port_id = < 0x00 >;
l1scheduler {
group@0 {
sp = < 0x00 0x01 >;
cfg = < 0x00 0x00 0x00 0x00 >;
};
};
l0scheduler {
group@0 {
ucast_queue = < 0x00 0x04 0x08 >;
mcast_queue = < 0x100 0x104 >;
cfg = < 0x00 0x00 0x00 0x00 0x00 >;
};
group@1 {
ucast_queue = < 0x01 0x05 0x09 >;
mcast_queue = < 0x101 0x105 >;
cfg = < 0x00 0x01 0x01 0x01 0x01 >;
};
group@2 {
ucast_queue = < 0x02 0x06 0x0a >;
mcast_queue = < 0x102 0x106 >;
cfg = < 0x00 0x02 0x02 0x02 0x02 >;
};
group@3 {
ucast_queue = < 0x03 0x07 0x0b >;
mcast_queue = < 0x103 0x107 >;
cfg = < 0x00 0x03 0x03 0x03 0x03 >;
};
};
};
port@1 {
port_id = < 0x01 >;
l1scheduler {
group@0 {
sp = < 0x24 >;
cfg = < 0x00 0x08 0x00 0x08 >;
};
group@1 {
sp = < 0x25 >;
cfg = < 0x01 0x09 0x01 0x09 >;
};
};
l0scheduler {
group@0 {
ucast_queue = < 0x90 >;
ucast_loop_pri = < 0x10 >;
mcast_queue = < 0x110 >;
mcast_loop_pri = < 0x04 >;
cfg = < 0x24 0x00 0x30 0x00 0x30 >;
};
};
};
port@2 {
port_id = < 0x02 >;
l1scheduler {
group@0 {
sp = < 0x28 >;
cfg = < 0x00 0x0c 0x00 0x0c >;
};
group@1 {
sp = < 0x29 >;
cfg = < 0x01 0x0d 0x01 0x0d >;
};
};
l0scheduler {
group@0 {
ucast_queue = < 0xa0 >;
ucast_loop_pri = < 0x10 >;
mcast_queue = < 0x114 >;
mcast_loop_pri = < 0x04 >;
cfg = < 0x28 0x00 0x40 0x00 0x40 >;
};
};
};
port@3 {
port_id = < 0x03 >;
l1scheduler {
group@0 {
sp = < 0x2c >;
cfg = < 0x00 0x10 0x00 0x10 >;
};
group@1 {
sp = < 0x2d >;
cfg = < 0x01 0x11 0x01 0x11 >;
};
};
l0scheduler {
group@0 {
ucast_queue = < 0xb0 >;
ucast_loop_pri = < 0x10 >;
mcast_queue = < 0x118 >;
mcast_loop_pri = < 0x04 >;
cfg = < 0x2c 0x00 0x50 0x00 0x50 >;
};
};
};
port@4 {
port_id = < 0x04 >;
l1scheduler {
group@0 {
sp = < 0x30 >;
cfg = < 0x00 0x14 0x00 0x14 >;
};
group@1 {
sp = < 0x31 >;
cfg = < 0x01 0x15 0x01 0x15 >;
};
};
l0scheduler {
group@0 {
ucast_queue = < 0xc0 >;
ucast_loop_pri = < 0x10 >;
mcast_queue = < 0x11c >;
mcast_loop_pri = < 0x04 >;
cfg = < 0x30 0x00 0x60 0x00 0x60 >;
};
};
};
port@5 {
port_id = < 0x05 >;
l1scheduler {
group@0 {
sp = < 0x34 >;
cfg = < 0x00 0x18 0x00 0x18 >;
};
group@1 {
sp = < 0x35 >;
cfg = < 0x01 0x19 0x01 0x19 >;
};
};
l0scheduler {
group@0 {
ucast_queue = < 0xd0 >;
ucast_loop_pri = < 0x10 >;
mcast_queue = < 0x120 >;
mcast_loop_pri = < 0x04 >;
cfg = < 0x34 0x00 0x70 0x00 0x70 >;
};
};
};
port@6 {
port_id = < 0x06 >;
l1scheduler {
group@0 {
sp = < 0x38 >;
cfg = < 0x00 0x1c 0x00 0x1c >;
};
group@1 {
sp = < 0x39 >;
cfg = < 0x01 0x1d 0x01 0x1d >;
};
};
l0scheduler {
group@0 {
ucast_queue = < 0xe0 >;
ucast_loop_pri = < 0x10 >;
mcast_queue = < 0x124 >;
mcast_loop_pri = < 0x04 >;
cfg = < 0x38 0x00 0x80 0x00 0x80 >;
};
};
};
port@7 {
port_id = < 0x07 >;
l1scheduler {
group@0 {
sp = < 0x3c >;
cfg = < 0x00 0x20 0x00 0x20 >;
};
group@1 {
sp = < 0x3d >;
cfg = < 0x01 0x21 0x01 0x21 >;
};
};
l0scheduler {
group@0 {
ucast_queue = < 0xf0 >;
ucast_loop_pri = < 0x10 >;
mcast_queue = < 0x128 >;
cfg = < 0x3c 0x00 0x90 0x00 0x90 >;
};
};
};
};
};
&soc {
phy@86000 {
status = "okay";
};
sd-pwrseq {
status = "okay";
};
sdhci@7864900 {
pinctrl-0 = <&sd_pins>;
pinctrl-names = "default";
cd-gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
status = "okay";
};
pwm {
pinctrl-0 = <&pwm_pins>;
pinctrl-names = "default";
used-pwm-indices = <1>, <0>, <0>, <0>;
status = "disabled";
};
// qcom,test@0 {
// status = "okay";
// };
dp1: dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a001000 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <16>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp2: dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a001200 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <17>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp3: dp3 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <18>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp4: dp4 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
reg = <0x3a001600 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <19>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp5: dp5 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x3a003000 0x3fff>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <30>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp6: dp6 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <6>;
reg = <0x3a007000 0x3fff>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <0>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
// qcn9000_pcie0: qcn9000_pcie0@51100000 {
// no-map;
// reg = <0x0 0x51100000 0x0 0x02D00000>;
// };
wifi1: wifi1@f00000 {
compatible = "qcom,cnss-qcn9000";
qcom,wlan-ramdump-dynamic = <0x400000>;
mhi,max-channels = <30>;
mhi,timeout = <10000>;
qrtr_node_id = <0x20>;
qca,auto-restart;
pcie0_mhi: pcie0_mhi {
status = "ok";
};
};
};
&wifi {
status = "okay";
qcom,board_id = <528>;
qcom,ath11k-calibration-variant = "TL-XTR10890";
};
&wifi1 {
base-addr = <0x51100000>;
m3-dump-addr = <0x53400000>;
etr-addr = <0x53500000>;
caldb-addr = <0x53600000>;
hremote-size = <0x2300000>;
tgt-mem-mode = <0x0>;
caldb-size = <0x800000>;
hremote_node = <&qcn9000_pcie0>;
pageable-size = <0x800000>;
board_id = <171>;
qcom,ath11k-calibration-variant = "TL-XTR10890";
status = "ok";
};

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@ -44,3 +44,16 @@ define Device/zte_mf269
DEVICE_PACKAGES := ipq-wifi-zte_mf269 uboot-envtools
endef
TARGET_DEVICES += zte_mf269
define Device/tplink_xtr10890
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := TPLINK
DEVICE_MODEL := XTR10890
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_DTS_CONFIG := config@hk01.c6
SOC := ipq8078
DEVICE_PACKAGES := ipq-wifi-tplink_xtr10890 uboot-envtools
endef
TARGET_DEVICES += tplink_xtr10890

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@ -12,12 +12,13 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -3,6 +3,8 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc.d
@@ -3,6 +3,9 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc.d
dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb
+dtb-$(CONFIG_ARCH_QCOM) += ipq8072-301w.dtb
+dtb-$(CONFIG_ARCH_QCOM) += ipq8071-mf269.dtb
+dtb-$(CONFIG_ARCH_QCOM) += ipq8078-xtr10890.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8150.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb