meson: fixes support for Amlogic S805

1. Fixes CPU and regulator boot problems 2. Enable CPUFREQ, I2C, RTC and THERMAL support 3. Disabled annoying debug logs, refresh kconfig 4. Fix compilation failure due to wrong kconfig Fixes: #10042 Signed-off-by: AmadeusGhost <amadeus@openjmu.xyz>
2025-04-16 04:13:31 +00:00 · 2022-09-21 23:15:10 +08:00 · 2022-09-21 23:15:10 +08:00 · 947b99eeb7
commit 947b99eeb7
parent 6fc2d00f25
4 changed files with 334 additions and 62 deletions
--- a/target/linux/meson/meson8b/config-5.10
+++ b/target/linux/meson/meson8b/config-5.10
@ -1,11 +1,11 @@
 # CONFIG_AIO is not set
 CONFIG_ALIGNMENT_TRAP=y
+CONFIG_AMLOGIC_THERMAL=y
 CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 CONFIG_ARCH_KEEP_MEMBLOCK=y
 CONFIG_ARCH_MESON=y
 CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-# CONFIG_ARCH_MSTARV7 is not set
 CONFIG_ARCH_MULTIPLATFORM=y
 CONFIG_ARCH_MULTI_V6_V7=y
 CONFIG_ARCH_MULTI_V7=y
@ -24,14 +24,10 @@ CONFIG_ARM_L1_CACHE_SHIFT=6
 CONFIG_ARM_L1_CACHE_SHIFT_6=y
 CONFIG_ARM_PATCH_IDIV=y
 CONFIG_ARM_PATCH_PHYS_VIRT=y
-# CONFIG_ARM_SCMI_PROTOCOL is not set
-CONFIG_ARM_SCPI_POWER_DOMAIN=y
-CONFIG_ARM_SCPI_PROTOCOL=y
 CONFIG_ARM_THUMB=y
 CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_UNWIND=y
 CONFIG_ARM_VIRT_EXT=y
-# CONFIG_AS73211 is not set
 CONFIG_ASN1=y
 CONFIG_ASSOCIATIVE_ARRAY=y
 CONFIG_ASYMMETRIC_KEY_TYPE=y
@ -45,7 +41,6 @@ CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_PM=y
 CONFIG_BLK_SCSI_REQUEST=y
 CONFIG_CACHE_L2X0=y
-# CONFIG_CHARGER_BQ25980 is not set
 CONFIG_CLKDEV_LOOKUP=y
 CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
 CONFIG_CLKSRC_MMIO=y
@ -69,11 +64,12 @@ CONFIG_COMMON_CLK_MESON_MPLL=y
 CONFIG_COMMON_CLK_MESON_PLL=y
 CONFIG_COMMON_CLK_MESON_REGMAP=y
 CONFIG_COMMON_CLK_PWM=y
-CONFIG_COMMON_CLK_SCPI=y
 CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_CONTIG_ALLOC=y
 CONFIG_COREDUMP=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_CPUFREQ_DT_PLATDEV=y
 CONFIG_CPU_32v6K=y
 CONFIG_CPU_32v7=y
 CONFIG_CPU_ABRT_EV7=y
@ -82,40 +78,41 @@ CONFIG_CPU_CACHE_VIPT=y
 CONFIG_CPU_COPY_V6=y
 CONFIG_CPU_CP15=y
 CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+CONFIG_CPU_FREQ_GOV_ATTR_SET=y
+CONFIG_CPU_FREQ_GOV_COMMON=y
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_STAT is not set
+CONFIG_CPU_FREQ_THERMAL=y
 CONFIG_CPU_HAS_ASID=y
 CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_RMAP=y
 CONFIG_CPU_SPECTRE=y
+CONFIG_CPU_THERMAL=y
 CONFIG_CPU_THUMB_CAPABLE=y
 CONFIG_CPU_TLB_V7=y
 CONFIG_CPU_V7=y
-# CONFIG_HAVE_ARM_ARCH_TIMER is not set
 CONFIG_CRC16=y
 CONFIG_CRC7=y
 CONFIG_CRC_ITU_T=y
-CONFIG_CRYPTO_AEAD=y
-CONFIG_CRYPTO_AEAD2=y
-CONFIG_CRYPTO_AKCIPHER=y
-CONFIG_CRYPTO_AKCIPHER2=y
-CONFIG_CRYPTO_CCM=y
 CONFIG_CRYPTO_CMAC=y
 CONFIG_CRYPTO_CRC32=y
 CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_CTR=y
 CONFIG_CRYPTO_DRBG=y
 CONFIG_CRYPTO_DRBG_HMAC=y
 CONFIG_CRYPTO_DRBG_MENU=y
-CONFIG_CRYPTO_GCM=y
 CONFIG_CRYPTO_GF128MUL=y
-CONFIG_CRYPTO_GHASH=y
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HASH2=y
 CONFIG_CRYPTO_HASH_INFO=y
 CONFIG_CRYPTO_HMAC=y
 CONFIG_CRYPTO_JITTERENTROPY=y
 CONFIG_CRYPTO_LIB_SHA256=y
-CONFIG_CRYPTO_MANAGER=y
-CONFIG_CRYPTO_MANAGER2=y
-CONFIG_CRYPTO_NULL=y
 CONFIG_CRYPTO_NULL2=y
 CONFIG_CRYPTO_RNG=y
 CONFIG_CRYPTO_RNG2=y
@ -124,48 +121,28 @@ CONFIG_CRYPTO_RSA=y
 CONFIG_CRYPTO_SEQIV=y
 CONFIG_CRYPTO_SHA256=y
 CONFIG_DCACHE_WORD_ACCESS=y
-CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
 CONFIG_DMA_CMA=y
 CONFIG_DMA_OPS=y
-# CONFIG_DMA_PERNUMA_CMA is not set
 CONFIG_DMA_REMAP=y
 CONFIG_DMA_SHARED_BUFFER=y
 CONFIG_DRM=y
-# CONFIG_DRM_ANALOGIX_ANX6345 is not set
 CONFIG_DRM_BRIDGE=y
-# CONFIG_DRM_CDNS_MHDP8546 is not set
-# CONFIG_DRM_CHRONTEL_CH7033 is not set
-# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
-# CONFIG_DRM_DISPLAY_CONNECTOR is not set
 CONFIG_DRM_FBDEV_EMULATION=y
 CONFIG_DRM_FBDEV_OVERALLOC=100
 CONFIG_DRM_GEM_CMA_HELPER=y
 CONFIG_DRM_KMS_CMA_HELPER=y
 CONFIG_DRM_KMS_FB_HELPER=y
 CONFIG_DRM_KMS_HELPER=y
-# CONFIG_DRM_LONTIUM_LT9611 is not set
-# CONFIG_DRM_LVDS_CODEC is not set
 CONFIG_DRM_MALI_DISPLAY=y
 # CONFIG_DRM_MESON is not set
-# CONFIG_DRM_NWL_MIPI_DSI is not set
 CONFIG_DRM_PANEL=y
 CONFIG_DRM_PANEL_BRIDGE=y
 CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
-# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set
-# CONFIG_DRM_PARADE_PS8640 is not set
-# CONFIG_DRM_SIMPLE_BRIDGE is not set
-# CONFIG_DRM_TIDSS is not set
-# CONFIG_DRM_TI_TPD12S015 is not set
-# CONFIG_DRM_TOSHIBA_TC358762 is not set
-# CONFIG_DRM_TOSHIBA_TC358768 is not set
-# CONFIG_DRM_TOSHIBA_TC358775 is not set
-# CONFIG_DRM_TVE200 is not set
 CONFIG_DTC=y
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_DWMAC_DWC_QOS_ETH=y
 # CONFIG_DWMAC_GENERIC is not set
-# CONFIG_DWMAC_INTEL_PLAT is not set
 CONFIG_DWMAC_MESON=y
 CONFIG_EDAC_ATOMIC_SCRUB=y
 CONFIG_EDAC_SUPPORT=y
@ -200,10 +177,14 @@ CONFIG_FS_POSIX_ACL=y
 CONFIG_FTRACE=y
 # CONFIG_FTRACE_SYSCALLS is not set
 CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_GENERIC_ADC_THERMAL=y
 CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ARCH_TOPOLOGY=y
 CONFIG_GENERIC_BUG=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_CPU_VULNERABILITIES=y
 CONFIG_GENERIC_EARLY_IOREMAP=y
 CONFIG_GENERIC_GETTIMEOFDAY=y
 CONFIG_GENERIC_IDLE_POLL_SETUP=y
@ -231,22 +212,20 @@ CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAVE_ARM_TWD=y
 CONFIG_HAVE_SMP=y
-# CONFIG_HDC2010 is not set
 CONFIG_HDMI=y
-# CONFIG_HISI_HIKEY_USB is not set
 CONFIG_HWMON=y
 CONFIG_HW_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_MESON=y
-# CONFIG_HW_RANDOM_XIPHERA is not set
 CONFIG_HZ=100
 CONFIG_HZ_100=y
 CONFIG_HZ_FIXED=0
 CONFIG_I2C=y
 CONFIG_I2C_ALGOBIT=y
 CONFIG_I2C_BOARDINFO=y
-# CONFIG_I2C_MESON is not set
+CONFIG_I2C_MESON=y
 CONFIG_ICPLUS_PHY=y
 CONFIG_IIO=y
 CONFIG_INPUT=y
@ -267,13 +246,15 @@ CONFIG_IRQ_WORK=y
 # CONFIG_IR_SIR is not set
 # CONFIG_IR_TOY is not set
 CONFIG_JBD2=y
+CONFIG_KCMP=y
 CONFIG_KEYS=y
 # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
 CONFIG_LEDS_GPIO=y
 CONFIG_LIBFDT=y
+CONFIG_LIB_MEMNEQ=y
 # CONFIG_LIRC is not set
-CONFIG_LLD_VERSION=0
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
 # CONFIG_MACH_MESON6 is not set
 CONFIG_MACH_MESON8=y
 CONFIG_MAGIC_SYSRQ=y
@ -285,6 +266,7 @@ CONFIG_MDIO_BUS_MUX=y
 # CONFIG_MDIO_BUS_MUX_MESON_G12A is not set
 CONFIG_MDIO_BUS_MUX_MMIOREG=y
 CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_DEVRES=y
 # CONFIG_MDIO_GPIO is not set
 CONFIG_MEMFD_CREATE=y
 CONFIG_MEMORY=y
@ -303,7 +285,6 @@ CONFIG_MESON_MX_SOCINFO=y
 CONFIG_MESON_SARADC=y
 CONFIG_MESON_WATCHDOG=y
 # CONFIG_MFD_KHADAS_MCU is not set
-# CONFIG_MFD_ROHM_BD71828 is not set
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGHT_HAVE_CACHE_L2X0=y
 CONFIG_MIGRATION=y
@ -328,15 +309,17 @@ CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_MPILIB=y
 CONFIG_MQ_IOSCHED_DEADLINE=y
 CONFIG_MQ_IOSCHED_KYBER=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEED_PER_CPU_KM=y
 CONFIG_NEON=y
 CONFIG_NET_CLS_ACT=y
 CONFIG_NET_EMATCH=y
+CONFIG_NET_FLOW_LIMIT=y
 CONFIG_NET_PTP_CLASSIFY=y
 CONFIG_NLS=y
 CONFIG_NO_HZ_COMMON=y
 CONFIG_NO_HZ_IDLE=y
+CONFIG_NR_CPUS=4
 CONFIG_NVMEM=y
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
@ -352,6 +335,7 @@ CONFIG_OLD_SIGACTION=y
 CONFIG_OLD_SIGSUSPEND3=y
 CONFIG_OUTER_CACHE=y
 CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_PADATA=y
 CONFIG_PAGE_OFFSET=0xC0000000
 CONFIG_PAGE_POOL=y
 CONFIG_PCS_XPCS=y
@ -377,6 +361,7 @@ CONFIG_PM=y
 CONFIG_PM_CLK=y
 CONFIG_PM_GENERIC_DOMAINS=y
 CONFIG_PM_GENERIC_DOMAINS_OF=y
+CONFIG_PM_OPP=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_POWER_RESET=y
@ -389,6 +374,8 @@ CONFIG_PWM=y
 CONFIG_PWM_MESON=y
 CONFIG_PWM_SYSFS=y
 CONFIG_RATIONAL=y
+CONFIG_RCU_NEED_SEGCBLIST=y
+CONFIG_RCU_STALL_COMMON=y
 CONFIG_RC_CORE=y
 CONFIG_RC_DEVICES=y
 # CONFIG_RC_XBOX_DVD is not set
@ -397,24 +384,31 @@ CONFIG_REALTEK_PHY=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_REGULATOR=y
-CONFIG_REGULATOR_DEBUG=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_GPIO=y
-# CONFIG_REGULATOR_RT4801 is not set
-# CONFIG_REGULATOR_RTMV20 is not set
+CONFIG_REGULATOR_PWM=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RESET_MESON=y
 # CONFIG_RESET_MESON_AUDIO_ARB is not set
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_MESON=y
+# CONFIG_RTC_DRV_MESON_VRTC is not set
+CONFIG_RTC_I2C_AND_SPI=y
+CONFIG_RTC_MC146818_LIB=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_SCHED_THERMAL_PRESSURE=y
 CONFIG_SCSI=y
 CONFIG_SDIO_UART=y
-# CONFIG_SECONDARY_TRUSTED_KEYRING is not set
-CONFIG_SENSORS_ARM_SCPI=y
-# CONFIG_SENSORS_MR75203 is not set
+CONFIG_SENSORS_IIO_HWMON=y
 CONFIG_SERIAL_8250_FSL=y
 CONFIG_SERIAL_MCTRL_GPIO=y
 CONFIG_SERIAL_MESON=y
 CONFIG_SERIAL_MESON_CONSOLE=y
 CONFIG_SG_POOL=y
+CONFIG_SMP=y
+CONFIG_SMP_ON_UP=y
 CONFIG_SOC_BUS=y
 CONFIG_SPARSE_IRQ=y
 CONFIG_SPI=y
@ -427,18 +421,22 @@ CONFIG_STMMAC_ETH=y
 CONFIG_STMMAC_PLATFORM=y
 # CONFIG_STMMAC_SELFTESTS is not set
 CONFIG_SWPHY=y
-# CONFIG_SWP_EMULATE is not set
+CONFIG_SWP_EMULATE=y
 CONFIG_SYNC_FILE=y
-# CONFIG_SYNTH_EVENTS is not set
-# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set
-CONFIG_SYSTEM_TRUSTED_KEYRING=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERMAL_OF=y
 CONFIG_TICK_CPU_ACCOUNTING=y
 CONFIG_TIMER_OF=y
 CONFIG_TIMER_PROBE=y
-# CONFIG_TINYDRM_ILI9486 is not set
-CONFIG_TINY_SRCU=y
+CONFIG_TREE_RCU=y
+CONFIG_TREE_SRCU=y
 CONFIG_TUN=y
+# CONFIG_UCLAMP_TASK is not set
 CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
 CONFIG_UNWINDER_ARM=y
 CONFIG_USB=y
@ -455,13 +453,11 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_HCD_PLATFORM=y
 # CONFIG_USB_ETH is not set
 CONFIG_USB_GADGET=y
-# CONFIG_USB_MAX3420_UDC is not set
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_OTG=y
 CONFIG_USB_OTG_FSM=y
 CONFIG_USB_PHY=y
-# CONFIG_USB_RAW_GADGET is not set
 CONFIG_USB_ROLE_SWITCH=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_STORAGE_REALTEK=y
@ -479,5 +475,6 @@ CONFIG_VT_CONSOLE=y
 CONFIG_VT_HW_CONSOLE_BINDING=y
 CONFIG_WATCHDOG_CORE=y
 CONFIG_X509_CERTIFICATE_PARSER=y
+CONFIG_XPS=y
 CONFIG_ZBOOT_ROM_BSS=0
 CONFIG_ZBOOT_ROM_TEXT=0
--- a/target/linux/meson/patches-5.10/001-v5.12-ARM-dts-meson-move-iio-hwmon-for-the-SoC.patch
+++ b/target/linux/meson/patches-5.10/001-v5.12-ARM-dts-meson-move-iio-hwmon-for-the-SoC.patch
@ -0,0 +1,94 @@
+From e9ced25e41588a2ff95280b4d3dabf3a0865513b Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Mon, 21 Dec 2020 19:13:02 +0100
+Subject: [PATCH] ARM: dts: meson: move iio-hwmon for the SoC temperature to
+ meson.dtsi
+
+The SoC temperature can be retrieved from ADC channel 8 on all 32-bit
+SoCs (Meson6, Meson8, Meson8b and Meson8m2). Move the iio-hwmon instance
+to meson.dtsi instead of duplicating it in all board.dts.
+If the temperature sensor calibration data is missing for a board then
+iio-hwmon will simply not probe.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Link: https://lore.kernel.org/r/20201221181306.904272-2-martin.blumenstingl@googlemail.com
+---
+ arch/arm/boot/dts/meson.dtsi              | 5 +++++
+ arch/arm/boot/dts/meson8b-ec100.dts       | 5 -----
+ arch/arm/boot/dts/meson8b-mxq.dts         | 5 -----
+ arch/arm/boot/dts/meson8b-odroidc1.dts    | 5 -----
+ arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 5 -----
+ 5 files changed, 5 insertions(+), 20 deletions(-)
+
+--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
+@@ -11,6 +11,11 @@
+ 	#size-cells = <1>;
+ 	interrupt-parent = <&gic>;
+ 
+	iio-hwmon {
+		compatible = "iio-hwmon";
+		io-channels = <&saradc 8>;
+	};
+
+ 	soc {
+ 		compatible = "simple-bus";
+ 		#address-cells = <1>;
+--- a/arch/arm/boot/dts/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/meson8b-ec100.dts
+@@ -70,11 +70,6 @@
+ 		timeout-ms = <20000>;
+ 	};
+ 
+-	iio-hwmon {
+-		compatible = "iio-hwmon";
+-		io-channels = <&saradc 8>;
+-	};
+-
+ 	leds {
+ 		compatible = "gpio-leds";
+ 
+--- a/arch/arm/boot/dts/meson8b-mxq.dts
+++ b/arch/arm/boot/dts/meson8b-mxq.dts
+@@ -27,11 +27,6 @@
+ 		reg = <0x40000000 0x40000000>;
+ 	};
+ 
+-	iio-hwmon {
+-		compatible = "iio-hwmon";
+-		io-channels = <&saradc 8>;
+-	};
+-
+ 	vcck: regulator-vcck {
+ 		compatible = "pwm-regulator";
+ 
+--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
+@@ -85,11 +85,6 @@
+ 			  1800000 1>;
+ 	};
+ 
+-	iio-hwmon {
+-		compatible = "iio-hwmon";
+-		io-channels = <&saradc 8>;
+-	};
+-
+ 	rtc32k_xtal: rtc32k-xtal-clk {
+ 		/* X3 in the schematics */
+ 		compatible = "fixed-clock";
+--- a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
+++ b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
+@@ -45,11 +45,6 @@
+ 		};
+ 	};
+ 
+-	iio-hwmon {
+-		compatible = "iio-hwmon";
+-		io-channels = <&saradc 8>;
+-	};
+-
+ 	vcc_3v3: regulator-vcc3v3 {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "VCC3V3";
--- a/target/linux/meson/patches-5.10/002-v5.12-ARM-dts-meson-add-the-ADC-thermal-sensor.patch
+++ b/target/linux/meson/patches-5.10/002-v5.12-ARM-dts-meson-add-the-ADC-thermal-sensor.patch
@ -0,0 +1,36 @@
+From c8559511107120403f7810428f50fc68fd77ed5a Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Mon, 21 Dec 2020 19:13:03 +0100
+Subject: [PATCH] ARM: dts: meson: add the ADC thermal sensor to meson.dtsi
+
+The SoC temperature can be retrieved from ADC channel 8 on all 32-bit
+SoCs (Meson6, Meson8, Meson8b and Meson8m2). Add a "generic-adc-thermal"
+instance to meson.dtsi so the thermal sensor is available for all SoCs.
+If the temperature sensor calibration data is missing for a board then
+the "generic-adc-thermal" will not probe and not register a thermal
+sensor.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Link: https://lore.kernel.org/r/20201221181306.904272-3-martin.blumenstingl@googlemail.com
+---
+ arch/arm/boot/dts/meson.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
+@@ -298,6 +298,13 @@
+ 		};
+ 	};
+ 
+	thermal_sensor: thermal-sensor {
+		compatible = "generic-adc-thermal";
+		#thermal-sensor-cells = <0>;
+		io-channels = <&saradc 8>;
+		io-channel-names = "sensor-channel";
+	};
+
+ 	xtal: xtal-clk {
+ 		compatible = "fixed-clock";
+ 		clock-frequency = <24000000>;
--- a/target/linux/meson/patches-5.10/003-v5.12-ARM-dts-meson8b-add-the-thermal-zones-with.patch
+++ b/target/linux/meson/patches-5.10/003-v5.12-ARM-dts-meson8b-add-the-thermal-zones-with.patch
@ -0,0 +1,145 @@
+From 9073f694efd8733b0e7c97d3396d81161bd05582 Mon Sep 17 00:00:00 2001
+From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Date: Mon, 21 Dec 2020 19:13:05 +0100
+Subject: [PATCH] ARM: dts: meson8b: add the thermal-zones with cooling
+ configuration
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The vendor kernel uses the following thermal-zone settings:
+<= 70°C:
+- CPU frequency limited to 1.488GHz
+- GPU limited to 511MHz and 2 cores (pixel processors)
+
+<= 80°C:
+- CPU frequency limited to 1.2GHz
+- GPU limited to 435MHz and 2 cores (pixel processors)
+
+<= 90°C:
+- CPU frequency limited to 0.804GHz
+- GPU limited to 328MHz and 1 core (pixel processor)
+
+Add simplified thermal configuration which is taken from the
+GXBB/GXL/GXM SoC family (which uses the same manufacturing process and
+has the same maximum junction temperature of 125°C). With this the
+thermal framework will try to keep the SoC temperature at or below 80°C
+which is identical to the vendor kernel (with the exception of one CPU
+frequency step from 1.488GHz to 1.536GHz).
+
+The number of GPU cores are not taken into account as this is not
+supported.
+
+Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Link: https://lore.kernel.org/r/20201221181306.904272-5-martin.blumenstingl@googlemail.com
+---
+ arch/arm/boot/dts/meson8b.dtsi | 54 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 54 insertions(+)
+
+--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
+@@ -10,6 +10,7 @@
+ #include <dt-bindings/power/meson8-power.h>
+ #include <dt-bindings/reset/amlogic,meson8b-reset.h>
+ #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
+#include <dt-bindings/thermal/thermal.h>
+ #include "meson.dtsi"
+ 
+ / {
+@@ -26,6 +27,7 @@
+ 			resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
+ 			operating-points-v2 = <&cpu_opp_table>;
+ 			clocks = <&clkc CLKID_CPUCLK>;
+			#cooling-cells = <2>; /* min followed by max */
+ 		};
+ 
+ 		cpu1: cpu@201 {
+@@ -37,6 +39,7 @@
+ 			resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
+ 			operating-points-v2 = <&cpu_opp_table>;
+ 			clocks = <&clkc CLKID_CPUCLK>;
+			#cooling-cells = <2>; /* min followed by max */
+ 		};
+ 
+ 		cpu2: cpu@202 {
+@@ -48,6 +51,7 @@
+ 			resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
+ 			operating-points-v2 = <&cpu_opp_table>;
+ 			clocks = <&clkc CLKID_CPUCLK>;
+			#cooling-cells = <2>; /* min followed by max */
+ 		};
+ 
+ 		cpu3: cpu@203 {
+@@ -59,6 +63,7 @@
+ 			resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
+ 			operating-points-v2 = <&cpu_opp_table>;
+ 			clocks = <&clkc CLKID_CPUCLK>;
+			#cooling-cells = <2>; /* min followed by max */
+ 		};
+ 	};
+ 
+@@ -167,6 +172,54 @@
+ 		};
+ 	};
+ 
+	thermal-zones {
+		soc {
+			polling-delay-passive = <250>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			thermal-sensors = <&thermal_sensor>;
+
+			cooling-maps {
+				map0 {
+					trip = <&soc_passive>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map1 {
+					trip = <&soc_hot>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+
+			trips {
+				soc_passive: soc-passive {
+					temperature = <80000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "passive";
+				};
+
+				soc_hot: soc-hot {
+					temperature = <90000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "hot";
+				};
+
+				soc_critical: soc-critical {
+					temperature = <110000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "critical";
+				};
+			};
+		};
+	};
+
+ 	mmcbus: bus@c8000000 {
+ 		compatible = "simple-bus";
+ 		reg = <0xc8000000 0x8000>;
+@@ -221,6 +274,7 @@
+ 			clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
+ 			clock-names = "bus", "core";
+ 			operating-points-v2 = <&gpu_opp_table>;
+			#cooling-cells = <2>; /* min followed by max */
+ 		};
+ 	};
+ }; /* end of / */